)]}' { "log": [ { "commit": "6b98cd5aad3bb51a3b5b51ba670ab8d5fe1cc487", "tree": "c38970f362c4de594a7433de5989cae0a199d199", "parents": [ "b42282e5a05018ecdc0d63a4ad530b0999785912", "8faa7cf828bca1745a4ed599876567f5afc47544" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Apr 11 15:44:38 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Apr 11 15:44:38 2011 -0700" }, "message": "Merge branch \u0027spi/merge\u0027 of git://git.secretlab.ca/git/linux-2.6\n\n* \u0027spi/merge\u0027 of git://git.secretlab.ca/git/linux-2.6:\n dt/fsldma: fix build warning caused by of_platform_device changes\n spi: Fix race condition in stop_queue()\n gpio/pch_gpio: Fix output value of pch_gpio_direction_output()\n gpio/ml_ioh_gpio: Fix output value of ioh_gpio_direction_output()\n gpio/pca953x: fix error handling path in probe() call\n" }, { "commit": "8faa7cf828bca1745a4ed599876567f5afc47544", "tree": "68044fdb97c9551a6a647cfa30943940f287c385", "parents": [ "850a28ecd8044ef36b2c7699d2e3736a410b4d0a" ], "author": { "name": "Ira W. Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Apr 07 10:33:03 2011 -0700" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Sun Apr 10 23:34:38 2011 -0700" }, "message": "dt/fsldma: fix build warning caused by of_platform_device changes\n\nCommit 000061245a6797d542854106463b6b20fbdcb12e, \"dt/powerpc:\nEliminate users of of_platform_{,un}register_driver\" forgot to convert\nthe type of structure passed into platform_device_register() when it\nwas converted from of_platform_device_register. Fix it.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "26cf445721763d61b08ce394f8bdbd4c5610b563", "tree": "a26099dd232b5d0071604787a9eb27b37602645f", "parents": [ "8b9686ff4ddfdf45662024edd567920e6db87beb", "99b662e511e08230e8422e77cbe4fd31ed173df6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Apr 07 12:48:45 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Apr 07 12:48:45 2011 -0700" }, "message": "Merge branch \u0027sh-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* \u0027sh-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:\n sh: select ARCH_NO_SYSDEV_OPS.\n sh: fix build error in board-sh7757lcr.c\n sh: landisk: Remove whitespace\n sh: landisk: Remove mv_nr_irqs\n sh: sh-sci: Fix double initialization by serial_console_setup\n serial: sh-sci: prevent setup of uninitialized serial console\n dma: shdma: add checking the DMAOR_AE in sh_dmae_err\n" }, { "commit": "25985edcedea6396277003854657b5f3cb31a628", "tree": "f026e810210a2ee7290caeb737c23cb6472b7c38", "parents": [ "6aba74f2791287ec407e0f92487a725a25908067" ], "author": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Wed Mar 30 22:57:33 2011 -0300" }, "committer": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Thu Mar 31 11:26:23 2011 -0300" }, "message": "Fix common misspellings\n\nFixes generated by \u0027codespell\u0027 and manually reviewed.\n\nSigned-off-by: Lucas De Marchi \u003clucas.demarchi@profusion.mobi\u003e\n" }, { "commit": "ff7690b48ae8571d930a2621e21f6e5a41e42b6d", "tree": "5909d3f9014cdf842d8ccdc584c752eaa7499a02", "parents": [ "89078d572eb9ce8d4c04264b8b0ba86de0d74c8f" ], "author": { "name": "Yoshihiro Shimoda", "email": "yoshihiro.shimoda.uh@renesas.com", "time": "Wed Feb 09 07:46:47 2011 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 29 15:53:31 2011 +0900" }, "message": "dma: shdma: add checking the DMAOR_AE in sh_dmae_err\n\nThe irq numbers of tranfer end and address error are assigned same number\non some CPU. So the sh_dmae_err() should check the AE flag in DMAOR.\n\nSigned-off-by: Yoshihiro Shimoda \u003cyoshihiro.shimoda.uh@renesas.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "3a80e52486eff1221ece5902b423da59f263069d", "tree": "861c8d394b3cf7a25cf6309f429e9be4449d72cd", "parents": [ "18bcd0c8cb7d85a9063b88ec810dc1cdc0974518", "61a167419b318373d414d0edf109fe02b4f96d49" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 27 20:58:56 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 27 20:58:56 2011 -0700" }, "message": "Merge branch \u0027irq-cleanup-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027irq-cleanup-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n tile: Use generic show_interupts()\n tile: Convert to new irq function names\n dma: Ipu: Convert interupt code\n" }, { "commit": "6a03513825db4db57fa93821a0c04dbbb39a68e6", "tree": "cddcf6a74ee0022d62218bf4a6caf6f4fe952b0c", "parents": [ "ab7798ffcf98b11a9525cf65bacdae3fd58d357f" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 25 12:21:38 2011 +0100" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 25 22:09:00 2011 +0100" }, "message": "dma: Ipu: Convert interupt code\n\nConvert to the new irq chip functions and cleanup the name space.\n\n[ Guennadi reported: irq_data_get_chip_data is undefined. Yes, I screwed up. \n it needs to be irq_data_get_irq_chip_data ]\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nTested-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nLKML-Reference: \u003calpine.LFD.2.00.1103251220000.31464@localhost6.localdomain6\u003e\n" }, { "commit": "e46dccff341068d8530610a822965794f70b998f", "tree": "a1f567ef8299629456f8a0309761f7d217a95006", "parents": [ "07ae2a08deb141f22d7974615bd3006e8dce3883" ], "author": { "name": "Andres Salomon", "email": "dilinger@queued.net", "time": "Thu Feb 17 19:07:15 2011 -0800" }, "committer": { "name": "Samuel Ortiz", "email": "sameo@linux.intel.com", "time": "Wed Mar 23 10:41:52 2011 +0100" }, "message": "mfd: mfd_cell is now implicitly available to timberdale drivers\n\nThe cell\u0027s platform_data is now accessed with a helper function;\nchange clients to use that, and remove the now-unused data_size.\n\nNote that the mfd\u0027s platform_data is marked __devinitdata. This\nis still correct in all cases except for the timbgpio driver, whose\nremove hook has been changed to no longer reference the pdata.\n\nSigned-off-by: Andres Salomon \u003cdilinger@queued.net\u003e\nSigned-off-by: Samuel Ortiz \u003csameo@linux.intel.com\u003e\n" }, { "commit": "6447f55da90b77faec1697d499ed7986bb4f6de6", "tree": "2d360d48121bdaa354d1ef19fed48467d08dfb1f", "parents": [ "c50e3f512a5a15a73acd94e6ec8ed63cd512e04f", "3ea205c449d2b5996d0256aa8b2894f7aea228a2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 22 17:53:13 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 22 17:53:13 2011 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (66 commits)\n avr32: at32ap700x: fix typo in DMA master configuration\n dmaengine/dmatest: Pass timeout via module params\n dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs\n fsldma: make halt behave nicely on all supported controllers\n fsldma: reduce locking during descriptor cleanup\n fsldma: support async_tx dependencies and automatic unmapping\n fsldma: fix controller lockups\n fsldma: minor codingstyle and consistency fixes\n fsldma: improve link descriptor debugging\n fsldma: use channel name in printk output\n fsldma: move related helper functions near each other\n dmatest: fix automatic buffer unmap type\n drivers, pch_dma: Fix warning when CONFIG_PM\u003dn.\n dmaengine/dw_dmac fix: use readl \u0026 writel instead of __raw_readl \u0026 __raw_writel\n avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize\n dw_dmac: Setting Default Burst length for transfers as 16.\n dw_dmac: Allow src/dst msize \u0026 flow controller to be configured at runtime\n dw_dmac: Changing type of src_master and dest_master to u8.\n dw_dmac: Pass Channel Priority from platform_data\n dw_dmac: Pass Channel Allocation Order from platform_data\n ...\n" }, { "commit": "d42efe6bfb4eed8314c8ce3547f21954a4140399", "tree": "180057c663bf6bbfdbdcc7561254d9b86db5c0a1", "parents": [ "5b9a4f98b2e29fb92a4a54ef12b2e3940f941ed9" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Tue Mar 22 17:27:25 2011 +0530" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 22 11:12:29 2011 -0700" }, "message": "dmaengine/dmatest: Pass timeout via module params\n\nWhen we try to test all channels present on our controller together, some\nchannels of lower priority may be very slow as compared to others. If number of\ntransfers is unlimited, some channels may timeout and will not finish within 3\nseconds. Thus, while doing such regress testing we may need to have higher value\nof timeouts. This patch adds support for passing timeout value via module\nparameters. Default value is 3 msec, a negative value means max timeout\npossible.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5b9a4f98b2e29fb92a4a54ef12b2e3940f941ed9", "tree": "6811bbf0924085a9f17029d82e2065e3be5c1520", "parents": [ "a00ae34ac8bc8a5897d9b6b9b685c39b955b14b9" ], "author": { "name": "Uwe Kleine-König", "email": "u.kleine-koenig@pengutronix.de", "time": "Tue Mar 22 10:35:17 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 22 11:11:20 2011 -0700" }, "message": "dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs\n\nAs a side effect this makes IMX_DMA selectable on i.MX21 again, because\nthe symbol ARCH_MX21 doesn\u0027t exist (MACH_MX21 would have been more correct).\n\nSigned-off-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a44f99c7efdb88fa41128065c9a9445c19894e34", "tree": "9d9dc6026b2c0409eca05e360c98b8a688ccdb1e", "parents": [ "b87a2d3e3147bd140da2eae584772c353d11421b", "22942c00a6ad6e9e93b53811a6de72c821c15d22" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 20 18:14:55 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 20 18:14:55 2011 -0700" }, "message": "Merge branch \u0027trivial\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6\n\n* \u0027trivial\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6: (25 commits)\n video: change to new flag variable\n scsi: change to new flag variable\n rtc: change to new flag variable\n rapidio: change to new flag variable\n pps: change to new flag variable\n net: change to new flag variable\n misc: change to new flag variable\n message: change to new flag variable\n memstick: change to new flag variable\n isdn: change to new flag variable\n ieee802154: change to new flag variable\n ide: change to new flag variable\n hwmon: change to new flag variable\n dma: change to new flag variable\n char: change to new flag variable\n fs: change to new flag variable\n xtensa: change to new flag variable\n um: change to new flag variables\n s390: change to new flag variable\n mips: change to new flag variable\n ...\n\nFix up trivial conflict in drivers/hwmon/Makefile\n" }, { "commit": "e16b396ce314b2bcdfe6c173fe075bf8e3432368", "tree": "640f0f56f2ea676647af4eb42d32fa56be2ee549", "parents": [ "7fd23a24717a327a66f3c32d11a20a2f169c824f", "e6e8dd5055a974935af1398c8648d4a9359b0ecb" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 18 10:37:40 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 18 10:37:40 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (47 commits)\n doc: CONFIG_UNEVICTABLE_LRU doesn\u0027t exist anymore\n Update cpuset info \u0026 webiste for cgroups\n dcdbas: force SMI to happen when expected\n arch/arm/Kconfig: remove one to many l\u0027s in the word.\n asm-generic/user.h: Fix spelling in comment\n drm: fix printk typo \u0027sracth\u0027\n Remove one to many n\u0027s in a word\n Documentation/filesystems/romfs.txt: fixing link to genromfs\n drivers:scsi Change printk typo initate -\u003e initiate\n serial, pch uart: Remove duplicate inclusion of linux/pci.h header\n fs/eventpoll.c: fix spelling\n mm: Fix out-of-date comments which refers non-existent functions\n drm: Fix printk typo \u0027failled\u0027\n coh901318.c: Change initate to initiate.\n mbox-db5500.c Change initate to initiate.\n edac: correct i82975x error-info reported\n edac: correct i82975x mci initialisation\n edac: correct commented info\n fs: update comments to point correct document\n target: remove duplicate include of target/target_core_device.h from drivers/target/target_core_hba.c\n ...\n\nTrivial conflict in fs/eventpoll.c (spelling vs addition)\n" }, { "commit": "6d7ed21d17e640b120b902a314143e5ef4917a70", "tree": "87d00d7057dd9c57175f3367715d18b1958f096a", "parents": [ "ec0afc9311adcfb10b90e547c23250f63939f990", "bafc8205dc7bf2488175008deedc14ff4939d174", "9c9585e0e96f8340d704256db00b2ec28240c36e", "bfddc1c325d1e092d9fb1b5b03a05b818f82d35f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 17 18:48:35 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 17 18:48:35 2011 -0700" }, "message": "Merge branches \u0027defcfg\u0027, \u0027drivers\u0027 and \u0027cyberpro-next\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027defcfg\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n ARM: 6647/1: add Versatile Express defconfig\n ARM: 6644/1: mach-ux500: update the U8500 defconfig\n\n* \u0027drivers\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n ARM: 6764/1: pl011: factor out FIFO to TTY code\n ARM: 6763/1: pl011: add optional RX DMA to PL011 v2\n ARM: 6758/1: amba: support pm ops\n ARM: amba: make amba_driver id_table const\n ARM: amba: make internal ID table handling const\n ARM: amba: make probe() functions take const id tables\n ARM: 6662/1: amba: make amba_bustype non-static\n ARM: mmci: add dmaengine-based DMA support\n ARM: mmci: no need for separate host-\u003edata_xfered\n ARM: mmci: avoid unnecessary switch to data available PIO interrupts\n ARM: mmci: no need to call flush_dcache_page() with sg_miter API\n ARM: mmci: avoid reporting too many completed bytes on fifo overrun\n ALSA: AACI: make fifo variables more explanitory\n ALSA: AACI: no need to call snd_pcm_period_elapsed() for each period\n ALSA: AACI: use snd_pcm_lib_period_bytes()\n ALSA: AACI: clean up AACI announcement printk\n ALSA: AACI: fix channel mask selection\n ALSA: AACI: fix number of channels for record\n ALSA: AACI: fix multiple IRQ claiming\n\n* \u0027cyberpro-next\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n VIDEO: cyberpro: remove unused cyber2000fb_get_fb_var()\n VIDEO: cyberpro: remove useless function extreg pointers\n VIDEO: cyberpro: update handling of device structures\n VIDEO: cyberpro: add support for video capture I2C\n VIDEO: cyberpro: make \u0027reg_b0_lock\u0027 always present\n VIDEO: cyberpro: add I2C support\n VIDEO: cyberpro: select lowest multipler/divisor for PLL\n" }, { "commit": "990710ca5ddf28aef9c34594b3ffe71544e5faa4", "tree": "c3bb05e0685919ffa0682b36cc717f824e60d6fd", "parents": [ "8ec3b8432e4fe8d452f88f1ed9a3450e715bb797" ], "author": { "name": "matt mooney", "email": "mfm@muteddisk.com", "time": "Fri Jan 14 06:12:37 2011 -0800" }, "committer": { "name": "Michal Marek", "email": "mmarek@suse.cz", "time": "Thu Mar 17 14:02:59 2011 +0100" }, "message": "dma: change to new flag variable\n\nReplace EXTRA_CFLAGS with ccflags-y.\n\nSigned-off-by: matt mooney \u003cmfm@muteddisk.com\u003e\nAcked-by: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nSigned-off-by: Michal Marek \u003cmmarek@suse.cz\u003e\n" }, { "commit": "a00ae34ac8bc8a5897d9b6b9b685c39b955b14b9", "tree": "72be720ffc981acbf15f6c8ef7381a5e38416e2e", "parents": [ "dc8d4091575ba81e886ebcdfd1e559c981f82f86" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:55:01 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:37 2011 -0800" }, "message": "fsldma: make halt behave nicely on all supported controllers\n\nThe original dma_halt() function set the CA (channel abort) bit on both\nthe 83xx and 85xx controllers. This is incorrect on the 83xx, where this\nbit means TEM (transfer error mask) instead. The 83xx doesn\u0027t support\nchannel abort, so we only do this operation on 85xx.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "dc8d4091575ba81e886ebcdfd1e559c981f82f86", "tree": "701c55d8e54d8f4c376a0af4ce10356875c86164", "parents": [ "9c4d1e7bdeb1ed4dc0c3341d40662a6fbc5f2dc2" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:55:00 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:37 2011 -0800" }, "message": "fsldma: reduce locking during descriptor cleanup\n\nThis merges the fsl_chan_ld_cleanup() function into the dma_do_tasklet()\nfunction to reduce locking overhead. In the best case, we will be able\nto keep the DMA controller busy while we are freeing used descriptors.\nIn all cases, the spinlock is grabbed two times fewer than before on\neach transaction.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9c4d1e7bdeb1ed4dc0c3341d40662a6fbc5f2dc2", "tree": "1139343b541dea7344c4436065ea5960eccad844", "parents": [ "f04cd40701deace2efb9edd7120e59366bda2118" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:59 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:37 2011 -0800" }, "message": "fsldma: support async_tx dependencies and automatic unmapping\n\nPrevious to this patch, the dma_run_dependencies() function has been\ncalled while holding desc_lock. This function can call tx_submit() for\nother descriptors, which may try to re-grab the lock. Avoid this by\nmoving the descriptors to be cleaned up to a temporary list, and\ndropping the lock before cleanup.\n\nAt the same time, add support for automatic unmapping of src and dst\nbuffers, as offered by the DMAEngine API.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "f04cd40701deace2efb9edd7120e59366bda2118", "tree": "00cff019a00b6d091028cfa5037548c631b8a0b1", "parents": [ "31f4306c83a2daa3e348056b720de511bffe5a9b" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:58 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:36 2011 -0800" }, "message": "fsldma: fix controller lockups\n\nEnabling poisoning in the dmapool API quickly showed that the DMA\ncontroller was fetching descriptors that should not have been in use.\nThis has caused intermittent controller lockups during testing.\n\nI have been unable to figure out the exact set of conditions which cause\nthis to happen. However, I believe it is related to the driver using the\nhardware registers to track whether the controller is busy or not. The\ncode can incorrectly decide that the hardware is idle due to lag between\nregister writes and the hardware actually becoming busy.\n\nTo fix this, the driver has been reworked to explicitly track the state\nof the hardware, rather than try to guess what it is doing based on the\nregister values.\n\nThis has passed dmatest with 10 threads per channel, 100000 iterations\nper thread several times without error. Previously, this would fail\nwithin a few seconds.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "31f4306c83a2daa3e348056b720de511bffe5a9b", "tree": "a11e82cde6d5ce8098c9fd02c7069be74b400517", "parents": [ "0ab09c36818ca88f65c88f4d8c6d067fbf10578d" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:57 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:36 2011 -0800" }, "message": "fsldma: minor codingstyle and consistency fixes\n\nThis fixes some minor violations of the coding style. It also changes\nthe style of the device_prep_dma_*() function definitions so they are\nidentical.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0ab09c36818ca88f65c88f4d8c6d067fbf10578d", "tree": "0159493342cc6130ce8cdafe3cc568a80f25b2b1", "parents": [ "b158471ef63bf399165db96e945a828096502d9d" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:56 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:36 2011 -0800" }, "message": "fsldma: improve link descriptor debugging\n\nThis adds better tracking to link descriptor allocations, callbacks, and\nfrees. This makes it much easier to track errors with link descriptors.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b158471ef63bf399165db96e945a828096502d9d", "tree": "95e446042b7d0ff527dae7b419f47c16cffce8c4", "parents": [ "e8bd84df27c5921a9ac866aef06e044590ac118f" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:55 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:36 2011 -0800" }, "message": "fsldma: use channel name in printk output\n\nThis makes debugging the driver much easier when multiple channels are\nrunning concurrently. In addition, you can see how much descriptor\nmemory each channel has allocated via the dmapool API in sysfs.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e8bd84df27c5921a9ac866aef06e044590ac118f", "tree": "2445eb4275f72c55873a6433caacc59d5088e63a", "parents": [ "b203bd3f6b9c3db3b1979c2ff79bb2b9be8f03a3" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:54 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:36 2011 -0800" }, "message": "fsldma: move related helper functions near each other\n\nThis is a purely cosmetic cleanup. It is nice to have related functions\nright next to each other in the code.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b203bd3f6b9c3db3b1979c2ff79bb2b9be8f03a3", "tree": "647397b857fcad368078a72711ad2d25c7ea030a", "parents": [ "6c11371dd17c5bd29e3a53cf5263be6ea67c51e4" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:35 2011 -0800" }, "message": "dmatest: fix automatic buffer unmap type\n\nThe dmatest code relies on the DMAEngine API to automatically call\ndma_unmap_single() on src buffers. The flags it passes are incorrect,\nfix them.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0b863b333f529c7ddd8bee58e6696a7254417a05", "tree": "4f25d8bd9fa20d6d9f4b60ef8dc8675c4b2cbeaa", "parents": [ "29782da5f0206335e2325508ba4fee0d624ddab6" ], "author": { "name": "Rakib Mullick", "email": "rakib.mullick@gmail.com", "time": "Sun Mar 06 17:26:10 2011 +0600" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:26:50 2011 +0530" }, "message": "drivers, pch_dma: Fix warning when CONFIG_PM\u003dn.\n\nWhen CONFIG_PM\u003dn, we get the following warning:\n\ndrivers/dma/pch_dma.c:741: warning: ‘pch_dma_suspend’ defined but not used\ndrivers/dma/pch_dma.c:755: warning: ‘pch_dma_resume’ defined but not used\n\nTo fix it, wrap pch_dma_{suspend,resume} and\npch_dma_{save,restore}_regs functions with CONFIG_PM.\n\nSigned-off-by: Rakib Mullick \u003crakib.mullick@gmail.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "29782da5f0206335e2325508ba4fee0d624ddab6", "tree": "e9398004d1647b7082b86dcc392999de69e8e16b", "parents": [ "1c5b0538c719f52cface39f699fb5d39a50149d6" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Fri Mar 04 14:58:32 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dmaengine/dw_dmac fix: use readl \u0026 writel instead of __raw_readl \u0026 __raw_writel\n\nOn ARMv7 cores, device memory mapped as Normal Non-cacheable, may not guarantee\nordered access causing failures in device drivers that do not use the mandatory\nmemory barriers. readl \u0026 writel versions contain necessary memory barriers for\nthis.\n\ncommit 79f64dbf68c8a9779a7e9a25e0a9f0217a25b57a: \"ARM: 6273/1: Add barriers to\nthe I/O accessors if ARM_DMA_MEM_BUFFERABLE\" can be referred for more\ninformation on this.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "e51dc53b8c7fa2d9ac4ef8f317f5dfe07a79e65a", "tree": "dedf52405560df64c96b2e33b7d55ac1f3df3b39", "parents": [ "ee66509d7f354eecb45ac99f21ea6aa8650dea7e" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:25 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Setting Default Burst length for transfers as 16.\n\nThis patch sets default Burst length for all transfer to 16. This will\nenhance performance when user doesn\u0027t have any chan-\u003eprivate data.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "ee66509d7f354eecb45ac99f21ea6aa8650dea7e", "tree": "206438e7c0ef9a7f0633fe44d6f306fdbf4b0b4e", "parents": [ "59c22fc11d12b69da36c6585a38229863ba0bb16" ], "author": { "name": "Viresh KUMAR", "email": "viresh.kumar@st.com", "time": "Fri Mar 04 15:42:51 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Allow src/dst msize \u0026 flow controller to be configured at runtime\n\nMsize or Burst Size is peripheral dependent in case of prep_slave_sg and\ncyclic_prep transfers, and in case of memcpy transfers it is platform dependent.\nSo msize configuration must come from platform data.\n\nAlso some peripherals (ex: JPEG), need to be flow controller for dma transfers,\nso this information in case of slave_sg \u0026 cyclic_prep transfers must come from\nplatform data.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "93317e8e35b77633d589fe0e132291195757d785", "tree": "c3419c1a02e3952506ca0af281f9f9c5bc52888d", "parents": [ "b0c3130d69bda5cd91aa3b3f08e7878df49fde69" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:22 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Pass Channel Priority from platform_data\n\nIn Synopsys designware, channel priority is programmable. This patch adds\nsupport for passing channel priority through platform data. By default Ascending\nchannel priority will be followed, i.e. channel 0 will get highest priority and\nchannel 7 will get lowest.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "b0c3130d69bda5cd91aa3b3f08e7878df49fde69", "tree": "a75091d3489cc2db2a806cd30d0ef6f80419e86d", "parents": [ "e518076ef8cb56adb558ff56ad5bfa0cd9f3abd9" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:21 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Pass Channel Allocation Order from platform_data\n\nIn SPEAr Platform channels 4-7 have more Fifo depth. So we must get better\nchannel first. This patch introduces concept of channel allocation order in\ndw_dmac. If user doesn\u0027t pass anything or 0, than normal (ascending) channel\nallocation will follow, else channels will be allocated in descending order.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "e518076ef8cb56adb558ff56ad5bfa0cd9f3abd9", "tree": "ce195fa32ee663a23a346ac042b70b01385ab58d", "parents": [ "418e74070662e1ae7d9bb5202f773d35c9a7f05e" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:20 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finish\n\ndwc_desc_get checks all descriptors for DMA_CTRL_ACK before allocating them for\ntransfers. And descriptors are not marked with DMA_CRTL_ACK after transfer\nfinishes. Thus descriptor once used is not usable again. This patch marks\ndescriptors with DMA_CRTL_ACK after dma xfer finishes\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "418e74070662e1ae7d9bb5202f773d35c9a7f05e", "tree": "23bd64f0d62af665ae69b67f608cb416e60e16ea", "parents": [ "a02274564dd78f7edde3c9ff197ed44f2f8a5a81" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Fri Mar 04 15:42:50 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Change value of DWC_MAX_COUNT to 4095.\n\nEvery descriptor can transfer a maximum count of 4095 (12 bits, in control reg),\nSo we must have DWC_MAX_COUNT as 4095 instead of 2048.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a02274564dd78f7edde3c9ff197ed44f2f8a5a81", "tree": "ffbce0c15b05ea36a1fb2470ad5ab573ba175f98", "parents": [ "569432efa7975f5795efb8142134f5a098942381" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:18 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Adding support for 64 bit access width for memcpy xfers\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "569432efa7975f5795efb8142134f5a098942381", "tree": "a62ccafa3526a7da531b56d2a75c1bc21b3ff05c", "parents": [ "f336e42f73d93b74fd21bf9176ee6c7ab8b195c5" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:17 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Calling dwc_scan_descriptors from dwc_tx_status() after taking lock\n\nLock must be taken before calling dwc_scan_descriptors, as this may\naccess/modify shared data and queues. dwc_tx_status wasn\u0027t taking lock before\ncalling this routine. This patch add code that takes lock before calling\ndwc_scan_descriptors.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f336e42f73d93b74fd21bf9176ee6c7ab8b195c5", "tree": "fd42f601403891f212943fe3c186a30bc5698c0f", "parents": [ "cb689a706d17ef19a61735670ded60466dd015fa" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:16 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Move single descriptor from dwc-\u003equeue to dwc-\u003eactive_list in dwc_complete_all\n\ndwc_complete_all and other routines was removing all descriptors from dwc-\u003equeue\nand pushing them to dwc-\u003eactive_list. Only one was required to be removed. Also\nwe are calling dwc_dostart, once list is fixed.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "cb689a706d17ef19a61735670ded60466dd015fa", "tree": "34172bc4222c9d4a5970a7509f5adde79e500d46", "parents": [ "f44ad7e91dd12bed0959b3e715f4f3ab84951a59" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:15 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Replace module_init() with subsys_initcall()\n\nIn some cases users of dw_dmac are initialized before dw_dmac, and if they try\nto use dw_dmac, they simply fail. So its better we register init() routine\nof driver using subsys_initcall() instead of module_init(), so that dma driver\nis available at the earliest possible.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f44ad7e91dd12bed0959b3e715f4f3ab84951a59", "tree": "ad40522874528c87cfc367f882df147afdf71e9d", "parents": [ "a580b8c5429a624d120cd603e1498bf676e2b4da" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:14 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Remove compilation dependency from AVR32 and put on HAVE_CLK\n\nThis driver will now be used in atleast two platforms AVR32 \u0026 ARM. And there is\nno actual hardware dependency of this driver over AVR32 or ARM. So this\ndependency can be removed altogether.\n\nAlso dw_dmac driver uses clk framework and must have compilation dependency on\nHAVE_CLK\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a580b8c5429a624d120cd603e1498bf676e2b4da", "tree": "14e4bd82f203bf9f43fa19341d85d993e5a4c569", "parents": [ "26d890f0d09fd58f7194aad651e86283cb9e6574" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Sun Feb 27 00:47:42 2011 +0800" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Mar 02 07:06:27 2011 +0530" }, "message": "dmaengine: mxs-dma: add dma support for i.MX23/28\n\nThis patch adds dma support for Freescale MXS-based SoC i.MX23/28,\nincluding apbh-dma and apbx-dma.\n\n* apbh-dma and apbx-dma are supported in the driver as two mxs-dma\n instances.\n\n* apbh-dma is different between mx23 and mx28, hardware version\n register is used to differentiate.\n\n* mxs-dma supports pio function besides data transfer. The driver\n uses dma_data_direction DMA_NONE to identify the pio mode, and\n steals sgl and sg_len to get pio words and numbers from clients.\n\n* mxs dmaengine has some very specific features, like sense function\n and the special NAND support (nand_lock, nand_wait4ready). These\n are too specific to implemented in generic dmaengine driver.\n\n* The driver refers to imx-sdma and only a single descriptor is\n statically assigned to each channel.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "ae0e47f02aaedbfdd5e4bec73f79b714d758223d", "tree": "348f99385f42a2f698bddb4ced3e6c472e5d68cc", "parents": [ "ddf12286951aee1e7763112cf26629de3fabe6ae" ], "author": { "name": "Justin P. Mattock", "email": "justinmattock@gmail.com", "time": "Tue Mar 01 15:06:02 2011 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Mar 01 15:47:58 2011 +0100" }, "message": "Remove one to many n\u0027s in a word\n\nSigned-off-by: Justin P. Mattock \u003cjustinmattock@gmail.com\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "000061245a6797d542854106463b6b20fbdcb12e", "tree": "08ead444b59ce33cf533b19c1c6d338dcec4649d", "parents": [ "710ac54be44e0cc53f5bf29b03d12c8706e7077a" ], "author": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Tue Feb 22 19:59:54 2011 -0700" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Mon Feb 28 01:36:39 2011 -0700" }, "message": "dt/powerpc: Eliminate users of of_platform_{,un}register_driver\n\nGet rid of old users of of_platform_driver in arch/powerpc. Most\nof_platform_driver users can be converted to use the platform_bus\ndirectly.\n\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n\n" }, { "commit": "26d890f0d09fd58f7194aad651e86283cb9e6574", "tree": "28cc2ba40f6d8d1e106f27662d49edf430a0a884", "parents": [ "c5a9f9d0895b2c16908979244d3d678fd6db0545" ], "author": { "name": "Tomoya MORINAGA", "email": "tomoya-linux@dsn.okisemi.com", "time": "Fri Feb 18 10:01:21 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Feb 26 20:18:33 2011 +0530" }, "message": "pch_dma: set the number of array correctly\n\nset the number of array correctly.\n\nSigned-off-by: Tomoya MORINAGA \u003ctomoya-linux@dsn.okisemi.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "c5a9f9d0895b2c16908979244d3d678fd6db0545", "tree": "da7855891e874662423a796e5834ba06294adccb", "parents": [ "0670e7157f75ec6d2231fbc6f67b075d6b6d486f" ], "author": { "name": "Tomoya MORINAGA", "email": "tomoya-linux@dsn.okisemi.com", "time": "Fri Feb 18 10:01:20 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Feb 26 20:18:29 2011 +0530" }, "message": "pch_dma: fix kernel error issue\n\nfix the following kernel error\n\n------------[ cut here ]------------\nWARNING: at kernel/softirq.c:159 _local_bh_enable_ip.clone.5+0x35/0x71()\nHardware name: To be filled by O.E.M.\nModules linked in: pch_uart pch_dma fuse mga drm cpufreq_ondemand acpi_cpufreq mperf ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_filter ip6_tables ipv6 uinput snd_hda_codec_realtek snd_hda_intel snd_hda_codec matroxfb_base snd_hwdep 8250_pnp snd_seq snd_seq_device matroxfb_DAC1064 snd_pcm joydev 8250 matroxfb_accel snd_timer matroxfb_Ti3026 ppdev pegasus parport_pc snd parport matroxfb_g450 g450_pll serial_core video output matroxfb_misc soundcore snd_page_alloc serio_raw pcspkr ext4 jbd2 crc16 sdhci_pci sdhci mmc_core floppy [last unloaded: scsi_wait_scan]\nPid: 0, comm: swapper Not tainted 2.6.37.upstream_check+ #8\nCall Trace:\n [\u003cc0433add\u003e] warn_slowpath_common+0x65/0x7a\n [\u003cc043825b\u003e] ? _local_bh_enable_ip.clone.5+0x35/0x71\n [\u003cc0433b01\u003e] warn_slowpath_null+0xf/0x13\n [\u003cc043825b\u003e] _local_bh_enable_ip.clone.5+0x35/0x71\n [\u003cc043829f\u003e] local_bh_enable_ip+0x8/0xa\n [\u003cc06ec471\u003e] _raw_spin_unlock_bh+0x10/0x12\n [\u003cf82b57dd\u003e] pd_prep_slave_sg+0xba/0x200 [pch_dma]\n [\u003cf82f7b7a\u003e] pch_uart_interrupt+0x44d/0x6aa [pch_uart]\n [\u003cc046fa97\u003e] handle_IRQ_event+0x1d/0x9e\n [\u003cc047146f\u003e] handle_fasteoi_irq+0x90/0xc7\n [\u003cc04713df\u003e] ? handle_fasteoi_irq+0x0/0xc7\n \u003cIRQ\u003e [\u003cc04045af\u003e] ? do_IRQ+0x3e/0x89\n [\u003cc04035a9\u003e] ? common_interrupt+0x29/0x30\n [\u003cc04400d8\u003e] ? sys_getpriority+0x12d/0x1a2\n [\u003cc058bb2b\u003e] ? arch_local_irq_enable+0x5/0xb\n [\u003cc058c740\u003e] ? acpi_idle_enter_bm+0x22a/0x261\n [\u003cc0648b11\u003e] ? cpuidle_idle_call+0x70/0xa1\n [\u003cc0401f44\u003e] ? cpu_idle+0x49/0x6a\n [\u003cc06d9fc4\u003e] ? rest_init+0x58/0x5a\n [\u003cc089e762\u003e] ? start_kernel+0x2d0/0x2d5\n [\u003cc089e0ce\u003e] ? i386_start_kernel+0xce/0xd5\n\nSigned-off-by: Tomoya MORINAGA \u003ctomoya-linux@dsn.okisemi.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "aa25afad2ca60d19457849ea75e9c31236f4e174", "tree": "24c8c815caf191af56f8de287637087c298711b2", "parents": [ "394d5aefcdecb51bbf7d6df757e73559c9692a08" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Feb 19 15:55:00 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 23 16:24:14 2011 +0000" }, "message": "ARM: amba: make probe() functions take const id tables\n\nMake Primecell driver probe functions take a const pointer to their\nID tables. Drivers should never modify their ID tables in their\nprobe handler.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bc0b44c35928a04061e19663061af9f029dbebcc", "tree": "5c8add72ac2639c969f24124b1c0a797259394fa", "parents": [ "74ab0030b574a555a30d6520f84dd644628033a8" ], "author": { "name": "Justin P. Mattock", "email": "justinmattock@gmail.com", "time": "Fri Jan 28 11:48:18 2011 -0800" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Thu Feb 17 16:50:49 2011 +0100" }, "message": "coh901318.c: Change initate to initiate.\n\nSigned-off-by: Justin P. Mattock \u003cjustinmattock@gmail.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "0a9d59a2461477bd9ed143c01af9df3f8f00fa81", "tree": "df997d1cfb0786427a0df1fbd6f0640fa4248cf4", "parents": [ "a23ce6da9677d245aa0aadc99f4197030350ab54", "795abaf1e4e188c4171e3cd3dbb11a9fcacaf505" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Feb 15 10:24:31 2011 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Feb 15 10:24:31 2011 +0100" }, "message": "Merge branch \u0027master\u0027 into for-next\n" }, { "commit": "0670e7157f75ec6d2231fbc6f67b075d6b6d486f", "tree": "64591858de42da54afc979338ee083d1e6d672a0", "parents": [ "80cc07af0f6692a7d8fdc5087594d1988a701266", "4aa5f366431fef0afca0df348ca9782c63ac9911" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:51 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:51 2011 -0800" }, "message": "Merge branch \u0027dw_dmac\u0027 into dmaengine\n" }, { "commit": "80cc07af0f6692a7d8fdc5087594d1988a701266", "tree": "a21ae71038bbfd75306b81a85c0c65121cd84f4f", "parents": [ "e19d1d4988f8020c25bf1758f9a898e1374cef35", "0c842b551063c5f7382ac9b457992f3b34972801" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:44 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:44 2011 -0800" }, "message": "Merge branch \u0027dma40\u0027 into dmaengine\n" }, { "commit": "e19d1d4988f8020c25bf1758f9a898e1374cef35", "tree": "5bd1ba3f13178becefad85b41a8bfe8c4652cee2", "parents": [ "a646bd7f0824d3e0f02ff8d7410704f965de01bc", "60f1df5dc6ecd07befc332ae30109fb86505634c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:40:46 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:40:46 2011 -0800" }, "message": "Merge branch \u0027imx\u0027 into dmaengine-fixes\n" }, { "commit": "a646bd7f0824d3e0f02ff8d7410704f965de01bc", "tree": "8504b83156a36ce508821a334b67d8a55b7dca89", "parents": [ "8179661694595eb3a4f2ff9bb0b73acbb7d2f4a9" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Mon Jan 31 13:22:29 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:28:16 2011 -0800" }, "message": "dma: ipu_idmac: do not lose valid received data in the irq handler\n\nCurrently when two or more buffers are queued by the camera driver\nand so the double buffering is enabled in the idmac, we lose one\nframe comming from CSI since the reporting of arrival of the first\nframe is deferred by the DMAIC_7_EOF interrupt handler and reporting\nof the arrival of the last frame is not done at all. So when requesting\nN frames from the image sensor we actually receive N - 1 frames in\nuser space.\n\nThe reason for this behaviour is that the DMAIC_7_EOF interrupt\nhandler misleadingly assumes that the CUR_BUF flag is pointing to the\nbuffer used by the IDMAC. Actually it is not the case since the\nCUR_BUF flag will be flipped by the FSU when the FSU is sending the\n\u003cTASK\u003e_NEW_FRM_RDY signal when new frame data is delivered by the CSI.\nWhen sending this singal, FSU updates the DMA_CUR_BUF and the\nDMA_BUFx_RDY flags: the DMA_CUR_BUF is flipped, the DMA_BUFx_RDY\nis cleared, indicating that the frame data is beeing written by\nthe IDMAC to the pointed buffer. DMA_BUFx_RDY is supposed to be\nset to the ready state again by the MCU, when it has handled the\nreceived data. DMAIC_7_CUR_BUF flag won\u0027t be flipped here by the\nIPU, so waiting for this event in the EOF interrupt handler is wrong.\nActually there is no spurious interrupt as described in the comments,\nthis is the valid DMAIC_7_EOF interrupt indicating reception of the\nframe from CSI.\n\nThe patch removes code that waits for flipping of the DMAIC_7_CUR_BUF\nflag in the DMAIC_7_EOF interrupt handler. As the comment in the\ncurrent code denotes, this waiting doesn\u0027t help anyway. As a result\nof this removal the reporting of the first arrived frame is not\ndeferred to the time of arrival of the next frame and the drivers\nsoftware flag \u0027ichan-\u003eactive_buffer\u0027 is in sync with DMAIC_7_CUR_BUF\nflag, so the reception of all requested frames works.\n\nThis has been verified on the hardware which is triggering the\nimage sensor by the programmable state machine, allowing to\nobtain exact number of frames. On this hardware we do not tolerate\nlosing frames.\n\nThis patch also removes resetting the DMA_BUFx_RDY flags of\nall channels in ipu_disable_channel() since transfers on other\nDMA channels might be triggered by other running tasks and the\nbuffers should always be ready for data sending or reception.\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nReviewed-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nTested-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "60f1df5dc6ecd07befc332ae30109fb86505634c", "tree": "77cb78a15424ff493f4d171d66752009b4483420", "parents": [ "2335d338a20a6f5ac70ae4338733c8ff5933f978", "341b9419a8c0a4cdb75773c576870f1eb655516d" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:51 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:51 2011 +0100" }, "message": "Merge branch \u0027dmaengine-shawn\u0027 into dmaengine\n" }, { "commit": "2335d338a20a6f5ac70ae4338733c8ff5933f978", "tree": "32d4d5270a761c72854258c9c3d1180de34ebb4b", "parents": [ "f8a356ff96a9070156f863e4f7716e2a0eb8c995", "23889c6352ab4a842a30221bb412ff49954b2fb3" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:48 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:48 2011 +0100" }, "message": "Merge branch \u0027dmaengine-sdma\u0027 into dmaengine\n" }, { "commit": "341b9419a8c0a4cdb75773c576870f1eb655516d", "tree": "cfa8912c361d8cf24a67a8bc560523537769695f", "parents": [ "1e9cebb42de57f1243261939c77ab5b0f9bcf311" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:39 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:23 2011 +0100" }, "message": "dmaengine: imx-sdma: fix up param for the last BD in sdma_prep_slave_sg()\n\nAs per the reference manual, bit \"L\" should be set while bit \"C\"\nshould be cleared for the last buffer descriptor in the non-cyclic\nchain, so that sdma can stop trying to find the next BD and end\nthe transfer.\n\nIn case of sdma_prep_slave_sg(), BD_LAST needs to be set and BD_CONT\nbe cleared for the last BD.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1e9cebb42de57f1243261939c77ab5b0f9bcf311", "tree": "aaeee8f1f5d9e61e0adc7adb9273558761b3892f", "parents": [ "8a9659114c7be6f88253618252881ea6fe0588b4" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:38 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:12 2011 +0100" }, "message": "dmaengine: imx-sdma: correct sdmac-\u003estatus in sdma_handle_channel_loop()\n\nsdma_handle_channel_loop() is the handler of cyclic tx. One period\nsuccess does not really mean the success of the tx. Instead of\nDMA_SUCCESS, DMA_IN_PROGRESS should be the one to tell.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "8a9659114c7be6f88253618252881ea6fe0588b4", "tree": "4845609a6f7c48391ec1fee2a01c854590855415", "parents": [ "4b2ce9ddb370c4eb573540611c347d78ac4b54a0" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:37 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:41:59 2011 +0100" }, "message": "dmaengine: imx-sdma: return sdmac-\u003estatus in sdma_tx_status()\n\nThe sdmac-\u003estatus was designed to reflect the status of the tx,\nso simply return it in sdma_tx_status(). Then dma client can call\ndma_async_is_tx_complete() to know the status of the tx.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "4b2ce9ddb370c4eb573540611c347d78ac4b54a0", "tree": "c4fa0f7baab20d7990ca4b2628af6f60ac249386", "parents": [ "1797c33f0edcdcc9a483c06233a203786666a97f" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:36 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:41:50 2011 +0100" }, "message": "dmaengine: imx-sdma: set sdmac-\u003estatus to DMA_ERROR in err_out of sdma_prep_slave_sg()\n\nsdma_prep_dma_cyclic() sets sdmac-\u003estatus to DMA_ERROR in err_out,\nand sdma_prep_slave_sg() needs to do the same. Otherwise,\nsdmac-\u003estatus stays at DMA_IN_PROGRESS, which will make the function\nreturn immediately next time it gets called.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1797c33f0edcdcc9a483c06233a203786666a97f", "tree": "2916f6f267029f871028347c9fcb9739f7110329", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:35 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:41:43 2011 +0100" }, "message": "dmaengine: imx-sdma: remove IMX_DMA_SG_LOOP handling in sdma_prep_slave_sg()\n\nThis is a leftover from the time that the driver did not have\nsdma_prep_dma_cyclic callback and implemented sound dma as a looped\nsg chain. And it can be removed now.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "f8a356ff96a9070156f863e4f7716e2a0eb8c995", "tree": "841388fffbd9bbca97f48cc64d6b58c8cfa829cd", "parents": [ "97a43dfe84119528ec2576129b91d619219ab716" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 11:35:59 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:36:23 2011 +0100" }, "message": "dmaengine i.MX dma: initialize dma capabilities outside channel loop\n\nThe capabilities are device specific fields, not channel specific fields.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "97a43dfe84119528ec2576129b91d619219ab716", "tree": "575ba990a8d34e35534366aa91d41b4afc474855", "parents": [ "d07102a1bb0e759ce4571df30c62998ef5d8a8d3" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 11:35:44 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:36:10 2011 +0100" }, "message": "dmaengine i.MX DMA: do not initialize chan_id field\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "d07102a1bb0e759ce4571df30c62998ef5d8a8d3", "tree": "f1b093f2a642600823ef733ca0da7245751a8a2b", "parents": [ "1e070a60997f5bbaadd498c34380e2aa110336cf" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 14:13:23 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:36:02 2011 +0100" }, "message": "dmaengine i.MX dma: check sg entries for valid addresses and lengths\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1e070a60997f5bbaadd498c34380e2aa110336cf", "tree": "a590491c8bcc33851553b5d70cfa4eb2ae4640be", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 13:14:37 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:35:52 2011 +0100" }, "message": "dmaengine i.MX dma: set maximum segment size for our device\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "23889c6352ab4a842a30221bb412ff49954b2fb3", "tree": "1a8c6fbd0509c6dbed9702c9ab0314a8c911de22", "parents": [ "7214a8b14f63a1603401124bc150e17b145aa476" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 10:56:58 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:34:31 2011 +0100" }, "message": "dmaengine i.MX SDMA: reserve channel 0 by not registering it\n\nWe need channel 0 of the sdma engine for internal purposes. We\naccomplished this by calling dma_request_channel() in the probe\nfunction. This does not work when multiple dma engines are\npresent which is the case when IPU support for i.MX31/35 is\ncompiled in. So instead of registering channel 0 and reserving\nit afterwards simply do not register it in the first place.\nWith this the dmaengine channel counting does not match sdma\nchannel counting anymore, so we have to use sdma channel counting\nin the driver.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "7214a8b14f63a1603401124bc150e17b145aa476", "tree": "59c41a00966f3935edc235514a3780a7313d3437", "parents": [ "7a0e9b2557902bdca563a5eb1bbac87560bd7d20" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 10:21:35 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:34:24 2011 +0100" }, "message": "dmaengine i.MX SDMA: initialize dma capabilities outside channel loop\n\nThe capabilities are device specific fields, not channel specific fields.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "7a0e9b2557902bdca563a5eb1bbac87560bd7d20", "tree": "194f1735c5c25357cd4991081231525441b749a8", "parents": [ "1fa81c270da4d8dffa84fcca448654a10ed0a5dc" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 10:19:53 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:33:18 2011 +0100" }, "message": "dmaengine i.MX SDMA: do not initialize chan_id field\n\nThis is bogus as the dmaengine core will overwrite this field.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1fa81c270da4d8dffa84fcca448654a10ed0a5dc", "tree": "2582ad91ea12c462745b2ef11d0fccfee73acee5", "parents": [ "b9b3f82f94b52ebb0bbdf6cd77ccc5e8ee3f53b5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 13:02:28 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:33:08 2011 +0100" }, "message": "dmaengine i.MX sdma: check sg entries for valid addresses and lengths\n\nThis patch lets sdma_prep_slave_sg fail if the entries of an\nsg list do not start on multiples of the word size or if the\nlengths are not multiple of the word size.\nAlso, catch the previously unhandled DMA_SLAVE_BUSWIDTH_8_BYTES\nand DMA_SLAVE_BUSWIDTH_UNDEFINED cases.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "b9b3f82f94b52ebb0bbdf6cd77ccc5e8ee3f53b5", "tree": "6ea87b15f9f74327c202fc5aa72e6199897c176d", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 12:12:31 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:32:52 2011 +0100" }, "message": "dmaengine i.MX sdma: set maximum segment size for our device\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "0c842b551063c5f7382ac9b457992f3b34972801", "tree": "da606f382493e6cf3540b4245b86a784a78e46b4", "parents": [ "86eb5fb61125e4646c9447a1f2ce130817dab34e" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:35 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: cyclic xfer support\n\nSupport cyclic transfers, which are useful for ALSA drivers.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "86eb5fb61125e4646c9447a1f2ce130817dab34e", "tree": "98722f05c9a3eaab60608f665755b331306325f4", "parents": [ "7ad74a7cf6f6355fd3f4c15afe63460fc4ec3f57" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:34 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: stop ongoing transfers in DMA_TERMINATE_ALL\n\nThe current implementation of DMA_TERMINATE_ALL leaves ongoing transfers\nrunning. Fix it.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7ad74a7cf6f6355fd3f4c15afe63460fc4ec3f57", "tree": "788adafd7e00d0ed23fac0e00416d973e2caab52", "parents": [ "6045f0bb2818393a44e835454db96709cb5b3d80" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:33 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: fix DMA_SG capability and channels\n\nThe DMA_SG cap is enabled on the wrong channel, and the pointers are repeatedly\nset incorrectly. Fix it and combine the ops settings to a common function.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6045f0bb2818393a44e835454db96709cb5b3d80", "tree": "fc6c06e7d302100979b0e4a81913b878b83cb5d6", "parents": [ "e65889c75ccb5b64dfb60f32e2d9448446cabcc7" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:32 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: handle failure to allocate first LCLA\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e65889c75ccb5b64dfb60f32e2d9448446cabcc7", "tree": "2e9d336969b1e24c965b725aeac8f6223dcee3d8", "parents": [ "7f933bed96e9872131014ea2bdd5b012e43fc316" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:31 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: extract lcla code into separate function\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7f933bed96e9872131014ea2bdd5b012e43fc316", "tree": "32e54ca912ab509ba5b66f45e0d276bad51a9ae5", "parents": [ "1f7622ca55b1f5875e32140b4781759f800aded3" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:30 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: use flags to reduce parameter count\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1f7622ca55b1f5875e32140b4781759f800aded3", "tree": "497cec7fa885514f24ff19c10b21a2fb6e27b7df", "parents": [ "822c567639971628ceba2c53531670d595e3164d" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:29 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: make d40_log_buf_to_lli static\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "822c567639971628ceba2c53531670d595e3164d", "tree": "5a292828c12cb2cb1ee787345159f3a244fc826f", "parents": [ "cc31b6f7949efd46c5f13d0758cf7b0bcb71fae2" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:28 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: unify src/dst addr check\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cc31b6f7949efd46c5f13d0758cf7b0bcb71fae2", "tree": "baa26092f94a3240ed12f4fc43b994618a1202b1", "parents": [ "5ed04b8575cb22920b1333aeb55121339449048f" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:27 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: pass the info pointer all the way to reduce argument count\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5ed04b8575cb22920b1333aeb55121339449048f", "tree": "4931e3f65f92da16a1967263b4c0f3623cce144d", "parents": [ "e24b36bdf873b4a64545fd66da13877214d235cf" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:26 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: unify d40_log_sg_to_lli funcs for mem and slave\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e24b36bdf873b4a64545fd66da13877214d235cf", "tree": "0490a45fe1cae96aa9a6c092172dcbba07aa6aa9", "parents": [ "1c4b0927feab41346b0be971e0287aaf46eba8e0" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:25 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: combine duplicated code in log_sg_to_dev\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1c4b0927feab41346b0be971e0287aaf46eba8e0", "tree": "cae12aed8e600fa0fe70b54f34f31b3c8a0b9496", "parents": [ "cade1d30b2e071a687011c2a38c03ed7187ec501" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:24 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: move lli_load to main source file\n\nThese register writes are better placed in the main source file rather than\nll.c.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cade1d30b2e071a687011c2a38c03ed7187ec501", "tree": "3ce0a1178095e3c4d54d60b596f52ce41f814f36", "parents": [ "10a946b3a4e1ad665a81981cbe33c3d3903cd7da" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:23 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: combine mem and slave prep_sg functions\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "10a946b3a4e1ad665a81981cbe33c3d3903cd7da", "tree": "fdc55a90bb2633b9d4034d37a272ce2dcc5710e3", "parents": [ "3e3a0763e78b520dac5fde569c42664863336d94" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:22 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: remove export of stedma40_memcpy_sg\n\nThe dmaengine framework has the API for this now.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3e3a0763e78b520dac5fde569c42664863336d94", "tree": "919f08d64db68449868aec2e0bc26f8a37196cdf", "parents": [ "00ac0341486ffe212f45ff1fe0780d12a36fffde" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:21 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: combine mem and slave sg-to-lli functions\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "00ac0341486ffe212f45ff1fe0780d12a36fffde", "tree": "5fd79c471c46e2496e1998a20f9d87649171d5e6", "parents": [ "dbd887880320b6a56811bb38ff4ad888728c3a91" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:20 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: remove duplicated dev addr code\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "dbd887880320b6a56811bb38ff4ad888728c3a91", "tree": "0825398570e258b43dbdb731ed9df20d32d2f039", "parents": [ "5f81158f90db4bc8a79e91736aa3afce8e590e46" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:19 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: combine duplicated d40_pool_lli_alloc() calls\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5f81158f90db4bc8a79e91736aa3afce8e590e46", "tree": "dcf4ac40513e7ccb73032a8b8ace7a42e5444523", "parents": [ "95944c6ef5b5214508273992416adb836b63c73f" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:18 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: combine desc init functions\n\nThe desc init code can be shared between the mem and slave prep routines.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "95944c6ef5b5214508273992416adb836b63c73f", "tree": "82de42e488516b4338fcd5e9908545c611573a0b", "parents": [ "d924abad7fa9a78d70b20552bf27fe4f7a19a2fb" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:17 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: implement prep_memcpy as a wrapper around memcpy_sg\n\nTo simplify the code.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d924abad7fa9a78d70b20552bf27fe4f7a19a2fb", "tree": "140a0fa51e50699f3e46b18c28c7cad2cf9f0c68", "parents": [ "b00f938c8cf5ba8e7a692519548a256aa3ea1203" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:16 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: remove unnecessary casts\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b00f938c8cf5ba8e7a692519548a256aa3ea1203", "tree": "a4e9845783f335fed5fc394040dafe1330b98e78", "parents": [ "026cbc424a162e495ad29e91d354fb8fc2da2657" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:15 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: fix DMA API usage for LLIs\n\nMap and unmap the LLIs and use dma_sync_single_for_device() appropriately\ninstead of mapping and never unmapping them.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "026cbc424a162e495ad29e91d354fb8fc2da2657", "tree": "f524b1af7e039a5b87be3eefe5140f5dda326d70", "parents": [ "7fe8be5a74eb058b0b48970caef83e0215f55944" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:14 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: fix DMA API usage for LCLA\n\nMap the buffer once and use dma_sync*() appropriately instead of mapping the\nbuffer over and over without unmapping it.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7fe8be5a74eb058b0b48970caef83e0215f55944", "tree": "adfd90a8aa8b1abb5adfc0a3ccf27255c07e1020", "parents": [ "594ece4dc0e8ac222945ef2048430600ad3c7644" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:13 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: use sg_dma_address() instead of sg_phys()\n\nThe address to use for DMA should be taken from sg_dma_address() and not\nsg_phys().\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "594ece4dc0e8ac222945ef2048430600ad3c7644", "tree": "ef7351b3603af93e5a6695d092eefbc59aedf5ab", "parents": [ "ac2c0a387194f45c759572b3462d1bf92ec92f00" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:12 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: remove unnecessary ALIGN()s\n\nALIGN(x * y, y) \u003d\u003d x * y\nALIGN(aligned + x * y, y) \u003d\u003d aligned + x * y\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ac2c0a387194f45c759572b3462d1bf92ec92f00", "tree": "81f5e1e9132d56a2e4ba5063c0ecaf722e04b970", "parents": [ "4d5949009e585b2bcf09dc4de625351f987a1e6d" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:11 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: allow realtime and priority for event lines\n\nDB8500v2\u0027s DMA40 (revision 3) allows setting event lines as high priority and\nreal time.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4d5949009e585b2bcf09dc4de625351f987a1e6d", "tree": "e94a51dad6f8750d3ad0539e0a54918b4144a64e", "parents": [ "6db5a8ba11bf23d1618e392518f1684cbf2fe031" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:10 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: fix comment to refer to SOCs rather than boards\n\nAnd add DB8500v2 information.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6db5a8ba11bf23d1618e392518f1684cbf2fe031", "tree": "65f8bf63a01b3e716cd1dc72a39cf5c5d78eda36", "parents": [ "724a8577d80c6f8e9ac680be1cf419eddbd6f2a1" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:09 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: use helpers for error functions\n\nAlmost every use of dev_err in this driver prints the function name. Abstract\nout wrappers to help with this and reduce code duplication.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "724a8577d80c6f8e9ac680be1cf419eddbd6f2a1", "tree": "9e6dd06f0ef4e5775d3f1000c0d8c943facfb519", "parents": [ "8ca84687b91322b9eafeaf4da43a21684cd0316e" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:08 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: use helpers for channel type check\n\nThe somewhat confusing check\n\n\td40c-\u003elog_num \u003d\u003d D40_PHY_CHAN\n\nand its variants are used in several places to check if a channel is logical or\nphysical. Use appropriately named helpers to do this to make the code more\nreadable.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8ca84687b91322b9eafeaf4da43a21684cd0316e", "tree": "bae0ececa3a7975c4b2a0bd5a7611abdd86131ad", "parents": [ "7d83a854a1a44a8f6a699503441403a36c42f66c" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:07 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: use helper for channel registers base\n\nThe register offset computation for accessing channel registers is copy/pasted\nin several places. Create a helper function to do it.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7d83a854a1a44a8f6a699503441403a36c42f66c", "tree": "7c83ad7793154f469ccbdd0f9045c748960623b2", "parents": [ "262d2915d4f11e5e78e432ab68f0ee034ef3f75f" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:06 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:15 2011 -0800" }, "message": "dma40: remove \"hardware link with previous jobs\" code\n\nThis link in hardware with previous jobs code is:\n\n - unused, no clients using or requiring this feature\n - incomplete, being implemented only for physical channels\n - broken, only working to perform one link\n\nRemove it. This also allows us to get rid of the channel pause in the\nsubmit_tx() routine.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "262d2915d4f11e5e78e432ab68f0ee034ef3f75f", "tree": "9c14e8b8518fbd377ba96826bcb03bb02f89ed34", "parents": [ "cb9ab2d8e4661c811d5e9a8e687b6f736690c90e" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:05 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:15 2011 -0800" }, "message": "dma40: ensure event lines get enabled\n\nThe controller sometimes fails to register the enable of the event line when\nboth src and dst event lines are used on the same logical channel. Implement\nthe recommended software workaround, which is to retry the write until it\nworks.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cb9ab2d8e4661c811d5e9a8e687b6f736690c90e", "tree": "43136d79f341b4799ae5568a9652483addd61796", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:04 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:15 2011 -0800" }, "message": "dma40: make init function static\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8179661694595eb3a4f2ff9bb0b73acbb7d2f4a9", "tree": "5251a404b7b58f0486f422d3db333b2449e33e5c", "parents": [ "fb526210b2b961b5d590b89fd8f45c0ca5769688" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Thu Jan 27 12:37:44 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:03:47 2011 -0800" }, "message": "DMA: PL08x: fix channel pausing to timeout rather than lockup\n\nIf a transfer is initiated from memory to a peripheral, then data is\nfetched and the channel is marked busy. This busy status persists until\nthe HALT bit is set and the queued data has been transfered to the\nperipheral. Waiting indefinitely after setting the HALT bit results in\nsystem lockups. Timeout this operation, and print an error when this\nhappens.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "fb526210b2b961b5d590b89fd8f45c0ca5769688", "tree": "4998a89c11eed597b3197d013ff7b558c9566f2d", "parents": [ "d718f4ebddcb0bebdbf771a6672756b666e5c31b" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Thu Jan 27 12:32:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:00:48 2011 -0800" }, "message": "DMA: PL08x: fix infinite wait when terminating transfers\n\nIf we try to pause a channel when terminating a transfer, we could end\nup spinning for it to become inactive indefinitely, and can result in\nan uninterruptible wait requiring a reset to recover from.\n\nTerminating a transfer is supposed to take effect immediately, but may\nresult in data loss.\n\nTo make this clear, rename the function to pl08x_terminate_phy_chan().\nAlso, make sure it is always consistently called - with the spinlock\nheld and IRQs disabled, and ensure that the TC and ERR interrupt status\nis always cleared.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "95ea759e9e116dade3e7386be2a3db76c90f4675", "tree": "a69b3fbb02f1d8305357524e67159e69e6ffa002", "parents": [ "f301c062dcdd113bc977ae1ebc8c12232f8531a9" ], "author": { "name": "Jamie Iles", "email": "jamie@jamieiles.com", "time": "Fri Jan 21 14:11:54 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 23:10:55 2011 -0800" }, "message": "dmaengine/dw_dmac: provide a mechanism to indicate private devices\n\nSome platforms (e.g. Picochip PC3XX) have multiple DMA controllers\nwhere some may be used for slave transfers and others for general\npurpose memcpy type transfers. Add a .is_private boolean to the\nplatform data structure so that controllers can be marked as private\nso that the DMA_PRIVATE capability will be set for that controller.\n\nSigned-off-by: Jamie Iles \u003cjamie.iles@picochip.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" } ], "next": "f301c062dcdd113bc977ae1ebc8c12232f8531a9" }