)]}' { "log": [ { "commit": "e463c7b197dbe64b8a99b0612c65f286937e5bf1", "tree": "aadd360d04b9cdf7eaf7d4eed1f79bd29a3b12df", "parents": [ "7663c1e2792a9662b23dec6e19bfcd3d55360b8f" ], "author": { "name": "Yevgeny Petrilin", "email": "yevgenyp@mellanox.co.il", "time": "Tue Apr 29 13:46:50 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Tue Apr 29 13:46:50 2008 -0700" }, "message": "mlx4_core: Add a way to set the \"collapsed\" CQ flag\n\nExtend the mlx4_cq_resize() API with a way to set the \"collapsed\" flag\nfor the CQ being created.\n\nSigned-off-by: Yevgeny Petrilin \u003cyevgenyp@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "ed4d3c1061d6f367a4ef5e1656c25af3314fe2b7", "tree": "93e627fa3d8f7b439625ffec5ccd390d100d67a1", "parents": [ "38ae6a535470b959df67ded6798fc542bb212e19" ], "author": { "name": "Yevgeny Petrilin", "email": "yevgenyp@mellanox.co.il", "time": "Fri Apr 25 14:52:32 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Fri Apr 25 14:52:32 2008 -0700" }, "message": "mlx4_core: Add helper to move QP to ready-to-send\n\nAvoid duplicating code in ethernet and FC modules.\n\nSigned-off-by: Yevgeny Petrilin \u003cyevgenyp@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "38ae6a535470b959df67ded6798fc542bb212e19", "tree": "35ee1d5450f0b0f491764ebd22babceb9cbf8f1d", "parents": [ "31d1e340f0e8d53804d737571b2f2bb28a74ecc5" ], "author": { "name": "Yevgeny Petrilin", "email": "yevgenyp@mellanox.co.il", "time": "Fri Apr 25 14:27:08 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Fri Apr 25 14:27:08 2008 -0700" }, "message": "mlx4_core: Add HW queues allocation helpers\n\nWrap doorbell, buffer and MTT allocation in helper functions for\nethernet and FC modules to use.\n\nSigned-off-by: Yevgeny Petrilin \u003cyevgenyp@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "6296883ca4cd52dafb45f191d24102e28ded38f2", "tree": "341e90a9560d8cf6b498d249a6ac81aeea97dd7b", "parents": [ "14fb05b3497351fbeb514381bcd227d84e115bd9" ], "author": { "name": "Yevgeny Petrilin", "email": "yevgenyp@mellanox.co.il", "time": "Wed Apr 23 11:55:45 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 23 11:55:45 2008 -0700" }, "message": "mlx4_core: Move kernel doorbell management into core\n\nIn addition to mlx4_ib, there will be ethernet and FC consumers of\nmlx4_core, so move the code for managing kernel doorbells into the\ncore module to avoid having to duplicate this multiple times.\n\nSigned-off-by: Yevgeny Petrilin \u003cyevgenyp@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "bbf8eed1a0f8949f7385146624f736f829992a70", "tree": "5cf6a5c76ca4c038d3ca0f53abc5f2976872696b", "parents": [ "3fdcb97f0b8d8a29117dc36acd0b15965d2a2160" ], "author": { "name": "Vladimir Sokolovsky", "email": "vlad@dev.mellanox.co.il", "time": "Wed Apr 16 21:09:33 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 16 21:09:33 2008 -0700" }, "message": "IB/mlx4: Add support for resizing CQs\n\nSigned-off-by: Vladimir Sokolovsky \u003cvlad@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "3fdcb97f0b8d8a29117dc36acd0b15965d2a2160", "tree": "a8bad6e48e9654f10e1b8ebfde3b086d83d2756e", "parents": [ "28d52b3cd8d48ef0ff77d4a8a7a21fc2816bb0a5" ], "author": { "name": "Eli Cohen", "email": "eli@dev.mellanox.co.il", "time": "Wed Apr 16 21:09:33 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 16 21:09:33 2008 -0700" }, "message": "IB/mlx4: Add support for modifying CQ moderation parameters\n\nSigned-off-by: Eli Cohen \u003celi@mellnaox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "b832be1e4007f4a54954ec68bd865ff05d6babca", "tree": "f8780fb17293a5b02cd21fed468e1270daac91d8", "parents": [ "40ca1988e03c001747d0b4cc1b25cf38297c9f9e" ], "author": { "name": "Eli Cohen", "email": "eli@dev.mellanox.co.il", "time": "Wed Apr 16 21:09:27 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 16 21:09:27 2008 -0700" }, "message": "IB/mlx4: Add IPoIB LSO support\n\nAdd TSO support to the mlx4_ib driver.\n\nSigned-off-by: Eli Cohen \u003celi@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "8ff095ec4bce7be943beff3b330562e2f0e42167", "tree": "d0643b575033a033a072c2c0687be7e57d183d99", "parents": [ "6046136c742e32d5e6431cdcd8957638d1816821" ], "author": { "name": "Eli Cohen", "email": "eli@dev.mellanox.co.il", "time": "Wed Apr 16 21:01:10 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 16 21:01:10 2008 -0700" }, "message": "IB/mlx4: Add IPoIB checksum offload support\n\nConnectX devices support checksum generation and verification of TCP\nand UDP packets for UD IPoIB messages. This patch checks if the HCA\nsupports this and sets the IB_DEVICE_UD_IP_CSUM capability flag if it\ndoes. It implements support for handling the IB_SEND_IP_CSUM send\nflag and setting the csum_ok field in receive work completions.\n\nSigned-off-by: Eli Cohen \u003celi@mellanox.co.il\u003e\nSigned-off-by: Ali Ayub \u003cali@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "37608eea86a358ac6a18df0af55d4f77d08a1f30", "tree": "bb0d7c9a93763e6b3fda744a08b2a0c6ed80dfec", "parents": [ "26c4fc26d0af9b16a6a234318d15ee0b3896a63d" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 16 21:01:08 2008 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Apr 16 21:01:08 2008 -0700" }, "message": "mlx4_core: Fix confusion between mlx4_event and mlx4_dev_event enums\n\nThe struct mlx4_interface.event() method was supposed to get an enum\nmlx4_dev_event, but the driver code was actually passing in the\nhardware enum mlx4_event values. Fix up the callers of\nmlx4_dispatch_event() so that they pass in the right type of value,\nand fix up the event method in mlx4_ib so that it can handle the enum\nmlx4_dev_event values.\n\nThis eliminates the need for the subtype parameter to the event\nmethod, so remove it.\n\nThis also fixes the sparse warning\n\n drivers/net/mlx4/intf.c:127:48: warning: mixing different enum types\n drivers/net/mlx4/intf.c:127:48: int enum mlx4_event versus\n drivers/net/mlx4/intf.c:127:48: int enum mlx4_dev_event\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "ea54b10c7773007e173da31fe7adcc049da33331", "tree": "b13b77fb3807071a5b93ece7b564f6748d962bbc", "parents": [ "b57aacfa7a95328f469d0360e49289b023c47e9e" ], "author": { "name": "Jack Morgenstein", "email": "jackm@dev.mellanox.co.il", "time": "Mon Jan 28 10:40:59 2008 +0200" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Fri Feb 08 13:30:02 2008 -0800" }, "message": "IB/mlx4: Use multiple WQ blocks to post smaller send WQEs\n\nConnectX HCA supports shrinking WQEs, so that a single work request\ncan be made of multiple units of wqe_shift. This way, WRs can differ\nin size, and do not have to be a power of 2 in size, saving memory and\nspeeding up send WR posting. Unfortunately, if we do this then the\nwqe_index field in CQEs can\u0027t be used to look up the WR ID anymore, so\nour implementation does this only if selective signaling is off.\n\nFurther, on 32-bit platforms, we can\u0027t use vmap() to make the QP\nbuffer virtually contigious. Thus we have to use constant-sized WRs to\nmake sure a WR is always fully within a single page-sized chunk.\n\nFinally, we use WRs with the NOP opcode to avoid wrapping around the\nqueue buffer in the middle of posting a WR, and we set the\nNoErrorCompletion bit to avoid getting completions with error for NOP\nWRs. However, NEC is only supported starting with firmware 2.2.232,\nso we use constant-sized WRs for older firmware. And, since MLX QPs\nonly support SEND, we use constant-sized WRs in this case.\n\nWhen stamping during NOP posting, do stamping following setting of the\nNOP WQE valid bit.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@dev.mellanox.co.il\u003e\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "b57aacfa7a95328f469d0360e49289b023c47e9e", "tree": "5642416e92540b93ffb1221ae75b3f1f43ffcd7b", "parents": [ "313abe55a87bc10e55d00f337d609e17ad5f8c9a" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Feb 06 21:17:59 2008 -0800" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Feb 06 21:17:59 2008 -0800" }, "message": "mlx4_core: Clean up struct mlx4_buf\n\nNow that struct mlx4_buf.u is a struct instead of a union because of\nthe vmap() changes, there\u0027s no point in having a struct at all. So\nmove .direct and .page_list directly into struct mlx4_buf and get rid\nof a bunch of unnecessary \".u\"s.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "313abe55a87bc10e55d00f337d609e17ad5f8c9a", "tree": "833ff3c4b33f83d4ca64ed322c2d8efa21529d71", "parents": [ "1c69fc2a9012e160c8d459f63df74a6b01db8322" ], "author": { "name": "Jack Morgenstein", "email": "jackm@dev.mellanox.co.il", "time": "Mon Jan 28 10:40:51 2008 +0200" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Feb 06 21:17:45 2008 -0800" }, "message": "mlx4_core: For 64-bit systems, vmap() kernel queue buffers\n\nSince kernel virtual memory is not a problem on 64-bit systems, there\nis no reason to use our own 2-layer page mapping scheme for large\nkernel queue buffers on such systems. Instead, map the page list to a\nsingle virtually contiguous buffer with vmap(), so that can we access\nbuffer memory via direct indexing.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@dev.mellanox.co.il\u003e\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "1c69fc2a9012e160c8d459f63df74a6b01db8322", "tree": "a32a2be6b2c8b9f5c4e006bacebc1eeb723e2ff5", "parents": [ "21511abd0a248a3f225d3b611cfabb93124605a7" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Feb 06 21:07:54 2008 -0800" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Wed Feb 06 21:07:54 2008 -0800" }, "message": "IB/mlx4: Consolidate code to get an entry from a struct mlx4_buf\n\nWe use struct mlx4_buf for kernel QP, CQ and SRQ buffers, and the code\nto look up an entry is duplicated in get_cqe_from_buf() and the QP and\nSRQ versions of get_wqe(). Factor this out into mlx4_buf_offset().\n\nThis will also make it easier to switch over to using vmap() for buffers.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "744ea922c901b6557bffe8bff7af1ef18181f370", "tree": "f2fa2a3082726c31b96ec920d14ba77b2c626066", "parents": [ "4fa435018d740cb83d74c92306aa1f796da91ddd" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Sun Oct 14 20:17:39 2007 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Sun Oct 14 20:17:39 2007 -0700" }, "message": "mlx4_core: Kill mlx4_write64_raw()\n \nIt\u0027s a leftover from development that\u0027s never used in the real driver.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "8ad11fb6b0739e704953e2b0aed453bf7d75d4f6", "tree": "671838bc9293987efba214f2d645d7e40befc5a8", "parents": [ "d7bb58fb1c0e7264a7261c7d0304121ef9402e94" ], "author": { "name": "Jack Morgenstein", "email": "jackm@dev.mellanox.co.il", "time": "Wed Aug 01 12:29:05 2007 +0300" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Tue Oct 09 19:59:16 2007 -0700" }, "message": "IB/mlx4: Implement FMRs\n\nImplement FMRs for mlx4. This is an adaptation of code from mthca.\n\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nSigned-off-by: Michael S. Tsirkin \u003cmst@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "cd9281d873c91a01af0cb96ff0f75e9905e54403", "tree": "a639777f03924198a0c91c8884406e8ba8e40efd", "parents": [ "57cb61d587e990d556385d367589ff61f6c2c0f2" ], "author": { "name": "Jack Morgenstein", "email": "jackm@dev.mellanox.co.il", "time": "Tue Sep 18 09:14:18 2007 +0200" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Tue Oct 09 19:59:14 2007 -0700" }, "message": "IB/mlx4: Display misc device information under /sys/class/infiniband/\n\ndisplay the following device information under /sys/class/infiniband/mlx4_X:\nboard_id, fw_ver, hw_rev, hca_type.\n\nThis patch makes this information available to userspace utilities\nsuch as ibstat and ibv_devinfo.\n\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "65541cb7cf353946ecd78016a453b453b8830656", "tree": "0a93ed27fdb6caf3f90250eaaf179b560e6742f3", "parents": [ "6a775e2ba4f7635849ade628e64723ab2beef0bc" ], "author": { "name": "Jack Morgenstein", "email": "jackm@dev.mellanox.co.il", "time": "Thu Jun 21 13:03:11 2007 +0300" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Thu Jul 12 15:41:24 2007 -0700" }, "message": "IB/mlx4: Implement query SRQ\n\nSigned-off-by: Dotan Barak \u003cdotanb@mellanox.co.il\u003e\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "6a775e2ba4f7635849ade628e64723ab2beef0bc", "tree": "3c80d06d5f2f7135c81dddc2dcd6e536f9ecf22d", "parents": [ "6164c8cd1333403a28202f7c7e64ff9086d8f1aa" ], "author": { "name": "Jack Morgenstein", "email": "jackm@dev.mellanox.co.il", "time": "Thu Jun 21 12:27:47 2007 +0300" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Thu Jul 12 15:41:00 2007 -0700" }, "message": "IB/mlx4: Implement query QP\n\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "149983af609e8f5c57157467baf8545d17b8a6a1", "tree": "4a8ea99e670a6e74b7b03122408a82d4c6e29518", "parents": [ "87427da55bc03dbce7906a5b09ed50279d654d28" ], "author": { "name": "Dotan Barak", "email": "dotanb@dev.mellanox.co.il", "time": "Tue Jun 26 15:55:28 2007 +0300" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Mon Jul 09 20:12:26 2007 -0700" }, "message": "mlx4_core: Get the maximum message size from reported device capabilities\n\nGet the maximum message size from the device capabilities returned\nfrom the QUERY_DEV_CAP firmware command, rather than hard-coding 2 GB.\n\nSigned-off-by: Dotan Barak \u003cdotanb@dev.mellanox.co.il\u003e\nSigned-off-by: Michael S. Tsirkin \u003cmst@dev.mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n\n" }, { "commit": "e61ef2416b0b92828512b6cfcd0104a02b6431fe", "tree": "51d3307aa5be5591f5859f96a3bd1dd20231b9b0", "parents": [ "5ae2a7a836be660ff1621cce1c46930f19200589" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Mon Jun 18 09:23:47 2007 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Mon Jun 18 09:23:47 2007 -0700" }, "message": "IB/mlx4: Make sure inline data segments don\u0027t cross a 64 byte boundary\n\nInline data segments in send WQEs are not allowed to cross a 64 byte\nboundary. We use inline data segments to hold the UD headers for MLX\nQPs (QP0 and QP1). A send with GRH on QP1 will have a UD header that\nis too big to fit in a single inline data segment without crossing a\n64 byte boundary, so split the header into two inline data segments.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "5ae2a7a836be660ff1621cce1c46930f19200589", "tree": "655b94b9a016cec92f319761afe6bb3000f5f4fa", "parents": [ "082dee3216c99a838af40be403799f60bcea2e97" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Mon Jun 18 08:15:02 2007 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Mon Jun 18 08:15:02 2007 -0700" }, "message": "IB/mlx4: Handle FW command interface rev 3\n\nUpcoming firmware introduces command interface revision 3, which\nchanges the way port capabilities are queried and set. Update the\ndriver to handle both the new and old command interfaces by adding a\nnew MLX4_FLAG_OLD_PORT_CMDS that it is set after querying the firmware\ninterface revision and then using the correct interface based on the\nsetting of the flag.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" }, { "commit": "225c7b1feef1b41170f7037a5b10a65cd8a42c54", "tree": "702a0a2cbba7f1c5b2949d236b4463d486204fdc", "parents": [ "1bf66a30421ca772820f489d88c16d0c430d6a67" ], "author": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Tue May 08 18:00:38 2007 -0700" }, "committer": { "name": "Roland Dreier", "email": "rolandd@cisco.com", "time": "Tue May 08 18:00:38 2007 -0700" }, "message": "IB/mlx4: Add a driver Mellanox ConnectX InfiniBand adapters\n\nAdd an InfiniBand driver for Mellanox ConnectX adapters. Because\nthese adapters can also be used as ethernet NICs and Fibre Channel \nHBAs, the driver is split into two modules: \n \n mlx4_core: Handles low-level things like device initialization and \n processing firmware commands. Also controls resource allocation \n so that the InfiniBand, ethernet and FC functions can share a \n device without stepping on each other. \n \n mlx4_ib: Handles InfiniBand-specific things; plugs into the \n InfiniBand midlayer. \n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n" } ] }