)]}' { "log": [ { "commit": "2ed6dc34f9ed39bb8e4c81ea1056f0ba56315841", "tree": "e3f6ca7961f9c4e34453d06e584c0bc98ec630d7", "parents": [ "7589670f37736bcc119ebfbd69aafea6d585d1d4" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:42 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Add DCA services\n\nAdd code to connect to the DCA driver and provide cpu tags for use by\ndrivers that would like to use Direct Cache Access hints.\n\n [Adrian Bunk] Several Kconfig cleanup items\n [Andrew Morten, Chris Leech] Fix for using cpu_physical_id() even when\n\t\t\t built for uni-processor\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "3e037454bcfa4b187e8293d2121bd8c0f5a5c31c", "tree": "751a2eace11b280cc1a19873788b778009188be9", "parents": [ "8ab89567da0cea9bae2c1b5dad47b51c424479e4" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:40 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Add support for MSI and MSI-X\n\nAdd support for MSI and MSI-X interrupt handling, including the ability\nto choose the desired interrupt method.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n[bunk@kernel.org: drivers/dma/ioat_dma.c: make 3 functions static]\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "8ab89567da0cea9bae2c1b5dad47b51c424479e4", "tree": "95ac8bc77b2e8d9f1dec97f6fd7128760e27561f", "parents": [ "43d6e369d43ff175e1e0e80caaedb1e53829247c" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:39 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Split PCI startup from DMA handling code\n\nSplit the general PCI startup from the DMA handling code in order to\nprepare for adding support for DCA services and future versions of the\nioatdma device.\n\n [Rusty Russell] Removal of __unsafe() usage.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "54a09feb0ebb018dadaebeb51e860154198abc83", "tree": "3e85288f49ba8376e58db649250d60c2560e5204", "parents": [ "9c29a377f99b42c59721112cd2388cf27547fc84" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Aug 14 17:36:31 2007 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Aug 14 17:36:31 2007 -0700" }, "message": "[IOAT]: Remove redundant struct member to avoid descriptor cache miss\n\nThe layout for struct ioat_desc_sw is non-optimal and causes an extra\ncache hit for every descriptor processed. By tightening up the struct\nlayout and removing one item, we pull in the fields that get used in\nthe speedpath and get a little better performance.\n\n\nBefore:\n-------\nstruct ioat_desc_sw {\n\tstruct ioat_dma_descriptor * hw; /* 0 8\n*/\n\tstruct list_head node; /* 8 16\n*/\n\tint tx_cnt; /* 24 4\n*/\n\n\t/* XXX 4 bytes hole, try to pack */\n\n\tdma_addr_t src; /* 32 8\n*/\n\t__u32 src_len; /* 40 4\n*/\n\n\t/* XXX 4 bytes hole, try to pack */\n\n\tdma_addr_t dst; /* 48 8\n*/\n\t__u32 dst_len; /* 56 4\n*/\n\n\t/* XXX 4 bytes hole, try to pack */\n\n\t/* --- cacheline 1 boundary (64 bytes) --- */\n\tstruct dma_async_tx_descriptor async_tx; /* 64 144\n*/\n\t/* --- cacheline 3 boundary (192 bytes) was 16 bytes ago --- */\n\n\t/* size: 208, cachelines: 4 */\n\t/* sum members: 196, holes: 3, sum holes: 12 */\n\t/* last cacheline: 16 bytes */\n};\t/* definitions: 1 */\n\n\nAfter:\n------\n\nstruct ioat_desc_sw {\n\tstruct ioat_dma_descriptor * hw; /* 0 8\n*/\n\tstruct list_head node; /* 8 16\n*/\n\tint tx_cnt; /* 24 4\n*/\n\t__u32 len; /* 28 4\n*/\n\tdma_addr_t src; /* 32 8\n*/\n\tdma_addr_t dst; /* 40 8\n*/\n\tstruct dma_async_tx_descriptor async_tx; /* 48 144\n*/\n\t/* --- cacheline 3 boundary (192 bytes) --- */\n\n\t/* size: 192, cachelines: 3 */\n};\t/* definitions: 1 */\n\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d379b01e9087a582d58f4b678208a4f8d8376fe7", "tree": "155920bca93c18afba66b9d5acfecd359d5bec65", "parents": [ "7405f74badf46b5d023c5d2b670b4471525f6c91" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jul 09 11:56:42 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:13 2007 -0700" }, "message": "dmaengine: make clients responsible for managing channels\n\nThe current implementation assumes that a channel will only be used by one\nclient at a time. In order to enable channel sharing the dmaengine core is\nchanged to a model where clients subscribe to channel-available-events.\nInstead of tracking how many channels a client wants and how many it has\nreceived the core just broadcasts the available channels and lets the\nclients optionally take a reference. The core learns about the clients\u0027\nneeds at dma_event_callback time.\n\nIn support of multiple operation types, clients can specify a capability\nmask to only be notified of channels that satisfy a certain set of\ncapabilities.\n\nChangelog:\n* removed DMA_TX_ARRAY_INIT, no longer needed\n* dma_client_chan_free -\u003e dma_chan_release: switch to global reference\n counting only at device unregistration time, before it was also happening\n at client unregistration time\n* clients now return dma_state_client to dmaengine (ack, dup, nak)\n* checkpatch.pl fixes\n* fixup merge with git-ioat\n\nCc: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7405f74badf46b5d023c5d2b670b4471525f6c91", "tree": "20dd20571637dba1c2b04c7b13ac208c33b5706b", "parents": [ "428ed6024fa74a271142f3257966e9b5e1cb37a1" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 02 11:10:43 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:11 2007 -0700" }, "message": "dmaengine: refactor dmaengine around dma_async_tx_descriptor\n\nThe current dmaengine interface defines mutliple routines per operation,\ni.e. dma_async_memcpy_buf_to_buf, dma_async_memcpy_buf_to_page etc. Adding\nmore operation types (xor, crc, etc) to this model would result in an\nunmanageable number of method permutations.\n\n\tAre we really going to add a set of hooks for each DMA engine\n\twhizbang feature?\n\t\t- Jeff Garzik\n\nThe descriptor creation process is refactored using the new common\ndma_async_tx_descriptor structure. Instead of per driver\ndo_\u003coperation\u003e_\u003cdest\u003e_to_\u003csrc\u003e methods, drivers integrate\ndma_async_tx_descriptor into their private software descriptor and then\ndefine a \u0027prep\u0027 routine per operation. The prep routine allocates a\ndescriptor and ensures that the tx_set_src, tx_set_dest, tx_submit routines\nare valid. Descriptor creation and submission becomes:\n\nstruct dma_device *dev;\nstruct dma_chan *chan;\nstruct dma_async_tx_descriptor *tx;\n\ntx \u003d dev-\u003edevice_prep_dma_\u003coperation\u003e(chan, len, int_flag)\ntx-\u003etx_set_src(dma_addr_t, tx, index /* for multi-source ops */)\ntx-\u003etx_set_dest(dma_addr_t, tx, index)\ntx-\u003etx_submit(tx)\n\nIn addition to the refactoring, dma_async_tx_descriptor also lays the\ngroundwork for definining cross-channel-operation dependencies, and a\ncallback facility for asynchronous notification of operation completion.\n\nChangelog:\n* drop dma mapping methods, suggested by Chris Leech\n* fix ioat_dma_dependency_added, also caught by Andrew Morton\n* fix dma_sync_wait, change from Andrew Morton\n* uninline large functions, change from Andrew Morton\n* add tx-\u003ecallback \u003d NULL to dmaengine calls to interoperate with async_tx\n calls\n* hookup ioat_tx_submit\n* convert channel capabilities to a \u0027cpumask_t like\u0027 bitmap\n* removed DMA_TX_ARRAY_INIT, no longer needed\n* checkpatch.pl fixes\n* make set_src, set_dest, and tx_submit descriptor specific methods\n* fixup git-ioat merge\n* move group_list and phys to dma_async_tx_descriptor\n\nCc: Jeff Garzik \u003cjeff@garzik.org\u003e\nCc: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "47b16539e1072afd2c964b97be4a95b5cf2ff801", "tree": "6acd1d1a667f5b724cdc5c95f0bbed2639a24b55", "parents": [ "c714de5dcf41cee869c4a74e8783c6d9be459ef6" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Tue Oct 10 22:45:47 2006 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Oct 10 15:37:21 2006 -0700" }, "message": "[PATCH] drivers/dma trivial annotations\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "57c651f74cd8383df10a648e677902849de1bc0b", "tree": "caf432ce2828b25e17cea3cff523e481c740c65e", "parents": [ "6b00c92c4b26428cd80e966380c07103556f7b14" ], "author": { "name": "David S. Miller", "email": "davem@sunset.sfo1.dsl.speakeasy.net", "time": "Tue May 23 17:39:49 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:18:50 2006 -0700" }, "message": "[I/OAT]: Move PCI_DEVICE_ID_INTEL_IOAT to linux/pci_ids.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "0bbd5f4e97ff9c057b385a1886b4aed1fb0300f1", "tree": "0c3d8528c31e8291fb78c2e7a287910987ed2888", "parents": [ "c13c8260da3155f2cefb63b0d1b7dcdcb405c644" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Tue May 23 17:35:34 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:18:46 2006 -0700" }, "message": "[I/OAT]: Driver for the Intel(R) I/OAT DMA engine\n\nAdds a new ioatdma driver\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" } ] }