)]}'
{
  "log": [
    {
      "commit": "c5ec153402b6d276fe20029da1059ba42a4b55e5",
      "tree": "a323fd0466f606b66fc7239e78569863d62f6300",
      "parents": [
        "932f72adbe76f098922c746737cb0bd75fc21e27"
      ],
      "author": {
        "name": "He, Qing",
        "email": "qing.he@intel.com",
        "time": "Mon Sep 03 17:07:41 2007 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:26 2007 +0200"
      },
      "message": "KVM: enable in-kernel APIC INIT/SIPI handling\n\nThis patch enables INIT/SIPI handling using in-kernel APIC by\nintroducing a -\u003emp_state field to emulate the SMP state transition.\n\n[avi: remove smp_processor_id() warning]\n\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Xin Li \u003cxin.b.li@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "932f72adbe76f098922c746737cb0bd75fc21e27",
      "tree": "55a98bd0692094289d4bea4f5b2c58835f8b59df",
      "parents": [
        "40487c680d5855459dfdce340df13d40071bb774"
      ],
      "author": {
        "name": "He, Qing",
        "email": "qing.he@intel.com",
        "time": "Mon Sep 03 17:01:36 2007 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:26 2007 +0200"
      },
      "message": "KVM: round robin for APIC lowest priority delivery mode\n\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "40487c680d5855459dfdce340df13d40071bb774",
      "tree": "abc0ec56ecb1b6d1533b918621c060a1d38fccef",
      "parents": [
        "5cd4f6fd8506f59cb8a232f364c54f6bd8e5150a"
      ],
      "author": {
        "name": "Qing He",
        "email": "qing.he@intel.com",
        "time": "Mon Sep 17 14:47:13 2007 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:26 2007 +0200"
      },
      "message": "KVM: deliver PIC interrupt only to vcpu0\n\nThis patch changes the PIC interrupts delivery. Now it is only delivered\nto vcpu0 when either condition is met (on vcpu0):\n  1. local APIC is hardware disabled\n  2. LVT0 is unmasked and configured to delivery mode ExtInt\n\nIt fixes the 2x faster wall clock on x86_64 and SMP i386 Linux guests\n\nSigned-off-by: Eddie (Yaozu) Dong \u003ceddie.dong@intel.com\u003e\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "a3d7f85f471f889e4477863a7ca42828ae74e77d",
      "tree": "f75148a940f7e297da91f6a14ab573291ceb050f",
      "parents": [
        "1b9778dae71dc64d3678d766c0f1fbed79c80f9f"
      ],
      "author": {
        "name": "Eddie Dong",
        "email": "eddie.dong@intel.com",
        "time": "Mon Sep 03 16:15:12 2007 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:26 2007 +0200"
      },
      "message": "KVM: Migrate lapic hrtimer when vcpu moves to another cpu\n\nThis reduces overhead by accessing cachelines from the wrong node, as well\nas simplifying locking.\n\n[Qing: fix for inactive or expired one-shot timer]\n\nSigned-off-by: Yaozu (Eddie) Dong \u003cEddie.Dong@intel.com\u003e\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "1b9778dae71dc64d3678d766c0f1fbed79c80f9f",
      "tree": "3196bbfe474119a849f35aefddb5e0922205850f",
      "parents": [
        "6e5d865c0b9679b00b5e5f0754c9fc2b6b9894d6"
      ],
      "author": {
        "name": "Eddie Dong",
        "email": "eddie.dong@intel.com",
        "time": "Mon Sep 03 16:56:58 2007 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:26 2007 +0200"
      },
      "message": "KVM: Keep track of missed timer irq injections\n\nAPIC timer IRQ is set every time when a certain period\nexpires at host time, but the guest may be descheduled\nat that time and thus the irq be overwritten by later fire.\nThis patch keep track of firing irq numbers and decrease\nonly when the IRQ is injected to guest or buffered in\nAPIC.\n\nSigned-off-by: Yaozu (Eddie) Dong \u003cEddie.Dong@intel.com\u003e\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "6e5d865c0b9679b00b5e5f0754c9fc2b6b9894d6",
      "tree": "1b8133926578a16f8849143da5a7d5a6d9e67b24",
      "parents": [
        "2a8067f17b8442ecce0b14e134823020ff33b4fa"
      ],
      "author": {
        "name": "Yang, Sheng",
        "email": "sheng.yang@intel.com",
        "time": "Wed Sep 12 18:03:11 2007 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:26 2007 +0200"
      },
      "message": "KVM: VMX: Use shadow TPR/cr8 for 64-bits guests\n\nThis patch enables TPR shadow of VMX on CR8 access. 64bit Windows using\nCR8 access TPR frequently. The TPR shadow can improve the performance of\naccess TPR by not causing vmexit.\n\nSigned-off-by: Sheng Yang \u003csheng.yang@intel.com\u003e\nSigned-off-by: Yaozu (Eddie) Dong \u003ceddie.dong@intel.com\u003e\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "96ad2cc6132479aa0aea485d0838a13fda765bd5",
      "tree": "dc3596b92981332cee0749004b7076a7d52a90b1",
      "parents": [
        "6bf9e962d14deb9e460afbbfd83ea2f450325c2d"
      ],
      "author": {
        "name": "Eddie Dong",
        "email": "eddie.dong@intel.com",
        "time": "Thu Sep 06 12:22:56 2007 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:25 2007 +0200"
      },
      "message": "KVM: in-kernel LAPIC save and restore support\n\nThis patch adds a new vcpu-based IOCTL to save and restore the local\napic registers for a single vcpu. The kernel only copies the apic page as\na whole, extraction of registers is left to userspace side. On restore, the\nAPIC timer is restarted from the initial count, this introduces a little\ndelay, but works fine.\n\nSigned-off-by: Yaozu (Eddie) Dong \u003ceddie.dong@intel.com\u003e\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "97222cc8316328965851ed28d23f6b64b4c912d2",
      "tree": "469b2f72e74046a7aec5061df194c3f68812a224",
      "parents": [
        "7017fc3d1a12e30ea7df4992152978a188433457"
      ],
      "author": {
        "name": "Eddie Dong",
        "email": "eddie.dong@intel.com",
        "time": "Wed Sep 12 10:58:04 2007 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Sat Oct 13 10:18:25 2007 +0200"
      },
      "message": "KVM: Emulate local APIC in kernel\n\nBecause lightweight exits (exits which don\u0027t involve userspace) are many\ntimes faster than heavyweight exits, it makes sense to emulate high usage\ndevices in the kernel.  The local APIC is one such device, especially for\nWindows and for SMP, so we add an APIC model to kvm.\n\nIt also allows in-kernel host-side drivers to inject interrupts without\ngoing through userspace.\n\n[compile fix on i386 from Jindrich Makovicka]\n\nSigned-off-by: Yaozu (Eddie) Dong \u003cEddie.Dong@intel.com\u003e\nSigned-off-by: Qing He \u003cqing.he@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    }
  ]
}