)]}' { "log": [ { "commit": "53b3531bbbf70ac7551b32d1acc229d94de52658", "tree": "644440c93f599bbf64bb0b703c97b03b4dc5d737", "parents": [ "29afd49b72a9b2c26fa8c678bcf3976d0540446b" ], "author": { "name": "Alexey Dobriyan", "email": "adobriyan@gmail.com", "time": "Fri Mar 24 03:16:13 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Mar 24 07:33:24 2006 -0800" }, "message": "[PATCH] s/;;/;/g\n\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "cdb0452789d365695b5b173542af9c7e3d24f185", "tree": "f8594a754736aecfb52d835a2e12f46a923e6ed6", "parents": [ "008accbbae6b2f18c2039d563f28d46ff4388d36" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Fri Mar 24 03:15:57 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Mar 24 07:33:21 2006 -0800" }, "message": "[PATCH] kill include/linux/platform.h, default_idle() cleanup\n\ninclude/linux/platform.h contained nothing that was actually used except\nthe default_idle() prototype, and is therefore removed by this patch.\n\nThis patch does the following with the platform specific default_idle()\nfunctions on different architectures:\n- remove the unused function:\n - parisc\n - sparc64\n- make the needlessly global function static:\n - arm\n - h8300\n - m68k\n - m68knommu\n - s390\n - v850\n - x86_64\n- add a prototype in asm/system.h:\n - cris\n - i386\n - ia64\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nAcked-by: Patrick Mochel \u003cmochel@digitalimplant.org\u003e\nAcked-by: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0b2fcfdb8b4e7e379192f24ea2203163ddf5df1d", "tree": "1f3995e41ab12ff76e737389e0b59a40c0c73668", "parents": [ "713729e8b993cb880225e2ced50a3f5ac05c2b3f" ], "author": { "name": "Nick Piggin", "email": "npiggin@suse.de", "time": "Thu Mar 23 03:01:02 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:17 2006 -0800" }, "message": "[PATCH] atomic: add_unless cmpxchg optimise\n\nWithout branch hints, the very unlikely chance of the loop repeating due to\ncmpxchg failure is unrolled with gcc-4 that I have tested.\n\nImprove this for architectures with a native cas/cmpxchg. llsc archs\nshould try to implement this natively.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Roman Zippel \u003czippel@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "804f1594cc3deb161e531a43d90c501f0db2635a", "tree": "81f7a7cea8dbf671c733df379c6582e36459e8da", "parents": [ "6a2900b67652421b51fe25e4b86ecfec742b1f30" ], "author": { "name": "Kyle McMartin", "email": "kyle@parisc-linux.org", "time": "Thu Mar 23 03:00:16 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:10 2006 -0800" }, "message": "[PATCH] Move read_mostly definition to asm/cache.h\n\nSeems like needless clutter having a bunch of #if defined(CONFIG_$ARCH) in\ninclude/linux/cache.h. Move the per architecture section definition to\nasm/cache.h, and keep the if-not-defined dummy case in linux/cache.h to\ncatch architectures which don\u0027t implement the section.\n\nVerified that symbols still go in .data.read_mostly on parisc,\nand the compile doesn\u0027t break.\n\nSigned-off-by: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "42b88befd6e0dae1a5fe04c03925037fa890e1f3", "tree": "c234584f797e65e1bcd0d4675d56d1eb004d6681", "parents": [ "3915bcf38fe0b6d130b4bbde97804f29a0becf32" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Mar 22 00:09:01 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:04 2006 -0800" }, "message": "[PATCH] hugepage: is_aligned_hugepage_range() cleanup\n\nQuite a long time back, prepare_hugepage_range() replaced\nis_aligned_hugepage_range() as the callback from mm/mmap.c to arch code to\nverify if an address range is suitable for a hugepage mapping.\nis_aligned_hugepage_range() stuck around, but only to implement\nprepare_hugepage_range() on archs which didn\u0027t implement their own.\n\nMost archs (everything except ia64 and powerpc) used the same\nimplementation of is_aligned_hugepage_range(). On powerpc, which\nimplements its own prepare_hugepage_range(), the custom version was never\nused.\n\nIn addition, \"is_aligned_hugepage_range()\" was a bad name, because it\nsuggests it returns true iff the given range is a good hugepage range,\nwhereas in fact it returns 0-or-error (so the sense is reversed).\n\nThis patch cleans up by abolishing is_aligned_hugepage_range(). Instead\nprepare_hugepage_range() is defined directly. Most archs use the default\nversion, which simply checks the given region is aligned to the size of a\nhugepage. ia64 and powerpc define custom versions. The ia64 one simply\nchecks that the range is in the correct address space region in addition to\nbeing suitably aligned. The powerpc version (just as previously) checks\nfor suitable addresses, and if necessary performs low-level MMU frobbing to\nset up new areas for use by hugepages.\n\nNo libhugetlbfs testsuite regressions on ppc64 (POWER5 LPAR).\n\nSigned-off-by: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3915bcf38fe0b6d130b4bbde97804f29a0becf32", "tree": "c094ae338592d6e11999c16a2690915e47888a2b", "parents": [ "4866920b93fd7d5b520278c3c76e6f4d5a352d81" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Mar 22 00:08:59 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:04 2006 -0800" }, "message": "[PATCH] hugepage: Move hugetlb_free_pgd_range() prototype to hugetlb.h\n\nThe optional hugepage callback, hugetlb_free_pgd_range() is presently\nimplemented non-trivially only on ia64 (but I plan to add one for powerpc\nshortly). It has its own prototype for the function in asm-ia64/pgtable.h.\n However, since the function is called from generic code, it make sense for\nits prototype to be in the generic hugetlb.h header file, as the protypes\nother arch callbacks already are (prepare_hugepage_range(),\nset_huge_pte_at(), etc.). This patch makes it so.\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9da61aef0fd5b17dd4bf4baf33db12c470def774", "tree": "cb4bb0b63c36a0b303ceadc0cec0fae00c49ecf3", "parents": [ "27a85ef1b81300cfff06b4c8037e9914dfb09acc" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Mar 22 00:08:57 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:03 2006 -0800" }, "message": "[PATCH] hugepage: Fix hugepage logic in free_pgtables()\n\nfree_pgtables() has special logic to call hugetlb_free_pgd_range() instead\nof the normal free_pgd_range() on hugepage VMAs. However, the test it uses\nto do so is incorrect: it calls is_hugepage_only_range on a hugepage sized\nrange at the start of the vma. is_hugepage_only_range() will return true\nif the given range has any intersection with a hugepage address region, and\nin this case the given region need not be hugepage aligned. So, for\nexample, this test can return true if called on, say, a 4k VMA immediately\npreceding a (nicely aligned) hugepage VMA.\n\nAt present we get away with this because the powerpc version of\nhugetlb_free_pgd_range() is just a call to free_pgd_range(). On ia64 (the\nonly other arch with a non-trivial is_hugepage_only_range()) we get away\nwith it for a different reason; the hugepage area is not contiguous with\nthe rest of the user address space, and VMAs are not permitted in between,\nso the test can\u0027t return a false positive there.\n\nNonetheless this should be fixed. We do that in the patch below by\nreplacing the is_hugepage_only_range() test with an explicit test of the\nVMA using is_vm_hugetlb_page().\n\nThis in turn changes behaviour for platforms where is_hugepage_only_range()\nreturns false always (everything except powerpc and ia64). We address this\nby ensuring that hugetlb_free_pgd_range() is defined to be identical to\nfree_pgd_range() (instead of a no-op) on everything except ia64. Even so,\nit will prevent some otherwise possible coalescing of calls down to\nfree_pgd_range(). Since this only happens for hugepage VMAs, removing this\nsmall optimization seems unlikely to cause any trouble.\n\nThis patch causes no regressions on the libhugetlbfs testsuite - ppc64\nPOWER5 (8-way), ppc64 G5 (2-way) and i386 Pentium M (UP).\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nAcked-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8f860591ffb29738cf5539b6fbf27f50dcdeb380", "tree": "4265e45c4a79d86a16cd5175a836e8c531be8117", "parents": [ "aed75ff3caafce404d9be7f0c088716375be5279" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Wed Mar 22 00:08:50 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:03 2006 -0800" }, "message": "[PATCH] Enable mprotect on huge pages\n\n2.6.16-rc3 uses hugetlb on-demand paging, but it doesn_t support hugetlb\nmprotect.\n\nFrom: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\n\n Remove a test from the mprotect() path which checks that the mprotect()ed\n range on a hugepage VMA is hugepage aligned (yes, really, the sense of\n is_aligned_hugepage_range() is the opposite of what you\u0027d guess :-/).\n\n In fact, we don\u0027t need this test. If the given addresses match the\n beginning/end of a hugepage VMA they must already be suitably aligned. If\n they don\u0027t, then mprotect_fixup() will attempt to split the VMA. The very\n first test in split_vma() will check for a badly aligned address on a\n hugepage VMA and return -EINVAL if necessary.\n\nFrom: \"Chen, Kenneth W\" \u003ckenneth.w.chen@intel.com\u003e\n\n On i386 and x86-64, pte flag _PAGE_PSE collides with _PAGE_PROTNONE. The\n identify of hugetlb pte is lost when changing page protection via mprotect.\n A page fault occurs later will trigger a bug check in huge_pte_alloc().\n\n The fix is to always make new pte a hugetlb pte and also to clean up\n legacy code where _PAGE_PRESENT is forced on in the pre-faulting day.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Nishanth Aravamudan \u003cnacc@us.ibm.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "133a58c1fd97022690d53dd58df56579193cbc1d", "tree": "34e304eaf545cd7991580a7a30609f49c919eb52", "parents": [ "dc5cdd8ec146a60152f2264c8fe920ca5ecc71ea", "7aa6ba41362a7f888ad11fdcfe51ca8d92226cd3" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:56 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:56 2006 -0800" }, "message": "Pull sn2-reduce-kmalloc-wrap into release branch\n" }, { "commit": "ae02e964b669f19fb08d953032463ab7dc6f79eb", "tree": "e02ff418110b06c5b7cac8302f9930573f2f35b0", "parents": [ "409761bb6a06bd61e2d8e27a1af534371d9537ed", "dcc1dd2366a7c355fd8b6543c52685b864a2044f" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:17 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:17 2006 -0800" }, "message": "Pull icc-cleanup into release branch\n" }, { "commit": "409761bb6a06bd61e2d8e27a1af534371d9537ed", "tree": "2c07068558092a01d70f737de9b9a34212a44d4b", "parents": [ "a4e817ba24d2a52f0332c2ddcdbf77ddd6a92bbe", "e08e6c521355cd33e647b2f739885bc3050eead6" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:21:26 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:21:26 2006 -0800" }, "message": "Pull sn2-mmio-writes into release branch\n\nHand-fixed conflicts:\n\tinclude/asm-ia64/machvec_sn2.h\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a4e817ba24d2a52f0332c2ddcdbf77ddd6a92bbe", "tree": "f2a43b1e741c4ade35e98b1088b3f111dfbf1342", "parents": [ "1f84253e3ce75fc1b2946a544e16c5c0c13c7017", "13938ca7a1ad9a4788cf73309f187d99c97ddfde" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:18:26 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:18:26 2006 -0800" }, "message": "Pull altix-ce1.0-asic into release branch\n" }, { "commit": "581249966ffeb0463bad1b0e087e1bb29ed53707", "tree": "d0cc7c15ff2cd9c65799a114b0f8e2257765f1e6", "parents": [ "6a8a8e14bed179f2d415c7f4fee51233c35c10c3", "b0a06623dc4caf6dfb6a84419507643471676d20" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:17:38 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:17:38 2006 -0800" }, "message": "Pull delete-sigdelayed into release branch\n" }, { "commit": "33cbd30eaf24ea43af4fe161b6fb34a859b3f2e0", "tree": "ca0086f9764236e06c244054f5c32d268d226ae6", "parents": [ "536ea4e4198eeaa5a73fb734ea675e621609bb7e", "a454c2f3d1fd1cab7073b53c6c14d6d4b61f4e09" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:55 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:55 2006 -0800" }, "message": "Pull ia64-mutex-primitives into release branch\n" }, { "commit": "536ea4e4198eeaa5a73fb734ea675e621609bb7e", "tree": "321384a2233413d7df5f00b3356116c8b05ef08d", "parents": [ "7705a8792b0fc82fd7d4dd923724606bbfd9fb20", "b88e926584bf100bc23f5e76b7b674d4257edcb0" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:21 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:21 2006 -0800" }, "message": "Pull bsp-removal into release branch\n" }, { "commit": "18810d1ebac89232d8f218a318ed9ff7ef198e96", "tree": "83924c9f8e50ce327a8523dbdeaac91aefd2580a", "parents": [ "312f1f0141627a58bf72c55f0e7bc5d6f118a372" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Thu Feb 23 13:16:44 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 27 15:32:28 2006 -0800" }, "message": "[IA64-SGI] Make number of TIO nodes configurable\n\nMake the limit for the number of TIO nodes a function of the number\nof C/M nodes in the system instead of a hardcoded constant. The\nnumber of TIO nodes should be the same as the number of C/M nodes.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "7aa6ba41362a7f888ad11fdcfe51ca8d92226cd3", "tree": "3d7b177ee966f21d1ac6e630061bdb0b256e76d8", "parents": [ "e95a9ec1bb66e07b138861c743192f06e7b3e4de" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Fri Feb 17 05:18:43 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 27 15:26:58 2006 -0800" }, "message": "[IA64-SGI] SN2-XP reduce kmalloc wrapper inlining\n\nTake advantage of kzalloc() as well as reduce the size of code generated\nfor the error returns in xpc_setup_infrastructure().\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nAcked-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "759b650f54ed13e9b3d6c064c763a72ee09c74dd", "tree": "173f08e5432e169c00a40a4d2296d965fe8f9c22", "parents": [ "69454e6991091d0d6eb7461653f2695d985e1a74", "8f8b1138fc9f65e3591aac83a4ee394fef34ac1d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 17 08:16:35 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 17 08:16:35 2006 -0800" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n" }, { "commit": "5f6164f3092832e0d9b12eed52e09a76bf39c64a", "tree": "507043c3eafa00ad7241f1102c860e486f8dc544", "parents": [ "06fed33849c13af637c4d09e9ba27828fac9edd5" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@mellanox.co.il", "time": "Wed Feb 15 15:17:39 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Feb 15 15:32:22 2006 -0800" }, "message": "[PATCH] add asm-generic/mman.h\n\nMake new MADV_REMOVE, MADV_DONTFORK, MADV_DOFORK consistent across all\narches. The idea is to make it possible to use them portably even before\ndistros include them in libc headers.\n\nMove common flags to asm-generic/mman.h\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@mellanox.co.il\u003e\nCc: Roland Dreier \u003crolandd@cisco.com\u003e\nCc: Badari Pulavarty \u003cpbadari@us.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "72166c35f0e15e5081e51304de48e73f8fdf5498", "tree": "0515dfa0fc442f92ecbb9add2bc53ca86016a8d6", "parents": [ "b05de01ae1c76b7d61da21bbcc26345bf7a9052f", "a6b14fa6fdc01ab3519c2729624f808677539b59" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 15:17:57 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 15:17:57 2006 -0800" }, "message": "Pull fix-cpu-possible-map into release branch\n" }, { "commit": "defbb2c929cbe89dc92239b303cd33d3c85e9a83", "tree": "85dbcfa407d4bfaecbce4f3556a73033b8f70caf", "parents": [ "4c2cd96696ae0896ce4bcf725b9f0eaffafeb640" ], "author": { "name": "hawkes@sgi.com", "email": "hawkes@sgi.com", "time": "Tue Feb 14 10:40:17 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:37:04 2006 -0800" }, "message": "[IA64] ia64: simplify and fix udelay()\n\nThe original ia64 udelay() was simple, but flawed for platforms without\nsynchronized ITCs: a preemption and migration to another CPU during the\nwhile-loop likely resulted in too-early termination or very, very\nlengthy looping.\n\nThe first fix (now in 2.6.15) broke the delay loop into smaller,\nnon-preemptible chunks, reenabling preemption between the chunks. This\nfix is flawed in that the total udelay is computed to be the sum of just\nthe non-premptible while-loop pieces, i.e., not counting the time spent\nin the interim preemptible periods. If an interrupt or a migration\noccurs during one of these interim periods, then that time is invisible\nand only serves to lengthen the effective udelay().\n\nThis new fix backs out the current flawed fix and returns to a simple\nudelay(), fully preemptible and interruptible. It implements two simple\nalternative udelay() routines: one a default generic version that uses\nia64_get_itc(), and the other an sn-specific version that uses that\nplatform\u0027s RTC.\n\nSigned-off-by: John Hawkes \u003chawkes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4c2cd96696ae0896ce4bcf725b9f0eaffafeb640", "tree": "12b7d967d677e8e8ea154b0b4ae957df6cc43e39", "parents": [ "c2a4969ba14e852bf4ee92c7db3b0cf82405a0c9" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Wed Feb 15 08:02:21 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:35:03 2006 -0800" }, "message": "[IA64-SGI] enforce proper ordering of callouts by XPC\n\nFix XPC so that it does not deliver any messages until the connected\ncallout has returned, as well as, prevent the disconnected callout to\noccur before the disconnecting callout has returned.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c2a4969ba14e852bf4ee92c7db3b0cf82405a0c9", "tree": "a79b5559260fb09525e764ab41366ff75f3f6677", "parents": [ "9c65cb9be62ac4993a5b392304b82e4f04f010fd" ], "author": { "name": "Dean Roe", "email": "roe@sgi.com", "time": "Tue Feb 14 15:01:23 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:33:48 2006 -0800" }, "message": "[IA64-SGI] fix the size of __sn_cnodeid_to_nasid\n\nThe __sn_cnodeid_to_nasid array was incorrectly sized at MAX_NUMNODES.\nOn a large system, this array could overflow. The following patch\ncorrects this by defining it to MAX_COMPACT_NODES.\n\nSigned-off-by: Dean Roe \u003croe@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d3454344b3507042e5d561d0cfed19e99cf2fc88", "tree": "3dff5713282f454c5e73eb4b08d829cfa4cf9211", "parents": [ "8ed9b2c7a804335004e4bd3b4c6989c5b6bc243f" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Mon Feb 13 05:32:09 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:25:37 2006 -0800" }, "message": "[IA64] remove obsolete corporate address\n\nRemove obsolete SGI address\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8ed9b2c7a804335004e4bd3b4c6989c5b6bc243f", "tree": "f7420b3fe8ad59ad23707ccbfd7ccaef7abe2a70", "parents": [ "50d8e59038703c4da5acaed9afaa37ae416d3153" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Mon Feb 13 05:29:57 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:24:45 2006 -0800" }, "message": "[IA64-SGI] sn2 minor fixes and cleanups\n\nGeneral SN2 code cleanup:\n - Do not initialize global variables to zero\n - Use kzalloc instead of kmalloc+memset\n - Check kmalloc return values\n - Do not obfuscate spin lock calls\n - Remove some unused code\n - Various formatting cleanups\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f822566165dd46ff5de9bf895cfa6c51f53bb0c4", "tree": "e052f406d5a14140d17f76dc8914d33bbc8e5f1d", "parents": [ "8861da31e3b3e3df7b05e7b157230de3d486e53b" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@mellanox.co.il", "time": "Tue Feb 14 13:53:08 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Feb 14 16:09:34 2006 -0800" }, "message": "[PATCH] madvise MADV_DONTFORK/MADV_DOFORK\n\nCurrently, copy-on-write may change the physical address of a page even if the\nuser requested that the page is pinned in memory (either by mlock or by\nget_user_pages). This happens if the process forks meanwhile, and the parent\nwrites to that page. As a result, the page is orphaned: in case of\nget_user_pages, the application will never see any data hardware DMA\u0027s into\nthis page after the COW. In case of mlock\u0027d memory, the parent is not getting\nthe realtime/security benefits of mlock.\n\nIn particular, this affects the Infiniband modules which do DMA from and into\nuser pages all the time.\n\nThis patch adds madvise options to control whether memory range is inherited\nacross fork. Useful e.g. for when hardware is doing DMA from/into these\npages. Could also be useful to an application wanting to speed up its forks\nby cutting large areas out of consideration.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@mellanox.co.il\u003e\nAcked-by: Hugh Dickins \u003chugh@veritas.com\u003e\nCc: Michael Kerrisk \u003cmtk-manpages@gmx.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a6b14fa6fdc01ab3519c2729624f808677539b59", "tree": "5bf76be44b0c9c7f80612ac71a1b1a4390decd7d", "parents": [ "69aa234b918c0d9bc4a20cd6d4453aaa3418f457" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Tue Feb 14 15:01:12 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 14 15:37:58 2006 -0800" }, "message": "[IA64] Count disabled cpus as potential hot-pluggable CPUs\n\nHave a facility to account for potentially hot-pluggable CPUs. ACPI doesnt\ngive a determinstic method to find hot-pluggable CPUs. Hence we use 2 methods\nto assist.\n\n- BIOS can mark potentially hot-pluggable CPUs as disabled in the MADT tables.\n- User can specify the number of hot-pluggable CPUs via parameter\n additional_cpus\u003dX\n\nThe option is enabled only if ACPI_CONFIG_HOTPLUG_CPU\u003dy which enables the\nphysical hotplug option. Without which user can still use logical onlining\nand offlining of CPUs by enabling CONFIG_HOTPLUG_CPU\u003dy\n\nAdds more bits to cpu_possible_map for potentially hot-pluggable cpus.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "65b78722ce2a2dc76108b467f79b2c5b4864af82", "tree": "a5296112d759443f84e6f334703dc330be903d8e", "parents": [ "a94746461765dae41fb82e4dac027d14af4d80d8", "9621a4ef8a29d11118f44def053931bcafb0dfc2" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 09 14:43:58 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 09 14:43:58 2006 -0800" }, "message": "Pull new-syscalls into release branch\n" }, { "commit": "9621a4ef8a29d11118f44def053931bcafb0dfc2", "tree": "b1e0a0214bddd5f23133e5b12fdf8f8d24188bcd", "parents": [ "9ed2ad8648eb974ee670045d41b5a51b763e3aa1" ], "author": { "name": "Janak Desai", "email": "janak@us.ibm.com", "time": "Wed Feb 08 15:43:38 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 08 15:43:38 2006 -0800" }, "message": "[IA64] unshare system call registration for ia64\n\nRegisters system call for the ia64 architecture.\n\nReserves space for ppoll and pselect, and adds unshare at system\ncall number 1296.\n\nSigned-off-by: Janak Desai \u003cjanak@us.ibm.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "dcc1dd2366a7c355fd8b6543c52685b864a2044f", "tree": "c1fa5734246518c4cd0da82ec151eb905fd1b375", "parents": [ "412e6a378260608bf28f29d4fa8a9241e0240a2d" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Tue Feb 07 09:24:14 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 09:24:14 2006 -0800" }, "message": "[IA64-SGI] - Eliminate SN pio_phys_xxx macros. Move to assembly\n\nRewrite the SN pio_phys_xxx macros in assembly language. This\navoids issues with the Intel icc compiler. Function call\noverhead is not an issue - the functions reference PIOs\nand take 100\u0027s nsec to complete.\n\nIn addition, the functions should likely be in assembly\nlanguage anyway - they reference memory using physical\naddressing mode. One function executes with psr.ic disabled.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "412e6a378260608bf28f29d4fa8a9241e0240a2d", "tree": "c1f7d21ef519c47a6e985d55971850174a4431bc", "parents": [ "9df79decc395b2f9484ff93a1383ba705ff34b10" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 17:19:46 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:49:27 2006 -0800" }, "message": "[IA64] use icc defined constant\n\nUse icc defined constant instead of magic number.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9df79decc395b2f9484ff93a1383ba705ff34b10", "tree": "ea8e32bbb84250f49965a549792741b436c57188", "parents": [ "c583f66dc41cfa4055b6ac8f50cc1ebf362298f7" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 17:12:02 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:49:10 2006 -0800" }, "message": "[IA64] add __builtin_trap definition for icc build\n\nMap __builtin_trap function to break 0 instruction.\n\nSigned-off-by: HJ Lu \u003chongjiu.lu@intel.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c583f66dc41cfa4055b6ac8f50cc1ebf362298f7", "tree": "77cf0c82d39796ae513e9bce675e0db9984e17cb", "parents": [ "4bf64e72bd499d2bf3509c2dc60d09c39f72c782" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 17:08:47 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:48:49 2006 -0800" }, "message": "[IA64] clean up asm/intel_intrin.h\n\nInclude intrinsic header file from icc compiler. Remove\nduplicate definition from kernel source.\n\nSigned-off-by: HJ Lu \u003chongjiu.lu@intel.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4bf64e72bd499d2bf3509c2dc60d09c39f72c782", "tree": "72c4687431def513e7d60d50f3b5ac10a981f896", "parents": [ "c03296a868ae7c91aa2d8b372184763b18f16d7a" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 16:58:52 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:48:14 2006 -0800" }, "message": "[IA64] map ia64_hint definition to intel compiler intrinsic\n\nMap ia64_hint() to internal intel compiler intrinsic.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c03296a868ae7c91aa2d8b372184763b18f16d7a", "tree": "57ff0b44a412b78fe598a49cc28b3cebf51f1154", "parents": [ "e3f749c4af69c4344d89f11e2293e3790eb4eaca", "913e4a75572354995b330f57082d9a86250cd75f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Feb 06 15:46:39 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Feb 06 15:46:39 2006 -0800" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n" }, { "commit": "9ed2ad8648eb974ee670045d41b5a51b763e3aa1", "tree": "80e98f48b6a7538d2b7d74f67c7ce3c5bab35ea6", "parents": [ "e3f749c4af69c4344d89f11e2293e3790eb4eaca" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Tue Jan 31 14:26:25 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 06 10:42:46 2006 -0800" }, "message": "[IA64] add syscall entry for *at()\n\nWire up the ia64 syscalls for *at() functions.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "913e4a75572354995b330f57082d9a86250cd75f", "tree": "d7652ef6b9bc0cf3e579deaf9483e5f61f03c20b", "parents": [ "27ee6e0592c7d624836835dd8d2f0f74e9d289f6" ], "author": { "name": "Russ Anderson", "email": "rja@efs.americas.sgi.com", "time": "Fri Feb 03 14:47:15 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 06 09:28:10 2006 -0800" }, "message": "[IA64-SGI] Shub2 BTE address fix\n\nAfter converting the cpu physical address to shub2 physical\naddressing, the address was run through TO_PHYS() which\nclobbered a high node offset bit causing the BTE to fail\non shub2 nodes with large memory. This fix corrects\nthat problem.\n\nSigned-off-by: Russ Anderson (rja@sgi.com)\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d57d39c81271a0808eabcf7bdc409312b5262b69", "tree": "7c3bd49624969c0d4e67a75acc8676945a900cc3", "parents": [ "b7bed9ec44cb282425f56033e5fb5448086cd758" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Feb 03 03:04:53 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 03 08:32:11 2006 -0800" }, "message": "[PATCH] ia64: drop arch-specific IDE MAX_HWIFS definition\n\nThere\u0027s no reason MAX_HWIFS needs to be ia64-specific, so set MAX_HWIFS\nfrom CONFIG_IDE_MAX_HWIFS.\n\nThis reduces the default from 10 to 4, but I don\u0027t think that\u0027s a problem.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nAcked-by: Bartlomiej Zolnierkiewicz \u003cB.Zolnierkiewicz@elka.pw.edu.pl\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "69dcc99199fe29b0a29471a3488d39d9d33b25fc", "tree": "4232ad9a782dee6abfe7fa20c95a49249195de8f", "parents": [ "66ac5a294db70aa377c0d7bbdb0c4e3ef2349b7b" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin.zhang@intel.com", "time": "Fri Feb 03 03:04:36 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 03 08:32:09 2006 -0800" }, "message": "[PATCH] Export cpu topology in sysfs\n\nThe patch implements cpu topology exportation by sysfs.\n\nItems (attributes) are similar to /proc/cpuinfo.\n\n1) /sys/devices/system/cpu/cpuX/topology/physical_package_id:\n\trepresent the physical package id of cpu X;\n2) /sys/devices/system/cpu/cpuX/topology/core_id:\n\trepresent the cpu core id to cpu X;\n3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:\n\trepresent the thread siblings to cpu X in the same core;\n4) /sys/devices/system/cpu/cpuX/topology/core_siblings:\n\trepresent the thread siblings to cpu X in the same physical package;\n\nTo implement it in an architecture-neutral way, a new source file,\ndriver/base/topology.c, is to export the 5 attributes.\n\nIf one architecture wants to support this feature, it just needs to\nimplement 4 defines, typically in file include/asm-XXX/topology.h.\nThe 4 defines are:\n#define topology_physical_package_id(cpu)\n#define topology_core_id(cpu)\n#define topology_thread_siblings(cpu)\n#define topology_core_siblings(cpu)\n\nThe type of **_id is int.\nThe type of siblings is cpumask_t.\n\nTo be consistent on all architectures, the 4 attributes should have\ndeafult values if their values are unavailable. Below is the rule.\n\n1) physical_package_id: If cpu has no physical package id, -1 is the\ndefault value.\n\n2) core_id: If cpu doesn\u0027t support multi-core, its core id is 0.\n\n3) thread_siblings: Just include itself, if the cpu doesn\u0027t support\nHT/multi-thread.\n\n4) core_siblings: Just include itself, if the cpu doesn\u0027t support\nmulti-core and HT/Multi-thread.\n\nSo be careful when declaring the 4 defines in include/asm-XXX/topology.h.\n\nIf an attribute isn\u0027t defined on an architecture, it won\u0027t be exported.\n\nThank Nathan, Greg, Andi, Paul and Venki.\n\nThe patch provides defines for i386/x86_64/ia64.\n\nSigned-off-by: Zhang, Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9a52bbed905fa41ca10f4db2e845b588f0fdfbef", "tree": "6caee8f97528a14af745d50a7cec452342d96d5f", "parents": [ "2fcc3db0ccee9b47df7a4f732e6624f4f643c035" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Thu Feb 02 05:50:05 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:36:50 2006 -0800" }, "message": "[IA64-SGI] include/asm-ia64/sn/intr.h more sn2 housekeeping\n\nHouse keeping - eliminate unneeded parenthesis in macro defines.\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a58786917ce23c2a26c3e099c3cdba32a35eeceb", "tree": "4740de51febbe16934d24d94cb80432a7547cb26", "parents": [ "af14aca90e0cdfccd71f9947c45b6ea2cf321dcb" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Mon Jan 30 16:32:31 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:25:54 2006 -0800" }, "message": "[IA64] avoid broken SAL_CACHE_FLUSH implementations\n\nIf SAL_CACHE_FLUSH drops interrupts, complain about it and fall back to\nusing PAL_CACHE_FLUSH instead.\n\nThis is to work around a defect in HP rx5670 firmware: when an interrupt\noccurs during SAL_CACHE_FLUSH, SAL drops the interrupt but leaves it marked\n\"in-service\", which leaves the interrupt (and others of equal or lower\npriority) masked.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f8efa27662532ad5adb2790bfc3f4c78e019cfad", "tree": "848c4935674ed965256ef328a6b69316ebad6a8c", "parents": [ "df080e7c94c8f4b8334614159fa079aaeece5670" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 18:24:59 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:20:42 2006 -0800" }, "message": "[IA64] remove staled comments in asm/system.h\n\nWith the recent optimization made to wrap_mmu_context function,\nwe don\u0027t hold tasklist_lock anymore when wrapping context id.\nThe comments in asm/system.h must fall through the crack earlier.\nRemove staled comments.\n\nI believe it is still beneficial to unlock the runqueue lock\nacross context switch. So leave __ARCH_WANT_UNLOCKED_CTXSW on.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e08e6c521355cd33e647b2f739885bc3050eead6", "tree": "251dd80647bd3a0140f5f31c35c125094c035f9c", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Brent Casavant", "email": "bcasavan@sgi.com", "time": "Thu Jan 26 15:55:52 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 15:55:52 2006 -0800" }, "message": "[IA64] hooks to wait for mmio writes to drain when migrating processes\n\nOn SN2, MMIO writes which are issued from separate processors are not\nguaranteed to arrive in any particular order at the IO hardware. When\nperforming such writes from the kernel this is not a problem, as a\nkernel thread will not migrate to another CPU during execution, and\nmmiowb() calls can guarantee write ordering when control of the IO\nresource is allowed to move between threads.\n\nHowever, when MMIO writes can be performed from user space (e.g. DRM)\nthere are no such guarantees and mechanisms, as the process may\ncontext-switch at any time, and may migrate to a different CPU as part\nof the switch. For such programs/hardware to operate correctly, it is\nrequired that the MMIO writes from the old CPU be accepted by the IO\nhardware before subsequent writes from the new CPU can be issued.\n\nThe following patch implements this behavior on SN2 by waiting for a\nShub register to indicate that these writes have been accepted. This\nis placed in the context switch-in path, and only performs the wait\nwhen the newly scheduled task changes CPUs.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Brent Casavant \u003cbcasavan@sgi.com\u003e\n" }, { "commit": "13938ca7a1ad9a4788cf73309f187d99c97ddfde", "tree": "bdca0d858333bb610d2b9253597ab53f8273b587", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Mark Maule", "email": "maule@sgi.com", "time": "Thu Jan 26 14:46:39 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:56:09 2006 -0800" }, "message": "[IA64-SGI] driver bugfixes and hardware workarounds for CE1.0 asic\n\nVarious bugfixes and hardware bug workarounds necessary for the rev 1.0 version\nof the altix TIO CE asic.\n\nSigned-off-by: Mark Maule \u003cmaule@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "61d67f2e07d96d20d86135792ca591c491939c27", "tree": "d0c65cff2291e5ed849640a465c444c150f8d929", "parents": [ "139366a093d1ce2749b1b4247947ceb9b78caa2a" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Wed Jan 25 18:51:14 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:50:40 2006 -0800" }, "message": "[IA64-SGI] Add PROM feature set for device flush list\n\nIntroduce PRF_DEVICE_FLUSH_LIST flag for older PROMs.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b0a06623dc4caf6dfb6a84419507643471676d20", "tree": "4808417fe23fcb3e352c0ce347abb6218fc2263e", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Keith Owens", "email": "kaos@sgi.com", "time": "Sun Jan 22 10:55:25 2006 +1100" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:23:27 2006 -0800" }, "message": "[IA64] Delete MCA/INIT sigdelayed code\n\nThe only user of the MCA/INIT sigdelayed code (SGI\u0027s I/O probing) has\nmoved from the kernel into SAL. Delete the MCA/INIT sigdelayed code.\n\nSigned-off-by: Keith Owens \u003ckaos@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a454c2f3d1fd1cab7073b53c6c14d6d4b61f4e09", "tree": "a1240c5b420adb94dd5c952a089f0326ee0060fe", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Wed Jan 11 17:11:09 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:10:19 2006 -0800" }, "message": "[IA64] implement ia64 specific mutex primitives\n\nImplement ia64 optimized mutex primitives. It properly uses\nacquire/release memory ordering semantics in lock/unlock path.\n2nd version making them all static inline functions.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "fd8b206d1621ad526e7b00dc26322f546b2a57fb", "tree": "01e9842ede41b8ffe6242fc1a242204e778e754b", "parents": [ "79c83bd15af3b06079a9205db9c64c92ca1bd868" ], "author": { "name": "Dean Roe", "email": "roe@sgi.com", "time": "Tue Jan 24 14:49:43 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 24 14:49:43 2006 -0800" }, "message": "[IA64-SGI] add sn_feature_sets bit\n\nSGI\u0027s prom has added a new feature which avoids an Altix-specific\nMCA that can occur with excessive use of ia64_pal_cache_flush. This\npatch adds the #define to the sn_feature_sets.h to reflect that bit\nis taken.\n\nSigned-off-by: Dean Roe \u003croe@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4b16bfbf8f8013fefb49592d030ff87651ab48cb", "tree": "ce9150f8ceac6150261f5bc69afdf9d2e95def19", "parents": [ "8d08aed8d7714683b33666cc066e20f957dda01d" ], "author": { "name": "Zoltan Menyhart", "email": "Zoltan.Menyhart@bull.net", "time": "Fri Jan 13 17:25:23 2006 +0100" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 17 14:04:00 2006 -0800" }, "message": "[IA64] Fix bug in ia64 specific down() function\n\nChen, Kenneth W wrote:\n\u003e The memory order semantics for include/asm-ia64/semaphore.h:down()\n\u003e doesn\u0027t look right. It is using atomic_dec_return, which eventually\n\u003e translate into ia64_fetch_and_add() that uses release semantics.\n\u003e Shouldn\u0027t it use acquire semantics?\n\nUse ia64_fetchadd() instead of atomic_dec_return()\n\nAcked-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8d08aed8d7714683b33666cc066e20f957dda01d", "tree": "31b8a773a09575f94adce8e00c52fb0010bd5a5f", "parents": [ "d171e519da635a82ab759cbfd46617ac160c9ec0" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Tue Jan 17 15:42:46 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 17 13:55:46 2006 -0800" }, "message": "[IA64] Zonelists for nodes without cpus\n\nIf a node runs out of memory, ensure that memory on nodes w/o cpus is used\nbefore using memory on nodes with cpus.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f9e505a9a03df5acace6e758c8d12982635a1c64", "tree": "c336b36fd18dd1fc1f316cb55ad52c67da2ffd8a", "parents": [ "ac354a899b91239aac4d5893fc4288bc400e82b4" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Tue Jan 17 12:52:21 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 17 13:53:24 2006 -0800" }, "message": "[IA64-SGI] sn2 mutex conversion\n\nMigrate sn2 code to use mutex and completion events rather than\nsemaphores.\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nAcked-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "859538763155814d217054eb6e3cdff71bdb4d89", "tree": "9366c72527102d67728b9cafc53654ad579ba40b", "parents": [ "53493dcf6e9e27cc9379cbf8962642986927aea9", "9179cb65780def28770a895a4bc8fa60e903ab80" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 20:02:24 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 20:02:24 2006 -0800" }, "message": "Pull perfmon-montecito into release branch\n" }, { "commit": "53493dcf6e9e27cc9379cbf8962642986927aea9", "tree": "7d7cb54a7020220058b459d60f06691cea71236f", "parents": [ "f15ac5801fdc1b217c3b8b5dbc63a09371d2ee4d" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Mon Jan 16 19:54:40 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 19:54:40 2006 -0800" }, "message": "[IA64] Cleanup of arch/ia64/sn and include/asm-ia64/sn\n\nReplace uintX_t declarations with uX declarations.\nReplace intX_t declarations with sX declarations.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f15ac5801fdc1b217c3b8b5dbc63a09371d2ee4d", "tree": "b9d4eeb9b5a6ab36fdaebf24263aa4ba5543aec7", "parents": [ "7b9c8ba2d634a0467a8a36018a28624563f34f47" ], "author": { "name": "Xu, Anthony", "email": "anthony.xu@intel.com", "time": "Mon Jan 09 10:36:35 2006 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 15:44:53 2006 -0800" }, "message": "[IA64] pal cache flush patch\n\nBecause PAL spec has changed since 2002, you can goto\nhttp://developer.intel.com/design/itanium/manuals/iiasdmanual.htm to\ndownload new SDM, all PAL calls should be invoked with psr.ic\u003d1, and\nit\u0027s caller\u0027s responsibility to handle possible tlb miss.\nIa64_pal_cache_flush was written according to old spec, it is obsolete,\nand this patch has ia64_pal_cache_flush conform to new spec.\n\nSigned-off-by Anthony Xu \u003canthony.xu@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9179cb65780def28770a895a4bc8fa60e903ab80", "tree": "10c9033adcdcdf2d8350a657e10c1aa72dc0aa68", "parents": [ "4a8e4a270b89030bdeb09d2f8cef7cfe9a50e54d" ], "author": { "name": "Stephane Eranian", "email": "eranian@hpl.hp.com", "time": "Tue Jan 10 03:10:43 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 10:31:44 2006 -0800" }, "message": "[IA64] Perfmon for Montecito\n\nAdd Montecito PMU description table for perfmon2\n\nSigned-off-by: Stephane Eranian \u003ceranian@hpl.hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2d0cfb527944c2cfee2cffab14f52d483e329fcf", "tree": "b2e3340b52d83b51674f3782a208850d53d3d24d", "parents": [ "7170be5f586b59bdcdab082778a5d9203ba7b667" ], "author": { "name": "Patrick Gefre", "email": "pfg@sgi.com", "time": "Sat Jan 14 13:20:40 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Jan 14 18:25:20 2006 -0800" }, "message": "[PATCH] Altix: ioc3 serial support\n\nAdd driver support for a 2 port PCI IOC3-based serial card on Altix boxes:\n\nThis is a re-submission. On the original submission I was asked to\norganize the code so that the MIPS ioc3 ethernet and serial parts could be\nused with this driver. Stanislaw Skowronek was kind enough to provide the\nshim layer for this - thanks Stanislaw. This patch includes the shim layer\nand the Altix PCI ioc3 serial driver. The MIPS merged ioc3 ethernet and\nserial support is forthcoming.\n\nSigned-off-by: Patrick Gefre \u003cpfg@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "d3ef1f5aafcf7a4129eb2078c70bc9e577bc3af1", "tree": "619647d90b0a51d39e80bbc20b59e7e7dccbf510", "parents": [ "e026cca0f2c09c4c28c902db6384fd8a412671d6" ], "author": { "name": "Zhang Yanmin", "email": "yanmin.zhang@intel.com", "time": "Fri Jan 13 14:45:21 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:45:21 2006 -0800" }, "message": "[IA64] prevent accidental modification of args in jprobe handler\n\nWhen jprobe is hit, the function parameters of the original function\nshould be saved before jprobe handler is executed, and restored it after\njprobe handler is executed, because jprobe handler might change the\nregister values due to tail call optimization by the gcc.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "15029285dc977a392e74eacb7625984b71d4f605", "tree": "0fed8aac81f7b4491121550b3670b4a8aeabcff9", "parents": [ "6d6e420005f3753392b608a614eee8475bdc16f7" ], "author": { "name": "Jason Uhlenkott", "email": "jasonuhl@sgi.com", "time": "Fri Dec 30 02:27:01 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:16:08 2006 -0800" }, "message": "[IA64] Handle debug traps in fsys mode\n\nWe need to handle debug traps in fsys mode non-fatally. They can\nhappen now that we have fsyscalls which contain probe instructions.\n\nSigned-off-by: Jason Uhlenkott \u003cjasonuhl@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6d6e420005f3753392b608a614eee8475bdc16f7", "tree": "a59860fc15ce4e92c00015d068de4aba12a9b889", "parents": [ "cfbb1426bd76c4ba6ec4491c8df2a5dd3d984750" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Fri Dec 23 13:33:25 2005 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:13:08 2006 -0800" }, "message": "[IA64-SGI] Fix sn_flush_device_kernel \u0026 spinlock initialization\n\nThis patch separates the sn_flush_device_list struct into kernel and\ncommon (both kernel and PROM accessible) structures. As it was, if the\nsize of a spinlock_t changed (due to additional CONFIG options, etc.) the\nsal call which populated the sn_flush_device_list structs would erroneously\nwrite data (and cause memory corruption and/or a panic).\n\nThis patch does the following:\n\n1. Removes sn_flush_device_list and adds sn_flush_device_common and\nsn_flush_device_kernel.\n\n2. Adds a new SAL call to populate a sn_flush_device_common struct per\ndevice, not per widget as previously done.\n\n3. Correctly initializes each device\u0027s sn_flush_device_kernel spinlock_t\nstruct (before it was only doing each widget\u0027s first device).\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "17e8ce0e9417eee1f57f9b3d4aad168425e043c3", "tree": "58bae85da8cedb339d945d43191ff910501bd175", "parents": [ "8a4b7b6f187f2967bff222e8c3758ab47efdb14f" ], "author": { "name": "Russ Anderson", "email": "rja@efs.americas.sgi.com", "time": "Fri Dec 16 17:19:01 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:06:53 2006 -0800" }, "message": "[IA64-SGI] Altix BTE error handling fixes\n\nAltix (shub2) pushes the BTE clean-up into SAL.\nThis patch correctly interfaces with the now implemented SAL call.\nIt also fixes a bug when delaying clean-up to allow busy BTEs to\ncomplete (or error out).\n\nSigned-off-by: Russ Anderson \u003crja@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9335d48e10d2d07eacaddf889ec1efb8a5a5082e", "tree": "a0f9c33010e42d5c195dd4da5f413528d97a303a", "parents": [ "87a149d6bba5949fbc53b8a21189b54748ac9e2a" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Tue Jan 10 11:12:32 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 10:40:23 2006 -0800" }, "message": "[IA64-SGI] move xpc.h to include/asm-ia64/sn (cleanup)\n\nCleanup a few items after moving xpc.h from arch/ia64/sn/kernel to\ninclude/asm-ia64/sn.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "87a149d6bba5949fbc53b8a21189b54748ac9e2a", "tree": "860024852a4bb983f79fe84b2c44958492c0e0d5", "parents": [ "d6ad033a88b42420ddb6c62c95e42f88d862b246" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Tue Jan 10 11:09:48 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 10:39:34 2006 -0800" }, "message": "[IA64-SGI] move xpc.h to include/asm-ia64/sn\n\nMove xpc.h from arch/ia64/sn/kernel to include/asm-ia64/sn without change.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "246c7e33d51afe99890b2caab7ad482c0296d5ba", "tree": "20d96a5182dd5971d9d51d6626cf02d4a1c19c85", "parents": [ "7ae69d2aa4ed3ee8cef18a072346366f019d6a4a" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Thu Dec 22 14:32:56 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 10:16:36 2006 -0800" }, "message": "[IA64-SGI] ensure XPC disengage request is processed\n\nThis patch fixes a problem in XPC disengage processing whereby it was not\nseeing the request to disengage from a remote partition, so the disengage\nwasn\u0027t happening. The disengagement is suppose to transpire during the time\na XPC channel is disconnecting, and should be completed before the channel\nis declared to be disconnected.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6450578f32cdca587ae5f148e2118b2fcc36bb11", "tree": "91ad424aae66d72fc370dc624fca3f42d830675b", "parents": [ "ab03591db110e8d195d381a68692eb37da981cdf" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Thu Jan 12 01:06:06 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jan 12 09:08:58 2006 -0800" }, "message": "[PATCH] ia64: task_pt_regs()\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "ab03591db110e8d195d381a68692eb37da981cdf", "tree": "2ebf699572844388ee9a12407e31d2915a399cb5", "parents": [ "718d6114fcd894bf4d3527b9e206a1cbcaaae35d" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Thu Jan 12 01:06:05 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jan 12 09:08:58 2006 -0800" }, "message": "[PATCH] ia64: task_thread_info()\n\non ia64 thread_info is at the constant offset from task_struct and stack\nis embedded into the same beast. Set __HAVE_THREAD_FUNCTIONS, made\ntask_thread_info() just add a constant.\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "198e2f181163233b379dc7ce8a6d7516b84042e7", "tree": "cc4067ca1c81034ba8d214b7ff4c39f2f5be66ee", "parents": [ "4dc7a0bbeb6882ad665e588e82fabe5bb4645f2f" ], "author": { "name": "akpm@osdl.org", "email": "akpm@osdl.org", "time": "Thu Jan 12 01:05:30 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jan 12 09:08:50 2006 -0800" }, "message": "[PATCH] scheduler cache-hot-autodetect\n\n\r)\n\nFrom: Ingo Molnar \u003cmingo@elte.hu\u003e\n\nThis is the latest version of the scheduler cache-hot-auto-tune patch.\n\nThe first problem was that detection time scaled with O(N^2), which is\nunacceptable on larger SMP and NUMA systems. To solve this:\n\n- I\u0027ve added a \u0027domain distance\u0027 function, which is used to cache\n measurement results. Each distance is only measured once. This means\n that e.g. on NUMA distances of 0, 1 and 2 might be measured, on HT\n distances 0 and 1, and on SMP distance 0 is measured. The code walks\n the domain tree to determine the distance, so it automatically follows\n whatever hierarchy an architecture sets up. This cuts down on the boot\n time significantly and removes the O(N^2) limit. The only assumption\n is that migration costs can be expressed as a function of domain\n distance - this covers the overwhelming majority of existing systems,\n and is a good guess even for more assymetric systems.\n\n [ People hacking systems that have assymetries that break this\n assumption (e.g. different CPU speeds) should experiment a bit with\n the cpu_distance() function. Adding a -\u003emigration_distance factor to\n the domain structure would be one possible solution - but lets first\n see the problem systems, if they exist at all. Lets not overdesign. ]\n\nAnother problem was that only a single cache-size was used for measuring\nthe cost of migration, and most architectures didnt set that variable\nup. Furthermore, a single cache-size does not fit NUMA hierarchies with\nL3 caches and does not fit HT setups, where different CPUs will often\nhave different \u0027effective cache sizes\u0027. To solve this problem:\n\n- Instead of relying on a single cache-size provided by the platform and\n sticking to it, the code now auto-detects the \u0027effective migration\n cost\u0027 between two measured CPUs, via iterating through a wide range of\n cachesizes. The code searches for the maximum migration cost, which\n occurs when the working set of the test-workload falls just below the\n \u0027effective cache size\u0027. I.e. real-life optimized search is done for\n the maximum migration cost, between two real CPUs.\n\n This, amongst other things, has the positive effect hat if e.g. two\n CPUs share a L2/L3 cache, a different (and accurate) migration cost\n will be found than between two CPUs on the same system that dont share\n any caches.\n\n(The reliable measurement of migration costs is tricky - see the source\nfor details.)\n\nFurthermore i\u0027ve added various boot-time options to override/tune\nmigration behavior.\n\nFirstly, there\u0027s a blanket override for autodetection:\n\n\tmigration_cost\u003d1000,2000,3000\n\nwill override the depth 0/1/2 values with 1msec/2msec/3msec values.\n\nSecondly, there\u0027s a global factor that can be used to increase (or\ndecrease) the autodetected values:\n\n\tmigration_factor\u003d120\n\nwill increase the autodetected values by 20%. This option is useful to\ntune things in a workload-dependent way - e.g. if a workload is\ncache-insensitive then CPU utilization can be maximized by specifying\nmigration_factor\u003d0.\n\nI\u0027ve tested the autodetection code quite extensively on x86, on 3\nP3/Xeon/2MB, and the autodetected values look pretty good:\n\nDual Celeron (128K L2 cache):\n\n ---------------------\n migration cost matrix (max_cache_size: 131072, cpu: 467 MHz):\n ---------------------\n [00] [01]\n [00]: - 1.7(1)\n [01]: 1.7(1) -\n ---------------------\n cacheflush times [2]: 0.0 (0) 1.7 (1784008)\n ---------------------\n\nHere the slow memory subsystem dominates system performance, and even\nthough caches are small, the migration cost is 1.7 msecs.\n\nDual HT P4 (512K L2 cache):\n\n ---------------------\n migration cost matrix (max_cache_size: 524288, cpu: 2379 MHz):\n ---------------------\n [00] [01] [02] [03]\n [00]: - 0.4(1) 0.0(0) 0.4(1)\n [01]: 0.4(1) - 0.4(1) 0.0(0)\n [02]: 0.0(0) 0.4(1) - 0.4(1)\n [03]: 0.4(1) 0.0(0) 0.4(1) -\n ---------------------\n cacheflush times [2]: 0.0 (33900) 0.4 (448514)\n ---------------------\n\nHere it can be seen that there is no migration cost between two HT\nsiblings (CPU#0/2 and CPU#1/3 are separate physical CPUs). A fast memory\nsystem makes inter-physical-CPU migration pretty cheap: 0.4 msecs.\n\n8-way P3/Xeon [2MB L2 cache]:\n\n ---------------------\n migration cost matrix (max_cache_size: 2097152, cpu: 700 MHz):\n ---------------------\n [00] [01] [02] [03] [04] [05] [06] [07]\n [00]: - 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [01]: 19.2(1) - 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [02]: 19.2(1) 19.2(1) - 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [03]: 19.2(1) 19.2(1) 19.2(1) - 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [04]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) - 19.2(1) 19.2(1) 19.2(1)\n [05]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) - 19.2(1) 19.2(1)\n [06]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) - 19.2(1)\n [07]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) -\n ---------------------\n cacheflush times [2]: 0.0 (0) 19.2 (19281756)\n ---------------------\n\nThis one has huge caches and a relatively slow memory subsystem - so the\nmigration cost is 19 msecs.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nCc: \u003cwilder@us.ibm.com\u003e\nSigned-off-by: John Hawkes \u003chawkes@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "4dc7a0bbeb6882ad665e588e82fabe5bb4645f2f", "tree": "8c034f802157d7f449e76f45086c0e13e0ea4711", "parents": [ "c6b44d10f25e5a93eca5135b686a35775c63546e" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Jan 12 01:05:27 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jan 12 09:08:49 2006 -0800" }, "message": "[PATCH] sched: add cacheflush() asm\n\nAdd per-arch sched_cacheflush() which is a write-back cacheflush used by\nthe migration-cost calibration code at bootup time.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0498b63504f818e5ab39c818cd6f7b41319a1187", "tree": "d040fd5e2703f9ad601c6949f58ea29e8554154e", "parents": [ "e597c2984c64609c6e1e1ac803f00f7550705860" ], "author": { "name": "Ananth N Mavinakayanahalli", "email": "ananth@in.ibm.com", "time": "Mon Jan 09 20:52:46 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Jan 10 08:01:40 2006 -0800" }, "message": "[PATCH] kprobes: fix build breakage\n\nThe following patch (against 2.6.15-rc5-mm3) fixes a kprobes build break\ndue to changes introduced in the kprobe locking in 2.6.15-rc5-mm3. In\naddition, the patch reverts back the open-coding of kprobe_mutex.\n\nSigned-off-by: Ananth N Mavinakayanahalli \u003cananth@in.ibm.com\u003e\nAcked-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "e597c2984c64609c6e1e1ac803f00f7550705860", "tree": "199bac97827782dcd73283018ec5692b63812fac", "parents": [ "f709b122343fb9a010b6cf2d5559641f1820f7c9" ], "author": { "name": "Anil S Keshavamurthy", "email": "anil.s.keshavamurthy@intel.com", "time": "Mon Jan 09 20:52:45 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Jan 10 08:01:40 2006 -0800" }, "message": "[PATCH] kprobes: arch_remove_kprobe\n\nCurrently arch_remove_kprobes() is only implemented/required for x86_64 and\npowerpc. All other architecture like IA64, i386 and sparc64 implementes a\ndummy function which is being called from arch independent kprobes.c file.\n\nThis patch removes the dummy functions and replaces it with\n#define arch_remove_kprobe(p, s)\tdo { } while(0)\n\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "49a2a1b83ba6fa40c41968d6a28ba16e7ed0c3f7", "tree": "f257b535d0f09f9ac2531d40feb732349993665c", "parents": [ "41dead49ccb4d7f0a34d56478f487342a3c3ab2b" ], "author": { "name": "Anil S Keshavamurthy", "email": "anil.s.keshavamurthy@intel.com", "time": "Mon Jan 09 20:52:43 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Jan 10 08:01:40 2006 -0800" }, "message": "[PATCH] kprobes: changed from using spinlock to mutex\n\nSince Kprobes runtime exception handlers is now lock free as this code path is\nnow using RCU to walk through the list, there is no need for the\nregister/unregister{_kprobe} to use spin_{lock/unlock}_isr{save/restore}. The\nserialization during registration/unregistration is now possible using just a\nmutex.\n\nIn the above process, this patch also fixes a minor memory leak for x86_64 and\npowerpc.\n\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "41dead49ccb4d7f0a34d56478f487342a3c3ab2b", "tree": "6782eeedac60688b328394971066dad1b6bfa302", "parents": [ "2d14e39da8712cff8a92298f464a25afb4283ccf" ], "author": { "name": "Anil S Keshavamurthy", "email": "anil.s.keshavamurthy@intel.com", "time": "Mon Jan 09 20:52:42 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Jan 10 08:01:40 2006 -0800" }, "message": "[PATCH] kprobes: cleanup include/asm/kprobes.h\n\nThe arch specific kprobes.h files never gets included when CONFIG_KPROBES is\nturned off. Hence check for CONFIG_KPROBES is not appropriate here in this\narch specific kprobes.h files.\n\nAlso the below defined function kprobes_exception_notify() is not needed when\nCONFIG_KPROBES is off.\n\nCompile tested for both CONFIG_KPROBES\u003dy and N.\n\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "af4cd3fe4cfa75ca74f8d8622867371289043a8d", "tree": "70dc7836a98758578628a96dc609a0c67f78dffb", "parents": [ "7ff92053ddff48d9d7908a353bd85f893944463e" ], "author": { "name": "Brian Gerst", "email": "bgerst@didntduck.org", "time": "Mon Jan 09 20:52:18 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Jan 10 08:01:34 2006 -0800" }, "message": "[PATCH] Generic ioctl.h\n\nMost arches copied the i386 ioctl.h. Combine them into a generic header.\n\nSigned-off-by: Brian Gerst \u003cbgerst@didntduck.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "2acbb8c657af86b2fa5b185f1d7048385e310585", "tree": "bc106bb2665a9c6267e6cc4eec9085deedd9e636", "parents": [ "823d0f4f67252115212eb86caba14d5795bbe643" ], "author": { "name": "Arjan van de Ven", "email": "arjan@infradead.org", "time": "Mon Jan 09 15:59:19 2006 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@hera.kernel.org", "time": "Mon Jan 09 15:59:19 2006 -0800" }, "message": "[PATCH] mutex subsystem, add default include/asm-*/mutex.h files\n\nadd the per-arch mutex.h files for the remaining architectures.\n\nWe default to asm-generic/mutex-dec.h, because that performs\nquite well on most arches. Arches that do not have atomic\ndecrement/increment instructions should switch to mutex-xchg.h\ninstead. Arches can also provide their own implementation for\nthe mutex fastpath primitives.\n\nSigned-off-by: Arjan van de Ven \u003carjan@infradead.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "ffbf670f5cd50501a34a5187981460da2216071e", "tree": "f2cd9eeeb59839d15feddf906310bb375474c573", "parents": [ "f17578decc40df8fceff82b106582e30bdfb3189" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Jan 09 15:59:17 2006 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@hera.kernel.org", "time": "Mon Jan 09 15:59:17 2006 -0800" }, "message": "[PATCH] mutex subsystem, add atomic_xchg() to all arches\n\nadd atomic_xchg() to all the architectures. Needed by the new mutex code.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Arjan van de Ven \u003carjan@infradead.org\u003e\n" }, { "commit": "80851ef2a5a404e6054211ca96ecd5ac4b06d297", "tree": "dcacd2a475adc28c540b6012b58f1af9783778c1", "parents": [ "44ac8413901167589226abf824d994aa57e4fd28" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Jan 08 01:04:13 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jan 08 20:14:02 2006 -0800" }, "message": "[PATCH] /dev/mem: validate mmap requests\n\nAdd a hook so architectures can validate /dev/mem mmap requests.\n\nThis is analogous to validation we already perform in the read/write\npaths.\n\nThe identity mapping scheme used on ia64 requires that each 16MB or\n64MB granule be accessed with exactly one attribute (write-back or\nuncacheable). This avoids \"attribute aliasing\", which can cause a\nmachine check.\n\nSample problem scenario:\n - Machine supports VGA, so it has uncacheable (UC) MMIO at 640K-768K\n - efi_memmap_init() discards any write-back (WB) memory in the first granule\n - Application (e.g., \"hwinfo\") mmaps /dev/mem, offset 0\n - hwinfo receives UC mapping (the default, since memmap says \"no WB here\")\n - Machine check abort (on chipsets that don\u0027t support UC access to WB\n memory, e.g., sx1000)\n\nIn the scenario above, the only choices are\n - Use WB for hwinfo mmap. Can\u0027t do this because it causes attribute\n aliasing with the UC mapping for the VGA MMIO space.\n - Use UC for hwinfo mmap. Can\u0027t do this because the chipset may not\n support UC for that region.\n - Disallow the hwinfo mmap with -EINVAL. That\u0027s what this patch does.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Hugh Dickins \u003chugh@veritas.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a1365647022eb05a5993f270a78e9bef3bf554eb", "tree": "6dbcab4db80b7d07fdaec88c003743d1f6e1a289", "parents": [ "fd285bb54d8a3e99810090ae88cfe8ed77d1da25" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Sun Jan 08 01:04:09 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jan 08 20:14:02 2006 -0800" }, "message": "[PATCH] remove gcc-2 checks\n\nRemove various things which were checking for gcc-1.x and gcc-2.x compilers.\n\nFrom: Adrian Bunk \u003cbunk@stusta.de\u003e\n\n Some documentation updates and removes some code paths for gcc \u003c 3.2.\n\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f8aaeacec159f2d9003872781fa4d49659e347fb", "tree": "f59dc7ae8fccc41e2ded098182a146086c6e2239", "parents": [ "c66fdd5e324392584c6f11de65cfe24b0e2d9303" ], "author": { "name": "Jeff Dike", "email": "jdike@addtoit.com", "time": "Sun Jan 08 01:01:32 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jan 08 20:13:39 2006 -0800" }, "message": "[PATCH] consolidate asm/futex.h\n\nMost of the architectures have the same asm/futex.h. This consolidates them\ninto asm-generic, with the arches including it from their own asm/futex.h.\n\nIn the case of UML, this reverts the old broken futex.h and goes back to using\nthe same one as almost everyone else.\n\nSigned-off-by: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "1fd73c6b6737b7e6eacac1b00dac16e7540c3cb1", "tree": "e66dbe34118b289c6f89a23764e355ea62fa2c62", "parents": [ "22fc6eccbf4ce4eb6265e6ada7b50a7b9cc57d05" ], "author": { "name": "Ravikiran G Thirumalai", "email": "kiran@scalex86.org", "time": "Sun Jan 08 01:01:28 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jan 08 20:13:39 2006 -0800" }, "message": "[PATCH] Kill L1_CACHE_SHIFT_MAX\n\nKill L1_CACHE_SHIFT from all arches. Since L1_CACHE_SHIFT_MAX is not used\nanymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX.\n\nSigned-off-by: Ravikiran Thirumalai \u003ckiran@scalex86.org\u003e\nSigned-off-by: Shai Fultheim \u003cshai@scalex86.org\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "39743889aaf76725152f16aa90ca3c45f6d52da3", "tree": "2a6f658d03dbbd9428934c5e030230a4acb6d5e0", "parents": [ "dc9aa5b9d65fd11b1f5246b46ec610ee8b83c6dd" ], "author": { "name": "Christoph Lameter", "email": "clameter@sgi.com", "time": "Sun Jan 08 01:00:51 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jan 08 20:12:42 2006 -0800" }, "message": "[PATCH] Swap Migration V5: sys_migrate_pages interface\n\nsys_migrate_pages implementation using swap based page migration\n\nThis is the original API proposed by Ray Bryant in his posts during the first\nhalf of 2005 on linux-mm@kvack.org and linux-kernel@vger.kernel.org.\n\nThe intent of sys_migrate is to migrate memory of a process. A process may\nhave migrated to another node. Memory was allocated optimally for the prior\ncontext. sys_migrate_pages allows to shift the memory to the new node.\n\nsys_migrate_pages is also useful if the processes available memory nodes have\nchanged through cpuset operations to manually move the processes memory. Paul\nJackson is working on an automated mechanism that will allow an automatic\nmigration if the cpuset of a process is changed. However, a user may decide\nto manually control the migration.\n\nThis implementation is put into the policy layer since it uses concepts and\nfunctions that are also needed for mbind and friends. The patch also provides\na do_migrate_pages function that may be useful for cpusets to automatically\nmove memory. sys_migrate_pages does not modify policies in contrast to Ray\u0027s\nimplementation.\n\nThe current code here is based on the swap based page migration capability and\nthus is not able to preserve the physical layout relative to it containing\nnodeset (which may be a cpuset). When direct page migration becomes available\nthen the implementation needs to be changed to do a isomorphic move of pages\nbetween different nodesets. The current implementation simply evicts all\npages in source nodeset that are not in the target nodeset.\n\nPatch supports ia64, i386 and x86_64.\n\nSigned-off-by: Christoph Lameter \u003cclameter@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "d3cb487149bd706aa6aeb02042332a450978dc1c", "tree": "69051e0f9853314cf275e4e800faad950e3053c3", "parents": [ "070f80326a215d8e6c4fd6f175e28eb446c492bc" ], "author": { "name": "Christoph Lameter", "email": "clameter@engr.sgi.com", "time": "Fri Jan 06 00:11:20 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Jan 06 08:33:29 2006 -0800" }, "message": "[PATCH] atomic_long_t \u0026 include/asm-generic/atomic.h V2\n\nSeveral counters already have the need to use 64 atomic variables on 64 bit\nplatforms (see mm_counter_t in sched.h). We have to do ugly ifdefs to fall\nback to 32 bit atomic on 32 bit platforms.\n\nThe VM statistics patch that I am working on will also make more extensive\nuse of atomic64.\n\nThis patch introduces a new type atomic_long_t by providing definitions in\nasm-generic/atomic.h that works similar to the c \"long\" type. Its 32 bits\non 32 bit platforms and 64 bits on 64 bit platforms.\n\nAlso cleans up the determination of the mm_counter_t in sched.h.\n\nSigned-off-by: Christoph Lameter \u003cclameter@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "7756b9e4e321c3c83c7aa5b9532d3e7fd7ddeb4a", "tree": "fe59fcd970e97e3878a743a5b476420501f99f00", "parents": [ "bbfbb7cec9dd7266534b2b4b9c8be2fa425bbfc9" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Fri Jan 06 00:11:09 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Jan 06 08:33:26 2006 -0800" }, "message": "[PATCH] kill last zone_reclaim() bits\n\nRemove the last bits of Martin\u0027s ill-fated sys_set_zone_reclaim().\n\nCc: Martin Hicks \u003cmort@wildopensource.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f6b3ec238d12c8cc6cc71490c6e3127988460349", "tree": "b395c1054802760b0e938199231a9de9ac2f358a", "parents": [ "d7339071f6a8b50101d7ba327926b770f22d5d8b" ], "author": { "name": "Badari Pulavarty", "email": "pbadari@us.ibm.com", "time": "Fri Jan 06 00:10:38 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Jan 06 08:33:22 2006 -0800" }, "message": "[PATCH] madvise(MADV_REMOVE): remove pages from tmpfs shm backing store\n\nHere is the patch to implement madvise(MADV_REMOVE) - which frees up a\ngiven range of pages \u0026 its associated backing store. Current\nimplementation supports only shmfs/tmpfs and other filesystems return\n-ENOSYS.\n\n\"Some app allocates large tmpfs files, then when some task quits and some\nclient disconnect, some memory can be released. However the only way to\nrelease tmpfs-swap is to MADV_REMOVE\". - Andrea Arcangeli\n\nDatabases want to use this feature to drop a section of their bufferpool\n(shared memory segments) - without writing back to disk/swap space.\n\nThis feature is also useful for supporting hot-plug memory on UML.\n\nConcerns raised by Andrew Morton:\n\n- \"We have no plan for holepunching! If we _do_ have such a plan (or\n might in the future) then what would the API look like? I think\n sys_holepunch(fd, start, len), so we should start out with that.\"\n\n- Using madvise is very weird, because people will ask \"why do I need to\n mmap my file before I can stick a hole in it?\"\n\n- None of the other madvise operations call into the filesystem in this\n manner. A broad question is: is this capability an MM operation or a\n filesytem operation? truncate, for example, is a filesystem operation\n which sometimes has MM side-effects. madvise is an mm operation and with\n this patch, it gains FS side-effects, only they\u0027re really, really\n significant ones.\"\n\nComments:\n\n- Andrea suggested the fs operation too but then it\u0027s more efficient to\n have it as a mm operation with fs side effects, because they don\u0027t\n immediatly know fd and physical offset of the range. It\u0027s possible to\n fixup in userland and to use the fs operation but it\u0027s more expensive,\n the vmas are already in the kernel and we can use them.\n\nShort term plan \u0026 Future Direction:\n\n- We seem to need this interface only for shmfs/tmpfs files in the short\n term. We have to add hooks into the filesystem for correctness and\n completeness. This is what this patch does.\n\n- In the future, plan is to support both fs and mmap apis also. This\n also involves (other) filesystem specific functions to be implemented.\n\n- Current patch doesn\u0027t support VM_NONLINEAR - which can be addressed in\n the future.\n\nSigned-off-by: Badari Pulavarty \u003cpbadari@us.ibm.com\u003e\nCc: Hugh Dickins \u003chugh@veritas.com\u003e\nCc: Andrea Arcangeli \u003candrea@suse.de\u003e\nCc: Michael Kerrisk \u003cmtk-manpages@gmx.net\u003e\nCc: Ulrich Drepper \u003cdrepper@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "ff741906ad3cf4b8ca1a958acb013a97a6381ca2", "tree": "66a4c2dbacd4c10015824a6789f9206693003092", "parents": [ "db9edfd7e339ca4113153d887e782dd05be5a9eb" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Fri Nov 11 14:32:40 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 05 10:24:20 2006 -0800" }, "message": "[IA64] support for cpu0 removal\n\nhere is the BSP removal support for IA64. Its pretty much the same thing that\nwas released a while back, but has your feedback incorporated.\n\n- Removed CONFIG_BSP_REMOVE_WORKAROUND and associated cmdline param\n- Fixed compile issue with sn2/zx1 due to a undefined fix_b0_for_bsp\n- some formatting nits (whitespace etc)\n\nThis has been tested on tiger and long back by alex on hp systems as well.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "3821af2fe13700cab6fd67367128fa180e43f8b8", "tree": "a70f63c24bd7d2ac8b25e3e4ee0ef6a50847aa67", "parents": [ "c865e5d99e25a171e8262fc0f7ba608568633c64" ], "author": { "name": "Stephen Hemminger", "email": "shemminger@osdl.org", "time": "Wed Dec 21 19:30:53 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Jan 03 13:11:06 2006 -0800" }, "message": "[FLS64]: generic version\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@osdl.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c660439ba90aaaa056f68a5b0fc79f6b9e0506f5", "tree": "0139f623060027645a49f72729c4b1e6e7350248", "parents": [ "1224b375ed7982128602a3fa1da53eeeac1750b4" ], "author": { "name": "Ravikiran G Thirumalai", "email": "kiran@scalex86.org", "time": "Thu Dec 22 14:21:34 2005 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Dec 24 12:30:22 2005 -0800" }, "message": "[PATCH] x86_64/ia64 : Fix compilation error for node_to_first_cpu\n\nFixes a compiler error in node_to_first_cpu, __ffs expects unsigned long as\na parameter; instead cpumask_t was being passed. The macro\nnode_to_first_cpu was not yet used in x86_64 and ia64 arches, and so we never\nhit this. This patch replaces __ffs with first_cpu macro, similar to other\narches.\n\nSigned-off-by: Alok N Kataria \u003calokk@calsoftinc.com\u003e\nSigned-off-by: Ravikiran G Thirumalai \u003ckiran@scalex86.org\u003e\nSigned-off-by: Shai Fultheim \u003cshai@scalex86.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f5899b5d4fa806403f547dc41312d017d94ec273", "tree": "4cbc38474b5ab6dfe8591f0b490686315a6aaa26", "parents": [ "7b6666530e2736f190a2629c8abe34275054449f" ], "author": { "name": "John Hawkes", "email": "hawkes@sgi.com", "time": "Fri Dec 16 10:00:24 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Dec 16 10:00:24 2005 -0800" }, "message": "[IA64] disable preemption in udelay()\n\nThe udelay() inline for ia64 uses the ITC. If CONFIG_PREEMPT is enabled\nand the platform has unsynchronized ITCs and the calling task migrates\nto another CPU while doing the udelay loop, then the effective delay may\nbe too short or very, very long.\n\nThis patch disables preemption around 100 usec chunks of the overall\ndesired udelay time. This minimizes preemption-holdoffs.\n\nudelay() is now too big to be inline, move it out of line and export it.\n\nSigned-off-by: John Hawkes \u003chawkes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "eed66cfcbbea851c97e287440d940286fce3f829", "tree": "0d78ff78e693f474c226551ddb4759aa4e62a46b", "parents": [ "90ac8f7741be4ff66de1f52904f4f67f272f74ce" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Dec 13 10:41:49 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Dec 13 10:41:49 2005 -0800" }, "message": "[IA64] Split 16-bit severity field in sal_log_record_header\n\nERR_SEVERITY item is defined as a 8 bits item in SAL documentation\n($B.2.1 rev december 2003), but as an u16 in sal.h.\nThis has the side effect that current code in mca.c may not call\nia64_sal_clear_state_info() upon receiving corrected platform errors\nif there are bits set in the validation byte. Reported by Xavier Bru.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "bf7ececa9b68f4720f1ce344f442435660bcdae7", "tree": "7caff55f6ce8cfee2547ad0c93ad893c8f9583cb", "parents": [ "f64fa6772aa874e5cad02a9d87e6b0d99ced3d48" ], "author": { "name": "Keith Owens", "email": "kaos@sgi.com", "time": "Sat Dec 10 14:24:28 2005 +1100" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Dec 12 08:54:18 2005 -0800" }, "message": "[IA64] Define an ia64 version of __raw_read_trylock\n\nIA64 is using the generic version of __raw_read_trylock, which always\nwaits for the lock to be free instead of returning when the lock is in\nuse. Define an ia64 version of __raw_read_trylock which behaves\ncorrectly, and drop the generic one.\n\nSigned-off-by: Keith Owens \u003ckaos@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f64fa6772aa874e5cad02a9d87e6b0d99ced3d48", "tree": "9e8f1a1a73486b07b65e9764e6a05f961510864a", "parents": [ "590711b7dd731bb04e7892c0451566d788985e79" ], "author": { "name": "Christoph Lameter", "email": "clameter@engr.sgi.com", "time": "Wed Dec 07 11:24:42 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Dec 07 11:30:11 2005 -0800" }, "message": "[IA64] Fix missing parameter for local_add/sub\n\nLocal add/sub macros need to have a parameter to specify\nthe addend/subtrahend respectively.\n\nSigned-off-by: Christoph Lameter \u003cclameter@sgi.org\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "bd1d6e2451f2bb0132416fda4d129c4f57a827bc", "tree": "64fc1ba7d4734ea5ecec8942795b32a32e4623a4", "parents": [ "acb7f67280128a9ddaa756ff10212391d28caec4" ], "author": { "name": "Robin Holt", "email": "holt@sgi.com", "time": "Mon Dec 05 20:02:31 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Dec 06 09:12:34 2005 -0800" }, "message": "[IA64] Change SET_PERSONALITY to comply with comment in binfmt_elf.c.\n\nWe have a customer application which trips a bug. The problem arises\nwhen a driver attempts to call do_munmap on an area which is mapped, but\nbecause current-\u003ethread.task_size has been set to 0xC0000000, the call\nto do_munmap fails thinking it is an unmap beyond the user\u0027s address\nspace.\n\nThe comment in fs/binfmt_elf.c in load_elf_library() before the call\nto SET_PERSONALITY() indicates that task_size must not be changed for\nthe running application until flush_thread, but is for ia64 executing\nia32 binaries.\n\nThis patch moves the setting of task_size from SET_PERSONALITY() to\nflush_thread() as indicated. The customer application no longer is able\nto trip the bug.\n\nSigned-off-by: Robin Holt \u003cholt@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "3ec829b6895092b0686254c315f42642b4a07efc", "tree": "8e1c58fffe2b16a791c6d3e09783daf1f75a3b7b", "parents": [ "3e356b2660eda9da7776144cbc0a038c93dcb335" ], "author": { "name": "John Keller", "email": "jpk@sgi.com", "time": "Tue Nov 29 16:36:32 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Dec 06 09:09:23 2005 -0800" }, "message": "[IA64-SGI] altix: pci_window fixup\n\nAltix only patch to add fixup code that sets up\npci_controller-\u003ewindow. This code is a temporary\nfix until ACPI support on Altix is added.\n\nAlso, corrects the usage of pci_dev-\u003esysdata,\nwhich had previously been used to reference\nplatform specific device info, to now point to\na pci_controller struct.\n\nSigned-off-by: John Keller \u003cjpk@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b77dae5293efba42ea1ff04d410ee68e66d5b0cf", "tree": "e7cff6570c32d55e4743f0e59c53ab9086c1efd6", "parents": [ "624f54be206adf970cd8eece16446b027913e533" ], "author": { "name": "Dean Roe", "email": "roe@sgi.com", "time": "Wed Nov 09 14:25:06 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Nov 29 09:24:10 2005 -0800" }, "message": "[IA64] - Make pfn_valid more precise for SGI Altix systems\n\nA single SGI Altix system can be divided into multiple partitions,\neach running their own instance of the Linux kernel. pfn_valid()\nis currently not optimal for any but the first partition, since it\ndoes not compare the pfn with min_low_pfn before calling the more\ncostly ia64_pfn_valid().\n\nSigned-off-by: Dean Roe \u003croe@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "771388dc7d1efe26a40242bd509e87ade2c971d1", "tree": "210c724a31f993bc0f5f77f10b4c871b17285386", "parents": [ "090de0b77ceed1f1d05883fa744760f0c65d9c31" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Fri Nov 18 16:11:27 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Nov 21 14:17:28 2005 -0800" }, "message": "[IA64-SGI] support for older versions of PROM\n\nAdd support for old versions of the SN PROMs. Eventually this\nsupport will be deleted but it is useful right now to continue\nsupporting older PROMs.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "48b1dcc5d80921dc0c54f2fabf4fe6e8538cb9b3", "tree": "c3c20121ec0bc79ef8059f34a9a9cc9109db8e95", "parents": [ "e67b23c71cb9ee02d65a74c3858716ba2dedd554" ], "author": { "name": "Mark Maule", "email": "maule@sgi.com", "time": "Thu Nov 17 15:50:01 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Nov 18 13:06:03 2005 -0800" }, "message": "[IA64] altix: fix copyright in tioce .h files\n\nFix up copyright in tioce header files\n\nSigned-off-by: Mark Maule \u003cmaule@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8426e1f6af0fd7f44d040af7263750c5a52f3cc3", "tree": "827bd2588c2b73d11cea6869de8ff42dba134375", "parents": [ "4a6dae6d382e9edf3ff440b819e554ed706359bc" ], "author": { "name": "Nick Piggin", "email": "nickpiggin@yahoo.com.au", "time": "Sun Nov 13 16:07:25 2005 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Nov 13 18:14:16 2005 -0800" }, "message": "[PATCH] atomic: inc_not_zero\n\nIntroduce an atomic_inc_not_zero operation. Make this a special case of\natomic_add_unless because lockless pagecache actually wants\natomic_inc_not_negativeone due to its offset refcount.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: \"Paul E. McKenney\" \u003cpaulmck@us.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "4a6dae6d382e9edf3ff440b819e554ed706359bc", "tree": "2945a5095973e2ecf05b503d6deb859083045b8e", "parents": [ "53e86b91b7ae66d4c2757195cbd42e00d9199cf2" ], "author": { "name": "Nick Piggin", "email": "nickpiggin@yahoo.com.au", "time": "Sun Nov 13 16:07:24 2005 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Nov 13 18:14:16 2005 -0800" }, "message": "[PATCH] atomic: cmpxchg\n\nIntroduce an atomic_cmpxchg operation.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: \"Paul E. McKenney\" \u003cpaulmck@us.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "837cd0bdf54dd954cd6aa43d250f75ab5db79617", "tree": "ef28b91f1ac8c1c9f4244da9be1f994306ef4070", "parents": [ "d12eb7e11cf30c30f639b2093735af2ac177830b" ], "author": { "name": "Robin Holt", "email": "holt@sgi.com", "time": "Fri Nov 11 09:35:43 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Nov 11 09:37:29 2005 -0800" }, "message": "[IA64] 4-level page tables\n\nThis patch introduces 4-level page tables to ia64. I have run\nsome benchmarks and found nothing interesting. Performance has\nconsistently fallen within the noise range.\n\nIt also introduces a config option (setting the default to 3\nlevels). The config option prevents having 4 level page\ntables with 64k base page size.\n\nSigned-off-by: Robin Holt \u003cholt@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1", "tree": "cf9ba9ae7999573a507df301faf34170ab08e2c3", "parents": [ "48b19148733b4826eeedfd8be9f19b61c8d010b1" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Tue Nov 08 21:42:33 2005 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Nov 10 16:09:18 2005 -0800" }, "message": "[PATCH] PCI: Change MSI to use physical delivery mode always\n\nMSI hardcoded delivery mode to use logical delivery mode. Recently\nx86_64 moved to use physical mode addressing to support physflat mode.\nWith this mode enabled noticed that my eth with MSI werent working.\n\nmsi_address_init() was hardcoded to use logical mode for i386 and x86_64.\nSo when we switch to use physical mode, things stopped working.\n\nSince anyway we dont use lowest priority delivery with MSI, its always\ndirected to just a single CPU. Its safe and simpler to use\nphysical mode always, even when we use logical delivery mode for IPI\u0027s\nor other ioapic RTE\u0027s.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "7669a22592fc6cc7ac03f55a7db8d23ce938f1dc", "tree": "4e83ba401350c3c35689fc84f1c3af81c07b3f88", "parents": [ "cb8a55e4cda017ed37a3ee051365f33a86956312", "58cd90829918dabbd81a453de676d41fb7b628ad" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Nov 10 10:39:49 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Nov 10 10:39:49 2005 -0800" }, "message": "Pull context-bitmap into release branch\n" }, { "commit": "cb8a55e4cda017ed37a3ee051365f33a86956312", "tree": "784facbcdfe0816c52373f1a13ef0109d711098b", "parents": [ "4ddccb8eb9d1c57c7dd3838d8328690bf1869145", "9138d581b0ef855c0314c41c14852a7231b9941c" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Nov 10 10:39:09 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Nov 10 10:39:09 2005 -0800" }, "message": "Pull extend-notify-die into release branch\n" } ], "next": "9138d581b0ef855c0314c41c14852a7231b9941c" }