)]}' { "log": [ { "commit": "58dfc497b9357ec00c879b775c02f4eab19bcecb", "tree": "7f69336c83de1d2bf4f8ff28fdf5d3bb0610b2f4", "parents": [ "31ff09b7a60bbc80b5df941ec1a12502861b4da9" ], "author": { "name": "Liang Li", "email": "liang.li@windriver.com", "time": "Wed Aug 12 09:34:30 2009 -0400" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Aug 24 20:48:09 2009 -0500" }, "message": "powerpc/83xx: Fix incorrect PCI interrupt map in SBC834x DTS\n\nAllows interrupts to occur on the sbc834x. Currently PCI devices\nget assigned an incorrect IRQ and so the interrupt count never\nincreases. This was tested with the 82546GB based dual port E1000\nPCI-X NIC which uses two distinct IRQ lines on the one card.\n\nroot@localhost:/root\u003e cat /proc/interrupts | grep eth\n17: 78 IPIC Level eth1\n48: 27121 IPIC Level eth0\n\nSigned-off-by: Liang Li \u003cliang.li@windriver.com\u003e\nSigned-off-by: Yang Shi \u003cyang.shi@windriver.com\u003e\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "31ff09b7a60bbc80b5df941ec1a12502861b4da9", "tree": "b208bff4425e7e415a3d731876a432a453db442d", "parents": [ "4de124446b4d68edd6cb747495234be915d56a29" ], "author": { "name": "Liang Li", "email": "liang.li@windriver.com", "time": "Wed Aug 12 09:34:29 2009 -0400" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Aug 24 20:48:08 2009 -0500" }, "message": "powerpc/83xx: Add localbus node and MTD partitions for SBC834x\n\nThere is 8MB flash, 8kB EEPROM and 128MB SDRAM on the sbc834x\nlocal bus, so add a localbus node in DTS with MTD partitions.\n\nThe recent U-boot commit fe613cdd4eb moves u-boot to the beginning\nof flash, hence the legacy label on the partition at the end of flash.\n\nSigned-off-by: Liang Li \u003cliang.li@windriver.com\u003e\nSigned-off-by: Yang Shi \u003cyang.shi@windriver.com\u003e\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "4de124446b4d68edd6cb747495234be915d56a29", "tree": "e4d19f8a1ccfad8c04722336e2928db852b73782", "parents": [ "fb8e3e1fe1df963b6c1ab8610682737ccae96ef0" ], "author": { "name": "Liang Li", "email": "liang.li@windriver.com", "time": "Wed Aug 12 09:34:28 2009 -0400" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Aug 24 20:48:07 2009 -0500" }, "message": "powerpc/83xx: Remove second USB node from SBC834x DTS\n\nSince only one of the SoC USB devices is brought out to a physical\nconnector on the board, remove the 2nd (USB-DR) node from the DTS.\nHaving it present and USB enabled will cause a hang at boot.\n\nSigned-off-by: Liang Li \u003cliang.li@windriver.com\u003e\nSigned-off-by: Yang Shi \u003cyang.shi@windriver.com\u003e\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "fb8e3e1fe1df963b6c1ab8610682737ccae96ef0", "tree": "12a1a73aea11440cc375a1f90c7df3b99a746acf", "parents": [ "fc4bdb35fba1c8f464fd85b94a5059e752fc85d4" ], "author": { "name": "Poonam Aggrwal", "email": "poonam.aggrwal@freescale.com", "time": "Fri Aug 07 21:05:16 2009 +0530" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Aug 24 20:48:06 2009 -0500" }, "message": "powerpc/85xx: Add support for P2020RDB board\n\nAdd support for the P2020RDB reference board from Freescale.\n\nOverview of P2020RDB platform\n\t- DDR\n\t DDR2 1G\n\t- NOR Flash\n\t 16MByte\n\t- NAND Flash\n\t 32MByte\n\t- 3 Ethernet interfaces\n\t 1) etSEC1\n\t\t- RGMII\n\t\t- connected to a 5 port Vitesse Switch(VSC7385)\n\t\t- Switch is memory mapped through eLBC interface(CS#2)\n\t\t- IRQ1\n\t 2) etSEC2\n\t\t- SGMII\n\t\t- connected to VSC8221\n\t\t- IRQ2\n\t 3) etSEC3\n\t\t- RGMII\n\t\t- connected to VSC8641\n\t\t- IRQ3\n\t- 2 1X PCIe interfaces\n\t- SD/MMC ,USB\n\t- SPI EEPROM\n\t- Serial I2C EEPROM\n\nSigned-off-by: Poonam Aggrwal \u003cpoonam.aggrwal@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "fc4bdb35fba1c8f464fd85b94a5059e752fc85d4", "tree": "249a02a1515fb814d703215352e86de89f09dfbf", "parents": [ "8934210cfe925f0d3e3089c69e9e88021324801b" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Aug 14 09:38:34 2009 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Aug 24 20:48:05 2009 -0500" }, "message": "powerpc/booke: Move MMUCSR definition into mmu-book3e.h\n\nThe MMUCSR is now defined as part of the Book-3E architecture so we\ncan move it into mmu-book3e.h and add some of the additional bits\ndefined by the architecture specs.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "8934210cfe925f0d3e3089c69e9e88021324801b", "tree": "09551e415df45e56306dba088b42ff96c7181bbd", "parents": [ "4f0dbc2781b9dc457159b676289f874ab2dc3560" ], "author": { "name": "Heiko Schocher", "email": "hs@denx.de", "time": "Fri Aug 07 08:41:15 2009 +0200" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Aug 24 20:48:04 2009 -0500" }, "message": "powerpc/82xx: mgcoge - updated defconfig\n\n- add I2C support\n- add FCC1 and FCC2 support\n\nSigned-off-by: Heiko Schocher \u003chs@denx.de\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "4f0dbc2781b9dc457159b676289f874ab2dc3560", "tree": "2b8af0f301eaf0bc47d643b99d48a84611b4bed3", "parents": [ "3c15a68880023722fc794018768df556f438ae98", "20002ded4d937ca87aca6253b874920a96a763c4" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 11:07:56 2009 +1000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 11:07:56 2009 +1000" }, "message": "Merge commit \u0027paulus-perf/master\u0027 into next\n" }, { "commit": "3c15a68880023722fc794018768df556f438ae98", "tree": "07c9f4160a44799dafce855ad16c84064557c467", "parents": [ "903444e4297264ec0959e886695911659edb425c" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Mon Aug 10 17:14:55 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:30 2009 +1000" }, "message": "powerpc: use consistent types in mktree\n\ngcc v4.4 currently produces this build warning:\n\narch/powerpc/boot/mktree.c: In function \u0027main\u0027:\narch/powerpc/boot/mktree.c:104: warning: dereferencing type-punned pointer will break strict-aliasing rules\n\ntmpbuf is only used as an array of unsigned ints, so declare it that way.\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "903444e4297264ec0959e886695911659edb425c", "tree": "87bcffec066757d3961446c290b671f35892c1f4", "parents": [ "a15098c90df1ac2b1bfe1d33dd1c47063213aa9a" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Sun Aug 09 19:06:24 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:29 2009 +1000" }, "message": "powerpc/vmlinux.lds: Move _edata down\n\nCurrently _edata does not include several data sections, this causes\nthe kernel\u0027s report of memory usage at boot to not match reality, and\nalso prevents kmemleak from working - because it scan between _sdata\nand _edata for pointers to allocated memory.\n\nThis mirrors a similar change made recently to the x86 linker script.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "a15098c90df1ac2b1bfe1d33dd1c47063213aa9a", "tree": "5553a81fe8bf1605f35ecf11170bed4770a8058b", "parents": [ "728656506447b3b349d082a7fb99445f9cb0caaa" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Sun Aug 09 19:02:51 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:28 2009 +1000" }, "message": "powerpc: Enable GCOV\n\nMake it possible to enable GCOV code coverage measurement on powerpc.\n\nLightly tested on 64-bit, seems to work as expected.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "6826a57d1abc8ac9f59b24f1a008554c6560a995", "tree": "6a825322adc86d224ee3af31e0ec7832091c7393", "parents": [ "e8a5f900148d058bce2d7bdce3d6bcbcb40267ec" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Wed Aug 05 12:24:45 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:27 2009 +1000" }, "message": "powerpc: Switch to asm-generic/hardirq.h\n\nhardirq.h on powerpc defines a __last_jiffy_stamp field, but it\u0027s not\nactually used anywhere.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "14ea58ad797e4e9b7be755aca0fd3925d0713ede", "tree": "864c4d5aeaeeb6a63fe5fb84289fd11ab21732d5", "parents": [ "9413c8836a16e9d034928a7f9d3ad81bebd71ce9" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Sat Aug 01 22:48:27 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:26 2009 +1000" }, "message": "powerpc: Use DIV_ROUND_CLOSEST in time init code\n\nThe kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d\nbut is perhaps more readable.\n\nThe semantic patch that makes this change is as follows:\n(http://www.emn.fr/x-info/coccinelle/)\n\n// \u003csmpl\u003e\n@haskernel@\n@@\n\n#include \u003clinux/kernel.h\u003e\n\n@depends on haskernel@\nexpression x,__divisor;\n@@\n\n- (((x) + ((__divisor) / 2)) / (__divisor))\n+ DIV_ROUND_CLOSEST(x,__divisor)\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "9413c8836a16e9d034928a7f9d3ad81bebd71ce9", "tree": "d19deb8e6561212004f18ba1c3cbd668e3697048", "parents": [ "02a606c2c47a2e4714225d0c3513ca03679f01d2" ], "author": { "name": "Geert Uytterhoeven", "email": "Geert.Uytterhoeven@sonycom.com", "time": "Wed Jul 29 02:06:42 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:26 2009 +1000" }, "message": "powerpc/cell: Move CBE_IOPTE_* to \u003casm/cell-regs.h\u003e\n\nAs \u003casm/iommu.h\u003e doesn\u0027t contain any other hardware specific definitions\nbut only interfaces.\n\nReported-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Geert Uytterhoeven \u003cGeert.Uytterhoeven@sonycom.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "02a606c2c47a2e4714225d0c3513ca03679f01d2", "tree": "66956c5e420e06999986b1d2e0bdc5d3eabc049c", "parents": [ "cf68787b68a2011664f1670a827c8f202ddb7c3d" ], "author": { "name": "roel kluin", "email": "roel.kluin@gmail.com", "time": "Thu Jul 30 06:02:18 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:25 2009 +1000" }, "message": "powerpc: Missing tests for NULL after ioremap()\n\nMissing tests after ioremap()\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "cf68787b68a2011664f1670a827c8f202ddb7c3d", "tree": "f9ce6c87b0421920281fee78f7e4ab994e5b8b33", "parents": [ "a888ad451a96881a7e40f40f717d05f1f3b26ad4" ], "author": { "name": "Benjamin Krill", "email": "ben@codiert.org", "time": "Mon Jul 27 22:02:39 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:25 2009 +1000" }, "message": "powerpc/prom_init: Evaluate mem kernel parameter for early allocation\n\nEvaluate mem kernel parameter for early memory allocations. If mem is set\nno allocation in the region above the given boundary is allowed. The current\ncode doesn\u0027t take care about this and allocate memory above the given mem\nboundary.\n\nSigned-off-by: Benjamin Krill \u003cben@codiert.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "a888ad451a96881a7e40f40f717d05f1f3b26ad4", "tree": "5d4dbc7dccdf890f3c072b7aacb4d039a1c8853a", "parents": [ "bbdc16f58ed84523e8991f103dceb586e9053e04" ], "author": { "name": "Stoyan Gaydarov", "email": "sgayda2@uiuc.edu", "time": "Tue Jul 21 17:02:31 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:23 2009 +1000" }, "message": "powerpc: ARRAY_SIZE changes in pasemi and powermac code\n\nThese changes were a direct result of using a semantic patch\nMore information can be found at http://www.emn.fr/x-info/coccinelle/\n\nSigned-off-by: Stoyan Gaydarov \u003csgayda2@uiuc.edu\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "690a2d074ead1867ca5a1976284ca1c89ebc04c6", "tree": "2d82a04036c49e01c7de1d57bdc976b6878c6347", "parents": [ "ae142e0c52b38e44d28b12f77c6e7faa96f7a069" ], "author": { "name": "Martyn Welch", "email": "martyn.welch@gefanuc.com", "time": "Thu Jul 02 06:12:18 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:22 2009 +1000" }, "message": "powerpc/nvram: Allow byte length reads from mmio NVRAM driver\n\nAdd a byte length read and write interface compatible with the\nnvram_generic driver interface to the mmio driver.\n\nSigned-off-by: Martyn Welch \u003cmartyn.welch@gefanuc.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "ae142e0c52b38e44d28b12f77c6e7faa96f7a069", "tree": "a6fac9e317d5cb766137b24affdb0b4e7870b18a", "parents": [ "797a747a82e23530ee45d2927bf84f3571c1acb2" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Fri Jun 12 04:31:52 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:29:21 2009 +1000" }, "message": "powerpc/sputrace: Use the generic event tracer\n\nI wrote sputrace before generic tracing infrastrucure was available.\nNow that we have the generic event tracer we can convert it over and\nremove a lot of code:\n\n 8 files changed, 45 insertions(+), 285 deletions(-)\n\nTo use it make sure CONFIG_EVENT_TRACING is enabled and then enable\nthe spufs trace channel by\n\n echo 1 \u003e /sys/kernel/debug/tracing/events/spufs/spufs_context/enable\n\nand then read the trace records using e.g.\n\n cat /sys/kernel/debug/tracing/trace\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nAcked-by: Jeremy Kerr \u003cjk@ozlabs.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "797a747a82e23530ee45d2927bf84f3571c1acb2", "tree": "1d198cf33c42d91b87116ea48dff71327f7bddae", "parents": [ "433abcdf321322495d83c8b571bdf7134622c734" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Aug 18 15:21:40 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:28:32 2009 +1000" }, "message": "powerpc/mm: Fix assert_pte_locked to work properly on uniprocessor\n\nSince the pte_lockptr is a spinlock it gets optimized away on\nuniprocessor builds so using spin_is_locked is not correct. We can use\nassert_spin_locked instead and get the proper behavior between UP and\nSMP builds.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "433abcdf321322495d83c8b571bdf7134622c734", "tree": "4a94a2f8589e51671e2d5eac1db5212ccb834627", "parents": [ "8798b9df26bbc7f3cee686483a0bac68b666bf8f" ], "author": { "name": "Martyn Welch", "email": "martyn.welch@gefanuc.com", "time": "Wed Jul 29 22:13:45 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:58 2009 +1000" }, "message": "powerpc/86xx: Update GE Fanuc sbc310 DTS\n\nUpdate GE Fanuc DTS to match the alterations suggested during the merge of\nthe ppc9a DTS in commit 740d36ae6344f38c4da64c2ede765d7d2dd1f132\n\nSigned-off-by: Martyn Welch \u003cmartyn.welch@gefanuc.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "8798b9df26bbc7f3cee686483a0bac68b666bf8f", "tree": "f0e408099ab44a33c206cacd57ebf3a3dbc2e3d4", "parents": [ "2eaa50e9670ecab9712317723cb7836a4da1c0dc" ], "author": { "name": "Martyn Welch", "email": "martyn.welch@gefanuc.com", "time": "Tue Jun 30 15:32:38 2009 +0100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:58 2009 +1000" }, "message": "powerpc/86xx: Enable XMC site on GE Fanuc SBC310\n\nThis patch enables the XMC (PCIe daughter card) site on the SBC310.\nSTG enter the description for the patch above.\n\nSigned-off-by: Martyn Welch \u003cmartyn.welch@gefanuc.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "2eaa50e9670ecab9712317723cb7836a4da1c0dc", "tree": "8017a6c4aff334aae6d67865a5d404bdafa38dfb", "parents": [ "89f3729642cf33bfbc742b85e134936b562f9731" ], "author": { "name": "Martyn Welch", "email": "martyn.welch@gefanuc.com", "time": "Tue Jun 30 15:32:26 2009 +0100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:55 2009 +1000" }, "message": "powerpc/86xx: Correct reading of information presented in cpuinfo\n\n/proc/cpuinfo should be showing the boards revision and the revision of\nthe FPGA fitted. The functions currently used to access this information\nas incorrect.\n\nAdditionally the VME geographical address of the PPC9A and it\u0027s status as\nsystem contoller are available in the board registers. Show these in\ncpuinfo.\n\nSigned-off-by: Martyn Welch \u003cmartyn.welch@gefanuc.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "89f3729642cf33bfbc742b85e134936b562f9731", "tree": "482190f135101d766b40f846a0299972262d28ff", "parents": [ "c69328d4b93e6885c897155fbacac69a12c5faef" ], "author": { "name": "Anton Vorontsov", "email": "avorontsov@ru.mvista.com", "time": "Sat Jul 25 01:42:30 2009 +0400" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:51 2009 +1000" }, "message": "powerpc/83xx: Add eSDHC support for MPC837xE-RDB/WLAN boards\n\nActually, the support is already there, but it requires newer U-Boots\n(to fill-in clock-frequency, and setup pin multiplexing).\n\nThough, it appears that on RDB boards USBB pins aren\u0027t multiplexed\nbetween USB and eSDHC (unlike MDS boards, where USB and eSDHC share\npctl and pwrfault pins).\n\nSo, for RDB boards we can safely setup pinmux and manually fill-in\nclock-frequency, thus making eSDHC work even with older u-boots.\n\nSigned-off-by: Anton Vorontsov \u003cavorontsov@ru.mvista.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "c69328d4b93e6885c897155fbacac69a12c5faef", "tree": "21575f0a3541ee3dc9b1da030b3761408a9e885d", "parents": [ "fda4bd9bac78efd2f9d566c52956d297bc03e8d9" ], "author": { "name": "Anton Vorontsov", "email": "avorontsov@ru.mvista.com", "time": "Thu Jul 09 22:36:44 2009 +0400" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:47 2009 +1000" }, "message": "powerpc/85xx: Add support for I2C EEPROMs on MPC8548CDS boards\n\nThis patch simply adds four eeprom nodes to MPC8548CDS\u0027 device tree.\n\nSigned-off-by: Anton Vorontsov \u003cavorontsov@ru.mvista.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "fda4bd9bac78efd2f9d566c52956d297bc03e8d9", "tree": "5f1d6595579d25e87de41f0735128e38f47c269b", "parents": [ "3475dd8a68a7c705bee88b143422ba02cb9a796b" ], "author": { "name": "Anton Vorontsov", "email": "avorontsov@ru.mvista.com", "time": "Sat Jul 25 01:42:17 2009 +0400" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:43 2009 +1000" }, "message": "powerpc/83xx: Add support for MPC8377E-WLAN boards\n\nMPC8377E-WLAN are basically RDB boards except:\n\n- RAM extended to 512 MB;\n- NAND flash removed, NOR flash extended to 64 MB;\n- Vitesse VSC7385 5-port switch removed, RTL8211B PHY added;\n- Power management MCU removed;\n- PCI slot removed, another mini-PCI slot added (IRQ routing changed);\n- USB3300 PHY\u0027s ID pin grounded, thus USB port is host-only.\n\nSigned-off-by: Anton Vorontsov \u003cavorontsov@ru.mvista.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "3475dd8a68a7c705bee88b143422ba02cb9a796b", "tree": "d1e9d6296fe706977c5d913b4802f2c51f07a8c9", "parents": [ "7a626b66bbd17e775cf2210e560b29383110290e" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Sat Aug 01 10:52:51 2009 +0200" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:38 2009 +1000" }, "message": "powerpc/qe: introduce missing kfree\n\nError handling code following a kzalloc should free the allocated data.\n\nThe semantic match that finds the problem is as follows:\n(http://www.emn.fr/x-info/coccinelle/)\n\n// \u003csmpl\u003e\n@r exists@\nlocal idexpression x;\nstatement S;\nexpression E;\nidentifier f,f1,l;\nposition p1,p2;\nexpression *ptr !\u003d NULL;\n@@\n\nx@p1 \u003d \\(kmalloc\\|kzalloc\\|kcalloc\\)(...);\n...\nif (x \u003d\u003d NULL) S\n\u003c... when !\u003d x\n when !\u003d if (...) { \u003c+...x...+\u003e }\n(\nx-\u003ef1 \u003d E\n|\n (x-\u003ef1 \u003d\u003d NULL || ...)\n|\n f(...,x-\u003ef1,...)\n)\n...\u003e\n(\n return \\(0\\|\u003c+...x...+\u003e\\|ptr\\);\n|\n return@p2 ...;\n)\n\n@script:python@\np1 \u003c\u003c r.p1;\np2 \u003c\u003c r.p2;\n@@\n\nprint \"* file: %s kmalloc %s return %s\" % (p1[0].file,p1[0].line,p2[0].line)\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nAcked-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "7a626b66bbd17e775cf2210e560b29383110290e", "tree": "a11b927014e9dd1d45eaaf95bc618ef2832b306f", "parents": [ "9239c89bc9c51c412b89eb8040077eaaee361326" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Sun Aug 02 10:44:53 2009 +0200" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:34 2009 +1000" }, "message": "powerpc/ipic: introduce missing kfree\n\nError handling code following a kzalloc should free the allocated data.\n\nThe semantic match that finds the problem is as follows:\n(http://www.emn.fr/x-info/coccinelle/)\n\n// \u003csmpl\u003e\n@r exists@\nlocal idexpression x;\nstatement S;\nexpression E;\nidentifier f,f1,l;\nposition p1,p2;\nexpression *ptr !\u003d NULL;\n@@\n\nx@p1 \u003d \\(kmalloc\\|kzalloc\\|kcalloc\\)(...);\n...\nif (x \u003d\u003d NULL) S\n\u003c... when !\u003d x\n when !\u003d if (...) { \u003c+...x...+\u003e }\n(\nx-\u003ef1 \u003d E\n|\n (x-\u003ef1 \u003d\u003d NULL || ...)\n|\n f(...,x-\u003ef1,...)\n)\n...\u003e\n(\n return \\(0\\|\u003c+...x...+\u003e\\|ptr\\);\n|\n return@p2 ...;\n)\n\n@script:python@\np1 \u003c\u003c r.p1;\np2 \u003c\u003c r.p2;\n@@\n\nprint \"* file: %s kmalloc %s return %s\" % (p1[0].file,p1[0].line,p2[0].line)\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "9239c89bc9c51c412b89eb8040077eaaee361326", "tree": "39693452f20f9897893ffcf3ed050466c7cb1de2", "parents": [ "8640d3bf71fa0f25adf86527fe69a32372427d4b" ], "author": { "name": "Heiko Schocher", "email": "hs@denx.de", "time": "Mon Aug 03 09:34:50 2009 +0200" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:30 2009 +1000" }, "message": "powerpc/82xx: mgcoge - updates for 2.6.32\n\n- add I2C support\n- add FCC1 and FCC2 support\n- fix bogus gpio numbering in plattform code\n\nSigned-off-by: Heiko Schocher \u003chs@denx.de\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "8640d3bf71fa0f25adf86527fe69a32372427d4b", "tree": "f81c89fb69efb871dcbfe90b4213ab153a15d64d", "parents": [ "6c75933c00049bee59562a18843a4f133ec2bfe4" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "bigeasy@linutronix.de", "time": "Wed Aug 05 21:41:12 2009 +0200" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:23 2009 +1000" }, "message": "powerpc/ipic: unmask all interrupt sources\n\nin case the interrupt controller was used in an earlier life then it is\npossible it is that some of its sources were used and are still unmask.\nIf the (unmasked) device is active and is creating interrupts (or one\ninterrupts was pending since the interrupts were disabled) then the boot\nprocess \"ends\" very soon. Once external interrupts are enabled, we land in\n-\u003e do_IRQ\n -\u003e call ppc_md.get_irq()\n -\u003e ipic_read() gets the source number\n -\u003e irq_linear_revmap(source)\n -\u003e revmap[source] \u003d\u003d NO_IRQ\n -\u003e irq_find_mapping(source) returns NO_IRQ because no source\n is registered\n -\u003e source is NO_IRQ, ppc_spurious_interrupts gets incremented, no\n further action.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003cbigeasy@linutronix.de\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "6c75933c00049bee59562a18843a4f133ec2bfe4", "tree": "57618062dd88af2c186610a5f880df48257f8d24", "parents": [ "8dcd038a13b8e322c49fe0d3e31a0deaba4fd5fd" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Fri Aug 07 09:00:34 2009 +0200" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:17 2009 +1000" }, "message": "powerpc/fsl_rio: Add kmalloc NULL tests\n\nCheck that the result of kmalloc/kzalloc is not NULL before dereferencing it.\n\nThe semantic match that finds this problem is as follows:\n(http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@@\nexpression *x;\nidentifier f;\nconstant char *C;\n@@\n\nx \u003d \\(kmalloc\\|kcalloc\\|kzalloc\\)(...);\n... when !\u003d x \u003d\u003d NULL\n when !\u003d x !\u003d NULL\n when !\u003d (x || ...)\n(\nkfree(x)\n|\nf(...,C,...,x,...)\n|\n*f(...,x,...)\n|\n*x-\u003ef\n)\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "8dcd038a13b8e322c49fe0d3e31a0deaba4fd5fd", "tree": "657cb5c3ef0da7de481ebd2c3297f68653e5d410", "parents": [ "b6c316a1f6447d6dd0fd8d443b66643e328e04fa" ], "author": { "name": "Roel Kluin", "email": "roel.kluin@gmail.com", "time": "Thu Aug 06 16:00:37 2009 -0700" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:27:12 2009 +1000" }, "message": "powerpc/fsl-booke: read buffer overflow\n\ncam[tlbcam_index] is checked before tlbcam_index \u003c ARRAY_SIZE(cam)\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "b6c316a1f6447d6dd0fd8d443b66643e328e04fa", "tree": "5bb8bbbd6cb3402e2c6132b0403c989472e11ed9", "parents": [ "189339d47d30ad171aa1c95ffc90a6177b3ce4a8" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Jul 30 17:56:54 2009 -0500" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:26:06 2009 +1000" }, "message": "powerpc/85xx: Added 36-bit physical device tree for mpc8536ds board\n\nAdded a device tree that should be similiar to mpc8536ds.dtb except\nthe physical addresses for all IO are above the 4G boundary.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "189339d47d30ad171aa1c95ffc90a6177b3ce4a8", "tree": "aafa0c546ea76c696f19d073962a122beb5f83a3", "parents": [ "6b045a818f1d0b9b68c1d47e745d521dd115991a" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Jul 30 17:56:38 2009 -0500" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:57 2009 +1000" }, "message": "powerpc/85xx: Move mpc8536ds.dts to address-cells/size-cells \u003d \u003c2\u003e\n\nChange the top-level #address-cells and #size-cells to \u003c2\u003e so the\nmpc8536ds.dts is easier to deal with both a true 32-bit physical\nor 36-bit physical address space.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "6b045a818f1d0b9b68c1d47e745d521dd115991a", "tree": "3bc108c4241ffb465d029d20a9a1e8c82b43d006", "parents": [ "0e8e844246fcf9c38906b62e5d05891dbbda5754" ], "author": { "name": "Stefan Roese", "email": "sr@denx.de", "time": "Wed Jul 29 01:41:06 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:52 2009 +1000" }, "message": "powerpc/40x: Update kilauea defconfig to support NAND, RTC and HWMON\n\nThis patch adds support for the following devices to the Kilauea\ndefconfig file:\n- PPC4xx NAND controller (NDFC)\n- I2C RTC (Dallas DS1338)\n- I2C HWMON (Dallas DS1775)\n\nSigned-off-by: Stefan Roese \u003csr@denx.de\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "0e8e844246fcf9c38906b62e5d05891dbbda5754", "tree": "4d805fd90d4c9a18b8c626547377ecd0d13fd4e7", "parents": [ "13ae564f1db967dd4ea244f21f3dad6a28fa351c" ], "author": { "name": "Stefan Roese", "email": "sr@denx.de", "time": "Wed Jul 29 07:05:11 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:46 2009 +1000" }, "message": "powerpc/44x: Update Canyonlands defconfig to support NOR, NAND and RTC\n\nThis patch adds support for the following devices to the Canyonlands\ndefconfig file:\n- NOR FLASH\n- PPC4xx NAND controller (NDFC)\n- I2C RTC (M41T80)\n\nSigned-off-by: Stefan Roese \u003csr@denx.de\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "13ae564f1db967dd4ea244f21f3dad6a28fa351c", "tree": "280be6bf3193973e37018c3547e76c4035a6aec6", "parents": [ "88eeb72ec4c1ed7defff0f154c5b56798e038e2a" ], "author": { "name": "Stefan Roese", "email": "sr@denx.de", "time": "Wed Jul 29 01:40:56 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:37 2009 +1000" }, "message": "powerpc/40x: Update Kilauea dts to support NAND, RTC and HWMON\n\nThis patch adds support for the following devices to the Kilauea dts:\n- PPC4xx NAND controller (NDFC)\n- I2C RTC (Dallas DS1338)\n- I2C HWMON (Dallas DS1775)\n\nAdditionally the partitioning of the NOR FLASH is changed. The dtb\npartition has been missing. Fixed in this patch.\n\nSigned-off-by: Stefan Roese \u003csr@denx.de\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "88eeb72ec4c1ed7defff0f154c5b56798e038e2a", "tree": "dfdc33fd316dd67664de5c22ad1ade5d0d8df3ab", "parents": [ "20d70345f181be6bdd5b0a76a408d0693683bf3d" ], "author": { "name": "Stefan Roese", "email": "sr@denx.de", "time": "Wed Jul 29 07:05:01 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:29 2009 +1000" }, "message": "powerpc/44x: Add NAND support to Canyonlands dts\n\nAlso some whitespace cleanup in the USB device nodes.\n\nSigned-off-by: Stefan Roese \u003csr@denx.de\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "20d70345f181be6bdd5b0a76a408d0693683bf3d", "tree": "c1aa4b10ec0828e76c523dc2145f1aa185edbed1", "parents": [ "67050b5c3e9992d98554bd224d5a7898cc4881ff" ], "author": { "name": "Stefan Roese", "email": "sr@denx.de", "time": "Wed Jul 29 07:04:46 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:18 2009 +1000" }, "message": "powerpc: Add AMCC 460EX/460GT Rev. B support to cputable.c\n\nSigned-off-by: Stefan Roese \u003csr@denx.de\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "67050b5c3e9992d98554bd224d5a7898cc4881ff", "tree": "296c4d21e193c22e3e31f01799c0048f45df41c7", "parents": [ "af984b816530b4725b92e01ecfba7c5e3eab910d" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Aug 04 22:33:32 2009 -0500" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:12 2009 +1000" }, "message": "powerpc/mm: Fix switch_mmu_context to iterate of the proper list of cpus\n\nIntroduced a temporary variable into our iterating over the list cpus\nthat are threads on the same core. For some reason Ben forgot how for\nloops work.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "af984b816530b4725b92e01ecfba7c5e3eab910d", "tree": "61094de1257e469bd700deddacf352404a532e17", "parents": [ "2d27cfd3286966c04d4192a9db5a6c7ea60eebf1" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 06 13:50:58 2009 +1000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:12 2009 +1000" }, "message": "powerpc/mm: Fix encoding of page table cache numbers\n\nThe mask used to encode the page table cache number in the\nbatch when freeing page tables was too small for the new\npossible values of MMU page sizes. This increases it along\nwith a comment explaining the constraints.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "2d27cfd3286966c04d4192a9db5a6c7ea60eebf1", "tree": "a9e3feb764da5a2be1a6ef9b3a0bf694e874a424", "parents": [ "32a74949b7337726e76d69f51c48715431126c6c" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:59 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:11 2009 +1000" }, "message": "powerpc: Remaining 64-bit Book3E support\n\nThis contains all the bits that didn\u0027t fit in previous patches :-) This\nincludes the actual exception handlers assembly, the changes to the\nkernel entry, other misc bits and wiring it all up in Kconfig.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "32a74949b7337726e76d69f51c48715431126c6c", "tree": "22383b2b4d568c7fc651e1def000049dde7156c3", "parents": [ "25d21ad6e799cccd097b9df2a2fefe19a7e1dfcf" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:58 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:10 2009 +1000" }, "message": "powerpc/mm: Add support for SPARSEMEM_VMEMMAP on 64-bit Book3E\n\nThe base TLB support didn\u0027t include support for SPARSEMEM_VMEMMAP, though\nwe did carve out some virtual space for it, the necessary support code\nwasn\u0027t there. This implements it by using 16M pages for now, though the\npage size could easily be changed at runtime if necessary.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "25d21ad6e799cccd097b9df2a2fefe19a7e1dfcf", "tree": "cd381527a069fed6cffa8755cac177639cc48b0b", "parents": [ "a8f7758c1c52a13e031266483efd5525157e43e9" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:47 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:09 2009 +1000" }, "message": "powerpc: Add TLB management code for 64-bit Book3E\n\nThis adds the TLB miss handler assembly, the low level TLB flush routines\nalong with the necessary hook for dealing with our virtual page tables\nor indirect TLB entries that need to be flushes when PTE pages are freed.\n\nThere is currently no support for hugetlbfs\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "a8f7758c1c52a13e031266483efd5525157e43e9", "tree": "d2b58130580e5c904b5fdf22f9b27388f93ed913", "parents": [ "dce6670aaa7efece0558010b48d5ef9d421154be" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:45 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:09 2009 +1000" }, "message": "powerpc/mm: Move around mmu_gathers definition on 64-bit\n\nThe definition for the global structure mmu_gathers, used by generic code,\nis currently defined in multiple places not including anything used by\n64-bit Book3E. This changes it by moving to one place common to all\nprocessors.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "dce6670aaa7efece0558010b48d5ef9d421154be", "tree": "ac14f2b583d8914c1a0e03637949ab7a1c307ec5", "parents": [ "13363ab9b9d040ebeace3a1a3a5ddcb13bf0d644" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:42 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:08 2009 +1000" }, "message": "powerpc: Add PACA fields specific to 64-bit Book3E processors\n\nThis adds various fields in the PACA that are for use specifically\nby Book3E processors, such as exception save areas, current pgd\npointer, special exceptions kernel stacks etc...\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "13363ab9b9d040ebeace3a1a3a5ddcb13bf0d644", "tree": "3745a72246b62a991d9d2d38faf91d136515b8a7", "parents": [ "57e2a99f74b0d3720c97a6aadb57ae6aad3c61ea" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:39 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:07 2009 +1000" }, "message": "powerpc: Add definitions used by exception handling on 64-bit Book3E\n\nThis adds various definitions and macros used by the exception and TLB\nmiss handling on 64-bit BookE\n\nIt also adds the definitions of the SPRGs used for various exception types\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "57e2a99f74b0d3720c97a6aadb57ae6aad3c61ea", "tree": "4268a98ad222dbcf790749aed52417eb0a3a2a35", "parents": [ "0257c99cdfaca53a881339e1cbca638c61569b05" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 28 11:59:34 2009 +1000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:06 2009 +1000" }, "message": "powerpc: Add memory management headers for new 64-bit BookE\n\nThis adds the PTE and pgtable format definitions, along with changes\nto the kernel memory map and other definitions related to implementing\nsupport for 64-bit Book3E. This also shields some asm-offset bits that\nare currently only relevant on 32-bit\n\nWe also move the definition of the \"linux\" page size constants to\nthe common mmu.h file and add a few sizes that are relevant to\nembedded processors.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "0257c99cdfaca53a881339e1cbca638c61569b05", "tree": "6289d39bc76cc56cd4e08b987d4c7a31dfc2b0ef", "parents": [ "c7cc58a1ad8dfe3c199d3b6ce50412b86dd3edaf" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:34 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:25:06 2009 +1000" }, "message": "powerpc: Add SPR definitions for new 64-bit BookE\n\nThis adds various SPRs defined on 64-bit BookE, along with changes\nto the definition of the base MSR values to add the values needed\nfor 64-bit Book3E.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "c7cc58a1ad8dfe3c199d3b6ce50412b86dd3edaf", "tree": "1d1ded72de81743ddd1306677d64757136972402", "parents": [ "cf54dc7cd4f9aab55cd3e1794b0b74c3c88cd1a0" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:28 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:24:56 2009 +1000" }, "message": "powerpc/mm: Rework \u0026 cleanup page table freeing code path\n\nThat patch used to just add a hook to page table flushing but\npulling that string brought out a whole bunch of issues, so it\nnow does that and more:\n\n - We now make the RCU batching of page freeing SMP only, as I\nbelieve it was intended initially. We make a few more things compile\nto nothing on !CONFIG_SMP\n\n - Some macros are turned into functions, though that forced me to\nout of line a few stuffs due to unsolvable include depenencies,\nhowever it\u0027s probably better that way anyway, it\u0027s not -that-\ncritical code path.\n\n - 32-bit didn\u0027t call pte_free_finish() on tlb_flush() which means\nthat it wouldn\u0027t push out the batch to RCU for delayed freeing when\na bunch of page tables have been freed, they would just stay in there\nuntil the batch gets full.\n\n64-bit BookE will use that hook to maintain the virtually linear\npage tables or the indirect entries in the TLB when using the\nHW loader.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "cf54dc7cd4f9aab55cd3e1794b0b74c3c88cd1a0", "tree": "d76b0914de720b5654af092af6e5245a49e62df6", "parents": [ "747bea91b764aefd59091ebff80f182282f1d23c" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:28 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:44 2009 +1000" }, "message": "powerpc: Move definitions of secondary CPU spinloop to header file\n\nThose definitions are currently declared extern in the .c file where\nthey are used, move them to a header file instead.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "747bea91b764aefd59091ebff80f182282f1d23c", "tree": "6bd84287310bfa67a1dc45fcdef245956d1e0c7b", "parents": [ "6f0ef0f505af1ce6e9756087a9d4cc3778bae8c6" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:27 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:43 2009 +1000" }, "message": "powerpc: Clean ifdef usage in copy_thread()\n\nCurrently, a single ifdef covers SLB related bits and more generic ppc64\nrelated bits, split this in two separate ifdef\u0027s since 64-bit BookE will\nneed one but not the other.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "6f0ef0f505af1ce6e9756087a9d4cc3778bae8c6", "tree": "df60577c18cd61fd11debf249d60d49897e2a111", "parents": [ "d4e167da4cb60910f6ac305aee03714937f70b71" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:26 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:42 2009 +1000" }, "message": "powerpc/mm: Call mmu_context_init() from ppc64\n\nOur 64-bit hash context handling has no init function, but 64-bit Book3E\nwill use the common mmu_context_nohash.c code which does, so define an\nempty inline mmu_context_init() for 64-bit server and call it from\nour 64-bit setup_arch()\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "d4e167da4cb60910f6ac305aee03714937f70b71", "tree": "44a0faf402dd91024544b3450033b80524b25799", "parents": [ "44c58ccc8dc25f78a4f641901f17092c93dd0458" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:24 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:41 2009 +1000" }, "message": "powerpc/mm: Make low level TLB flush ops on BookE take additional args\n\nWe need to pass down whether the page is direct or indirect and we\u0027ll\nneed to pass the page size to _tlbil_va and _tlbivax_bcast\n\nWe also add a new low level _tlbil_pid_noind() which does a TLB flush\nby PID but avoids flushing indirect entries if possible\n\nThis implements those new prototypes but defines them with inlines\nor macros so that no additional arguments are actually passed on current\nprocessors.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "44c58ccc8dc25f78a4f641901f17092c93dd0458", "tree": "b995a96edcc23c509580751cc923a161e969c1c8", "parents": [ "a245067e204f69c69abf92d94fc45ec65bf1f07e" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:20 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:40 2009 +1000" }, "message": "powerpc: Modify some ppc_asm.h macros to accomodate 64-bits Book3E\n\nThe way I intend to use tophys/tovirt on 64-bit BookE is different\nfrom the \"trick\" that we currently play for 32-bit BookE so change\nthe condition of definition of these macros to make it so.\n\nAlso, make sure we only use rfid and mtmsrd instead of rfi and mtmsr\nfor 64-bit server processors, not all 64-bit processors.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "a245067e204f69c69abf92d94fc45ec65bf1f07e", "tree": "8a9ee8920c8b42d5d13cd2f7a05f578d99dd438e", "parents": [ "1fe1a21005c14ad772caeb9005580f473c4b6c57" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:16 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:40 2009 +1000" }, "message": "powerpc/mm: Add support for early ioremap on non-hash 64-bit processors\n\nThis adds some code to do early ioremap\u0027s using page tables instead of\nbolting entries in the hash table. This will be used by the upcoming\n64-bits BookE port.\n\nThe patch also changes the test for early vs. late ioremap to use\nslab_is_available() instead of our old hackish mem_init_done.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "1fe1a21005c14ad772caeb9005580f473c4b6c57", "tree": "31250b602b80a44a2a43dcaa812e6f6965b04149", "parents": [ "29c09e8fbaf65698c51aeffe34acc284a454a38f" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:12 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:39 2009 +1000" }, "message": "powerpc/mm: Add more bit definitions for Book3E MMU registers\n\nThis adds various additional bit definitions for various MMU related\nSPRs used on Book3E.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "29c09e8fbaf65698c51aeffe34acc284a454a38f", "tree": "e3f48366c63e44354da1085db29b5591705fda06", "parents": [ "fcce810986b3f32a8322faf240f8cc5560a4c463" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:11 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:38 2009 +1000" }, "message": "powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.\n\nThis adds the opcode definitions to ppc-opcode.h for the two instructions\ntlbivax and tlbsrx. as defined by Book3E 2.06\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "fcce810986b3f32a8322faf240f8cc5560a4c463", "tree": "4ee99143e18a008c52a274d74c1cc11055983bc6", "parents": [ "6c1719942e19936044c4673b18afa26e45a02320" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:10 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:37 2009 +1000" }, "message": "powerpc/mm: Add HW threads support to no_hash TLB management\n\nThe current \"no hash\" MMU context management code is written with\nthe assumption that one CPU \u003d\u003d one TLB. This is not the case on\nimplementations that support HW multithreading, where several\nlinux CPUs can share the same TLB.\n\nThis adds some basic support for this to our context management\nand our TLB flushing code.\n\nIt also cleans up the optional debugging output a bit\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "6c1719942e19936044c4673b18afa26e45a02320", "tree": "d235739a709ecf4f36d28ad34b80f8930ef525b1", "parents": [ "7d60b02cc7e6d67b498eed9ecb58010f61422325" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:07 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:36 2009 +1000" }, "message": "powerpc/of: Remove useless register save/restore when calling OF back\n\nenter_prom() used to save and restore registers such as CTR, XER etc..\nwhich are volatile, or SRR0,1... which we don\u0027t care about. This\nremoves a bunch of useless code and while at it turns an mtmsrd into\nan MTMSRD macro which will be useful to Book3E.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "7d60b02cc7e6d67b498eed9ecb58010f61422325", "tree": "2f7ff97e60acaf7b241cad2d48dccc0b7738bd06", "parents": [ "dd90bbd5fb763ab8924135a30956030c7a7b94fc" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 23 23:15:04 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:35 2009 +1000" }, "message": "powerpc/mm: Fix misplaced #endif in pgtable-ppc64-64k.h\n\nA misplaced #endif causes more definitions than intended to be\nprotected by #ifndef __ASSEMBLY__. This breaks upcoming 64-bit\nBookE support patch when using 64k pages.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "dd90bbd5fb763ab8924135a30956030c7a7b94fc", "tree": "e8cb73517611d26b74086025958e88404994f028", "parents": [ "c79b29735d28d819380b584d6707b4110ee759f3" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 28 11:54:32 2009 +1000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:34 2009 +1000" }, "message": "powerpc: Add compat_sys_truncate\n\nThe truncate syscall has a signed long parameter, so when using a 32-\nbit userspace with a 64-bit kernel the argument is zero-extended\ninstead of sign-extended. Adding the compat_sys_truncate function\nfixes the issue.\n\nThis was noticed during an LSB truncate test failure. The test was\nchecking for the correct error number set when truncate is called with\na length of -1. The test can be found at:\n\nhttp://bzr.linuxfoundation.org/lsb/devel/runtime-test?cmd\u003dinventory;rev\u003dstewb%40linux-foundation.org-20090626205411-sfb23cc0tjj7jzgm;path\u003dmodules/vsx-pcts/tset/POSIX.os/files/truncate/\n\nBenH: Added compat_sys_ftruncate() as well, same issue.\n\nSigned-off-by: Chase Douglas \u003ccndougla@linux.vnet.ibm.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "c79b29735d28d819380b584d6707b4110ee759f3", "tree": "ec3d868f8aeb4d953f96d0a4aba502635b87efe3", "parents": [ "f7d4f68d971b8234491b4a0be58aa6f659c1c194" ], "author": { "name": "Lucian Adrian Grijincu", "email": "lgrijincu@ixiacom.com", "time": "Thu Jul 23 00:13:37 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:33 2009 +1000" }, "message": "powerpc: Update boot wrapper script with the new location of dtc\n\ndtc was moved in 9fffb55f66127b52c937ede5196ebfa0c0d50bce from\narch/powerpc/boot/ to scripts/dtc/\n\nThis patch updates the wrapper script to point to the new location of dtc.\n\nSigned-off-by: Lucian Adrian Grijincu \u003clgrijincu@ixiacom.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "f7d4f68d971b8234491b4a0be58aa6f659c1c194", "tree": "5909a2a15fe2f53438cac49b23573f27b437a686", "parents": [ "063517bea114d4cb57bf582353d0a99b82775a63" ], "author": { "name": "Frans Pop", "email": "elendil@planet.nl", "time": "Thu Jul 23 08:57:18 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:33 2009 +1000" }, "message": "powerpc: Makefile simplification through use of cc-ifversion\n\nSigned-off-by: Frans Pop \u003celendil@planet.nl\u003e\nAcked-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "063517bea114d4cb57bf582353d0a99b82775a63", "tree": "e51f8d1e1167a87d68c13e55ec6abfb0f8601acc", "parents": [ "527b3639616b21c257518ee7c26fbf05232db0c0" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 14 20:52:56 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:32 2009 +1000" }, "message": "powerpc: Change PACA from SPRG3 to SPRG1\n\nThis change the SPRG used to store the PACA on ppc64 from\nSPRG3 to SPRG1. SPRG3 is user readable on most processors\nand we want to use it for other things. We change the scratch\nSPRG used by exception vectors from SRPG1 to SPRG2.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "527b3639616b21c257518ee7c26fbf05232db0c0", "tree": "2b0a839ad8506c6b14819a3647a7529b12a4e5b2", "parents": [ "066c4b87e927985a083481c92b4aebade8fe4ab3" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 14 20:56:58 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:31 2009 +1000" }, "message": "powerpc/pmac: Fix PowerSurge SMP IPI allocation\n\nThe code for setting up the IPIs for SMP PowerSurge marchines bitrot,\nit needs to properly map the HW interrupt number\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "066c4b87e927985a083481c92b4aebade8fe4ab3", "tree": "2a3540a69540f882538d172cd6be01d0eab7b0b2", "parents": [ "2e2ddb24d36106e029f6eeb3df611178a36fb295" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 21 15:25:53 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:30 2009 +1000" }, "message": "powerpc/mm: Fix definitions of FORCE_MAX_ZONEORDER in Kconfig\n\nThe current definitions set ranges and defaults for 32 and 64-bit\nonly using \"PPC_STD_MMU\" which means hash based MMU. This uselessly\nrestrict the usefulness for the upcoming 64-bit BookE port, but more\nthan that, it\u0027s broken on 32-bit since the only 32-bit platform\nsupporting multiple page sizes currently is 44x which does -not-\nhave PPC_STD_MMU_32 set.\n\nThis fixes it by using PPC64 and PPC32 instead.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "2e2ddb24d36106e029f6eeb3df611178a36fb295", "tree": "7c76d5f2d43933a86cd834c8b28290d9c501cdae", "parents": [ "c5a8c0c99f67ae8a784faafbaaea1529825796e2" ], "author": { "name": "roel kluin", "email": "roel.kluin@gmail.com", "time": "Tue Jul 21 00:17:17 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:29 2009 +1000" }, "message": "powerpc/cell: Replace strncpy by strlcpy\n\nReplace strncpy() and explicit null-termination by strlcpy()\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "c5a8c0c99f67ae8a784faafbaaea1529825796e2", "tree": "731b07d0ac0414dbeac5ce940fe59a04a8d63c3f", "parents": [ "ee43eb788b3a06425fffb912677e2e1c8b00dd3b" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jul 16 19:36:57 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:28 2009 +1000" }, "message": "powerpc: Remove use of a second scratch SPRG in STAB code\n\nThe STAB code used on Power3 and RS/64 uses a second scratch SPRG to\nsave a GPR in order to decide whether to go to do_stab_bolted_* or\nto handle a normal data access exception.\n\nThis prevents our scheme of freeing SPRG3 which is user visible for\nuser uses since we cannot use SPRG0 which, on RS/64, seems to be\nread-only for supervisor mode (like POWER4).\n\nThis reworks the STAB exception entry to use the PACA as temporary\nstorage instead.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "ee43eb788b3a06425fffb912677e2e1c8b00dd3b", "tree": "7233cb47647837ab00af81270b3a16555d88a1f1", "parents": [ "8aa34ab8b2dc96ca6c4feecfb87ed13f0d40ef98" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 14 20:52:54 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:27 2009 +1000" }, "message": "powerpc: Use names rather than numbers for SPRGs (v2)\n\nThe kernel uses SPRG registers for various purposes, typically in\nlow level assembly code as scratch registers or to hold per-cpu\nglobal infos such as the PACA or the current thread_info pointer.\n\nWe want to be able to easily shuffle the usage of those registers\nas some implementations have specific constraints realted to some\nof them, for example, some have userspace readable aliases, etc..\nand the current choice isn\u0027t always the best.\n\nThis patch should not change any code generation, and replaces the\nusage of SPRN_SPRGn everywhere in the kernel with a named replacement\nand adds documentation next to the definition of the names as to\nwhat those are used for on each processor family.\n\nThe only parts that still use the original numbers are bits of KVM\nor suspend/resume code that just blindly needs to save/restore all\nthe SPRGs.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "8aa34ab8b2dc96ca6c4feecfb87ed13f0d40ef98", "tree": "8e8a069460eaecaccfe784b0e6fe3b98e8d76448", "parents": [ "de4376c2846bb5a8fc6fe8dbd0e4ff30905493e6" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jul 14 20:52:52 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:26 2009 +1000" }, "message": "powerpc: Rename exception.h to exception-64s.h\n\nThe file include/asm/exception.h contains definitions\nthat are specific to exception handling on 64-bit server\ntype processors.\n\nThis renames the file to exception-64s.h to reflect that\nfact and avoid confusion.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "de4376c2846bb5a8fc6fe8dbd0e4ff30905493e6", "tree": "58c430e20a457b36059c983afeb08ddd712c6661", "parents": [ "5eb9bac0406f2beb84b21aac6feb89d33d9f3f5c" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Mon Jul 13 20:53:53 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:26 2009 +1000" }, "message": "powerpc: Preload application text segment instead of TASK_UNMAPPED_BASE\n\nTASK_UNMAPPED_BASE is not used with the new top down mmap layout. We can\nreuse this preload slot by loading in the segment at 0x10000000, where almost\nall PowerPC binaries are linked at.\n\nOn a microbenchmark that bounces a token between two 64bit processes over pipes\nand calls gettimeofday each iteration (to access the VDSO), both the 32bit and\n64bit context switch rate improves (tested on a 4GHz POWER6):\n\n32bit: 273k/sec -\u003e 283k/sec\n64bit: 277k/sec -\u003e 284k/sec\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "5eb9bac0406f2beb84b21aac6feb89d33d9f3f5c", "tree": "04b7dfa2acd16f308a161f6baab2a83e024951b1", "parents": [ "30d0b3682887a81f0335b42f20116fd40d743371" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Mon Jul 13 20:53:52 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:25 2009 +1000" }, "message": "powerpc: Rearrange SLB preload code\n\nWith the new top down layout it is likely that the pc and stack will be in the\nsame segment, because the pc is most likely in a library allocated via a top\ndown mmap. Right now we bail out early if these segments match.\n\nRearrange the SLB preload code to sanity check all SLB preload addresses\nare not in the kernel, then check all addresses for conflicts.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "30d0b3682887a81f0335b42f20116fd40d743371", "tree": "5322504352036cbc67d954e52d2ad7aa8e216bce", "parents": [ "0d2d3e38f72e400f602dade3f0ddffe0b3b9d4df" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Mon Jul 13 20:53:51 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:24 2009 +1000" }, "message": "powerpc: Move 64bit VDSO to improve context switch performance\n\nOn 64bit applications the VDSO is the only thing in segment 0. Since the VDSO\nis position independent we can remove the hint and let get_unmapped_area pick\nan area. This will mean the vdso will be near other mmaps and will share\nan SLB entry:\n\n10000000-10001000 r-xp 00000000 08:06 5778459 /root/context_switch_64\n10010000-10011000 r--p 00000000 08:06 5778459 /root/context_switch_64\n10011000-10012000 rw-p 00001000 08:06 5778459 /root/context_switch_64\nfffa92ae000-fffa92b0000 rw-p 00000000 00:00 0\nfffa92b0000-fffa9453000 r-xp 00000000 08:06 4334051 /lib64/power6/libc-2.9.so\nfffa9453000-fffa9462000 ---p 001a3000 08:06 4334051 /lib64/power6/libc-2.9.so\nfffa9462000-fffa9466000 r--p 001a2000 08:06 4334051 /lib64/power6/libc-2.9.so\nfffa9466000-fffa947c000 rw-p 001a6000 08:06 4334051 /lib64/power6/libc-2.9.so\nfffa947c000-fffa9480000 rw-p 00000000 00:00 0\nfffa9480000-fffa94a8000 r-xp 00000000 08:06 4333852 /lib64/ld-2.9.so\nfffa94b3000-fffa94b4000 rw-p 00000000 00:00 0\n\nfffa94b4000-fffa94b7000 r-xp 00000000 00:00 0 [vdso] \u003c----- here I am\n\nfffa94b7000-fffa94b8000 r--p 00027000 08:06 4333852 /lib64/ld-2.9.so\nfffa94b8000-fffa94bb000 rw-p 00028000 08:06 4333852 /lib64/ld-2.9.so\nfffa94bb000-fffa94bc000 rw-p 00000000 00:00 0\nfffe4c10000-fffe4c25000 rw-p 00000000 00:00 0 [stack]\n\nOn a microbenchmark that bounces a token between two 64bit processes over pipes\nand calls gettimeofday each iteration (to access the VDSO), our context switch\nrate goes from 268k to 277k ctx switches/sec (tested on a 4GHz POWER6).\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "0d2d3e38f72e400f602dade3f0ddffe0b3b9d4df", "tree": "3c5b6503f63e0d3ae9e56133633ffbc5eb27c630", "parents": [ "11a6b292c1bc9cb39970e44edd6958250f23d3a8" ], "author": { "name": "Geoff Thorpe", "email": "geoff@geoffthorpe.net", "time": "Tue Jul 07 15:23:56 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:23 2009 +1000" }, "message": "powerpc: expose the multi-bit ops that underlie single-bit ops.\n\nThe bitops.h functions that operate on a single bit in a bitfield are\nimplemented by operating on the corresponding word location. In all\ncases the inner logic is valid if the mask being applied has more than\none bit set, so this patch exposes those inner operations. Indeed,\nset_bits() was already available, but it duplicated code from\nset_bit() (rather than making the latter a wrapper) - it was also\nmissing the PPC405_ERR77() workaround and the \"volatile\" address\nqualifier present in other APIs. This corrects that, and exposes the\nother multi-bit equivalents.\n\nOne advantage of these multi-bit forms is that they allow word-sized\nvariables to essentially be their own spinlocks, eg. very useful for\nstate machines where an atomic \"flags\" variable can obviate the need\nfor any additional locking.\n\nSigned-off-by: Geoff Thorpe \u003cgeoff@geoffthorpe.net\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "11a6b292c1bc9cb39970e44edd6958250f23d3a8", "tree": "ac23c82f0739ad7521b531f570305d2a306c7651", "parents": [ "66dc3304f3875ea85c630a57a88ecf79032890c4" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Sun Jul 05 16:08:52 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:22 2009 +1000" }, "message": "powerpc/mpic: Fix MPIC_BROKEN_REGREAD on non broken MPICs\n\nThe workaround enabled by CONFIG_MPIC_BROKEN_REGREAD does not work\non non-broken MPICs. The symptom is no interrupts being received.\n\nThe fix is twofold. Firstly the code was broken for multiple isus,\nwe need to index into the shadow array with the src_no, not the idx.\nSecondly, we always do the read, but only use the VECPRI_MASK and\nVECPRI_ACTIVITY bits from the hardware, the rest of \"val\" comes\nfrom the shadow.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "66dc3304f3875ea85c630a57a88ecf79032890c4", "tree": "89fd0c5a862e7f429aa0bc9115a29fd5193e68d3", "parents": [ "c124891f50f11e33acdfa276864ea089bab726b6" ], "author": { "name": "Gerhard Pircher", "email": "gerhard_pircher@gmx.net", "time": "Fri Jun 19 11:40:57 2009 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Aug 20 10:12:21 2009 +1000" }, "message": "powerpc/amigaone: Convert amigaone_init() to a machine_device_initcall()\n\nThis allows to remove the ppc_md.init() hook in the setup code.\n\nSigned-off-by: Gerhard Pircher \u003cgerhard_pircher@gmx.net\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "77f312a96dd1e01c49ccd872265e70a8346b53cc", "tree": "7e6d1114dfaf0eb4732c97ad18819f23e4ebef09", "parents": [ "dc8ed71eeb8adce08d3070f4130e12ee540baa59", "142d44b0dd6741a64a7bdbe029110e7c1dcf1d23" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 18 19:41:05 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 18 19:41:05 2009 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:\n percpu: use the right flag for get_vm_area()\n percpu, sparc64: fix sparse possible cpu map handling\n init: set nr_cpu_ids before setup_per_cpu_areas()\n" }, { "commit": "dc8ed71eeb8adce08d3070f4130e12ee540baa59", "tree": "0c1fc7d6de37879a8342b346b32338d747cfb155", "parents": [ "7f9cfb31030737a7fc9a1cbca3fd01bec184c849", "e412cd257e0d51e0ecbb89f50953835b5a0681b2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 18 16:55:43 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 18 16:55:43 2009 -0700" }, "message": "Merge branch \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, mce: Don\u0027t initialize MCEs on unknown CPUs\n x86, mce: don\u0027t log boot MCEs on Pentium M (model \u003d\u003d 13) CPUs\n x86: Annotate section mismatch warnings in kernel/apic/x2apic_uv_x.c\n x86, mce: therm_throt: Don\u0027t log redundant normality\n x86: Fix UV BAU destination subnode id\n" }, { "commit": "b9d030a123b6b7fbf262c995455197ea5184b497", "tree": "9e98829c9c79b4085c762fe6fa00c6bb6f49e8f6", "parents": [ "435a71d9ef68b03343949c814986e01dae849763", "237674e050ae8ea40a432412df6c15d60b7ae8a6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 18 13:54:26 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 18 13:54:26 2009 -0700" }, "message": "Merge branch \u0027sh/for-2.6.31\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* \u0027sh/for-2.6.31\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:\n sh: sh7724 ddr self-refresh changes\n sh: use in-soc KEYSC on se7724\n sh: CMT suspend/resume\n sh: skip disabled LCDC channels\n" }, { "commit": "20002ded4d937ca87aca6253b874920a96a763c4", "tree": "1253f60bc20c95598ae1d1e1578d9aac9ea7a6b0", "parents": [ "9c1e105238c474d19905af504f2e7f42d4f71f9e" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Aug 18 08:25:32 2009 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Aug 18 14:48:47 2009 +1000" }, "message": "perf_counter: powerpc: Add callchain support\n\nThis adds support for tracing callchains for powerpc, both 32-bit\nand 64-bit, and both in the kernel and userspace, from PMU interrupt\ncontext.\n\nThe first three entries stored for each callchain are the NIP (next\ninstruction pointer), LR (link register), and the contents of the LR\nsave area in the second stack frame (the first is ignored because the\nABI convention on powerpc is that functions save their return address\nin their caller\u0027s stack frame). Because leaf functions don\u0027t have to\nsave their return address (LR value) and don\u0027t have to establish a\nstack frame, it\u0027s possible for either or both of LR and the second\nstack frame\u0027s LR save area to have valid return addresses in them.\nThis is basically impossible to disambiguate without either reading\nthe code or looking at auxiliary information such as CFI tables.\nSince we don\u0027t want to do either of those things at interrupt time,\nwe store both LR and the second stack frame\u0027s LR save area.\n\nOnce we get past the second stack frame, there is no ambiguity; all\nreturn addresses we get are reliable.\n\nFor kernel traces, we check whether they are valid kernel instruction\naddresses and store zero instead if they are not (rather than\nomitting them, which would make it impossible for userspace to know\nwhich was which). We also store zero instead of the second stack\nframe\u0027s LR save area value if it is the same as LR.\n\nFor kernel traces, we check for interrupt frames, and for user traces,\nwe check for signal frames. In each case, since we\u0027re starting a new\ntrace, we store a PERF_CONTEXT_KERNEL/USER marker so that userspace\nknows that the next three entries are NIP, LR and the second stack frame\nfor the interrupted context.\n\nWe read user memory with __get_user_inatomic. On 64-bit, if this\nPMU interrupt occurred while interrupts are soft-disabled, and\nthere is no MMU hash table entry for the page, we will get an\n-EFAULT return from __get_user_inatomic even if there is a valid\nLinux PTE for the page, since hash_page isn\u0027t reentrant. Thus we\nhave code here to read the Linux PTE and access the page via the\nkernel linear mapping. Since 64-bit doesn\u0027t use (or need) highmem\nthere is no need to do kmap_atomic. On 32-bit, we don\u0027t do soft\ninterrupt disabling, so this complication doesn\u0027t occur and there\nis no need to fall back to reading the Linux PTE, since hash_page\n(or the TLB miss handler) will get called automatically if necessary.\n\nNote that we cannot get PMU interrupts in the interval during\ncontext switch between switch_mm (which switches the user address\nspace) and switch_to (which actually changes current to the new\nprocess). On 64-bit this is because interrupts are hard-disabled\nin switch_mm and stay hard-disabled until they are soft-enabled\nlater, after switch_to has returned. So there is no possibility\nof trying to do a user stack trace when the user address space is\nnot current\u0027s address space.\n\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "9c1e105238c474d19905af504f2e7f42d4f71f9e", "tree": "39406fa1c36e5894f2eb48a7f5fbb787736118a4", "parents": [ "1660e9d3d04b6c636b7171bf6c08ac7b82a7de79" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Aug 17 15:17:54 2009 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Aug 18 14:48:43 2009 +1000" }, "message": "powerpc: Allow perf_counters to access user memory at interrupt time\n\nThis provides a mechanism to allow the perf_counters code to access\nuser memory in a PMU interrupt routine. Such an access can cause\nvarious kinds of interrupt: SLB miss, MMU hash table miss, segment\ntable miss, or TLB miss, depending on the processor. This commit\nonly deals with 64-bit classic/server processors, which use an MMU\nhash table. 32-bit processors are already able to access user memory\nat interrupt time. Since we don\u0027t soft-disable on 32-bit, we avoid\nthe possibility of reentering hash_page or the TLB miss handlers,\nsince they run with interrupts disabled.\n\nOn 64-bit processors, an SLB miss interrupt on a user address will\nupdate the slb_cache and slb_cache_ptr fields in the paca. This is\nOK except in the case where a PMU interrupt occurs in switch_slb,\nwhich also accesses those fields. To prevent this, we hard-disable\ninterrupts in switch_slb. Interrupts are already soft-disabled at\nthis point, and will get hard-enabled when they get soft-enabled\nlater.\n\nThis also reworks slb_flush_and_rebolt: to avoid hard-disabling twice,\nand to make sure that it clears the slb_cache_ptr when called from\nother callers than switch_slb, the existing routine is renamed to\n__slb_flush_and_rebolt, which is called by switch_slb and the new\nversion of slb_flush_and_rebolt.\n\nSimilarly, switch_stab (used on POWER3 and RS64 processors) gets a\nhard_irq_disable() to protect the per-cpu variables used there and\nin ste_allocate.\n\nIf a MMU hashtable miss interrupt occurs, normally we would call\nhash_page to look up the Linux PTE for the address and create a HPTE.\nHowever, hash_page is fairly complex and takes some locks, so to\navoid the possibility of deadlock, we check the preemption count\nto see if we are in a (pseudo-)NMI handler, and if so, we don\u0027t call\nhash_page but instead treat it like a bad access that will get\nreported up through the exception table mechanism. An interrupt\nwhose handler runs even though the interrupt occurred when\nsoft-disabled (such as the PMU interrupt) is considered a pseudo-NMI\nhandler, which should use nmi_enter()/nmi_exit() rather than\nirq_enter()/irq_exit().\n\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "1660e9d3d04b6c636b7171bf6c08ac7b82a7de79", "tree": "9a402e3cbe5613ecb6d8f1ee762dd760ae57a38a", "parents": [ "64f1607ffbbc772685733ea63e6f7f4183df1b16" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Aug 17 14:36:32 2009 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Aug 18 14:48:39 2009 +1000" }, "message": "powerpc/32: Always order writes to halves of 64-bit PTEs\n\nOn 32-bit systems with 64-bit PTEs, the PTEs have to be written in two\n32-bit halves. On SMP we write the higher-order half and then the\nlower-order half, with a write barrier between the two halves, but on\nUP there was no particular ordering of the writes to the two halves.\n\nThis extends the ordering that we already do on SMP to the UP case as\nwell. The reason is that with the perf_counter subsystem potentially\naccessing user memory at interrupt time to get stack traces, we have\nto be careful not to create an incorrect but apparently valid PTE even\non UP.\n\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "df4ecf1524c7793de3121b2d4e5fc6bcc0da3bfb", "tree": "109f3c3379e55948e4dea344a4d0ea59bd321f9d", "parents": [ "c58afec8b2576b121eced7b94eb94eaf4626bacc", "87c62a66edd645a9b1ff1f9b00ab20c5a93d8845" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Aug 17 13:39:52 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Aug 17 13:39:52 2009 -0700" }, "message": "Merge branch \u0027upstream\u0027 of git://ftp.linux-mips.org/pub/scm/upstream-linus\n\n* \u0027upstream\u0027 of git://ftp.linux-mips.org/pub/scm/upstream-linus:\n MIPS: Fix HPAGE_SIZE redefinition\n" }, { "commit": "0f66f96d21b4bbff49baaa337546e687d7c58e87", "tree": "2c14b16a23a8c41fbefc3f0d30e490dacaf4d94d", "parents": [ "894ef820b10d77e2d6d717342fc408bdd9825139", "a2bb9f4d6a5a589b481595207ac3588cc08d1b60" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Aug 17 13:36:39 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Aug 17 13:36:39 2009 -0700" }, "message": "Merge master.kernel.org:/home/rmk/linux-2.6-arm\n\n* master.kernel.org:/home/rmk/linux-2.6-arm: (37 commits)\n ARM: 5673/1: U300 fix initsection compile warning\n ARM: Fix broken highmem support\n mx31moboard: invert sdhc ro signal sense\n ARM: S3C24XX: Fix clkout mpx error\n ARM: S3C64XX: serial: Fix a typo in Kconfig\n IXP4xx: Fix IO_SPACE_LIMIT for 2.6.31-rc core PCI changes\n OMAP3: RX51: Updated rx51_defconfig\n OMAP2/3: mmc-twl4030: Free up MMC regulators while cleaning up\n OMAP3: RX51: Define TWL4030 USB transceiver in board file\n OMAP3: Overo: Fix smsc911x platform device resource value\n OMAP3: Fix omap3 sram virtual addres overlap vmalloc space after increasing vmalloc size\n OMAP2/3: DMA errata correction\n OMAP: Fix testing of cpu defines for mach-omap1\n OMAP3: Overo: add missing pen-down GPIO definition\n OMAP: GPIO: clear/restore level/edge detect settings on mask/unmask\n OMAP3: PM: Fix wrong sequence in suspend.\n OMAP: PM: CPUfreq: obey min/max settings of policy\n OMAP2/3/4: UART: allow in-order port traversal\n OMAP2/3/4: UART: Allow per-UART disabling wakeup for serial ports\n OMAP3: Fixed crash bug with serial + suspend\n ...\n" }, { "commit": "87c62a66edd645a9b1ff1f9b00ab20c5a93d8845", "tree": "7397a79826d6ab5aa0d12f4be1853aa4b10676eb", "parents": [ "a33a052f19a21d727847391c8c1aff3fb221c472" ], "author": { "name": "Atsushi Nemoto", "email": "anemo@mba.ocn.ne.jp", "time": "Tue Jul 14 22:37:09 2009 +0900" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Aug 17 17:27:57 2009 +0100" }, "message": "MIPS: Fix HPAGE_SIZE redefinition\n\nThis patch fixes warnings like this:\n CC fs/proc/meminfo.o\nIn file included from /work/linux/include/linux/mmzone.h:20,\n from /work/linux/include/linux/gfp.h:4,\n from /work/linux/include/linux/mm.h:8,\n from /work/linux/fs/proc/meminfo.c:5:\n/work/linux/arch/mips/include/asm/page.h:36:1: warning: \"HPAGE_SIZE\" redefined\nIn file included from /work/linux/fs/proc/meminfo.c:2:\n/work/linux/include/linux/hugetlb.h:107:1: warning: this is the location of the previous definition\n\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e412cd257e0d51e0ecbb89f50953835b5a0681b2", "tree": "42b67c3a392511b4d2b2e6fc05008566246dc35b", "parents": [ "c7f6fa44115d401e89db730f357629d39f8e4ba6" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Aug 17 10:19:00 2009 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Aug 17 13:28:25 2009 +0200" }, "message": "x86, mce: Don\u0027t initialize MCEs on unknown CPUs\n\nAn older test-box started hanging at the following point during\nbootup:\n\n [ 0.022996] Mount-cache hash table entries: 512\n [ 0.024996] Initializing cgroup subsys debug\n [ 0.025996] Initializing cgroup subsys cpuacct\n [ 0.026995] Initializing cgroup subsys devices\n [ 0.027995] Initializing cgroup subsys freezer\n [ 0.028995] mce: CPU supports 5 MCE banks\n\nI\u0027ve bisected it down to commit 4efc0670 (\"x86, mce: use 64bit\nmachine check code on 32bit\"), which utilizes the MCE code on\n32-bit systems too.\n\nThe problem is caused by this detail in my config:\n\n # CONFIG_CPU_SUP_INTEL is not set\n\nThis disables the quirks in mce_cpu_quirks() but still enables\nMCE support - which then hangs due to the missing quirk\nworkaround needed on this CPU:\n\n\tif (c-\u003ex86 \u003d\u003d 6 \u0026\u0026 c-\u003ex86_model \u003c 0x1A \u0026\u0026 banks \u003e 0)\n\t\tmce_banks[0].init \u003d 0;\n\nThe safe solution is to not initialize MCEs if we dont know on\nwhat CPU we are running (or if that CPU\u0027s support code got\ndisabled in the config).\n\nAlso be a bit more defensive on 32-bit systems: dont do a\nboot-time dump of pending MCEs not just on the specific system\nthat we found a problem with (Pentium-M), but earlier ones as\nwell.\n\nNow this problem is probably not common and disabling CPU\nsupport is rare - but still being more defensive in something\nwe turned on for a wide range of CPUs is prudent.\n\nCc: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nLKML-Reference: Message-ID: \u003c4A88E3E4.40506@jp.fujitsu.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "c7f6fa44115d401e89db730f357629d39f8e4ba6", "tree": "2b2c0c9508b16cd9f85b122355e6a8868f76ca50", "parents": [ "52459ab91363343af8ae252766e9da762344a2e7" ], "author": { "name": "Bartlomiej Zolnierkiewicz", "email": "bzolnier@gmail.com", "time": "Tue Jul 28 23:52:54 2009 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Aug 17 10:17:02 2009 +0200" }, "message": "x86, mce: don\u0027t log boot MCEs on Pentium M (model \u003d\u003d 13) CPUs\n\nOn my legacy Pentium M laptop (Acer Extensa 2900) I get bogus MCE on a cold\nboot with CONFIG_X86_NEW_MCE enabled, i.e. (after decoding it with mcelog):\n\nMCE 0\nHARDWARE ERROR. This is *NOT* a software problem!\nPlease contact your hardware vendor\nCPU 0 BANK 1 MCG status:\nMCi status:\nError overflow\nUncorrected error\nError enabled\nProcessor context corrupt\nMCA: Data CACHE Level-1 UNKNOWN Error\nSTATUS f200000000000195 MCGSTATUS 0\n\n[ The other STATUS values observed: f2000000000001b5 (... UNKNOWN error)\n and f200000000000115 (... READ Error).\n\n To verify that this is not a CONFIG_X86_NEW_MCE bug I also modified\n the CONFIG_X86_OLD_MCE code (which doesn\u0027t log any MCEs) to dump\n content of STATUS MSR before it is cleared during initialization. ]\n\nSince the bogus MCE results in a kernel taint (which in turn disables\nlockdep support) don\u0027t log boot MCEs on Pentium M (model \u003d\u003d 13) CPUs\nby default (\"mce\u003dbootlog\" boot parameter can be be used to get the old\nbehavior).\n\nSigned-off-by: Bartlomiej Zolnierkiewicz \u003cbzolnier@gmail.com\u003e\nReviewed-by: Andi Kleen \u003candi@firstfloor.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "52459ab91363343af8ae252766e9da762344a2e7", "tree": "47c5dc370800b40a6a02bd31881e5f9efff98453", "parents": [ "4e5c25d405e18a2f279ca2bfc855508ec3a0186b" ], "author": { "name": "Leonardo Potenza", "email": "lpotenza@inwind.it", "time": "Sun Aug 16 18:55:48 2009 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sun Aug 16 19:44:13 2009 +0200" }, "message": "x86: Annotate section mismatch warnings in kernel/apic/x2apic_uv_x.c\n\nThe function uv_acpi_madt_oem_check() has been marked __init,\nthe struct apic_x2apic_uv_x has been marked __refdata.\n\nThe aim is to address the following section mismatch messages:\n\nWARNING: arch/x86/kernel/apic/built-in.o(.data+0x1368): Section mismatch in reference from the variable apic_x2apic_uv_x to the function .cpuinit.text:uv_wakeup_secondary()\nThe variable apic_x2apic_uv_x references\nthe function __cpuinit uv_wakeup_secondary()\nIf the reference is valid then annotate the\nvariable with __init* or __refdata (see linux/init.h) or name the variable:\n*driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,\n\nWARNING: arch/x86/kernel/built-in.o(.data+0x68e8): Section mismatch in reference from the variable apic_x2apic_uv_x to the function .cpuinit.text:uv_wakeup_secondary()\nThe variable apic_x2apic_uv_x references\nthe function __cpuinit uv_wakeup_secondary()\nIf the reference is valid then annotate the\nvariable with __init* or __refdata (see linux/init.h) or name the variable:\n*driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,\n\nWARNING: arch/x86/built-in.o(.text+0x7b36f): Section mismatch in reference from the function uv_acpi_madt_oem_check() to the function .init.text:early_ioremap()\nThe function uv_acpi_madt_oem_check() references\nthe function __init early_ioremap().\nThis is often because uv_acpi_madt_oem_check lacks a __init\nannotation or the annotation of early_ioremap is wrong.\n\nWARNING: arch/x86/built-in.o(.text+0x7b38d): Section mismatch in reference from the function uv_acpi_madt_oem_check() to the function .init.text:early_iounmap()\nThe function uv_acpi_madt_oem_check() references\nthe function __init early_iounmap().\nThis is often because uv_acpi_madt_oem_check lacks a __init\nannotation or the annotation of early_iounmap is wrong.\n\nWARNING: arch/x86/built-in.o(.data+0x8668): Section mismatch in reference from the variable apic_x2apic_uv_x to the function .cpuinit.text:uv_wakeup_secondary()\nThe variable apic_x2apic_uv_x references\nthe function __cpuinit uv_wakeup_secondary()\nIf the reference is valid then annotate the\nvariable with __init* or __refdata (see linux/init.h) or name the variable:\n*driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,\n\nSigned-off-by: Leonardo Potenza \u003clpotenza@inwind.it\u003e\nLKML-Reference: \u003c200908161855.48302.lpotenza@inwind.it\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "4e5c25d405e18a2f279ca2bfc855508ec3a0186b", "tree": "ec6a568ca990e65598a5a9bf3bde6af3565d9160", "parents": [ "3ef12c3c97603bad405d30c989718cc9405e2759" ], "author": { "name": "Hugh Dickins", "email": "hugh.dickins@tiscali.co.uk", "time": "Sun Aug 16 15:54:37 2009 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sun Aug 16 17:25:41 2009 +0200" }, "message": "x86, mce: therm_throt: Don\u0027t log redundant normality\n\n0d01f31439c1e4d602bf9fdc924ab66f407f5e38 \"x86, mce: therm_throt\n- change when we print messages\" removed redundant\nannouncements of \"Temperature/speed normal\".\n\nThey\u0027re not worth logging and remove their accompanying\n\"Machine check events logged\" messages as well from the\nconsole.\n\nSigned-off-by: Hugh Dickins \u003chugh.dickins@tiscali.co.uk\u003e\nCc: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nCc: Andi Kleen \u003candi@firstfloor.org\u003e\nCc: Dmitry Torokhov \u003cdtor@mail.ru\u003e\nLKML-Reference: \u003cPine.LNX.4.64.0908161544100.7929@sister.anvils\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "a2bb9f4d6a5a589b481595207ac3588cc08d1b60", "tree": "52b56450a8b81c1517d915828bbaf8b9ccfcd0a4", "parents": [ "824df399a31fe92d88eb8caf86768cc8c7c72a06" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Thu Aug 13 21:57:22 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 15 15:36:52 2009 +0100" }, "message": "ARM: 5673/1: U300 fix initsection compile warning\n\nThe u300_init_check_chip() function was not properly tagged with\nthe __init macro and provided a initsection mismatch on\ncompilation.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "824df399a31fe92d88eb8caf86768cc8c7c72a06", "tree": "f966f72be04d1eb53e17b7866c6f49bf2b7d3b93", "parents": [ "8b6120789598d55f6aa2b4e9ac7e70a205d857da", "48ec45e725aa385d72bced73b267dfaf13351876" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 15 12:43:13 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 15 12:43:13 2009 +0100" }, "message": "Merge branch \u0027s3c-fixes\u0027 of git://aeryn.fluff.org.uk/bjdooks/linux\n" }, { "commit": "8b6120789598d55f6aa2b4e9ac7e70a205d857da", "tree": "25704a4479b7b98b2ef566afe247a6442f9f3d05", "parents": [ "dde5828f56cb2c1aa70365c476e6830482127258", "563abb4be1a79e7b64784d43beb9d0cacb1bad6f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 15 12:42:46 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 15 12:42:46 2009 +0100" }, "message": "Merge branch \u0027for-rmk-rc\u0027 of git://git.pengutronix.de/git/imx/linux-2.6\n" }, { "commit": "dde5828f56cb2c1aa70365c476e6830482127258", "tree": "c5765e13e62d9356a0059d08dba7334202707948", "parents": [ "3b3119fc549c93df60316d28bdd77c2de3986588" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 15 12:36:00 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 15 12:36:00 2009 +0100" }, "message": "ARM: Fix broken highmem support\n\nCurrently, highmem is selectable, and you can request an increased\nvmalloc area. However, none of this has any effect on the memory\nlayout since a patch in the highmem series was accidentally dropped.\nMoreover, even if you did want highmem, all memory would still be\nregistered as lowmem, possibly resulting in overflow of the available\nvirtual mapping space.\n\nThe highmem boundary is determined by the highest allowed beginning\nof the vmalloc area, which depends on its configurable minimum size\n(see commit 60296c71f6c5063e3c1f1d2619ca0b60940162e7 for details on\nthis).\n\nWe should create mappings and initialize bootmem only for low memory,\nwhile the zone allocator must still be told about highmem.\n\nCurrently, memory nodes which are completely located in high memory\nare not supported. This is not a huge limitation since systems\nrelying on highmem support are unlikely to have discontiguous memory\nwith large holes.\n\n[ A similar patch was meant to be merged before commit 5f0fbf9ecaf3\n and be available in Linux v2.6.30, however some git rebase screw-up\n of mine dropped the first commit of the series, and that goofage\n escaped testing somehow as well. -- Nico ]\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nReviewed-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "3ef12c3c97603bad405d30c989718cc9405e2759", "tree": "d971f2f26d36cf4504fe8178312cbb44ad3117d4", "parents": [ "64f1607ffbbc772685733ea63e6f7f4183df1b16" ], "author": { "name": "Cliff Wickman", "email": "cpw@sgi.com", "time": "Fri Aug 14 13:56:37 2009 -0500" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Aug 15 11:58:02 2009 +0200" }, "message": "x86: Fix UV BAU destination subnode id\n\nThe SGI UV Broadcast Assist Unit is used to send TLB shootdown\nmessages to remote nodes of the system. The header of the\nmessage must contain the subnode id of the block in the\nreceiving hub that handles such messages. It should always be\n0x10, the id of the \"LB\" block.\n\nIt had previously been documented as a \"must be zero\" field.\n\nSigned-off-by: Cliff Wickman \u003ccpw@sgi.com\u003e\nAcked-by: Jack Steiner \u003csteiner@sgi.com\u003e\nLKML-Reference: \u003cE1Mc1x7-0005Ce-6t@eag09.americas.sgi.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "237674e050ae8ea40a432412df6c15d60b7ae8a6", "tree": "bfd871566047c1e33870e753444a7b7db2257a38", "parents": [ "9747e78b304b44d6fb73e2c8071406d55aa8bb75" ], "author": { "name": "Magnus Damm", "email": "damm@igel.co.jp", "time": "Sat Aug 15 02:53:42 2009 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Sat Aug 15 12:58:50 2009 +0900" }, "message": "sh: sh7724 ddr self-refresh changes\n\nThis patch updates the SuperH Mobile sleep assembly code with\nsupport for DBSC memory controller found in the sh7724 processor.\n\nWithout this fix the memory hooked up to the sh7724 processor\nwill never enter self-refresh mode before suspending to ram. The\neffect of this is that the memory contents most likeley will be\nlost upon resume which may or may not be what you want.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "9747e78b304b44d6fb73e2c8071406d55aa8bb75", "tree": "22978541da4328c1ce97862243339f3636aff752", "parents": [ "f6431732f128a241b149c0aa85dfec852455ebf9" ], "author": { "name": "Magnus Damm", "email": "damm@igel.co.jp", "time": "Sat Aug 15 02:53:34 2009 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Sat Aug 15 12:58:47 2009 +0900" }, "message": "sh: use in-soc KEYSC on se7724\n\nThis patch updates the Solution Engine 7724 board code to use\nin-SoC KEYSC resources for the keyboard platform device. Using\nthe in-SoC key scan controller fixes a crash-during-resume issue.\n\nWithout this patch the KEYSC hardware block located in the board\nspecific FPGA is used together with an external IRQ which is\nrouted through the FPGA and handled by some board specific demux\ncode. This board specific FPGA interrupt code does not implement\ndesc-\u003eset_wake() so the enable_irq_wake() call in the sh_keysc\ndriver will fail at suspend-to-ram time and the disable_irq_wake()\nwill bomb out when resuming.\n\nChanging the platform data to use the in-SoC KEYSC hardware makes\nthe se7724 board support code less special which is a good thing.\nAlso, the board specific KEYSC pin setup code selects in-SoC pin\nfunctions already which makes the current FPGA platform device data\nlook like a typo.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "563abb4be1a79e7b64784d43beb9d0cacb1bad6f", "tree": "d52d6d8ea651a65409b894821d2380e03954f2d2", "parents": [ "ff46a474ca2566d79e8d7454442b56d82bce37c1" ], "author": { "name": "Valentin Longchamp", "email": "valentin.longchamp@epfl.ch", "time": "Tue Aug 11 17:29:21 2009 +0200" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Fri Aug 14 12:33:23 2009 +0200" }, "message": "mx31moboard: invert sdhc ro signal sense\n\nSmall confusion with our hardware engineer, the WP signal (RO) is\nactive low on our boards, the signal has to inverted.\n\nThis is a pretty straightforward patch, it could even go to -rc,\nbut if not, then push it for 2.6.32.\n\nSigned-off-by: Valentin Longchamp \u003cvalentin.longchamp@epfl.ch\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "74d46d6b2d23d44d72c37df4c6a5d2e782f7b088", "tree": "bcc468968e738394b9c4a44b8936a0e6037be163", "parents": [ "d6647bdf98a0de19963de8d5d9698d469ed72097" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Jul 21 17:11:50 2009 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Fri Aug 14 13:20:53 2009 +0900" }, "message": "percpu, sparc64: fix sparse possible cpu map handling\n\npercpu code has been assuming num_possible_cpus() \u003d\u003d nr_cpu_ids which\nis incorrect if cpu_possible_map contains holes. This causes percpu\ncode to access beyond allocated memories and vmalloc areas. On a\nsparc64 machine with cpus 0 and 2 (u60), this triggers the following\nwarning or fails boot.\n\n WARNING: at /devel/tj/os/work/mm/vmalloc.c:106 vmap_page_range_noflush+0x1f0/0x240()\n Modules linked in:\n Call Trace:\n [00000000004b17d0] vmap_page_range_noflush+0x1f0/0x240\n [00000000004b1840] map_vm_area+0x20/0x60\n [00000000004b1950] __vmalloc_area_node+0xd0/0x160\n [0000000000593434] deflate_init+0x14/0xe0\n [0000000000583b94] __crypto_alloc_tfm+0xd4/0x1e0\n [00000000005844f0] crypto_alloc_base+0x50/0xa0\n [000000000058b898] alg_test_comp+0x18/0x80\n [000000000058dad4] alg_test+0x54/0x180\n [000000000058af00] cryptomgr_test+0x40/0x60\n [0000000000473098] kthread+0x58/0x80\n [000000000042b590] kernel_thread+0x30/0x60\n [0000000000472fd0] kthreadd+0xf0/0x160\n ---[ end trace 429b268a213317ba ]---\n\nThis patch fixes generic percpu functions and sparc64\nsetup_per_cpu_areas() so that they handle sparse cpu_possible_map\nproperly.\n\nPlease note that on x86, cpu_possible_map() doesn\u0027t contain holes and\nthus num_possible_cpus() \u003d\u003d nr_cpu_ids and this patch doesn\u0027t cause\nany behavior difference.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "48ec45e725aa385d72bced73b267dfaf13351876", "tree": "fe80cfd6e3d22d616124c7b59dba627cfaaac6f2", "parents": [ "a219dc4d4463809b1be473038e7d9f3437ca452d" ], "author": { "name": "Davide Rizzo", "email": "elpa.rizzo@gmail.com", "time": "Thu Aug 13 11:53:53 2009 +0200" }, "committer": { "name": "Ben Dooks", "email": "ben-linux@fluff.org", "time": "Fri Aug 14 00:45:49 2009 +0100" }, "message": "ARM: S3C24XX: Fix clkout mpx error\n\nBug correction: CLK Outputs cannot have XTAL as parent\n\nSigned-off-by: Davide Rizzo \u003celpa.rizzo@gmail.com\u003e\n[ben-linux@fluff.org: updated patch subject]\nSigned-off-by: Ben Dooks \u003cben-linux@fluff.org\u003e\n" }, { "commit": "3493e84de60590d3012139187f631f2dfbf0887f", "tree": "c7a994c2e6f0d06b5044ea0b322e5ff0cc0b4a63", "parents": [ "919aa96a9cfc5071f037bf58718e05335562a6ac", "94d5d1b2d891f1fd5205f978246b7864d998b25c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Aug 13 12:24:33 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Aug 13 12:24:33 2009 -0700" }, "message": "Merge branch \u0027perfcounters-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perfcounters-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n perf_counter: Report the cloning task as parent on perf_counter_fork()\n perf_counter: Fix an ipi-deadlock\n perf: Rework/fix the whole read vs group stuff\n perf_counter: Fix swcounter context invariance\n perf report: Don\u0027t show unresolved DSOs and symbols when -S/-d is used\n perf tools: Add a general option to enable raw sample records\n perf tools: Add a per tracepoint counter attribute to get raw sample\n perf_counter: Provide hw_perf_counter_setup_online() APIs\n perf list: Fix large list output by using the pager\n perf_counter, x86: Fix/improve apic fallback\n perf record: Add missing -C option support for specifying profile cpu\n perf tools: Fix dso__new handle() to handle deleted DSOs\n perf tools: Fix fallback to cplus_demangle() when bfd_demangle() is not available\n perf report: Show the tid too in -D\n perf record: Fix .tid and .pid fill-in when synthesizing events\n perf_counter, x86: Fix generic cache events on P6-mobile CPUs\n perf_counter, x86: Fix lapic printk message\n" } ], "next": "1c2ffff407140adf75bb72ae375688480793a228" }