)]}' { "log": [ { "commit": "687d680985b1438360a9ba470ece8b57cd205c3b", "tree": "ae253608531e5c3e823600974c610e722e7de759", "parents": [ "1053414068bad659479e6efa62a67403b8b1ec0a", "008fe148cb0fb51d266baabe2c09997b21cf90c6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jun 22 21:38:22 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jun 22 21:38:22 2009 -0700" }, "message": "Merge git://git.infradead.org/~dwmw2/iommu-2.6.31\n\n* git://git.infradead.org/~dwmw2/iommu-2.6.31:\n intel-iommu: Fix one last ia64 build problem in Pass Through Support\n VT-d: support the device IOTLB\n VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps\n VT-d: add device IOTLB invalidation support\n VT-d: parse ATSR in DMA Remapping Reporting Structure\n PCI: handle Virtual Function ATS enabling\n PCI: support the ATS capability\n intel-iommu: dmar_set_interrupt return error value\n intel-iommu: Tidy up iommu-\u003egcmd handling\n intel-iommu: Fix tiny theoretical race in write-buffer flush.\n intel-iommu: Clean up handling of \"caching mode\" vs. IOTLB flushing.\n intel-iommu: Clean up handling of \"caching mode\" vs. context flushing.\n VT-d: fix invalid domain id for KVM context flush\n Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through Support\n Intel IOMMU Pass Through Support\n\nFix up trivial conflicts in drivers/pci/{intel-iommu.c,intr_remapping.c}\n" }, { "commit": "59ef7a83f1127038a433464597df02e2dc9540e7", "tree": "725d262fc2e68eb9c592d76265f878cec73f8f2d", "parents": [ "5165aece0efac6574fc3e32b6f1c2a964820d1c6", "2af5066f664cb011cf17d2e4414491fe24597e07" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jun 22 11:59:51 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jun 22 11:59:51 2009 -0700" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (74 commits)\n PCI: make msi_free_irqs() to use msix_mask_irq() instead of open coded write\n PCI: Fix the NIU MSI-X problem in a better way\n PCI ASPM: remove get_root_port_link\n PCI ASPM: cleanup pcie_aspm_sanity_check\n PCI ASPM: remove has_switch field\n PCI ASPM: cleanup calc_Lx_latency\n PCI ASPM: cleanup pcie_aspm_get_cap_device\n PCI ASPM: cleanup clkpm checks\n PCI ASPM: cleanup __pcie_aspm_check_state_one\n PCI ASPM: cleanup initialization\n PCI ASPM: cleanup change input argument of aspm functions\n PCI ASPM: cleanup misc in struct pcie_link_state\n PCI ASPM: cleanup clkpm state in struct pcie_link_state\n PCI ASPM: cleanup latency field in struct pcie_link_state\n PCI ASPM: cleanup aspm state field in struct pcie_link_state\n PCI ASPM: fix typo in struct pcie_link_state\n PCI: drivers/pci/slot.c should depend on CONFIG_SYSFS\n PCI: remove redundant __msi_set_enable()\n PCI PM: consistently use type bool for wake enable variable\n x86/ACPI: Correct maximum allowed _CRS returned resources and warn if exceeded\n ...\n" }, { "commit": "7d9a73f6dcf4390d256bf19330c81e91523a26d5", "tree": "dddaeb3e6a1f5d5dd8d1b96ed6105566b69a3b21", "parents": [ "f9cde5ffed17bf74f6bef042d99edb0622f58576" ], "author": { "name": "Frans Pop", "email": "elendil@planet.nl", "time": "Wed Jun 17 00:16:15 2009 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 16 15:19:02 2009 -0700" }, "message": "PCI PM: consistently use type bool for wake enable variable\n\nOther functions use type bool, so use that for pci_enable_wake as well.\n\nSigned-off-by: Frans Pop \u003celendil@planet.nl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "8c1c699fec9e9021bf6ff0285dee086bb27aec90", "tree": "4af7bd96c1b651633ff7b6721959aeacd120e4ee", "parents": [ "c465def6bfe834b62623caa9b98f2d4f4739875a" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Sat Jun 13 15:52:13 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 16 14:30:15 2009 -0700" }, "message": "PCI: cleanup Function Level Reset\n\nThis patch enhances the FLR functions:\n 1) remove disable_irq() so the shared IRQ won\u0027t be disabled.\n 2) replace the 1s wait with 100, 200 and 400ms wait intervals\n for the Pending Transaction.\n 3) replace mdelay() with msleep().\n 4) add might_sleep().\n 5) lock the device to prevent PM suspend from accessing the CSRs\n during the reset.\n 6) coding style fixes.\n\nReviewed-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "70298c6e6c1ba68346336b4ea54bd5c0abbf73c8", "tree": "363d0a784d8a28688c0fda006279563a7fd3629b", "parents": [ "a6c0d5c6ebb3d988b1f18a1612b5188f3f555637" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Tue Jun 16 13:34:38 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 16 14:30:13 2009 -0700" }, "message": "PCI AER: support Multiple Error Received and no error source id\n\nBased on PCI Express AER specs, a root port might receive multiple\nTLP errors while it could only save a correctable error source id\nand an uncorrectable error source id at the same time. In addition,\nsome root port hardware might be unable to provide a correct source\nid, i.e., the source id, or the bus id part of the source id provided\nby root port might be equal to 0.\n\nThe patchset implements the support in kernel by searching the device\ntree under the root port.\n\nPatch 1 changes parameter cb of function pci_walk_bus to return a value.\nWhen cb return non-zero, pci_walk_bus stops more searching on the\ndevice tree.\n\nReviewed-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Zhang Yanmin \u003cyanmin_zhang@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c825bc94c8c1908750ab20413eb639c6be029e2d", "tree": "6e5800fe52e0f94f42fdcd4c327b8cfaf803978a", "parents": [ "498a8faf2c7eb974f70b7c5a60a31f0d48c35d44" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Tue Jun 16 11:01:25 2009 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 16 14:30:11 2009 -0700" }, "message": "PCI hotplug: create symlink to hotplug driver module\n\nCreate symbolic link to hotplug driver module in the PCI slot\ndirectory (/sys/bus/pci/slots/\u003cSLOT#\u003e). In the past, we need to load\nhotplug drivers one by one to identify the hotplug driver that handles\nthe slot, and it was very inconvenient especially for trouble shooting.\nWith this change, we can easily identify the hotplug driver.\n\nSigned-off-by: Taku Izumi \u003cizumi.taku@jp.fujitsu.com\u003e\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a72b46c3849cdb05993015991bde548ab8b6d7ac", "tree": "a782d4ab9c217792c9a8cefe48db9aebc0734dbe", "parents": [ "1eb3948716f68bdb71509d0175765295f1aca23d" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Fri Apr 24 10:45:17 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 16 14:29:33 2009 -0700" }, "message": "PCI: Add pci_bus_set_ops\n\npci_bus_set_ops changes pci_ops associated with a pci_bus. This can be\nused by debug tools such as PCIE AER error injection to fake some PCI\nconfiguration registers.\n\nAcked-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "00240c3839d843ccf07abd52806f421f7b87bbdc", "tree": "4ad3a8c543a7a3de0893b1289086e62fffb98bc6", "parents": [ "604eb89ffed9fba268582dc44d5b462ea94cc0ca" ], "author": { "name": "Alan Stern", "email": "stern@rowland.harvard.edu", "time": "Mon Apr 27 13:33:16 2009 -0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 15 21:44:44 2009 -0700" }, "message": "PCI: add power-state name strings\n\nThis patch (as1235) adds an array of PCI power-state names, together\nwith a simple inline accessor routine.\n\nSigned-off-by: Alan Stern \u003cstern@rowland.harvard.edu\u003e\nAcked-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "43c16408842b0eeb367c23a6fa540ce69f99e347", "tree": "25be054b280b430b8bb00ff5f9c1f422bc21a3a0", "parents": [ "f62795f1e892ca9269849fa83de97621da7e02c0" ], "author": { "name": "Andrew Patterson", "email": "andrew.patterson@hp.com", "time": "Wed Apr 22 16:52:09 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Jun 11 12:04:21 2009 -0700" }, "message": "PCI: Add support for turning PCIe ECRC on or off\n\nAdds support for PCI Express transaction layer end-to-end CRC checking\n(ECRC). This patch will enable/disable ECRC checking by setting/clearing\nthe ECRC Check Enable and/or ECRC Generation Enable bits for devices that\nsupport ECRC.\n\nThe ECRC setting is controlled by the \"pci\u003decrc\u003d\u003cpolicy\u003e\" command-line\noption. If this option is not set or is set to \u0027bios\", the enable and\ngeneration bits are left in whatever state that firmware/BIOS set them to.\nThe \"off\" setting turns them off, and the \"on\" option turns them on (if the\ndevice supports it).\n\nTurning ECRC on or off can be a data integrity versus performance\ntradeoff. In theory, turning it on will catch more data errors, turning\nit off means possibly better performance since CRC does not need to be\ncalculated by the PCIe hardware and packet sizes are reduced.\n\nSigned-off-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3b073eda9557975a87a27b08a46a545fe8da66fb", "tree": "11fe4c053294f5ed8343258e113d91ff49435e9c", "parents": [ "12a9da0fcb147b46de33bb919b1de2bb92c9e2a9" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Tue Mar 31 09:24:22 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Jun 11 12:04:16 2009 -0700" }, "message": "PCI: remove deprecated pci_find_slot() interface\n\nThe last in-tree caller of pci_find_slot has been converted, so\nlet\u0027s get rid of this deprecated interface.\n\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1f82de10d6b1d845155363c895c552e61b36b51a", "tree": "3e93b9d1c97ae48509133fbbec9c81b4823816a5", "parents": [ "67b5db6502ddd27d65dea43bf036abbd82d0dfc9" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Apr 23 20:48:32 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Jun 11 12:04:06 2009 -0700" }, "message": "PCI/x86: don\u0027t assume prefetchable ranges are 64bit\n\nWe should not assign 64bit ranges to PCI devices that only take 32bit\nprefetchable addresses.\n\nTry to set IORESOURCE_MEM_64 in 64bit resource of pci_device/pci_bridge\nand make the bus resource only have that bit set when all devices under\nit support 64bit prefetchable memory. Use that flag to allocate\nresources from that range.\n\nReported-by: Yannick \u003cyannick.roehlly@free.fr\u003e\nReviewed-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "302b4215daa0a704c843da40fd2529e5757a72da", "tree": "1bc40108fceafd3fbc9faee38c971fa94d560b13", "parents": [ "dd7264355a203c3456dbba04db471947d3b55e7e" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Mon May 18 13:51:32 2009 +0800" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon May 18 11:25:54 2009 +0100" }, "message": "PCI: support the ATS capability\n\nThe PCIe ATS capability makes the Endpoint be able to request the\nDMA address translation from the IOMMU and cache the translation\nin the device side, thus alleviate IOMMU pressure and improve the\nhardware performance in the I/O virtualization environment.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "296ccb086dfb89b5b8d73ef08c795ffdff12a597", "tree": "8c4ef0f0271e448b6843811a1bcded8c47c005a1", "parents": [ "7eb93b175d4de9438a4b0af3a94a112cb5266944" ], "author": { "name": "Yuji Shimada", "email": "shimada-yxb@necst.nec.co.jp", "time": "Fri Apr 03 16:41:46 2009 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Apr 06 11:25:06 2009 -0700" }, "message": "PCI: Setup disabled bridges even if buses are added\n\nThis patch sets up disabled bridges even if buses have already been\nadded.\n\npci_assign_unassigned_resources is called after buses are added.\npci_assign_unassigned_resources calls pci_bus_assign_resources.\npci_bus_assign_resources calls pci_setup_bridge to configure BARs of\nbridges.\n\nCurrently pci_setup_bridge returns immediately if the bus have already\nbeen added. So pci_assign_unassigned_resources can\u0027t configure BARs of\nbridges that were added in a disabled state; this patch fixes the issue.\n\nOn logical hot-add, we need to prevent the kernel from re-initializing\nbridges that have already been initialized. To achieve this,\npci_setup_bridge returns immediately if the bridge have already been\nenabled.\n\nWe don\u0027t need to check whether the specified bus is a root bus or not.\npci_setup_bridge is not called on a root bus, because a root bus does\nnot have a bridge.\n\nThe patch adds a new helper function, pci_is_enabled. I made the\nfunction name similar to pci_is_managed. The codes which use\nenable_cnt directly are changed to use pci_is_enabled.\n\nAcked-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Yuji Shimada \u003cshimada-yxb@necst.nec.co.jp\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "e76e5b2c663ac74ae6a542ac20795c625e36a5cd", "tree": "2e7271be1f3a26832f4b121839fc4044fbbf27a6", "parents": [ "32527bc0e4b4fa7711ad1c923cf64ae72a7ffd9d", "eeafda70bf2807544e96fa4e52b2433cd470ff46" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 01 09:47:12 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 01 09:47:12 2009 -0700" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (88 commits)\n PCI: fix HT MSI mapping fix\n PCI: don\u0027t enable too much HT MSI mapping\n x86/PCI: make pci\u003dlastbus\u003d255 work when acpi is on\n PCI: save and restore PCIe 2.0 registers\n PCI: update fakephp for bus_id removal\n PCI: fix kernel oops on bridge removal\n PCI: fix conflict between SR-IOV and config space sizing\n powerpc/PCI: include pci.h in powerpc MSI implementation\n PCI Hotplug: schedule fakephp for feature removal\n PCI Hotplug: rename legacy_fakephp to fakephp\n PCI Hotplug: restore fakephp interface with complete reimplementation\n PCI: Introduce /sys/bus/pci/devices/.../rescan\n PCI: Introduce /sys/bus/pci/devices/.../remove\n PCI: Introduce /sys/bus/pci/rescan\n PCI: Introduce pci_rescan_bus()\n PCI: do not enable bridges more than once\n PCI: do not initialize bridges more than once\n PCI: always scan child buses\n PCI: pci_scan_slot() returns newly found devices\n PCI: don\u0027t scan existing devices\n ...\n\nFix trivial append-only conflict in Documentation/feature-removal-schedule.txt\n" }, { "commit": "0e5dd46b761195356065a30611f265adec286d0d", "tree": "4ca10dac14ac44789a51048c4ceb3989be175f63", "parents": [ "931ff68a5a53fa84bcdf9b1b179a80e54e034bd0" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Thu Mar 26 22:51:40 2009 +0100" }, "committer": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Mar 30 21:46:56 2009 +0200" }, "message": "PCI PM: Introduce __pci_[start|complete]_power_transition() (rev. 2)\n\nThe radeonfb driver needs to program the device\u0027s PMCSR directly due\nto some quirky hardware it has to handle (see\nhttp://bugzilla.kernel.org/show_bug.cgi?id\u003d12846 for details) and\nafter doing that it needs to call the platform (usually ACPI) to\nfinish the power transition of the device. Currently it uses\npci_set_power_state() for this purpose, however making a specific\nassumption about the internal behavior of this function, which has\nchanged recently so that this assumption is no longer satisfied.\nFor this reason, introduce __pci_complete_power_transition() that may\nbe called by the radeonfb driver to complete the power transition of\nthe device. For symmetry, introduce __pci_start_power_transition().\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3ed4fd96b3188406ac5357d9290bcffa08c65cf6", "tree": "1e48401b56c35554e84c8d627c6c04e83a999a9e", "parents": [ "9dd90cafa7a712d283e2e0c625b022e19f746762" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Fri Mar 20 14:56:25 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 14:57:44 2009 -0700" }, "message": "PCI: Introduce pci_rescan_bus()\n\nThis API is used by the PCI core to rescan a bus and rediscover\nnewly added devices.\n\nOver time, it is expected that the various PCI hotplug drivers\nwill migrate to this interface and away from the old\npci_do_scan_bus() interface.\n\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "79af72d716cf1bb13b175429cf181a6c4d063ee8", "tree": "2665c3e34983c8bcaf5fec76480fda163a88b045", "parents": [ "068258bc15439c11a966e873f931cc8e513dca61" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Fri Mar 20 14:55:55 2009 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 14:56:36 2009 -0700" }, "message": "PCI: pci_is_root_bus helper\n\nIntroduce pci_is_root_bus helper function. This will help make code\nmore consistent, as well as prevent incorrect assumptions (such as\npci_bus-\u003eself \u003d\u003d NULL on a root bus, which is not always true).\n\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "74bb1bcc7dbbc9ddef773bf3395d7ff92aaaad2e", "tree": "38dd25aed251b00a4b34612320beb64f4a058814", "parents": [ "dd7cc44d0bcec5e9c42fe52e88dc254ae62eac8d" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Fri Mar 20 11:25:16 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 10:48:28 2009 -0700" }, "message": "PCI: handle SR-IOV Virtual Function Migration\n\nAdd or remove a Virtual Function after receiving a Migrate In or Out\nRequest.\n\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "dd7cc44d0bcec5e9c42fe52e88dc254ae62eac8d", "tree": "742b2c903580eded1e352988b068c0362eccc634", "parents": [ "480b93b7837fb3cf0579a42f4953ac463a5b9e1e" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Fri Mar 20 11:25:15 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 10:48:26 2009 -0700" }, "message": "PCI: add SR-IOV API for Physical Function driver\n\nAdd or remove the Virtual Function when the SR-IOV is enabled or\ndisabled by the device driver. This can happen anytime rather than\nonly at the device probe stage.\n\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d1b054da8f599905f3c18a218961dcf17f9d5f13", "tree": "99b62e6771c3b73142dd0622463bed0e19724342", "parents": [ "8293b0f629095efbe7c7e3f9b437f8c040c19eb5" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Fri Mar 20 11:25:11 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 10:48:22 2009 -0700" }, "message": "PCI: initialize and release SR-IOV capability\n\nIf a device has the SR-IOV capability, initialize it (set the ARI\nCapable Hierarchy in the lowest numbered PF if necessary; calculate\nthe System Page Size for the VF MMIO, probe the VF Offset, Stride\nand BARs). A lock for the VF bus allocation is also initialized if\na PF is the lowest numbered PF.\n\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1c8d7b0a562da06d3ebe83f01b1ed553205d1ae4", "tree": "79c84432f5aed5a08b3bef262a10d933daae6a9b", "parents": [ "f2440d9acbe866b917b16cc0f927366341ce9215" ], "author": { "name": "Matthew Wilcox", "email": "willy@linux.intel.com", "time": "Tue Mar 17 08:54:10 2009 -0400" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Mar 20 10:48:14 2009 -0700" }, "message": "PCI MSI: Add support for multiple MSI\n\nAdd the new API pci_enable_msi_block() to allow drivers to\nrequest multiple MSI and reimplement pci_enable_msi in terms of\npci_enable_msi_block. Ensure that the architecture back ends don\u0027t\nhave to know about multiple MSI.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ea7415512a07add2b09c070c9a5d1950833cf9b3", "tree": "1c0d7468f57d38f74f4649cb9f4655b1937cf2a0", "parents": [ "c48f1670f42b71f39f4a3bfba01ffb691cc9206c" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Wed Feb 18 10:44:29 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Thu Mar 19 19:29:35 2009 -0700" }, "message": "PCI: constify pci_bus_assign_resources()\n\ndrivers/pci/hotplug/fakephp.c: In function \u0027pci_rescan_bus\u0027:\ndrivers/pci/hotplug/fakephp.c:271: warning: passing argument 1 of \u0027pci_bus_assign_resources\u0027 discards qualifiers from pointer target type\n\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c48f1670f42b71f39f4a3bfba01ffb691cc9206c", "tree": "a407190fd3141b9d0bbb4a861f334f0bb4be6143", "parents": [ "b5fbf53324f65646154e172af350674d5a2a1629" ], "author": { "name": "akpm@linux-foundation.org", "email": "akpm@linux-foundation.org", "time": "Tue Feb 03 15:45:26 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Thu Mar 19 19:29:35 2009 -0700" }, "message": "PCI: constify pci_bus_add_devices()\n\ndrivers/pci/hotplug/fakephp.c:283: warning: passing argument 1 of \u0027pci_bus_add_devices\u0027 discards qualifiers from pointer target type\n\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a52e2e3513d4beafe8fe8699f1519b021c2d05ba", "tree": "4a2aea26275e0ffe58e53629e50696b559b8c6e0", "parents": [ "a447b772826fde2a3abfd9bb943dee8750994c55" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Sat Jan 24 00:21:14 2009 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Thu Mar 19 19:29:25 2009 -0700" }, "message": "PCI/MSI: Introduce pci_msix_table_size()\n\nIntroduce new function pci_msix_table_size() returning the size of\nthe MSI-X table of given PCI device or 0 if the device doesn\u0027t\nsupport MSI-X.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nReviewed-by: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "97c44836cdec1ea713a15d84098a1a908157e68f", "tree": "bc544c64ed8eeb3feb2f0b210ae7db04a40e1bae", "parents": [ "3419c75e15f82c3ab09bd944fddbde72c9e4b3ea" ], "author": { "name": "Timothy S. Nelson", "email": "wayland@wayland.id.au", "time": "Fri Jan 30 06:12:47 2009 +1100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Feb 04 16:58:41 2009 -0800" }, "message": "PCI: return error on failure to read PCI ROMs\n\nThis patch makes the ROM reading code return an error to user space if\nthe size of the ROM read is equal to 0.\n\nThe patch also emits a warnings if the contents of the ROM are invalid,\nand documents the effects of the \"enable\" file on ROM reading.\n\nSigned-off-by: Timothy S. Nelson \u003cwayland@wayland.id.au\u003e\nAcked-by: Alex Villacis-Lasso \u003ca_villacis@palosanto.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "aa8c6c93747f7b55fa11e1624fec8ca33763a805", "tree": "e40bf643ec9916dd2738ef9aaafdfa49ad8b4781", "parents": [ "0db29af1e767464d71b89410d61a1e5b668d0370" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Fri Jan 16 21:54:43 2009 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 16 12:57:58 2009 -0800" }, "message": "PCI PM: Restore standard config registers of all devices early\n\nThere is a problem in our handling of suspend-resume of PCI devices that\nmany of them have their standard config registers restored with\ninterrupts enabled and they are put into the full power state with\ninterrupts enabled as well. This may lead to the following scenario:\n * an interrupt vector is shared between two or more devices\n * one device is resumed earlier and generates an interrupt\n * the interrupt handler of another device tries to handle it and\n attempts to access the device the config space of which hasn\u0027t been\n restored yet and/or which still is in a low power state\n * the system crashes as a result\n\nTo prevent this from happening we should restore the standard\nconfiguration registers of all devices with interrupts disabled and we\nshould put them into the D0 power state right after that.\nUnfortunately, this cannot be done using the existing\npci_set_power_state(), because it can sleep. Also, to do it we have to\nmake sure that the config spaces of all devices were actually saved\nduring suspend.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "16cf0ebc35dd63f72628ba1246132a6fd17bced2", "tree": "502bfcaac930695eb7f4ff8d7748f913b9accb83", "parents": [ "ef1bba28bfe68ef3c0488feeaabd3e8bc523130c" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Jan 05 14:50:27 2009 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:25 2009 -0800" }, "message": "x86/PCI: Do not use interrupt links for devices using MSI-X\n\npcibios_enable_device() and pcibios_disable_device() don\u0027t handle\nIRQs for devices that have MSI enabled and it should treat the\ndevices with MSI-X enabled in the same way.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6a479079c07211bf348ac8a79754f26bea258f26", "tree": "1587c0ed9446c7d0d6ab8a38d1524132e2faae35", "parents": [ "b8d9cb2a2226118fd71f657c80b06b670a653022" ], "author": { "name": "Ben Hutchings", "email": "bhutchings@solarflare.com", "time": "Tue Dec 23 03:08:29 2008 +0000" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:23 2009 -0800" }, "message": "PCI: Add pci_clear_master() as opposite of pci_set_master()\n\nDuring an online device reset it may be useful to disable bus-mastering.\npci_disable_device() does that, and far more besides, so is not suitable\nfor an online reset.\n\nAdd pci_clear_master() which does just this.\n\nSigned-off-by: Ben Hutchings \u003cbhutchings@solarflare.com\u003e\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "db5679437a2b938c9127480a3923633721583a4f", "tree": "b2625345baa35490104b81fc1c7bd8ef6bb74100", "parents": [ "287d19ce2e67c15e79a187b3bdcbbea1a0a51a7d" ], "author": { "name": "Stephen Hemminger", "email": "shemminger@vyatta.com", "time": "Thu Dec 18 09:17:16 2008 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:18 2009 -0800" }, "message": "PCI: add interface to set visible size of VPD\n\nThe VPD on all devices may not be 32K. Unfortunately, there is no\ngeneric way to find the size, so this adds a simple API hook\nto reset it.\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "287d19ce2e67c15e79a187b3bdcbbea1a0a51a7d", "tree": "128d9c67557a4fe5e5e910b8ca2d50aedee31b7c", "parents": [ "1120f8b8169fb2cb51219d326892d963e762edb6" ], "author": { "name": "Stephen Hemminger", "email": "shemminger@vyatta.com", "time": "Thu Dec 18 09:17:16 2008 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:17 2009 -0800" }, "message": "PCI: revise VPD access interface\n\nChange PCI VPD API which was only used by sysfs to something usable\nin drivers.\n * move iteration over multiple words to the low level\n * use conventional types for arguments\n * add exportable wrapper\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "68feac87de15edfc2c700d2d81b814288c93d003", "tree": "97ee9f0dc3ee3728aca7d5a252eda6a1cb633430", "parents": [ "e8c331e963c58b83db24b7d0e39e8c07f687dbc6" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Dec 16 21:36:55 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:12 2009 -0800" }, "message": "PCI: add pci_common_swizzle() for INTx swizzling\n\nThis patch adds pci_common_swizzle(), which swizzles INTx values all the\nway up to a root bridge.\n\nThis common implementation can replace several architecture-specific\nones. This should someday be combined with pci_get_interrupt_pin(),\nbut I left it separate for now to make reviewing easier.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "fde09c6d8f92de0c9f75698a75f0989f2234c517", "tree": "7d01ac3c194e87897185a2bf015f6d3b472e7601", "parents": [ "14add80b5120966fe0659d61815b9e9b4b68fdc5" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Sat Nov 22 02:39:32 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:01 2009 -0800" }, "message": "PCI: define PCI resource names in an \u0027enum\u0027\n\nThis patch moves all definitions of the PCI resource names to an \u0027enum\u0027,\nand also replaces some hard-coded resource variables with symbol\nnames. This change eases introduction of device specific resources.\n\nReviewed-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "14add80b5120966fe0659d61815b9e9b4b68fdc5", "tree": "7f803ec36d14e76fb0bc672717bd0dd3dea30a08", "parents": [ "6a49d8120021897e139641062236215aac5d220e" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Sat Nov 22 02:38:52 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:13:00 2009 -0800" }, "message": "PCI: remove unnecessary arg of pci_update_resource()\n\nThis cleanup removes unnecessary argument \u0027struct resource *res\u0027 in\npci_update_resource(), so it takes same arguments as other companion\nfunctions (pci_assign_resource(), etc.).\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1684f5ddd4c0c754f52c78eaa2c5c69ad09fb18c", "tree": "1085974a81fba002bcc05cdd88a11134ec13799c", "parents": [ "bebd590ca27e80ffe3129ab4f0a3124f0a340f43" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Mon Dec 01 14:30:30 2008 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:57 2009 -0800" }, "message": "PCI: uninline pci_ioremap_bar()\n\nIt\u0027s too large to be inlined.\n\nAcked-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "57c2cf71c12318b72ebaa5720d210476b6bac4d4", "tree": "ba071276800dc24d9232fd124c4678b2a86f86b5", "parents": [ "12b955ff63db0b75cfc2d4939696c57b31891ec6" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Thu Dec 11 11:24:23 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:50 2009 -0800" }, "message": "PCI: add pci_swizzle_interrupt_pin()\n\nThis patch adds pci_swizzle_interrupt_pin(), which implements the\nINTx swizzling algorithm specified in Table 9-1 of the \"PCI-to-PCI\nBridge Architecture Specification,\" revision 1.2.\n\nThere are many architecture-specific implementations of this\nswizzle that can be replaced by this common one.\n\nReviewed-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "e8de1481fd7126ee9e93d6889da6f00c05e1e019", "tree": "3e0e564f6aff2f8f0f66bdf37dc2eb87d6e17cde", "parents": [ "23616941914917cf25b94789856b5326b68d8ee8" ], "author": { "name": "Arjan van de Ven", "email": "arjan@linux.intel.com", "time": "Wed Oct 22 19:55:31 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:32 2009 -0800" }, "message": "resource: allow MMIO exclusivity for device drivers\n\nDevice drivers that use pci_request_regions() (and similar APIs) have a\nreasonable expectation that they are the only ones accessing their device.\nAs part of the e1000e hunt, we were afraid that some userland (X or some\nbootsplash stuff) was mapping the MMIO region that the driver thought it\nhad exclusively via /dev/mem or via various sysfs resource mappings.\n\nThis patch adds the option for device drivers to cause their reserved\nregions to the \"banned from /dev/mem use\" list, so now both kernel memory\nand device-exclusive MMIO regions are banned.\nNOTE: This is only active when CONFIG_STRICT_DEVMEM is set.\n\nIn addition to the config option, a kernel parameter iomem\u003drelaxed is\nprovided for the cases where developers want to diagnose, in the field,\ndrivers issues from userspace.\n\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "07ae95f988a34465bdcb384bfa73c03424fe2312", "tree": "4e1901b7fd2ccfdb85a92953c0010a4d3900a3f8", "parents": [ "eb9188bdb9d65aeead2382ec3dd656a17ec8936d" ], "author": { "name": "Andrew Patterson", "email": "andrew.patterson@hp.com", "time": "Mon Nov 10 15:31:05 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:31 2009 -0800" }, "message": "ACPI/PCI: PCI MSI _OSC support capabilities called when root bridge added\n\nThe _OSC capability OSC_MSI_SUPPORT is set when the root bridge is added\nwith pci_acpi_osc_support(), so we no longer need to do it in the PCI\nMSI driver. Also adds the function pci_msi_enabled, which returns true\nif pci\u003dnomsi is not on the kernel command-line.\n\nSigned-off-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3e1b16002af29758b6bc9c38939d43838d9335bc", "tree": "6782f844e3813355280ad3367c58d90d576901f2", "parents": [ "0ef5f8f6159e44b4faa997be08d1a3bcbf44ad08" ], "author": { "name": "Andrew Patterson", "email": "andrew.patterson@hp.com", "time": "Mon Nov 10 15:30:55 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:29 2009 -0800" }, "message": "ACPI/PCI: PCIe ASPM _OSC support capabilities called when root bridge added\n\nThe _OSC capabilities OSC_ACTIVE_STATE_PWR_SUPPORT and\nOSC_CLOCK_PWR_CAPABILITY_SUPPORT are set when the root bridge is added\nwith pci_acpi_osc_support(), so we no longer need to do it in the ASPM\ndriver. Also add the function pcie_aspm_enabled, which returns true if\npcie_aspm\u003doff is not on the kernel command-line.\n\nSigned-off-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0ef5f8f6159e44b4faa997be08d1a3bcbf44ad08", "tree": "0753c27a1eb2f5802501e60d575f01fe6edccc2f", "parents": [ "990a7ac5645883a833a11b900bb6f25b65dea65b" ], "author": { "name": "Andrew Patterson", "email": "andrew.patterson@hp.com", "time": "Mon Nov 10 15:30:50 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jan 07 11:12:28 2009 -0800" }, "message": "ACPI/PCI: PCI extended config _OSC support called when root bridge added\n\nThe _OSC capability OSC_EXT_PCI_CONFIG_SUPPORT is set when the root\nbridge is added with pci_acpi_osc_support() if we can access PCI\nextended config space.\n\nThis adds the function pci_ext_cfg_avail which returns true if we can\naccess PCI extended config space (offset greater than 0xff). It\ncurrently only returns false if arch\u003dx86 and raw_pci_ext_ops is not set\n(which might happen if pci\u003dnommcfg is set on the kernel command-line).\n\nSigned-off-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "adf094931ffb25ef4b381559918f1a34181a5273", "tree": "bd343d4c15b21dff6a73359fd2d82ff77e30e0d4", "parents": [ "238c6d54830c624f34ac9cf123ac04aebfca5013" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Oct 06 22:46:05 2008 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Jan 06 10:44:29 2009 -0800" }, "message": "PM: Simplify the new suspend/hibernation framework for devices\n\nPM: Simplify the new suspend/hibernation framework for devices\n\nFollowing the discussion at the Kernel Summit, simplify the new\ndevice PM framework by merging \u0027struct pm_ops\u0027 and\n\u0027struct pm_ext_ops\u0027 and removing pointers to \u0027struct pm_ext_ops\u0027\nfrom \u0027struct platform_driver\u0027 and \u0027struct pci_driver\u0027.\n\nAfter this change, the suspend/hibernation callbacks will only\nreside in \u0027struct device_driver\u0027 as well as at the bus type/\ndevice class/device type level. Accordingly, PCI and platform\ndevice drivers are now expected to put their suspend/hibernation\ncallbacks into the \u0027struct device_driver\u0027 embedded in\n\u0027struct pci_driver\u0027 or \u0027struct platform_driver\u0027, respectively.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Pavel Machek \u003cpavel@suse.cz\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "fa623d1b0222adbe8f822e53c08003b9679a410c", "tree": "261a320f3fbf88fab8a3203419ca4d71bdf49152", "parents": [ "3d44cc3e01ee1b40317f79ed54324e25c4f848df", "1ccedb7cdba6886939dd8b4c8f965a826f696e56", "34945ede31071ac7d72270cc6c1893323f392b3f", "d4377974062122d6d9be0bbd8a910a0954714194", "c415b3dce30dfb41234e118662e8720f47343a4f", "beeb4195cbc80b7489631361b7ed38b7518af433", "f269b07e862c395d6981ab2c05d6bc34b0249e90", "4e42ebd57b2e727b28bf5f6068e95cd19b0e807b", "e1286f2c686f5976e0424bb6195ece25e7a17607", "878719e831d9e076961aa15d4049a57a6668c67a", "fd28a5b58dddf5cb5df162ae5c8797a63171c31d", "adf77bac052bb5bf0722b2ce2af9fefc5b2d2a71", "8f2466f45f75e3cbe3aa2b69d33fd9d6e343b9cc", "93093d099e5dd0c258fd530c12668e828c20df41", "bb5574608a8375026510b4f983ffbb06ece33fe2", "f34a10bd9f8cc95ebdc69a079db195636b2e22e0", "b6fd6f26733e864fba2ea3eb1d716e23d2e66f3a", "30604bb410b53efa9c93ee8f03d7aa7494094faa", "5b9a0e14eb4bf40a7cb780af4723560e06753f2d", "67bac792cd0c05b4b6e0393c32605b028b8dd533", "7a9787e1eba95a166265e6a260cf30af04ef0a99", "f4166c54bfe04f64603974058e44fbd7cfef0ccc", "69b88afa8d114a43a3c0431722b79e31d9920692", "8daa19051e1c7369c89ace7b18e74fe1f55dfa29", "3e1e9002aa8b32bd4c95ac6c8fad376b7a8127fb", "8403295e0fa460f6240e2d781e25dc29189f33c7", "4db646b1af8fdcf01d690d29eeae44cd937edb0d", "205516c12dbba003c26b42cfb41e598631300106", "c8182f0016fb65a721c4fbe487909a2d56178135", "ecbf29cdb3990c83d90d0c4187c89fb2ce423367" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 23 16:27:23 2008 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 23 16:27:23 2008 +0100" }, "message": "Merge branches \u0027x86/apic\u0027, \u0027x86/cleanups\u0027, \u0027x86/cpufeature\u0027, \u0027x86/crashdump\u0027, \u0027x86/debug\u0027, \u0027x86/defconfig\u0027, \u0027x86/detect-hyper\u0027, \u0027x86/doc\u0027, \u0027x86/dumpstack\u0027, \u0027x86/early-printk\u0027, \u0027x86/fpu\u0027, \u0027x86/idle\u0027, \u0027x86/io\u0027, \u0027x86/memory-corruption-check\u0027, \u0027x86/microcode\u0027, \u0027x86/mm\u0027, \u0027x86/mtrr\u0027, \u0027x86/nmi-watchdog\u0027, \u0027x86/pat2\u0027, \u0027x86/pci-ioapic-boot-irq-quirks\u0027, \u0027x86/ptrace\u0027, \u0027x86/quirks\u0027, \u0027x86/reboot\u0027, \u0027x86/setup-memory\u0027, \u0027x86/signal\u0027, \u0027x86/sparse-fixes\u0027, \u0027x86/time\u0027, \u0027x86/uv\u0027 and \u0027x86/xen\u0027 into x86/core\n" }, { "commit": "a7b930cdf8ec790c85f81416c87f7c066679d373", "tree": "c96fe44a2160311461b886f2e3ee941f5ba0a682", "parents": [ "bffadffd43d438c3143b8d172a463de89345b836" ], "author": { "name": "Harvey Harrison", "email": "harvey.harrison@gmail.com", "time": "Sun Nov 02 13:32:43 2008 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Nov 03 14:31:18 2008 -0800" }, "message": "PCI: annotate return value of pci_ioremap_bar with __iomem\n\nWas missing from the initial patch.\n\nAcked-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nSigned-off-by: Harvey Harrison \u003charvey.harrison@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7a9787e1eba95a166265e6a260cf30af04ef0a99", "tree": "e730a4565e0318140d2fbd2f0415d18a339d7336", "parents": [ "41b9eb264c8407655db57b60b4457fe1b2ec9977", "0173a3265b228da319ceb9c1ec6a5682fd1b2d92" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Oct 28 16:26:12 2008 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Oct 28 16:26:12 2008 +0100" }, "message": "Merge commit \u0027v2.6.28-rc2\u0027 into x86/pci-ioapic-boot-irq-quirks\n" }, { "commit": "388c8c16abafc2e74dff173b5de9ee519ea8d32f", "tree": "ed1197dcbff33881b7e285c066f1e4260be6c7a4", "parents": [ "18b341b76cd99ce949806ccf5565900465ec2e7f" ], "author": { "name": "James Bottomley", "email": "James.Bottomley@HansenPartnership.com", "time": "Sun Aug 03 13:02:12 2008 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Oct 23 14:54:18 2008 -0700" }, "message": "PCI: add routines for debugging and handling lost interrupts\n\nWe\u0027re getting a lot of storage drivers blamed for interrupt misrouting\nissues. This patch provides a standard way of reporting the problem\n... and, if possible, correcting it.\n\nSigned-off-by: James Bottomley \u003cJames.Bottomley@HansenPartnership.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1388cc964e680c1086ca0edae35be094cb29d51e", "tree": "35714ec0e3b0e33cb00205b0315337f843a63b90", "parents": [ "61cfc7e442c52c14e632d9af0e70779cfa04249d" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Wed Oct 22 13:39:55 2008 +1100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 22 16:42:46 2008 -0700" }, "message": "PCI: don\u0027t export linux/io.h from pci.h\n\nMove the include of io.h down into the #ifdef __KERNEL__ protected\nregion.\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0ad772ec464d3fcf9d210836b97e654f393606c4", "tree": "b2eb3d995eacec2e49dec4441fbc5349c8d1fc81", "parents": [ "30ac7acd05d1449ac784de144c4b5237be25b0b4" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Mon Oct 20 17:41:07 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 22 16:42:40 2008 -0700" }, "message": "PCI, PCI Hotplug: introduce slot_name helpers\n\nIn preparation for cleaning up the various hotplug drivers\nsuch that they don\u0027t have to manage their own \u0027name\u0027 parameters\nanymore, we provide the following convenience functions:\n\n\tpci_slot_name()\n\thotplug_slot_name()\n\nThese helpers will be used by individual hotplug drivers.\n\nCc: kristen.c.accardi@intel.com\nCc: matthew@wil.cx\nAcked-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "828f37683e6d3ab5912989df0d04201db7ad798e", "tree": "5761f28363b8fd4b23eaf88305b3f29cfc6b92ba", "parents": [ "d25b7c8d6ba2735602003d75a28894772fe8ad6a" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Mon Oct 20 17:40:52 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 22 16:42:38 2008 -0700" }, "message": "PCI: update pci_create_slot() to take a \u0027hotplug\u0027 param\n\nSlot detection drivers can co-exist with hotplug drivers. The names\nof the detected/claimed slots may be different depending on module\nload order.\n\nFor legacy reasons, we need to allow hotplug drivers to override\nthe slot name if a detection driver is loaded first (and they find\nthe same slots).\n\nCreating and overriding slot names should be an atomic operation,\notherwise you get a locking nightmare as various drivers race to\ncall pci_create_slot().\n\npci_create_slot() is already serialized by grabbing the pci_bus_sem.\n\nWe update the API and add a \u0027hotplug\u0027 param, which is:\n\n\tset if the caller is a hotplug driver\n\tNULL if the caller is a detection driver\n\npci_create_slot() does not actually use the \u0027hotplug\u0027 parameter in this\npatch. A later patch will add the logic that uses it.\n\nCc: kristen.c.accardi@intel.com\nCc: matthew@wil.cx\nAcked-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d25b7c8d6ba2735602003d75a28894772fe8ad6a", "tree": "9804e12987fbcee2d03d277c2527670b359748a1", "parents": [ "1359f2701b96abd9bb69c1273fb995a093b6409a" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Mon Oct 20 17:40:47 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 22 16:42:37 2008 -0700" }, "message": "PCI: rename pci_update_slot_number to pci_renumber_slot\n\nThe GPL exported symbol pci_update_slot_number has been renamed to\npci_renumber_slot. Some of the safety checks were unnecessary and\nwere removed.\n\nCc: kristen.c.accardi@intel.com\nCc: matthew@wil.cx\nAcked-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "64c7f63c1b5c26f057c26f7920f397fed2f590d9", "tree": "f0aa6ef81b10e2027a9baac99537efc279539b2e", "parents": [ "8dd7f8036c123296fc4214f9d8810eb485570422" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Oct 21 10:09:05 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 22 16:42:36 2008 -0700" }, "message": "PCI: include io.h in pci.h so that ioremap_nocache is defined\n\nIngo pointed out that the m32r build was broken by pci_ioremap. It looks like\nsome files include pci.h w/o including io.h. The latter defines ioremap_* if\npresent, so it makes sense to include it in pci.h now that we have pci_ioremap\nthere.\n\nReported-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "8dd7f8036c123296fc4214f9d8810eb485570422", "tree": "0c6cab9083be724d2c72ba4aabef9e3b0dffd7fc", "parents": [ "c4ed02fae78bf6cea0b22edd34a67df972f29832" ], "author": { "name": "Sheng Yang", "email": "sheng@linux.intel.com", "time": "Tue Oct 21 17:38:25 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Oct 22 16:42:35 2008 -0700" }, "message": "PCI: add support for function level reset\n\nSometimes, it\u0027s necessary to enable software\u0027s ability to quiesce and\nreset endpoint hardware with function-level granularity, so provide\nsupport for it.\n\nThe patch implement Function Level Reset(FLR) feature following PCI-e\nspec. And this is the first step. We would add more generic method, like\nD0/D3, to allow more devices support this function.\n\nThe patch contains two functions. pcie_reset_function() is the new\ndriver API, and, contains some action to quiesce a device. The other\nfunction is a helper: pcie_execute_reset_function() just executes the\nreset for a particular device function.\n\nCurrent the usage model is in KVM. Function reset is necessary for\nassigning device to a guest, or moving it between partitions.\n\nFor Function Level Reset(FLR), please refer to PCI Express spec chapter\n6.6.2.\n\nSigned-off-by: Sheng Yang \u003csheng@linux.intel.com\u003e\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "96499871f45b9126157b1a5c512d6e30f1635225", "tree": "e32b112aa25dca6f3e4278e5718c1c2135e6519d", "parents": [ "270c66be9b4a6f2be53ef3aec5dc8e7b07782ec9" ], "author": { "name": "Heiko Carstens", "email": "heiko.carstens@de.ibm.com", "time": "Mon Oct 20 19:45:43 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 11:28:34 2008 -0700" }, "message": "PCI: fix pci_ioremap_bar() on s390\n\ns390 doesn\u0027t have ioremap_*, so protect the definition of the new\npci_ioremap_bar function with CONFIG_HAS_IOMEM to avoid build breakage.\n\nAcked-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nSigned-off-by: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "aa42d7c6138afdc54f74e971456a0fbfec16b77b", "tree": "2fb140d3c6e3924b6c91e736df327d6668d68b2a", "parents": [ "e9f82cb75096ae30658a72d473bf170bf4d3bb2e" ], "author": { "name": "Arjan van de Ven", "email": "arjan@infradead.org", "time": "Sun Sep 28 16:36:11 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 11:01:48 2008 -0700" }, "message": "PCI: introduce an pci_ioremap(pdev, barnr) function\n\nA common thing in many PCI drivers is to ioremap() an entire bar. This\nis a slightly fragile thing right now, needing both an address and a\nsize, and many driver writers do.. various things there.\n\nThis patch introduces an pci_ioremap() function taking just a PCI device\nstruct and the bar number as arguments, and figures this all out itself,\nin one place. In addition, we can add various sanity checks to this\nfunction (the patch already checks to make sure that the bar in question\nreally is a MEM bar; few to no drivers do that sort of thing).\n\nHopefully with this type of API we get less chance of mistakes in\ndrivers with ioremap() operations.\n\nSigned-off-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "58c3a727cb73b75a9104d295f096cca12959a5a5", "tree": "70f1fe31f1ec12021777b6c6c49167356a864749", "parents": [ "201de56eb22f1ff3f36804bc70cbff220b50f067" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Tue Oct 14 14:02:53 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 10:54:32 2008 -0700" }, "message": "PCI: support PCIe ARI capability\n\nThis patch adds support for PCI Express Alternative Routing-ID\nInterpretation (ARI) capability.\n\nThe ARI capability extends the Function Number field of the PCI Express\nEndpoint by reusing the Device Number which is otherwise hardwired to 0.\nWith ARI, an Endpoint can have up to 256 functions.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c322b28a04c084a467a862766f74c40c917a721c", "tree": "74845fc3bd358be76291e4aefa60ea2adf86aa32", "parents": [ "5d9bc1fa47f0c1561f1d7c0bdff5e24860852b42" ], "author": { "name": "Zhao, Yu", "email": "yu.zhao@intel.com", "time": "Mon Oct 13 19:36:05 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 10:54:28 2008 -0700" }, "message": "PCI: use same arg names in PCI_VDEVICE comment\n\nThis cleanup makes the argument names in PCI_VDEVICE comment consistent\nwith those used in its definition.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "16dbef4a831782466b10d4ae56837c5ba17d1948", "tree": "8656c347e8e6aeecece6bfa4c182d1b1cec74bb4", "parents": [ "0235c4fc7fc6f621dc0dd89eba102ad5aa373390" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel@gmail.com", "time": "Fri Aug 15 19:36:45 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 10:53:42 2008 -0700" }, "message": "PCI: change MSI-x vector to 32bit\n\nWe are using 28bit pci (bus/dev/fn + 12 bits) as irq number, so the\ncache for irq number should be 32 bit too.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nCc: Andrew Vasquez \u003candrew.vasquez@qlogic.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0235c4fc7fc6f621dc0dd89eba102ad5aa373390", "tree": "8947ae0efda2a1c9d69f3b6399d3e847307786a5", "parents": [ "3d137310245e4cdc3e8c8ba1bea2e145a87ae8e3" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Aug 18 21:38:00 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 10:53:41 2008 -0700" }, "message": "PCI PM: Introduce function pci_wake_from_d3\n\nMany device drivers use the following sequence of statements to enable\nthe device to wake up the system while being in the D3_hot or D3_cold\nlow power state:\n\n pci_enable_wake(pdev, PCI_D3hot, 1);\n pci_enable_wake(pdev, PCI_D3cold, 1);\n\nHowever, the second call is not necessary if the first one succeeds (the\nordering of the statements above doesn\u0027t matter here) and it may even be\nharmful, because we are not supposed to enable PME# after the wake-up\npower has been enabled for the device.\n\nTo allow drivers to overcome this problem, introduce function\npci_wake_from_d3() that will enable the device to wake up the system\nfrom any of D3_hot and D3_cold as long as the wake-up from at least one\nof them is supported.\n\nAcked-by: Pavel Machek \u003cpavel@suse.cz\u003e\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "edbc25caaa492a82e19baa915f1f6b0a0db6554d", "tree": "967dbd4f8d35fd8532a612fef55691586b831965", "parents": [ "7d67474e506598fe26e0c262acf02132dc730517" ], "author": { "name": "Milton Miller", "email": "miltonm@bga.com", "time": "Thu Jul 10 16:29:37 2008 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Oct 20 10:48:34 2008 -0700" }, "message": "PCI: remove dynids.use_driver_data\n\nThe driver flag dynids.use_driver_data is almost consistently not set,\nand causes more problems than it solves. It was initially intended as a\nflag to indicate whether a driver\u0027s usage of driver_data had been\ncarefully inspected and was ready for values from userspace. That audit\nwas never done, so most drivers just get a 0 for driver_data when new\nIDs are added from userspace via sysfs. So remove the flag, allowing\ndrivers to see the data directly (a followon patch validates the passed\ndriver_data value against what the drivers expect).\n\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nAcked-by: Jean Delvare \u003ckhali@linux-fr.org\u003e\nSigned-off-by: Milton Miller \u003cmiltonm@bga.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2be508d847392e431759e370d21cea9412848758", "tree": "be5e00a4d7be4ef353ffe4d550fb80a251d321c3", "parents": [ "01e8ef11bc1a74e65678ed55795f59266d4add01", "8a1a6272057e2ad90ab531a70330165888866e60" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 09:03:12 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 09:03:12 2008 -0700" }, "message": "Merge git://git.infradead.org/mtd-2.6\n\n* git://git.infradead.org/mtd-2.6: (69 commits)\n Revert \"[MTD] m25p80.c code cleanup\"\n [MTD] [NAND] GPIO driver depends on ARM... for now.\n [MTD] [NAND] sh_flctl: fix compile error\n [MTD] [NOR] AT49BV6416 has swapped erase regions\n [MTD] [NAND] GPIO NAND flash driver\n [MTD] cmdlineparts documentation change - explain where mtd-id comes from\n [MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection\n [MTD] [NAND] Fix compilation warnings in drivers/mtd/nand/cs553x_nand.c\n [JFFS2] Write buffer offset adjustment for NOR-ECC (Sibley) flash\n [MTD] mtdoops: Fix a bug where block may not be erased\n [MTD] mtdoops: Add a magic number to logged kernel oops\n [MTD] mtdoops: Fix an off by one error\n [JFFS2] Correct parameter names of jffs2_compress() in comments\n [MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL\n [MTD] [NAND] Bug on atmel_nand HW ECC : OOB info not correctly written\n [MTD] [MAPS] Remove unused variable after ROM API cleanup.\n [MTD] m25p80.c extended jedec support (v2)\n [MTD] remove unused mtd parameter in of_mtd_parse_partitions()\n [MTD] [NAND] remove dead Kconfig associated with !CONFIG_PPC_MERGE\n [MTD] [NAND] driver extension to support NAND on TQM85xx modules\n ...\n" }, { "commit": "e416de5e61e1a9b7f987804cbb67230b5f5293c6", "tree": "f65d4deb0ece0706186834ad798703d75163ef5d", "parents": [ "3afe7eb37f4d47f31d30a81c1b42ca02eab01e44" ], "author": { "name": "Alan Cox", "email": "alan@lxorguk.ukuu.org.uk", "time": "Tue Sep 23 17:25:10 2008 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Sep 26 18:59:05 2008 -0600" }, "message": "Export the ROM enable/disable helpers\n\n.... so that they can be used by MTD map drivers. Lets us close #9420\n\nSigned-off-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "b08508c40adf3fd1330aabc4f37d3254179776c4", "tree": "53a9605ef9d9c937465fa47b05fb9b1a5b52f2e0", "parents": [ "e1f4f59d1ab9ebac44830d6ae450fb358ac559d3" ], "author": { "name": "Greg KH", "email": "gregkh@suse.de", "time": "Tue Aug 26 08:20:34 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Sep 16 15:52:08 2008 -0700" }, "message": "PCI: fix compiler warnings in pci_get_subsys()\n\npci_get_subsys() changed in 2.6.26 so that the from pointer is modified\nwhen the call is being invoked, so fix up the \u0027const\u0027 marking of it that\nthe compiler is complaining about.\n\nReported-by: Rufus \u0026 Azrael \u003crufus-azrael@numericable.fr\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5a6c9b60b4cc15b22d3102b0033e5cb842125456", "tree": "b2fcd6eb53f998a1beb69ad6e4dbded3232ba292", "parents": [ "7bed523a95425b70af7a59df61d5adb422ef2038" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Fri Aug 08 00:14:24 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Aug 07 15:33:36 2008 -0700" }, "message": "PCI PM: Export pci_pme_active to drivers\n\nExport pci_pme_active() to drivers, so that they can clear the\nPME_status bit and disable PME# for their devices without involving\nACPI.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "bba81165867313766534dd31603de51bdd36ef9b", "tree": "f6233ae2f717c49b8642009f1762599d30415a9c", "parents": [ "9d82d8eaec032bf935144e0d5789a5cd4b95e958" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Wed Jul 30 12:07:04 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Aug 07 06:52:01 2008 -0700" }, "message": "PCI: make pci_register_driver() a macro\n\nalpha:\n\nCC [M] drivers/usb/gadget/u_ether.o\nIn file included from include/asm/dma-mapping.h:7,\n from include/linux/dma-mapping.h:52,\n from include/linux/dmaengine.h:29,\n from include/linux/skbuff.h:29,\n from include/linux/if_ether.h:114,\n from include/linux/etherdevice.h:27,\n from drivers/usb/gadget/u_ether.c:29:\ninclude/linux/pci.h: In function \u0027pci_register_driver\u0027:\ninclude/linux/pci.h:673: error: \u0027KBUILD_MODNAME\u0027 undeclared (first use in this function)\ninclude/linux/pci.h:673: error: (Each undeclared identifier is reported only once\ninclude/linux/pci.h:673: error: for each function it appears in.)\n\nSam says:\n\nThe problem is that u_ether.o is used by two modules so when we build it\nKBUILD_MODNAME is not defined because kbuild does not know what value to\nuse.\n\nAnd in pci.h we have the following inline:\n\nstatic inline int __must_check pci_register_driver(struct pci_driver *driver)\n{\n return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);\n}\n\nAnd alpha uses dma-mapping.h to nullify a number of functions that seem to\nrequire something from pci.h.\n\nMaking it a macro fixes this particular problem. However, the underlying issue\nof a file using KBUILD_MODNAME and being shared between multiple modules is\n*not* addressed. I guess the answer there is \"don\u0027t do that\".\n\nCc: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "979b1791e5b8f8b556faeec4c48339e7ed63af9f", "tree": "30990937096bb25aa8349dae7285e70f268a767a", "parents": [ "362b7077a5546b42131af15ba4776f30c9a72d0c" ], "author": { "name": "Alan Cox", "email": "alan@lxorguk.ukuu.org.uk", "time": "Thu Jul 24 17:18:38 2008 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 28 15:12:11 2008 -0700" }, "message": "PCI: add D3 power state avoidance quirk\n\nLibata has some hacks to deal with certain controllers going silly in D3\nstate. The right way to handle this is to keep a PCI device flag for\nsuch devices. That can then be generalised for no ATA devices with power\nproblems.\n\nSigned-off-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "e5899e1b7d73e67de758a32174a859cc2586c0b9", "tree": "2bb80ed1e52fb9981c6f44f6b0e7baa105585787", "parents": [ "f42e86d95fa53d3a62b2795515da18b4f41b0480" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Sat Jul 19 14:39:24 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jul 22 14:25:38 2008 -0700" }, "message": "PCI PM: make more PCI PM core functionality available to drivers\n\nMake more PCI PM core functionality available to drivers\n\n* Export pci_pme_capable() so that it can be called directly by\n drivers (for example, tg3 needs that).\n\n* Move the state choosing part of pci_prepare_to_sleep() to a\n separate function, pci_target_state(), that can be called directly\n by drivers (for example, tg3 needs that).\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3e370b29d35fb01bfb92c2814d6f79bf6a2cb970", "tree": "3b8fb467d60bfe6a34686f4abdc3a60050ba40a4", "parents": [ "88d1dce3a74367291f65a757fbdcaf17f042f30c", "5b664cb235e97afbf34db9c4d77f08ebd725335e" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 19:31:12 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 19:31:12 2008 +0200" }, "message": "Merge branch \u0027linus\u0027 into x86/pci-ioapic-boot-irq-quirks\n\nConflicts:\n\n\tdrivers/pci/quirks.c\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "dc7c65db2845a8d17432d89252c4227a9a7cb15f", "tree": "79030b0aaaafc04bc4303c21495134e744afc058", "parents": [ "8a0ca91e1db5de5eb5b18cfa919d52ff8be375af", "58b6e5538460be358fdf1286d9a2fbcfcc2cfaba" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jul 16 17:25:46 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jul 16 17:25:46 2008 -0700" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (72 commits)\n Revert \"x86/PCI: ACPI based PCI gap calculation\"\n PCI: remove unnecessary volatile in PCIe hotplug struct controller\n x86/PCI: ACPI based PCI gap calculation\n PCI: include linux/pm_wakeup.h for device_set_wakeup_capable\n PCI PM: Fix pci_prepare_to_sleep\n x86/PCI: Fix PCI config space for domains \u003e 0\n Fix acpi_pm_device_sleep_wake() by providing a stub for CONFIG_PM_SLEEP\u003dn\n PCI: Simplify PCI device PM code\n PCI PM: Introduce pci_prepare_to_sleep and pci_back_from_sleep\n PCI ACPI: Rework PCI handling of wake-up\n ACPI: Introduce new device wakeup flag \u0027prepared\u0027\n ACPI: Introduce acpi_device_sleep_wake function\n PCI: rework pci_set_power_state function to call platform first\n PCI: Introduce platform_pci_power_manageable function\n ACPI: Introduce acpi_bus_power_manageable function\n PCI: make pci_name use dev_name\n PCI: handle pci_name() being const\n PCI: add stub for pci_set_consistent_dma_mask()\n PCI: remove unused arch pcibios_update_resource() functions\n PCI: fix pci_setup_device()\u0027s sprinting into a const buffer\n ...\n\nFixed up conflicts in various files (arch/x86/kernel/setup_64.c,\narch/x86/pci/irq.c, arch/x86/pci/pci.h, drivers/acpi/sleep/main.c,\ndrivers/pci/pci.c, drivers/pci/pci.h, include/acpi/acpi_bus.h) from x86\nand ACPI updates manually.\n" }, { "commit": "e1d3a90846b40ad3160bf4b648d36c6badad39ac", "tree": "3c078d2b6046d90d1045efbcefe6a76a424a6f63", "parents": [ "426b3b8d535e3e141331dc19c40f457b997c4d6d" ], "author": { "name": "Stefan Assmann", "email": "sassmann@suse.de", "time": "Wed Jun 11 16:35:17 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Jul 08 17:50:53 2008 +0200" }, "message": "pci, acpi: reroute PCI interrupt to legacy boot interrupt equivalent\n\nSome chipsets (e.g. intel 6700PXH) generate a legacy INTx when the\nIRQ entry in the chipset\u0027s IO-APIC is masked (as, e.g. the RT kernel\ndoes during interrupt handling). On chipsets where this INTx generation\ncannot be disabled, we reroute the valid interrupts to their legacy\nequivalent to get rid of spurious interrupts that might otherwise bring\ndown (vital) interrupt lines through spurious interrupt detection in\nnote_interrupt().\n\nThis patch benefited from discussions with Alexander Graf, Torsten Duwe,\nIhno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew\nand the patch itself are the authors\u0027 responsibility alone.\n\nSigned-off-by: Stefan Assmann \u003csassmann@suse.de\u003e\nSigned-off-by: Olaf Dabrunz \u003cod@suse.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "337001b6c42938f49a880b1b8306c3ed771a7e61", "tree": "0e704359c989beba626388cf2404f038e55f442e", "parents": [ "404cc2d8ce41ed4031958fba8e633767e8a2e028" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Jul 07 03:36:24 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 07 16:26:50 2008 -0700" }, "message": "PCI: Simplify PCI device PM code\n\nIf the offset of PCI device\u0027s PM capability in its configuration space,\nthe mask of states that the device supports PME# from and the D1 and D2\nsupport bits are cached in the corresponding struct pci_dev, the PCI\ndevice PM code can be simplified quite a bit.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "404cc2d8ce41ed4031958fba8e633767e8a2e028", "tree": "d679e1ea92d6ae8e72309c02197fd5f1480651fb", "parents": [ "eb9d0fe40e313c0a74115ef456a2e43a6c8da72f" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Jul 07 03:35:26 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 07 16:26:33 2008 -0700" }, "message": "PCI PM: Introduce pci_prepare_to_sleep and pci_back_from_sleep\n\nIntroduce functions pci_prepare_to_sleep() and pci_back_from_sleep(),\nto be used by the PCI drivers that want to place their devices into\nthe lowest power state appropiate for them (PCI_D3hot, if the device\nis not supposed to wake up the system, or the deepest state from\nwhich the wake-up is possible, otherwise) while the system is being\nprepared to go into a sleeping state and to put them back into D0\nduring the subsequent transition to the working state.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c6c4f070a61b2b6e5cd317a5fbf25255878688a2", "tree": "7831df47d77b4307c91ab0ef8edfd2615271e7d5", "parents": [ "eebfcfb52ce753eaaa8525078bda6b539586066c" ], "author": { "name": "Greg KH", "email": "gregkh@suse.de", "time": "Thu Jul 03 09:49:39 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 07 16:02:40 2008 -0700" }, "message": "PCI: make pci_name use dev_name\n\nAlso fixes up the sparc code that was assuming this is not a constant.\n\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "80be038593dba7aa46fb24a14f0ba83e5ade0edb", "tree": "f60e4fa321b1032b84e6f51cc9827d59d3d71cbc", "parents": [ "0aea531326d1a17ccef7d9a538429c5b32cf4f12" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Mon Jun 30 11:35:53 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jun 30 11:41:36 2008 -0700" }, "message": "PCI: add stub for pci_set_consistent_dma_mask()\n\nWhen CONFIG_PCI\u003dn, there is no stub for pci_set_consistent_dma_mask(),\nso add one like other similar stubs. Otherwise there can be build errors,\nas here:\n\nlinux-next-20080630/drivers/ssb/main.c:1175: error: implicit declaration of\nfunction \u0027pci_set_consistent_dma_mask\u0027\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9433f6dd3a4677e9b92c6e1cd7f98b11598b7c2c", "tree": "b3e631ee9af274de25fc61affc21f525f81c01d9", "parents": [ "b97089400d44b9e90ce5029a2e458cd087473c74" ], "author": { "name": "Wang Chen", "email": "wangchen@cn.fujitsu.com", "time": "Thu Jun 26 10:50:04 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jun 27 13:06:54 2008 -0700" }, "message": "PCI: Fix comment of pci_dynids\n\nstruct pci_driver has no field of driver_data.\nIt\u0027s in pci_device_id.\n\nSigned-off-by: Wang Chen \u003cwangchen@cn.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "45aec1ae72fc592f231e9e73ed9ed4d10cfbc0b5", "tree": "758243a7f11d90ac4469144466be6ebb0272a8b4", "parents": [ "b7f09ae583c49d28b2796d2fa5893dcf822e3a10" ], "author": { "name": "venkatesh.pallipadi@intel.com", "email": "venkatesh.pallipadi@intel.com", "time": "Tue Mar 18 17:00:22 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Jun 12 10:12:42 2008 +0200" }, "message": "x86: PAT export resource_wc in pci sysfs\n\nFor the ranges with IORESOURCE_PREFETCH, export a new resource_wc interface in\npci /sysfs along with resource (which is uncached).\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "f46753c5e354b857b20ab8e0fe7b2579831dc369", "tree": "efffdb4dfec5e1f6fd624f17aa36d7d350bb1e6c", "parents": [ "fe99740cac117f208707488c03f3789cf4904957" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Tue Jun 10 15:28:50 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 14:37:03 2008 -0700" }, "message": "PCI: introduce pci_slot\n\nCurrently, /sys/bus/pci/slots/ only exposes hotplug attributes when a\nhotplug driver is loaded, but PCI slots have attributes such as address,\nspeed, width, etc. that are not related to hotplug at all.\n\nIntroduce pci_slot as the primary data structure and kobject model.\nHotplug attributes described in hotplug_slot become a secondary\nstructure associated with the pci_slot.\n\nThis patch only creates the infrastructure that allows the separation of\nPCI slot attributes and hotplug attributes. In this patch, the PCI\nhotplug core remains the only user of this infrastructure, and thus,\n/sys/bus/pci/slots/ will still only become populated when a hotplug\ndriver is loaded.\n\nA later patch in this series will add a second user of this new\ninfrastructure and demonstrate splitting the task of exposing pci_slot\nattributes from hotplug_slot attributes.\n\n - Make pci_slot the primary sysfs entity. hotplug_slot becomes a\n subsidiary structure.\n o pci_create_slot() creates and registers a slot with the PCI core\n o pci_slot_add_hotplug() gives it hotplug capability\n\n - Change the prototype of pci_hp_register() to take the bus and\n slot number (on parent bus) as parameters.\n\n - Remove all the -\u003eget_address methods since this functionality is\n now handled by pci_slot directly.\n\n[achiang@hp.com: rpaphp-correctly-pci_hp_register-for-empty-pci-slots]\nTested-by: Badari Pulavarty \u003cpbadari@us.ibm.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n[akpm@linux-foundation.org: build fix]\n[akpm@linux-foundation.org: make headers_check happy]\n[akpm@linux-foundation.org: nuther build fix]\n[akpm@linux-foundation.org: fix typo in #include]\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nAcked-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "bbb44d9f23d868a2837c6b22b8dfb123d8e7800c", "tree": "15573ad50a41601b0fda2f7d8568e6c94fee307b", "parents": [ "1eede070a59e1cc73da51e1aaa00d9ab86572cfc" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Tue May 20 00:49:04 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 10:59:51 2008 -0700" }, "message": "PCI: implement new suspend/resume callbacks\n\nImplement new suspend and hibernation callbacks for the PCI bus type.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Pavel Machek \u003cpavel@ucw.cz\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "e1a2a51e684bfe9d6165992d4a065439617a3107", "tree": "4d05a1b9ebadd0ab22e0e42ee3b053dddf11baf1", "parents": [ "273c11270d3715c4c06d4df1607a1a60034d887b" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Thu May 15 21:51:31 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 10:59:46 2008 -0700" }, "message": "Suspend/Resume bug in PCI layer wrt quirks\n\nSome quirks should be called with interrupt disabled, we can\u0027t directly\ncall them in .resume_early. Also the patch introduces\npci_fixup_resume_early and pci_fixup_suspend, which matches current\ndevice core callbacks (.suspend/.resume_early).\n\nTBD: Somebody knows why we need quirk resume should double check if a\nquirk should be called in resume or resume_early. I changed some per my\nunderstanding, but can\u0027t make sure I fixed all.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "19792a0859f96e9fc8ce87d97b269bcb895389e5", "tree": "3743d82131c402c445f8f1c5afb8933bb767f8a8", "parents": [ "552fe04aa242f164f126abfdb3f6f90fd6679d9f" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Mon May 05 21:25:47 2008 +0300" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 10:59:41 2008 -0700" }, "message": "PCI: drivers/pci/pci.c: add prototypes\n\nThis patch adds prototypes for pcibios_disable_device() and\npcibios_set_pcie_reset_state() in include/linux/pci.h\n\nWhile I was at it, I also removed the unneeded \"extern\" from the\nprototype of pcibios_add_platform_entries().\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "70b9f7dc1435412ca2b89b13a8353bd9915a7189", "tree": "1ba8594fd9a26386654f800b9db5ce0183a0e33b", "parents": [ "98db6f193c93e9b4729215af2c9101210e11d26c" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel.send@gmail.com", "time": "Mon Apr 28 16:27:23 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Apr 29 15:34:05 2008 -0700" }, "message": "x86/pci: remove flag in pci_cfg_space_size_ext\n\nso let pci_cfg_space_size call it directly without flag.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "98db6f193c93e9b4729215af2c9101210e11d26c", "tree": "942e41010b70ae79897921aa13e16f372f4ea2e1", "parents": [ "7663c1e2792a9662b23dec6e19bfcd3d55360b8f" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Tue Apr 29 22:38:48 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Tue Apr 29 13:41:59 2008 -0700" }, "message": "x86: fix section mismatch in pci_scan_bus\n\nFix following section mismatch warning:\nWARNING: vmlinux.o(.text+0x275616): Section mismatch in reference from the function pci_scan_bus() to the function .devinit.text:pci_scan_bus_parented()\n\nThe warning was seen with a CONFIG_DEBUG_SECTION_MISMATCH\u003dy build.\nThe inline function pci_scan_bus refer to functions annotated\n__devinit - so annotate it __devinit too.\nThis revealed a few x86 specific functions that were only\nused from __init or __devinit context.\nSo annotate these __devinit and the warning was killed.\n\nThe added include in pci.h was not strictly required but\nadded to avoid being dependent on indirect includes.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@hobbes.lan\u003e\n" }, { "commit": "a217656cb26c5b7ebe9900354b2e808c1f74b470", "tree": "37679bb7f1cebf927bac353b42e6bda8b4e7c63e", "parents": [ "8f45c1a58a25c3a1a2f42521445e1e786c4c0b92", "a53edac131cadee317e7e36a5908bb4c71d874cd" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 29 10:17:59 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 29 10:17:59 2008 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (21 commits)\n pciehp: fix error message about getting hotplug control\n pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2\n pci/irq: restore mask_bits in msi shutdown -v3\n doc: replace yet another dev with pdev for consistency in DMA-mapping.txt\n PCI: don\u0027t expose struct pci_vpd to userspace\n doc: fix an incorrect suggestion to pass NULL for PCI like buses\n Consistently use pdev as the variable of type struct pci_dev *.\n pciehp: Fix command write\n shpchp: fix slot name\n make pciehp_acpi_get_hp_hw_control_from_firmware()\n pciehp: Clean up pcie_init()\n pciehp: Mask hotplug interrupt at controller release\n pciehp: Remove useless hotplug interrupt enabling\n pciehp: Fix wrong slot capability check\n pciehp: Fix wrong slot control register access\n pciehp: Add missing memory barrier\n pciehp: Fix interrupt event handlig\n pciehp: fix slot name\n Update MAINTAINERS with location of PCI tree\n PCI: Add Intel SCH PCI IDs\n ...\n" }, { "commit": "d52877c7b1afb8c37ebe17e2005040b79cb618b0", "tree": "b5cc4252cad0d7f22a6b63e50d1ec46a9a495773", "parents": [ "8e149e09f91098fd72bf9ac5b4a77a693abf721e" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel.send@gmail.com", "time": "Wed Apr 23 14:58:09 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Tue Apr 29 09:12:51 2008 -0700" }, "message": "pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2\n\n[PATCH 2/2] pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2\n\nthis change\n\n| commit 23a274c8a5adafc74a66f16988776fc7dd6f6e51\n| Author: Prakash, Sathya \u003csathya.prakash@lsi.com\u003e\n| Date: Fri Mar 7 15:53:21 2008 +0530\n|\n| [SCSI] mpt fusion: Enable MSI by default for SAS controllers\n|\n| This patch modifies the driver to enable MSI by default for all SAS chips.\n|\n| Signed-off-by: Sathya Prakash \u003csathya.prakash@lsi.com\u003e\n| Signed-off-by: James Bottomley \u003cJames.Bottomley@HansenPartnership.com\u003e\n|\nCauses the kexec of a RHEL 5.1 kernel to fail.\n\nroot casue: the rhel 5.1 kernel still uses INTx emulation. and\nmptscsih_shutdown doesn\u0027t call pci_disable_msi to reenable INTx on kexec path\n\nSo call pci_msi_shutdown in the shutdown path to do the same thing to msix\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@hobbes.lan\u003e\n" }, { "commit": "ee69439cc1dcadbae42ece1caa1ec1786560f7aa", "tree": "4121f06f414d93e71d7e6c886c0510d2968dc408", "parents": [ "97a34eb77c758ff7821c2d29b3b5a84299c93aa1" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Mon Apr 28 12:30:35 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Mon Apr 28 12:30:35 2008 -0700" }, "message": "PCI: don\u0027t expose struct pci_vpd to userspace\n\nWe just need to forward declare it for struct pci_dev, not expose it outside of\n__KERNEL__.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "30a18d6c3f1e774de656ebd8ff219d53e2ba4029", "tree": "22aad98a32fc182736f78193938a24175a168b81", "parents": [ "35ddd068fb94b187e94a3fc497ccecf27bdda9ae" ], "author": { "name": "Yinghai Lu", "email": "Yinghai.Lu@Sun.COM", "time": "Tue Feb 19 03:21:20 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:04 2008 +0200" }, "message": "x86: multi pci root bus with different io resource range, on 64-bit\n\nscan AMD opteron io/mmio routing to make sure every pci root bus get correct\nresource range. Thus later pci scan could assign correct resource to device\nwith unassigned resource.\n\nthis can fix a system without _CRS for multi pci root bus.\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@sun.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "bb63b4219976d48ed6d22ac33c18be334fb5a78c", "tree": "fd63e9c86b43f246a1f7011881540718118890c9", "parents": [ "d2ebdf4bae4f1d7c30e71fd74f270ca4cda024fc" ], "author": { "name": "Yinghai Lu", "email": "Yinghai.Lu@Sun.COM", "time": "Thu Feb 28 23:56:50 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:04 2008 +0200" }, "message": "x86 pci: remove checking type for mmconfig probe\n\ndoesn\u0027t need to check if it is type1 or type2, we can use raw_pci_ops\ndirectly.\n\nalso make pci_direct_conf1 static again.\n\nanyway is there system with type 2 and mmconf support?\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@sun.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "57741a779070e0b141b6148136b420c8d35ccbce", "tree": "779acceb9fbb746346385be6d5402d1834974f54", "parents": [ "05c58b8ac77639c17205f0b2a2d9eb1971dc47ad" ], "author": { "name": "Yinghai Lu", "email": "Yinghai.Lu@Sun.COM", "time": "Fri Feb 15 01:32:50 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:03 2008 +0200" }, "message": "x86_64: set cfg_size for AMD Family 10h in case MMCONFIG\n\nreuse pci_cfg_space_size but skip check pci express and pci-x CAP ID.\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@sun.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "7752d5cfe3d11ca0bb9c673ec38bd78ba6578f8e", "tree": "280c5accec5ac0d9821ef9d7e3e095f9df87f8c5", "parents": [ "c3bf9bc243092c53946fd6d8ebd6dc2f4e572d48" ], "author": { "name": "Robert Hancock", "email": "hancockr@shaw.ca", "time": "Fri Feb 15 01:27:20 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:03 2008 +0200" }, "message": "x86: validate against acpi motherboard resources\n\nThis path adds validation of the MMCONFIG table against the ACPI reserved\nmotherboard resources. If the MMCONFIG table is found to be reserved in\nACPI, we don\u0027t bother checking the E820 table. The PCI Express firmware\nspec apparently tells BIOS developers that reservation in ACPI is required\nand E820 reservation is optional, so checking against ACPI first makes\nsense. Many BIOSes don\u0027t reserve the MMCONFIG region in E820 even though\nit is perfectly functional, the existing check needlessly disables MMCONFIG\nin these cases.\n\nIn order to do this, MMCONFIG setup has been split into two phases. If PCI\nconfiguration type 1 is not available then MMCONFIG is enabled early as\nbefore. Otherwise, it is enabled later after the ACPI interpreter is\nenabled, since we need to be able to execute control methods in order to\ncheck the ACPI reserved resources. Presently this is just triggered off\nthe end of ACPI interpreter initialization.\n\nThere are a few other behavioral changes here:\n\n- Validate all MMCONFIG configurations provided, not just the first one.\n\n- Validate the entire required length of each configuration according to\n the provided ending bus number is reserved, not just the minimum required\n allocation.\n\n- Validate that the area is reserved even if we read it from the chipset\n directly and not from the MCFG table. This catches the case where the\n BIOS didn\u0027t set the location properly in the chipset and has mapped it\n over other things it shouldn\u0027t have.\n\nThis also cleans up the MMCONFIG initialization functions so that they\nsimply do nothing if MMCONFIG is not compiled in.\n\nBased on an original patch by Rajesh Shah from Intel.\n\n[akpm@linux-foundation.org: many fixes and cleanups]\nSigned-off-by: Robert Hancock \u003chancockr@shaw.ca\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nTested-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nAcked-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "94e6108803469a37ee1e3c92dafdd1d59298602f", "tree": "7f3ee30721411cca238f8eea5971d5bebbb70a55", "parents": [ "5e0d2a6fc094a9b5047998deefeb1254c66856ee" ], "author": { "name": "Ben Hutchings", "email": "bhutchings@solarflare.com", "time": "Wed Mar 05 16:52:39 2008 +0000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:07 2008 -0700" }, "message": "PCI: Expose PCI VPD through sysfs\n\nVital Product Data (VPD) may be exposed by PCI devices in several\nways. It is generally unsafe to read this information through the\nexisting interfaces to user-land because of stateful interfaces.\n\nThis adds:\n- abstract operations for VPD access (struct pci_vpd_ops)\n- VPD state information in struct pci_dev (struct pci_vpd)\n- an implementation of the VPD access method specified in PCI 2.2\n (in access.c)\n- a \u0027vpd\u0027 binary file in sysfs directories for PCI devices with VPD\n operations defined\n\nIt adds a probe for PCI 2.2 VPD in pci_scan_device() and release of\nVPD state in pci_release_dev().\n\nSigned-off-by: Ben Hutchings \u003cbhutchings@solarflare.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "842de40d93e00a5c40a1a7f520a6fbe422994e99", "tree": "ec59fd64804a4f5cde40f5edf43fabd5ddb3c413", "parents": [ "7d715a6c1ae5785d00fb9a876b5abdfc43abc44b" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Mar 04 11:56:47 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:04 2008 -0700" }, "message": "PCI: add generic pci_enable_resources()\n\nEach architecture has its own pcibios_enable_resources() implementation.\nThese differ in many minor ways that have nothing to do with actual\narchitectural differences. Follow-on patches will make most arches\nuse this generic version instead.\n\nThis version is based on powerpc, which seemed most up-to-date. The only\nfunctional difference from the x86 version is that this uses \"!r-\u003eparent\"\nto check for resource collisions instead of \"!r-\u003estart \u0026\u0026 r-\u003eend\".\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "7d715a6c1ae5785d00fb9a876b5abdfc43abc44b", "tree": "58ec6d1969739a590e0c6c976bfebf04c8e9f31e", "parents": [ "657472e9ccd9fccb82b775eb691c4b25b27451da" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Mon Feb 25 09:46:41 2008 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:03 2008 -0700" }, "message": "PCI: add PCI Express ASPM support\n\nPCI Express ASPM defines a protocol for PCI Express components in the D0\nstate to reduce Link power by placing their Links into a low power state\nand instructing the other end of the Link to do likewise. This\ncapability allows hardware-autonomous, dynamic Link power reduction\nbeyond what is achievable by software-only controlled power management.\nHowever, The device should be configured by software appropriately.\nEnabling ASPM will save power, but will introduce device latency.\n\nThis patch adds ASPM support in Linux. It introduces a global policy for\nASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control\nit. The interface can be used as a boot option too. Currently we have\nbelow setting:\n -default, BIOS default setting\n -powersave, highest power saving mode, enable all available ASPM\nstate and clock power management\n -performance, highest performance, disable ASPM and clock power\nmanagement\nBy default, the \u0027default\u0027 policy is used currently.\n\nIn my test, power difference between powersave mode and performance mode\nis about 1.3w in a system with 3 PCIE links.\n\nNote: some devices might not work well with aspm, either because chipset\nissue or device issue. The patch provide API (pci_disable_link_state),\ndriver can disable ASPM for specific device.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "5ff580c10ec06fd296bd23d4570c1a95194094a0", "tree": "fc00b4a107824519ae452c264674e5b8c2768d8e", "parents": [ "c71c68a04ba7672b9373ef04173114c211bb9f88" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Feb 14 14:56:56 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:02 2008 -0700" }, "message": "PCI: remove global list of PCI devices\n\nThis patch finally removes the global list of PCI devices. We are\nrelying entirely on the list held in the driver core now, and do not\nneed a separate \"shadow\" list as no one uses it.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "8a1bc9013a03d41a0e36ee413bb6f97281b30bd1", "tree": "83c01850e1779e37be1d9db0f87436b09b89f3fe", "parents": [ "70308923d317f2ad4973c30d90bb48ae38761317" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Feb 14 14:56:56 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:00 2008 -0700" }, "message": "PCI: add is_added flag to struct pci_dev\n\nThis lets us check if the device is really added to the driver core or\nnot, which is what we need when walking some of the bus lists. The flag\nis there in anticipation of getting rid of the other PCI device list,\nwhich is what we used to check in this situation.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "95247b57ed844511a212265b45cf9a919753aea1", "tree": "ffabb4e3b868120f3d9a2c6463d568ad12d2f7f5", "parents": [ "34220909a26b7f7cfc71e88ce01856c2563fe1d4" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 13 11:03:58 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:46:54 2008 -0700" }, "message": "PCI: clean up search.c a lot\n\nThis cleans up the search.c file, now using the pci list of devices that\nare created for the driver core, instead of relying on our separate list\nof devices. It\u0027s better to use the functions already created for this\nkind of thing, instead of rolling our own all the time.\n\nThis work is done in anticipation of getting rid of that second list of\npci devices all together.\n\nAnd it ends up saving code, always a nice benefit.\n\nThis also removes one compiler warning for when CONFIG_PCI_LEGACY is\nenabled as we no longer internally use the deprecated functions anymore.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "34220909a26b7f7cfc71e88ce01856c2563fe1d4", "tree": "deea265e6356cfeca3f835d4f3ee3f403d37680e", "parents": [ "a2b5d877840f29b5fbb5f53b63dfcbf8bc0aea47" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 13 09:32:03 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:46:53 2008 -0700" }, "message": "PCI: remove pci_get_device_reverse\n\nThis removes the pci_get_device_reverse function as there should not be\nany need to walk pci devices backwards anymore. All users of this call\nare now gone from the tree, so it is safe to remove it.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "448432c4b8e2e3189177d6dbd16b8a8d83c5c11c", "tree": "689adfdedd9165bce6235491110ffd2be9b0af79", "parents": [ "2baad5f96b498812626eadb6f6af3eb41d8656a3" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Feb 12 13:36:20 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:46:52 2008 -0700" }, "message": "PCI: remove pci_find_present\n\nNo one is using this function anymore for quite some time, so remove it.\nEveryone calls pci_dev_present() instead anyway...\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "2baad5f96b498812626eadb6f6af3eb41d8656a3", "tree": "96617ff2422732cccd9b8741befe593232af7201", "parents": [ "4b5ff469234b8ab5cd05f4a201cbb229896729d0" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Wed Feb 13 23:30:12 2008 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:46:52 2008 -0700" }, "message": "PCI: #if 0 pci_assign_resource_fixed()\n\nAn unused function that bloated the kernel only when CONFIG_EMBEDDED was\nenabled...\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "49741c4d01554c2630cea02cfdf236b17062a912", "tree": "715cea9da25804eebc683925616bd0f6042d6819", "parents": [ "8a443df40b35da89e32fcd499d7720c8c2cc2eee" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Mon Mar 17 14:21:18 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Mar 24 22:38:44 2008 -0700" }, "message": "PCI: revert \"pcie: utilize pcie transaction pending bit\"\n\nRevert as it is reported to cause problems for people.\n\ncommit 4348a2dc49f9baecd34a9b0904245488c6189398\nAuthor: Shaohua Li \u003cshaohua.li@intel.com\u003e\nDate: Wed Oct 24 10:45:08 2007 +0800\n\n pcie: utilize pcie transaction pending bit\n\n PCIE has a mechanism to wait for Non-Posted request to complete. I think\n pci_disable_device is a good place to do this.\n\n Signed-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\n Signed-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\nDue to the regression reported at\nhttp://bugzilla.kernel.org/show_bug.cgi?id\u003d10065\n\nCc: Shaohua Li \u003cshaohua.li@intel.com\u003e\nCc: Soeren Sonnenburg \u003ckernel@nn7.de\u003e\nCc: \"Rafael J. Wysocki\" \u003crjw@sisk.pl\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "916fbfb7ae5f8c8f86399794d89e6d273df8826b", "tree": "0b3982923e2b4114b83f67cfca9b950004caef9c", "parents": [ "233f112042d0b50170212dbff99c3b34b8773cd3" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Wed Mar 12 15:26:34 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Mon Mar 17 08:26:44 2008 -0400" }, "message": "devres: implement pcim_iomap_regions_request_all()\n\nSome drivers need to reserve all PCI BARs to prevent other drivers\nmisusing unoccupied BARs. pcim_iomap_regions_request_all() requests\nall BARs and iomap specified BARs.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nCc: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nCc: Jeff Garzik \u003cjeff@garzik.org\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "cc74d96f47b0d916840f92092595e3be9731e047", "tree": "0fa90374b3c0620a2028e7aa7ec28e40c4283039", "parents": [ "93d74463d018ddf05c169ad399e62e90e0f82fc0" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Mar 12 21:48:03 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 13 10:21:09 2008 -0700" }, "message": "PCI: fix issue with busses registering multiple times in sysfs\n\nPCI busses can be registered multiple times, so we need to detect if we\nhave registered our bus structure in sysfs already. If so, don\u0027t do it\nagain.\n\nThanks to Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e for reporting\nthe problem, and to Linus for poking me to get me to believe that it was\na real problem.\n\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "9f9351bbe34a9b12966b1fb6f7c21cfe128340c1", "tree": "b2ec103365f0b553c17f2ec240ae62f147081d36", "parents": [ "f4299e1943d0c9ce29a6c5dc7c7674a82a17b315" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Mon Mar 10 11:43:34 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Mar 10 18:01:17 2008 -0700" }, "message": "rename DECLARE_PCI_DEVICE_TABLE to DEFINE_PCI_DEVICE_TABLE\n\nThis macro is used to define tables, not to declare them.\n\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "90a1ba0c5e39eeea278f263c28ae02166c5911c8", "tree": "8cd1ecd1b4b9e0a70ceb9ca6036082e92c882b41", "parents": [ "4725e7bdb831b9d4bd4ba0b0909398ebcf0c2df9" ], "author": { "name": "Jonas Bonn", "email": "jonas@southpole.se", "time": "Fri Feb 22 11:02:21 2008 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Mar 04 15:07:04 2008 -0800" }, "message": "PCI: Add DECLARE_PCI_DEVICE_TABLE macro\n\nThe definitions of struct pci_device_id arrays should generally follow\nthe same pattern across the entire kernel. This macro defines this\narray as const and puts it into the __devinitconst section.\n\nThere are currently many definitions scattered about the kernel that\nomit the __devinitdata modifier despite the documentation stating that\nit should always be there. These definitions really also should have\nbeen const, which wasn\u0027t possible before but has become so with the\naddition of the __devinitconst attribute.\n\nFurthermore, there are definitions that use \"const\" and __devinitdata,\nwhich is explicitly wrong but the compiler doesn\u0027t catch section\nmismatches if there\u0027s only one such one case in the module (which is\noften the case).\n\nAdding the __devinitconst modifier where there was nothing before buys\nus memory. Adding the const modifier gives the compiler a chance to do\nits thing. Changing __devinitdata to __devinitconst where it was wrong\nactually fixes some compiler errors in older (mid-release) kernels that\nwere patched over by \"removing\" the section attribute altogether (which\nwastes memory).\n\nThis macro makes it pretty difficult to get this definition wrong in\nthe future...\n\nSigned-off-by: Jonas Bonn \u003cjonas@southpole.se\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" } ], "next": "b6ce068a1285a24185b01be8a49021827516b3e1" }