)]}' { "log": [ { "commit": "39aef685af431c032ffd2763ec8782b13c32520c", "tree": "2e6c8761ec9d62521418f6b0b2cf05f8e269407d", "parents": [ "0367aad1ad5f8085ed15e9e30604f50108a1ea06" ], "author": { "name": "Andy Fleming", "email": "afleming@freescale.com", "time": "Mon Feb 04 18:27:55 2008 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Feb 05 23:34:14 2008 -0600" }, "message": "[POWERPC] Made FSL Book-E PMC support more generic\n\nSome of the more recent e300 cores have the same performance monitor\nimplementation as the e500. e300 isn\u0027t book-e, so the name isn\u0027t\nreally appropriate. In preparation for e300 support, rename a bunch\nof fsl_booke things to say fsl_emb (Freescale Embedded Performance Monitors).\n\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "47c0bd1ae24c34e851cf0f2b02ef2a6847d7ae15", "tree": "86fab68618a4afa03660cc576c9e7da3e5a0b520", "parents": [ "c2a7dcad9f0d92d7a96e735abb8bec7b9c621536" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Dec 21 15:39:21 2007 +1100" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@linux.vnet.ibm.com", "time": "Sun Dec 23 13:11:59 2007 -0600" }, "message": "[POWERPC] Reworking machine check handling and Fix 440/440A\n\nThis adds a cputable function pointer for the CPU-side machine\ncheck handling. The semantic is still the same as the old one,\nthe one in ppc_md. overrides the one in cputable, though\nultimately we\u0027ll want to change that so the CPU gets first.\n\nThis removes CONFIG_440A which was a problem for multiplatform\nkernels and instead fixes up the IVOR at runtime from a setup_cpu\nfunction. The \"A\" version of the machine check also tweaks the\nregs-\u003etrap value to differenciate the 2 versions at the C level.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\n" }, { "commit": "b64f87c16f3c00fe593f632e1ee5798ba3f4f3f4", "tree": "1e0c63707b73c4b2f316a01b2e3c6ebd82c6356a", "parents": [ "64c911a3f7c9864a4bbddbb77b722d5553ddcd32" ], "author": { "name": "Becky Bruce", "email": "becky.bruce@freescale.com", "time": "Sat Nov 10 09:17:49 2007 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Nov 13 16:22:43 2007 +1100" }, "message": "[POWERPC] Avoid unpaired stwcx. on some processors\n\nThe context switch code in the kernel issues a dummy stwcx. to clear the\nreservation, as recommended by the architecture. However, some processors\ncan have issues if this stwcx to address A occurs while the reservation\nis already held to a different address B. To avoid this problem, the dummy\nstwcx. needs to be paired with a dummy lwarx to the same address.\n\nThis adds the dummy lwarx, and creates a cpu feature bit to indicate\nwhich cpus are affected. Tested on mpc8641_hpcn_defconfig in\narch/powerpc; build tested in arch/ppc.\n\nSigned-off-by: Becky Bruce \u003cbecky.bruce@freescale.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "f66bce5e6aa1388289c04496c3fcae7bebf5f905", "tree": "7e788739a51947f1caff47f9b5226cad739e3805", "parents": [ "8129535b6bcf40be62af2ae6b9234494f39725dd" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Tue Oct 16 00:58:59 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 17 22:30:09 2007 +1000" }, "message": "[POWERPC] Add 1TB workaround for PA6T\n\nPA6T has a bug where the slbie instruction does not honor the large\nsegment bit. As a result, we have to always use slbia when switching\ncontext.\n\nWe don\u0027t have to worry about changing the slbie\u0027s during fault processing,\nsince they should never be replacing one VSID with another using the\nsame ESID. I.e. there\u0027s no risk for inserting duplicate entries due to a\nfailed slbie of the old entry. So as long as we clear it out on context\nswitch we should be fine.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "1189be6508d45183013ddb82b18f4934193de274", "tree": "58924481b4de56699e4a884dce8dc601e71cf7d1", "parents": [ "287e5d6fcccfa38b953cebe307e1ddfd32363355" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Oct 11 20:37:10 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Oct 12 14:05:17 2007 +1000" }, "message": "[POWERPC] Use 1TB segments\n\nThis makes the kernel use 1TB segments for all kernel mappings and for\nuser addresses of 1TB and above, on machines which support them\n(currently POWER5+, POWER6 and PA6T).\n\nWe detect that the machine supports 1TB segments by looking at the\nibm,processor-segment-sizes property in the device tree.\n\nWe don\u0027t currently use 1TB segments for user addresses \u003c 1T, since\nthat would effectively prevent 32-bit processes from using huge pages\nunless we also had a way to revert to using 256MB segments. That\nwould be possible but would involve extra complications (such as\nkeeping track of which segment size was used when HPTEs were inserted)\nand is not addressed here.\n\nParts of this patch were originally written by Ben Herrenschmidt.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "87a72f9e171e558a0288aa83ef1dc6ae4af32224", "tree": "7b5102ebef8b8405d83a141163f08d1a0a2c9e46", "parents": [ "64f2758514e3bad19cab03d22851ab37654399a4" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Oct 04 14:18:01 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Oct 11 21:37:50 2007 +1000" }, "message": "[POWERPC] Fix performance monitor on machines with logical PVR\n\nSome IBM machines supply a \"logical\" PVR (processor version register)\nvalue in the device tree in the cpu nodes rather than the real PVR.\nThis is used for instance to indicate that the processors in a POWER6\npartition have been configured by the hypervisor to run in POWER5+\nmode rather than POWER6 mode. To cope with this, we call identify_cpu\na second time with the logical PVR value (the first call is with the\nreal PVR value in the very early setup code).\n\nHowever, POWER5+ machines can also supply a logical PVR value, and use\nthe same value (the value that indicates a v2.04 architecture\ncompliant processor). This causes problems for code that uses the\nperformance monitor (such as oprofile), because the PMU registers are\ndifferent in POWER6 (even in POWER5+ mode) from the real POWER5+.\n\nThis change works around this problem by taking out the PMU\ninformation from the cputable entries for the logical PVR values, and\nchanging identify_cpu so that the second call to it won\u0027t overwrite\nthe PMU information that was established by the first call (the one\nwith the real PVR), but does update the other fields. Specifically,\nif the cputable entry for the logical PVR value has num_pmcs \u003d\u003d 0,\nnone of the PMU-related fields get used.\n\nSo that we can create a mixed cputable entry, we now make cur_cpu_spec\npoint to a single static struct cpu_spec, and copy stuff from\ncpu_specs[i] into it. This has the side-effect that we can now make\ncpu_specs[] be initdata.\n\nUltimately it would be good to move the PMU-related fields out to a\nseparate structure, pointed to by the cputable entries, and change\nidentify_cpu so that it saves the PMU info pointer, copies the whole\nstructure, and restores the PMU info pointer, rather than identify_cpu\nhaving to list all the fields that are *not* PMU-related.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "11af1192b75307e4099dd962b3b97b255d5ab023", "tree": "f1474924f1832a0f5f9079ab058ddf80d441547b", "parents": [ "7f21f52940212c25b4387c2450018e161043549a" ], "author": { "name": "Scott Wood", "email": "scottwood@freescale.com", "time": "Fri Sep 14 15:32:14 2007 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Oct 04 11:02:21 2007 -0500" }, "message": "[POWERPC] mpc82xx: Define CPU_FTR_NEED_COHERENT\n\nThe 8272 (and presumably other PCI PQ2 chips) appear to have the\nsame issue as the 83xx regarding PCI streaming DMA.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "5e14d21e3f28a4181dacff0336040e30942f4921", "tree": "ebaa8217d5af80e15116960641a0bf87a8b5d717", "parents": [ "d8f1324a5063c833862328ceafabc53ac3cc4f71" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Sep 13 01:44:20 2007 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Sep 14 08:53:30 2007 -0500" }, "message": "[POWERPC] Add cpu feature for SPE handling\n\nMake it so that SPE support can be determined at runtime. This is similiar\nto how we handle AltiVec. This allows us to have SPE support built in and\nwork on processors with and without SPE.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "b6f41cc8304ce04a5afa3e1e5d2ff6e8088831b7", "tree": "e2c4d009108857ca89d084d9e407f956a1c7ce71", "parents": [ "078f194045f892a10f4a5406e7cb06a7f8d42c57" ], "author": { "name": "Josh Boyer", "email": "jwboyer@linux.vnet.ibm.com", "time": "Tue Jul 03 02:06:53 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Jul 10 21:55:50 2007 +1000" }, "message": "[POWERPC] Consolidate PowerPC 750 cputable features\n\nThe 750 CPU_FTR macros have quite a bit of duplication in them. Consolidate\nthem to use CPU_FTRS_750 and only list the unique features for derivatives.\n\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "4508dc21feb189159d4cc1d5b79c5a55fad5f2ed", "tree": "8128d7642606a64e2b65a4ea9d2e74cf70cdf1f8", "parents": [ "8e561e7eda02819c711a75b64a000bf34948cdbb" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Jun 13 14:52:57 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Jun 14 22:30:16 2007 +1000" }, "message": "[POWERPC] Merge CPU features pertaining to icache coherency\n\nCurrently the powerpc kernel has a 64-bit only feature,\nCOHERENT_ICACHE used for those CPUS which maintain icache/dcache\ncoherency in hardware (POWER5, essentially). It also has a feature,\nSPLIT_ID_CACHE, which is used on CPUs which have separate i and\nd-caches, which is to say everything except 601 and Freescale E200.\n\nIn nearly all the places we check the SPLIT_ID_CACHE, what we actually\ncare about is whether the i and d-caches are coherent (which they will\nbe, trivially, if they\u0027re the same cache).\n\nThis tries to clarify the situation a little. The COHERENT_ICACHE\nfeature becomes availble on 32-bit and is set for all CPUs where i and\nd-cache are effectively coherent, whether this is due to special logic\n(POWER5) or because they\u0027re unified. We check this, instead of\nSPLIT_ID_CACHE nearly everywhere.\n\nThe SPLIT_ID_CACHE feature itself is replaced by a UNIFIED_ID_CACHE\nfeature with reversed sense, set only on 601 and Freescale E200. In\nthe two places (one Freescale BookE specific) where we really care\nwhether it\u0027s a unified cache, not whether they\u0027re coherent, we check\nthis feature. The CPUs with unified cache are so few, we could\nconsider replacing this feature bit with explicit checks against the\nPVR.\n\nThis will make unifying the 32-bit and 64-bit cache flush code a\nlittle more straightforward.\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "3d372548b4af1a3d0a40f3dde7af5389a30ce359", "tree": "7533e8332e8a4d9be5d8770a455795f3ceed5695", "parents": [ "f4dcd3c229a0745aff7d6835ca7c45aaeb293714" ], "author": { "name": "James.Yang", "email": "James.Yang@freescale.com", "time": "Wed May 02 16:34:43 2007 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu May 17 21:10:15 2007 +1000" }, "message": "[POWERPC] Remove CPU_FTR_NEED_COHERENT for 7448.\n\nRemove CPU_FTR_NEED_COHERENT for MPC7448 (and single-core MPC86xx).\nThis prevents needlessly setting M\u003d1 when not SMP.\n\nSigned-off-by: James.Yang \u003cJames.Yang@freescale.com\u003e\nAcked-by: Jon Loeliger \u003cjdl@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "25fc530eed1ca9ccde2a1e96d0b2060867f76bb2", "tree": "e8f8705562939146413b79f50963acca5f64fab5", "parents": [ "7e8bddf56661a16b7d5945390a37cd2e9c5e45fe" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Apr 18 16:38:21 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Apr 24 21:31:51 2007 +1000" }, "message": "[POWERPC] pasemi: PA6T oprofile support\n\nOprofile support for PA6T, kernel side.\n\nAlso rename the PA6T_SPRN.* defines to SPRN_PA6T.*.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "a14c4508f4bb1bb7772b1976a82646be8d8b515a", "tree": "15d6750cb360fdb74f89c63c4fda641f6b148667", "parents": [ "c3ea6921a68ed4bdcfc782676c52707cbe347952" ], "author": { "name": "Josh Boyer", "email": "jwboyer@linux.vnet.ibm.com", "time": "Fri Apr 13 04:33:25 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Apr 24 21:31:47 2007 +1000" }, "message": "[POWERPC] Fix PowerPC 750CL and 750GX CPU features\n\nPowerPC 750CL has high BATs. The patch below adds a CPU_FTRS_750CL that\nincludes that. Without it, the original firmware mappings in the high BATs\naren\u0027t cleared which continue to override the linux translations.\n\nIt also adds CPU_FTR_COMMON to CPU_FTRS_750GX for completeness.\n\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "1bd2e5ae18a8f93333707d81d3dbd9209a255137", "tree": "72feb6bae2a8dea311e2d9f2e412cfbc69a952fb", "parents": [ "c69b767a2c871bb80cb9e346d6ebce248f711dfb" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Sun Jan 28 21:23:54 2007 -0600" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Feb 07 14:03:19 2007 +1100" }, "message": "[POWERPC] Add PMC type to cputable\n\nAdd cputable entries for which type of PMC implementation the processor\nhas.\n\nI\u0027ve only filled in the current 64-bit processors, the unfilled default\nvalue will have same behaviour as before so it can be done over time\nas needed.\n\nAlso tidy up the dummy_perf implementation a bit, aggregating it into\none function with ifdefs instead of several.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "1473ae6cab7f47dde4c14f397371b2ad94457d3a", "tree": "2ec51aac9cef695177a56a02700ce04161220d3b", "parents": [ "18a1e4c3ee67680287bf3c455b5047421eda3c14" ], "author": { "name": "Michael Neuling", "email": "mikey@neuling.org", "time": "Tue Jan 23 15:59:26 2007 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Feb 07 11:57:52 2007 +1100" }, "message": "[POWERPC] remove unused CPU_FTRS_POWER6X\n\nCPU_FTRS_POWER6X is unused, hence remove it.\n\nSigned-off-by Michael Neuling \u003cmikey@neuling.org\u003e\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "973c1fabc70deb10f12a0eaab2f50c2263784257", "tree": "5b0ef183757049d241d0709f0cea9e370627b687", "parents": [ "4383162c8f2fa75d916c4901b0d1ebcac7aeaf74", "d10f73480b991da2aa1c000ed38eda3e4a987292" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Dec 11 16:31:42 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Dec 11 16:31:42 2006 +1100" }, "message": "Merge branch \u0027for_paulus\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc\n" }, { "commit": "4c198557c6b45956a6f54b958fb97a15b02a6a3b", "tree": "91db4a694f01f4e4d29bcd7f3bc90c3ef311aebf", "parents": [ "396a1a5832ae28ce2c4150f98827873cbef554f5" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Fri Dec 08 17:46:58 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Dec 09 11:39:05 2006 +1100" }, "message": "[POWERPC] Add DSCR SPR to sysfs\n\nPOWER6 adds a new SPR, the data stream control register (DSCR). It can\nbe used to adjust how agressive the prefetch mechanisms are.\n\nIts possible we may want to context switch this, but for now just export\nit to userspace via sysfs so we can adjust it.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "aa42c69c67f82e88f0726258efe7306708e1cf14", "tree": "d5305de3285d504e1bd1e955155e5e06b5b9ef76", "parents": [ "c99767974ebd2a719d849fdeaaa1674456f5283f" ], "author": { "name": "Kim Phillips", "email": "kim.phillips@freescale.com", "time": "Fri Dec 08 02:43:30 2006 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Dec 08 02:43:30 2006 -0600" }, "message": "[POWERPC] Add support for FP emulation for the e300c2 core\n\nThe e300c2 has no FPU. Its MSR[FP] is grounded to zero. If an attempt\nis made to execute a floating point instruction (including floating-point\nload, store, or move instructions), the e300c2 takes a floating-point\nunavailable interrupt.\n\nThis patch adds support for FP emulation on the e300c2 by declaring a\nnew CPU_FTR_FP_TAKES_FPUNAVAIL, where FP unavail interrupts are\nintercepted and redirected to the ProgramCheck exception path for\ncorrect emulation handling.\n\n(If we run out of CPU_FTR bits we could look to reclaim this bit by adding\nsupport to test the cpu_user_features for PPC_FEATURE_HAS_FPU instead)\n\nIt adds a nop to the exception path for 32-bit processors with a FPU.\n\nSigned-off-by: Kim Phillips \u003ckim.phillips@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "0470466dbafd1db0815bb884d26a6be431e19f96", "tree": "e40c7ba8c3687dd33c09a137ecb06c5f9dccdb5e", "parents": [ "80814be40e1f0e7e6fc00fdfe0af16268670e0b4" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Thu Nov 30 11:46:22 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Dec 04 20:41:59 2006 +1100" }, "message": "[POWERPC] Fix cputable.h for combined build\n\nRemove CPU_FTR_16M_PAGE from the cupfeatures mask at runtime on iSeries.\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "0b8e2e131094d162a836e2afe86e52acbfa05703", "tree": "c7000c2b7840c0445df815e89a176e94ca082a6e", "parents": [ "e0426047cb684842700f0098f74842a38260dbae" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Nov 23 00:46:46 2006 +0100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Dec 04 20:40:34 2006 +1100" }, "message": "[POWERPC] Make 64-bit cpu features defined on 32-bit\n\nIt saves #ifdef\u0027ing in callers if we at least define the 64-bit cpu\nfeatures for 32-bit also.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Arnd Bergmann \u003carnd.bergmann@de.ibm.com\u003e\n" }, { "commit": "974a76f51355d22f4f63d83d6bb1ccecd019ec58", "tree": "9a6c5745d8e1f592427d96fbf64d8546af4feb39", "parents": [ "18f2190d796198fbb5d4bc4c87511acf3ced7d47" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Nov 10 20:38:53 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Dec 04 20:40:16 2006 +1100" }, "message": "[POWERPC] Distinguish POWER6 partition modes and tell userspace\n\nThis adds code to look at the properties firmware puts in the device\ntree to determine what compatibility mode the partition is in on\nPOWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM\nentries appropriately.\n\nSpecifically, we look at the cpu-version property in the cpu node(s).\nIf that contains a \"logical\" PVR value (of the form 0x0f00000x), we\ncall identify_cpu again with this PVR value. A value of 0x0f000001\nindicates the partition is in POWER5+ compatibility mode, and a value\nof 0x0f000002 indicates \"POWER6 architected\" mode, with various\nextensions disabled. We also look for various other properties:\nibm,dfp, ibm,purr and ibm,spurr.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "18f2190d796198fbb5d4bc4c87511acf3ced7d47", "tree": "621afac81fc83728a41fa5ff9ee3381a1b0f5921", "parents": [ "0443bbd3d8496f9c2bc3e8c9d1833c6638722743" ], "author": { "name": "Maynard Johnson", "email": "maynardj@us.ibm.com", "time": "Mon Nov 20 18:45:16 2006 +0100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Dec 04 20:40:14 2006 +1100" }, "message": "[POWERPC] cell: Add oprofile support\n\nAdd PPU event-based and cycle-based profiling support to Oprofile for Cell.\n\nOprofile is expected to collect data on all CPUs simultaneously.\nHowever, there is one set of performance counters per node. There are\ntwo hardware threads or virtual CPUs on each node. Hence, OProfile must\nmultiplex in time the performance counter collection on the two virtual\nCPUs.\n\nThe multiplexing of the performance counters is done by a virtual\ncounter routine. Initially, the counters are configured to collect data\non the even CPUs in the system, one CPU per node. In order to capture\nthe PC for the virtual CPU when the performance counter interrupt occurs\n(the specified number of events between samples has occurred), the even\nprocessors are configured to handle the performance counter interrupts\nfor their node. The virtual counter routine is called via a kernel\ntimer after the virtual sample time. The routine stops the counters,\nsaves the current counts, loads the last counts for the other virtual\nCPU on the node, sets interrupts to be handled by the other virtual CPU\nand restarts the counters, the virtual timer routine is scheduled to run\nagain. The virtual sample time is kept relatively small to make sure\nsampling occurs on both CPUs on the node with a relatively small\ngranularity. Whenever the counters overflow, the performance counter\ninterrupt is called to collect the PC for the CPU where data is being\ncollected.\n\nThe oprofile driver relies on a firmware RTAS call to setup the debug bus\nto route the desired signals to the performance counter hardware to be\ncounted. The RTAS call must set the routing registers appropriately in\neach of the islands to pass the signals down the debug bus as well as\nrouting the signals from a particular island onto the bus. There is a\nsecond firmware RTAS call to reset the debug bus to the non pass thru\nstate when the counters are not in use.\n\nSigned-off-by: Carl Love \u003ccarll@us.ibm.com\u003e\nSigned-off-by: Maynard Johnson \u003cmpjohn@us.ibm.com\u003e\nSigned-off-by: Arnd Bergmann \u003carnd.bergmann@de.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "859deea949c382d9ccb6397fe33df3703ecef45d", "tree": "b0fe2d7a814143f3ff61a73a0727522a1a3dd6e4", "parents": [ "21c4ff80cba5e24932f3ef79c8482c0491630b2b" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Oct 20 14:37:05 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 25 11:54:18 2006 +1000" }, "message": "[POWERPC] Cell timebase bug workaround\n\nThe Cell CPU timebase has an erratum. When reading the entire 64 bits\nof the timebase with one mftb instruction, there is a handful of cycles\nwindow during which one might read a value with the low order 32 bits\nalready reset to 0x00000000 but the high order bits not yet incremeted\nby one. This fixes it by reading the timebase again until the low order\n32 bits is no longer 0. That might introduce occasional latencies if\nhitting mftb just at the wrong time, but no more than 70ns on a cell\nblade, and that was considered acceptable.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "0909c8c2d547e45ca50e2492b08ec93a37b35237", "tree": "23e66e1dc9a5bd674ba1375b5fccd2cb0d5787a8", "parents": [ "7aeb732428fc8e2ecae6d432873770c12f04a979" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Oct 20 11:47:18 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 25 11:54:07 2006 +1000" }, "message": "[POWERPC] Support feature fixups in vdso\u0027s\n\nThis patch reworks the feature fixup mecanism so vdso\u0027s can be fixed up.\nThe main issue was that the construct:\n\n .long label (or .llong on 64 bits)\n\nwill not work in the case of a shared library like the vdso. It will\ngenerate an empty placeholder in the fixup table along with a reloc,\nwhich is not something we can deal with in the vdso.\n\nThe idea here (thanks Alan Modra !) is to instead use something like:\n\n1:\n .long label - 1b\n\nThat is, the feature fixup tables no longer contain addresses of bits of\ncode to patch, but offsets of such code from the fixup table entry\nitself. That is properly resolved by ld when building the .so\u0027s. I\u0027ve\nmodified the fixup mecanism generically to use that method for the rest\nof the kernel as well.\n\nAnother trick is that the 32 bits vDSO included in the 64 bits kernel\nneed to have a table in the 64 bits format. However, gas does not\nsupport 32 bits code with a statement of the form:\n\n .llong label - 1b (Or even just .llong label)\n\nThat is, it cannot emit the right fixup/relocation for the linker to use\nto assign a 32 bits address to an .llong field. Thus, in the specific\ncase of the 32 bits vdso built as part of the 64 bits kernel, we are\nusing a modified macro that generates:\n\n .long 0xffffffff\n .llong label - 1b\n\nNote that is assumes that the value is negative which is enforced by\nthe .lds (those offsets are always negative as the .text is always\nbefore the fixup table and gas doesn\u0027t support emiting the reloc the\nother way around).\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "7aeb732428fc8e2ecae6d432873770c12f04a979", "tree": "00a0fed4a824bc2a5857e9f0b4016cef0bb22e9e", "parents": [ "42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Oct 20 11:47:16 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 25 11:54:02 2006 +1000" }, "message": "[POWERPC] Support nested cpu feature sections\n\nThis patch adds some macros that can be used with an explicit label in\norder to nest cpu features. This should be used very careful but is\nnecessary for the upcoming cell TB fixup.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc", "tree": "368a26a61085e567357b3974e7799e56069032eb", "parents": [ "fb20f65a01a97bdf4bb746eecfc24a08561e2648" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Oct 24 16:42:40 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 25 11:42:10 2006 +1000" }, "message": "[POWERPC] Consolidate feature fixup code\n\nThere are currently two versions of the functions for applying the\nfeature fixups, one for CPU features and one for firmware features. In\naddition, they are both in assembly and with separate implementations\nfor 32 and 64 bits. identify_cpu() is also implemented in assembly and\nseparately for 32 and 64 bits.\n\nThis patch replaces them with a pair of C functions. The call sites are\nslightly moved on ppc64 as well to be called from C instead of from\nassembly, though it\u0027s a very small change, and thus shouldn\u0027t cause any\nproblem.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "b3ebd1d862d6c23caa58e40d341eefc426f835e1", "tree": "c4db512b520833be44b72b97aab0c439138bfb5e", "parents": [ "0024300000769eadcb4a4fcdff531d45ee7735d4" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Sep 06 14:35:57 2006 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Sep 13 18:39:52 2006 +1000" }, "message": "[POWERPC] powerpc: PA6T cputable entry, PVR value\n\nIntroduce PWRficient PA6T cputable entries and feature bits.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "0024300000769eadcb4a4fcdff531d45ee7735d4", "tree": "18a94c4df1716a59a80b8b6934e55a75677f26c3", "parents": [ "5a2fe38d2844ba2f2dd8f4946d795e09d8f7e095" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Sep 06 14:35:19 2006 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Sep 13 18:39:52 2006 +1000" }, "message": "[POWERPC] powerpc: Divorce CPU_FTR_CTRL from CPU_FTR_PPCAS_ARCH_V2_BASE\n\nThe performance monitor implementation (including CTRL register behaviour)\nis just included in PPC v2 as an example, it\u0027s not truly part of the base.\n\nIt\u0027s actually a somewhat misleading feature, but I\u0027ll leave that be for\nnow: The presence of the register is not what the feature bit is used\nfor, but instead it\u0027s used to determine if it contains the runlatch\nbit for idle reporting of the performance monitor. For alternative\nimplementations, the register might still exist but the bit might have\ndifferent meaning (or no meaning at all).\n\nFor now, split it off and don\u0027t include it in CPU_FTR_PPCAS_ARCH_V2_BASE.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "f39b7a55a84e34e3074b168e30dc73b66e85261d", "tree": "9be321bfcd5d0404309b1514127987117c2541cc", "parents": [ "2e97425197ecf85641a89e5a4868f8e147cc443f" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Fri Aug 11 00:07:08 2006 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Aug 25 13:27:35 2006 +1000" }, "message": "[POWERPC] Cleanup CPU inits\n\nCleanup CPU inits a bit more, Geoff Levand already did some earlier.\n\n* Move CPU state save to cpu_setup, since cpu_setup is only ever done\n on cpu 0 on 64-bit and save is never done more than once.\n* Rename __restore_cpu_setup to __restore_cpu_ppc970 and add\n function pointers to the cputable to use instead. Powermac always\n has 970 so no need to check there.\n* Rename __970_cpu_preinit to __cpu_preinit_ppc970 and check PVR before\n calling it instead of in it, it\u0027s too early to use cputable.\n* Rename pSeries_secondary_smp_init to generic_secondary_smp_init since\n everyone but powermac and iSeries use it.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "3965f8c59778b0d37460ec268f92c0c382546b5c", "tree": "d5c508cb20c8702117457cf331a9edd203298754", "parents": [ "f127a2b5cf542968ea1c428f86ffc780ea929452" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Jun 28 13:50:39 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Jun 28 15:19:03 2006 +1000" }, "message": "[POWERPC] Simplify the code defining the 64-bit CPU features\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "45c091bb2d453ce4a8b06cf19872ec7a77fc4799", "tree": "06fb2e05518ebfba163f8424e028e7faf5672d66", "parents": [ "d588fcbe5a7ba8bba2cebf7799ab2d573717a806", "2191fe3e39159e3375f4b7ec1420df149f154101" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jun 22 22:11:30 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jun 22 22:11:30 2006 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (139 commits)\n [POWERPC] re-enable OProfile for iSeries, using timer interrupt\n [POWERPC] support ibm,extended-*-frequency properties\n [POWERPC] Extra sanity check in EEH code\n [POWERPC] Dont look for class-code in pci children\n [POWERPC] Fix mdelay badness on shared processor partitions\n [POWERPC] disable floating point exceptions for init\n [POWERPC] Unify ppc syscall tables\n [POWERPC] mpic: add support for serial mode interrupts\n [POWERPC] pseries: Print PCI slot location code on failure\n [POWERPC] spufs: one more fix for 64k pages\n [POWERPC] spufs: fail spu_create with invalid flags\n [POWERPC] spufs: clear class2 interrupt status before wakeup\n [POWERPC] spufs: fix Makefile for \"make clean\"\n [POWERPC] spufs: remove stop_code from struct spu\n [POWERPC] spufs: fix spu irq affinity setting\n [POWERPC] spufs: further abstract priv1 register access\n [POWERPC] spufs: split the Cell BE support into generic and platform dependant parts\n [POWERPC] spufs: dont try to access SPE channel 1 count\n [POWERPC] spufs: use kzalloc in create_spu\n [POWERPC] spufs: fix initial state of wbox file\n ...\n\nManually resolved conflicts in:\n\tdrivers/net/phy/Makefile\n\tinclude/asm-powerpc/spu.h\n" }, { "commit": "ce221982e0bef039d7047b0f667bb414efece5af", "tree": "fa01b712522338d3f19ee5a6fedace7b7149c430", "parents": [ "19242b240793ac769f5b91b68a5e43dd39f0c530" ], "author": { "name": "Arnd Bergmann", "email": "arnd.bergmann@de.ibm.com", "time": "Thu Jun 15 15:09:16 2006 +0200" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Jun 17 10:56:24 2006 -0700" }, "message": "[PATCH] powerpc: enable CPU_FTR_CI_LARGE_PAGE for cell\n\nReflect the fact that the Cell Broadband Engine supports 64k\npages by adding the bit to the CPU features.\n\nSigned-off-by: Arnd Bergmann \u003carnd.bergmann@de.ibm.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "227318bbde6c8309b1d20ab46532ec2b737e1fee", "tree": "de8bbbda0d69fc641629c10e5a0a1070a09bdde7", "parents": [ "8555a0029b1b0840237b750e55d4835a52cc719b" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Sat Jun 10 20:32:01 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Jun 15 19:31:26 2006 +1000" }, "message": "[POWERPC] Remove stale 64bit on 32bit kernel code\n\nRemove some stale POWER3/POWER4/970 on 32bit kernel support.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "fab5db97e44f76461f76b24adfa8ccb14d4df498", "tree": "123026a1a6f1702468220189b7410077479ae8a2", "parents": [ "651d765d0b2c72d33430487c8b6ef64c60cd2134" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Jun 07 16:14:40 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Jun 09 21:24:15 2006 +1000" }, "message": "[PATCH] powerpc: Implement support for setting little-endian mode via prctl\n\nThis adds the PowerPC part of the code to allow processes to change\ntheir endian mode via prctl.\n\nThis also extends the alignment exception handler to be able to fix up\nalignment exceptions that occur in little-endian mode, both for\n\"PowerPC\" little-endian and true little-endian.\n\nWe always enter signal handlers in big-endian mode -- the support for\nlittle-endian mode does not amount to the creation of a little-endian\nuser/kernel ABI. If the signal handler returns, the endian mode is\nrestored to what it was when the signal was delivered.\n\nWe have two new kernel CPU feature bits, one for PPC little-endian and\none for true little-endian. Most of the classic 32-bit processors\nsupport PPC little-endian, and this is reflected in the CPU feature\ntable. There are two corresponding feature bits reported to userland\nin the AT_HWCAP aux vector entry.\n\nThis is based on an earlier patch by Anton Blanchard.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "e78dbc800c37f035d476c4fdebdf43cdecfcb731", "tree": "3b5ff1242c284e0c77e755b62d7e8600aafceb25", "parents": [ "8eb6c6e3b9c8bfed3d75536ab142d7694627c2e5" ], "author": { "name": "Michael Neuling", "email": "mikey@neuling.org", "time": "Thu Jun 08 14:42:34 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Jun 09 21:24:05 2006 +1000" }, "message": "[PATCH] powerpc: oprofile support for POWER6\n\nPOWER6 moves some of the MMCRA bits and also requires some bits to be\ncleared each PMU interrupt.\n\nSigned-off-by: Michael Neuling \u003cmikey@neuling.org\u003e\nAcked-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "03054d51a70e8c273df5d9bc31fea6c843eaa1c3", "tree": "44b1b9e52979a0b083edb5169c1ac328abd4c715", "parents": [ "09b03b6c29638eb5c79b02e585cb1b20d91a8ea0" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Sat Apr 29 09:51:06 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Apr 29 10:56:58 2006 +1000" }, "message": "[PATCH] powerpc: Add cputable entry for POWER6\n\nAdd a cputable entry for the POWER6 processor.\n\nThe SIHV and SIPR bits in the mmcra have moved in POWER6, so disable\nsupport for that until oprofile is fixed.\n\nAlso tell firmware that we know about POWER6.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "7c92943c7b6c42fa631ac2b67aeb507e727cd75b", "tree": "6fcfee97618ff9b2d23d639a825b62e935028496", "parents": [ "5d5d7727a8cde78f798ecf04bac8031eff536f9d" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Thu Mar 23 17:36:59 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Mar 27 14:48:06 2006 +1100" }, "message": "[PATCH] powerpc: work around sparse warnings in cputable.h\n\nChristoph noticed that sparse warned about all the enum tags in cuptable.h\nthat had values that required them to be type log. (enum tags are ints\naccording to the standard.)\n\nThis patch attempts to fix them in the least intrusive way possible by\nturning them all into #defines except for the 32 bit CPU_FTRS_POSSIBLE and\nCPU_FTRS_ALWAYS which are hard to construct that way. This works because\nthese last two contain no bits above 2^31.\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "3d15910bfbeb02286ce4b5009c53754e88066ccb", "tree": "7b6bc090fb4805edd9414966db89e9554e98bfe0", "parents": [ "415202447d31d0f458cca256ad7e0ed777d993d9" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Tue Mar 21 20:45:58 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Mar 22 15:04:15 2006 +1100" }, "message": "[PATCH] powerpc: trivial: Cleanup whitespace in cputable.h\n\nRemove redundant whitespace in include/asm-powerpc/cputable.h\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "516450179454de9e689e0a53ed8f34b896e8651c", "tree": "78eae2f77de6cd39b18c7393fc5854456fc3fb1f", "parents": [ "6749c5507388f3fc3719f57a54b540ee83f6661a", "0d514f040ac6629311974889d5b96bcf21c6461a" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Mar 09 14:32:05 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Mar 09 14:32:05 2006 +1100" }, "message": "Merge ../linux-2.6\n" }, { "commit": "aa5cb02143123289bd37c30c0ad60339f8da0bad", "tree": "63044afa0e3348ec20d63b86ebfa9768123339e7", "parents": [ "e2a002b9a731083c69add71b1f5014bac7dc1770" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 01 15:07:07 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Mar 03 22:00:23 2006 +1100" }, "message": "[PATCH] powerpc: Expose SMT and L1 icache snoop userland features\n\nThis patch makes userland aware of the icache snoop capability of the\nPOWER5 (and possibly others in the future) and of SMT capabilities.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "c6622f63db86fcbd41bf6fe05ddf2e00c1e51ced", "tree": "102f3ea0a891212603a3722fece337d6a74d450c", "parents": [ "a00428f5b149e36b8225b2a0812742a6dfb07b8c" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Feb 24 10:06:59 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Feb 24 14:05:56 2006 +1100" }, "message": "powerpc: Implement accurate task and CPU time accounting\n\nThis implements accurate task and cpu time accounting for 64-bit\npowerpc kernels. Instead of accounting a whole jiffy of time to a\ntask on a timer interrupt because that task happened to be running at\nthe time, we now account time in units of timebase ticks according to\nthe actual time spent by the task in user mode and kernel mode. We\nalso count the time spent processing hardware and software interrupts\naccurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If\nthat is not set, we do tick-based approximate accounting as before.\n\nTo get this accurate information, we read either the PURR (processor\nutilization of resources register) on POWER5 machines, or the timebase\non other machines on\n\n* each entry to the kernel from usermode\n* each exit to usermode\n* transitions between process context, hard irq context and soft irq\n context in kernel mode\n* context switches.\n\nOn POWER5 systems with shared-processor logical partitioning we also\nread both the PURR and the timebase at each timer interrupt and\ncontext switch in order to determine how much time has been taken by\nthe hypervisor to run other partitions (\"steal\" time). Unfortunately,\nsince we need values of the PURR on both threads at the same time to\naccurately calculate the steal time, and since we can only calculate\nsteal time on a per-core basis, the apportioning of the steal time\nbetween idle time (time which we ceded to the hypervisor in the idle\nloop) and actual stolen time is somewhat approximate at the moment.\n\nThis is all based quite heavily on what s390 does, and it uses the\ngeneric interfaces that were added by the s390 developers,\ni.e. account_system_time(), account_user_time(), etc.\n\nThis patch doesn\u0027t add any new interfaces between the kernel and\nuserspace, and doesn\u0027t change the units in which time is reported to\nuserspace by things such as /proc/stat, /proc/\u003cpid\u003e/stat, getrusage(),\ntimes(), etc. Internally the various task and cpu times are stored in\ntimebase units, but they are converted to USER_HZ units (1/100th of a\nsecond) when reported to userspace. Some precision is therefore lost\nbut there should not be any accumulating error, since the internal\naccumulation is at full precision.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "1775dbbcd02cab0c41329dd2cec5b69c7fafd13f", "tree": "86043c098e2cc8c86780e1ddb0d76e1430cbed9c", "parents": [ "f1434a4854407a262d194411245eb9ee66221f90" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Feb 22 09:46:02 2006 -0600" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Feb 24 11:36:25 2006 +1100" }, "message": "[PATCH] powerpc: Enable coherency for all pages on 83xx to fix PCI data corruption\n\nOn the 83xx platform to ensure the PCI inbound memory is handled properly we\nhave to turn on coherency for all pages in the MMU. Otherwise we see\ncorruption if inbound \"prefetching/streaming\" is enabled on the PCI controller.\n\nSigned-off-by: Randy Vinson \u003crvinson@mvista.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "7a45fb19cef93574230827e6e2c97ad5760ddecd", "tree": "89c4d2628f7d8acea2e7c315097bb4488a7e8070", "parents": [ "80f15dc703b3677d0b025bafd215f1f3664c8978" ], "author": { "name": "Andy Whitcroft", "email": "apw@shadowen.org", "time": "Fri Jan 13 12:35:49 2006 +0000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Jan 14 11:12:16 2006 +1100" }, "message": "[PATCH] powerpc: oprofile cpu type names clash with other code\n\nIn 2.6.15-git6 a change was commited in the oprofile support in\nthe powerpc architecture. It introduced the powerpc_oprofile_type\nwhich contains the define G4. This causes a name clash with the\nexisting wacom usb tablet driver.\n\n CC [M] drivers/usb/input/wacom.o\n drivers/usb/input/wacom.c:98: error: conflicting types for `G4\u0027\n include/asm/cputable.h:37: error: previous declaration of `G4\u0027\n CC [M] drivers/usb/mon/mon_text.o\n make[3]: *** [drivers/usb/input/wacom.o] Error 1\n make[2]: *** [drivers/usb/input] Error 2\n\nThe elements of an enum declared in global scope are effectivly\nglobal identifiers themselves. As such we need to ensure the names\nare unique. This patch updates the later oprofile support to use\nunique names.\n\nSigned-off-by: Andy Whitcroft \u003capw@shadowen.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "80f15dc703b3677d0b025bafd215f1f3664c8978", "tree": "fa60781edcedefe4eb6baa6d213a62bbc6d7803a", "parents": [ "25cd6aa0aa059b48cdcef2a00981b14fafd5161a" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Jan 14 10:11:39 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Jan 14 10:11:39 2006 +1100" }, "message": "powerpc: Provide a suitable AT_PLATFORM value\n\nThe glibc folks want to use AT_PLATFORM to select between possible\nalternative versions of shared libraries. This commit makes the kernel\nsupply an AT_PLATFORM string that indicates what class of processor\nwe are running on. Processors with the same set of user-level\ninstructions and roughly the same instruction scheduling characteristics\nare given the same AT_PLATFORM value; for example, 821, 823 and 860\nare all reported as \"ppc823\", and 7447, 7447A, 7448, 7450, 7451, 7455\nare all called \"ppc7450\".\n\nThe intention is that the AT_PLATFORM values match the values that\ngcc accepts for the -mcpu\u003d option. For values which are numeric\n(e.g. -mcpu\u003d750), \"ppc\" has been prepended.\n\nThis also adds a PPC_FEATURE_BOOKE bit to the AT_HWCAP value and sets\nit for the 440 family and the Freescale 85xx family.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "32a33994d513606d29e87e152deb67ba5f3c8e82", "tree": "2966bbe85eb2880aacc1dba045af7a02cee0aa26", "parents": [ "9a699aefa87cb0379a67741926820c9271d748a9" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Mon Jan 09 15:41:31 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Jan 09 16:02:52 2006 +1100" }, "message": "[PATCH] ppc64: Fix oprofile when compiled as a module\n\nMy recent changes to oprofile broke it when built as a module. Fix it by\nusing an enum instead of a function pointer. This way we still retain\nthe oprofile configuration in the cputable.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "c902be71dc6d5e8473bd021feafc8c3608e2b82a", "tree": "527b15800ed84edd16a5d53d165275a48cea1915", "parents": [ "017e0fad3e40ece983527ec88a92b3da8fcdecea" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Wed Jan 04 19:55:53 2006 +0000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Jan 09 15:44:32 2006 +1100" }, "message": "[PATCH] cell: enable pause(0) in cpu_idle\n\nThis patch enables support for pause(0) power management state\nfor the Cell Broadband Processor, which is import for power efficient\noperation. The pervasive infrastructure will in the future enable\nus to introduce more functionality specific to the Cell\u0027s\npervasive unit.\n\nFrom: Maximino Aguilar \u003cmaguilar@us.ibm.com\u003e\nSigned-off-by: Arnd Bergmann \u003carndb@de.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "88ced0314938814e1772b4d0d7ab20c52e4472b6", "tree": "3e06de882c0bf5706ee7a8994e06eb8c9ed3feca", "parents": [ "e1333803c3a8fb167ba67ffc5540dbb53fa7deb3" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Fri Dec 16 22:43:46 2005 +0100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Jan 09 15:13:08 2006 +1100" }, "message": "[PATCH] powerpc: sanitize header files for user space includes\n\ninclude/asm-ppc/ had #ifdef __KERNEL__ in all header files that\nare not meant for use by user space, include/asm-powerpc does\nnot have this yet.\n\nThis patch gets us a lot closer there. There are a few cases\nwhere I was not sure, so I left them out. I have verified\nthat no CONFIG_* symbols are used outside of __KERNEL__\nany more and that there are no obvious compile errors when\nincluding any of the headers in user space libraries.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "2406f6063a9caa8ea39e4040e1759db553388caf", "tree": "3b7674db31eddf0cbe17e9e5b4e2d8d65c3a5b77", "parents": [ "4b703a231799f43f3414b62300b8ad6736a4aa9d" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Tue Dec 13 07:45:33 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Jan 09 14:53:41 2006 +1100" }, "message": "[PATCH] powerpc: Dont set 32bit cputable bits on 64bit\n\nMilton and I were looking at the cputable code and it looks like we can\nset spurious bits on 64bit.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "5daf9071b527089b1bd5d9cb3a5354b83121550e", "tree": "3abf10c1f67975f3a7d0def22de261f395c325f1", "parents": [ "6defa38b3754c84cd3449447477aed81ea979407" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Nov 18 14:09:41 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Nov 18 14:39:23 2005 +1100" }, "message": "[PATCH] powerpc: merge align.c\n\nThis patch merges align.c, the result isn\u0027t quite what was in ppc64 nor\nwhat was in ppc32 :) It should implement all the functionalities of both\nthough. Kumar, since you played with that in the past, I suppose you\nhave some test cases for verifying that it works properly before I dig\nout the 601 machine ? :)\n\nSince it\u0027s likely that I won\u0027t be able to test all scenario, code\ninspection is much welcome.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "a7ddc5e85351931b67a48afa22788d77763837d8", "tree": "4b7b6ff70432f43e3aeab101445d74f0fd012722", "parents": [ "cbe62e2b4a764aa3f9a2b9c9004f8e86a1f0ade8" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Nov 10 14:29:18 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Nov 10 14:29:18 2005 +1100" }, "message": "powerpc: Add user CPU features for POWER4, POWER5, POWER5+ and Cell.\n\nThis is at the request of the glibc folks, who want to use these bits\nto select libraries optimized for the microarchitecture and new\ninstructions in these processors.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "3ddfbcf19b15ccd25a0b4b2dc2e38000e08de739", "tree": "ca77158ab291453ed39e87f2d81beef9e8d1a560", "parents": [ "f6d3577da14e877b79517c883d1139ee6ad7da45" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Thu Nov 10 12:56:55 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Nov 10 13:10:38 2005 +1100" }, "message": "[PATCH] powerpc: Consolidate asm compatibility macros\n\nThis patch consolidates macros used to generate assembly for\ncompatibility across different CPUs or configs. A new header,\nasm-powerpc/asm-compat.h contains the main compatibility macros. It\nuses some preprocessor magic to make the macros suitable both for use\nin .S files, and in inline asm in .c files. Headers (bitops.h,\nuaccess.h, atomic.h, bug.h) which had their own such compatibility\nmacros are changed to use asm-compat.h.\n\nppc_asm.h is now for use in .S files *only*, and a #error enforces\nthat. As such, we\u0027re a lot more careless about namespace pollution\nhere than in asm-compat.h.\n\nWhile we\u0027re at it, this patch adds a call to the PPC405_ERR77 macro in\nfutex.h which should have had it already, but didn\u0027t.\n\nBuilt and booted on pSeries, Maple and iSeries (ARCH\u003dpowerpc). Built\nfor 32-bit powermac (ARCH\u003dpowerpc) and Walnut (ARCH\u003dppc).\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "3c726f8dee6f55e96475574e9f645327e461884c", "tree": "f67c381e8f57959aa4a94bda4c68e24253cd8171", "parents": [ "f912696ab330bf539231d1f8032320f2a08b850f" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Mon Nov 07 11:06:55 2005 +1100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Nov 06 16:56:47 2005 -0800" }, "message": "[PATCH] ppc64: support 64k pages\n\nAdds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel\nbase page size to 64K. The resulting kernel still boots on any\nhardware. On current machines with 4K pages support only, the kernel\nwill maintain 16 \"subpages\" for each 64K page transparently.\n\nNote that while real 64K capable HW has been tested, the current patch\nwill not enable it yet as such hardware is not released yet, and I\u0027m\nstill verifying with the firmware architects the proper to get the\ninformation from the newer hypervisors.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "985990137e81ca9fd6561cd0f7d1a9695ec57d5a", "tree": "7a67493285623a7356ba7065cada6728993d1a3b", "parents": [ "834289447542b7ec55c0847486616d4d53ddf891", "63172cb3d5ef762dcb60a292bc7f016b85cf6e1f" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Oct 22 16:51:34 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Oct 22 16:51:34 2005 +1000" }, "message": "Merge changes from linux-2.6 by hand\n" }, { "commit": "4920960f577edcb0a5ef03823a53911cca5875e1", "tree": "c37bb1a8b02f54e3a5012bac7f726208e6fc488e", "parents": [ "7e130edf712ac054aecf643f9d3d0142a9679e6a" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Wed Oct 12 15:55:09 2005 +1000" }, "committer": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Thu Oct 13 09:49:45 2005 +1000" }, "message": "powerpc: consolidate cputable.c\n\nAlso simplify arch/ppc64/kernel/Makefile\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\n" }, { "commit": "9b6b563c0d2d25ecc3111916031aa7255543fbfb", "tree": "07fd029308055461caa157d15a88c01861efc6bb", "parents": [ "b85a046af3a260e079505e8023ccd10e01cf4f2b" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Oct 06 12:06:20 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Oct 06 12:06:20 2005 +1000" }, "message": "powerpc: Merge in the ppc64 version of the prom code.\n\nThis brings in the ppc64 version of prom_init.c, prom.c and btext.c\nand makes them work for ppc32. This also brings in the new calling\nconvention, where the first entry to the kernel (with r5 !\u003d 0) goes\nto the prom_init code, which then restarts from the beginning (with\nr5 \u003d\u003d 0) after it has done its stuff.\n\nFor now this also brings in the ppc32 version of setup.c. It also\nmerges lmb.h.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "400d221274426958f1e1c7081a247bea9cede696", "tree": "db0907bc14504d827b06b45004152b6610387b40", "parents": [ "10b35d9978ac35556aec0d2642055742d8941488" ], "author": { "name": "Kumar Gala", "email": "galak@freescale.com", "time": "Tue Sep 27 15:13:12 2005 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Sep 28 15:42:54 2005 +1000" }, "message": "[PATCH] ppc32: make cur_cpu_spec a single pointer instead of an array\n\nChanged ppc32 so that cur_cpu_spec is just a single pointer for all CPUs.\nAdditionally, made call_setup_cpu check to see if the cpu_setup pointer\nis NULL or not before calling the function. This lets remove the dummy\ncpu_setup calls that just return.\n\nSigned-off-by: Kumar Gala \u003ckumar.gala@freescale.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "10b35d9978ac35556aec0d2642055742d8941488", "tree": "7c59c62e2840d7d9971076e1acccaa0cadd678b8", "parents": [ "a559c91d77c3220be521453bd23815e1e1980a82" ], "author": { "name": "Kumar Gala", "email": "galak@freescale.com", "time": "Fri Sep 23 14:08:58 2005 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Sep 28 15:42:53 2005 +1000" }, "message": "[PATCH] powerpc: merged asm/cputable.h\n\nMerged cputable.h between ppc32 and ppc64. In doing this removed support\nfor the BEGIN_FTR_SECTION/END_FTR_SECTION macros in C code since they\ndont compile correctly. C code should use cpu_has_feature(). This is\nbased on Arnd Bergmann\u0027s initial patch.\n\nSigned-off-by: Kumar Gala \u003ckumar.gala@freescale.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" } ] }