)]}' { "log": [ { "commit": "77ad498ecaeb9a614d2a7bbfaab58a35c0cc577d", "tree": "0e146e942233b703fda4241ee67dd2a6969f73d6", "parents": [ "d8d9abcd35aeebd633cba2e99c384f4e004ccb84" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 27 16:25:54 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:11 2010 +0100" }, "message": "intel-gtt: drop unnecessary conditions in intel_gtt_stolen_entries\n\nThe dedection function in drm/i915/i915_dma.c works without it, so\ndrop it here, too. All the values are disdinct, anyway.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "d8d9abcd35aeebd633cba2e99c384f4e004ccb84", "tree": "f3b4fa8f70112fcacf710fe1654b9ee514aa5e0d", "parents": [ "3e921f980fdd5b972efb7f368b2a847a01804184" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 27 16:13:52 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:10 2010 +0100" }, "message": "intel-gtt: sane variable names for intel_gtt_stolen_entries\n\nThis somewhat aligns it with the version in drm/i915/i915_dma.c.\nChanges:\n- s/gtt_entries/stolen_size\n- track overhead entries in a seperate var (the effective gtt size\n calculation will be extracted later on).\n- subtract the overhead at the end instead of in each clause.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "3e921f980fdd5b972efb7f368b2a847a01804184", "tree": "b554b1699b81976938358fed03649c9981cfbccd", "parents": [ "1784a5fb4f7a41b9a5ea066f7782418bfe170c04" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 27 15:33:26 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:09 2010 +0100" }, "message": "intel-gtt: generic intel_fake_agp_fetch_size\n\nThis uses the new mappable gtt size detection from the previous patch.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "1784a5fb4f7a41b9a5ea066f7782418bfe170c04", "tree": "b295e950380bf16dbe54893bd84df56c2b1eca86", "parents": [ "bfde067bebe72293b1f909a8b35ee8d82811f8f5" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Wed Sep 08 21:01:04 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:09 2010 +0100" }, "message": "intel-gtt: new function intel_gtt_mappable_entries\n\nThis implementation is stolen from drm/i915, but is equivalent to\nthe code sprinkled over intel-gtt.c in the various fetch_size functions.\nIt\u0027s not yet used anywhere, though.\n\nAlso introduce intel_gtt_init which only calls intel_gtt_stolen_entries.\nOver the course of the next patches, this will grow untill it contains\nthe complete init sequence starting from the call to gtt_mappable_entries.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "bfde067bebe72293b1f909a8b35ee8d82811f8f5", "tree": "c4b15e42fb1683426e944b589994c52257d2bc49", "parents": [ "d7cca2f7000243ac43a389110c3d8474f582ae3f" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Aug 24 23:07:59 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:08 2010 +0100" }, "message": "intel-gtt: s/intel_i830_init_gtt_entries/intel_gtt_stolen_entries\n\nFirst simple step towards a more generic initialization. This\nis needed to disentangle the agp stuff from the stuff that is\nactually needed by drm/i915.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "d7cca2f7000243ac43a389110c3d8474f582ae3f", "tree": "e2e5df744aa066591201aa365c6e24c687b574b8", "parents": [ "0ade638655f0ef4d807295c14a4c97544bd6b9ca" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Aug 24 23:06:19 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:07 2010 +0100" }, "message": "intel-gtt: store a local pointer to the bridge pci dev\n\nWhen the intel-gtt code now longer depends on agp, we cannot rely\non this. So store a local reference in intel-gtt.c.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "0ade638655f0ef4d807295c14a4c97544bd6b9ca", "tree": "23ddab04b976c4133e1528d3be2aaa53d9e195d7", "parents": [ "e2404e7c3fe6f46e161edf085c6d9bea06ebe488" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Aug 24 22:18:41 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:07 2010 +0100" }, "message": "intel-gtt: introduce drm/intel-gtt.h\n\nAdd a few definitions to it that are already shared and that will\nbe shared in the future (like the number of stolen entries).\nNo functional changes in here.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "e2404e7c3fe6f46e161edf085c6d9bea06ebe488", "tree": "0d799bb55f9f508d2df4712d0ce3ac7d9fc63600", "parents": [ "02c026ced58f33bb5702d3063c05dae2b651e4ba" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Wed Sep 08 17:29:51 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:06 2010 +0100" }, "message": "agp/intel: make intel-gtt.c into a real source file\n\nNow that the disentangling is complete, stop including intel-gtt.c\nfrom intel-agp.c.\n\nThe linux build system _really_ doesn\u0027t allow .c source files with the\nsame name as the module. It fails with the following message when trying\nto build such a bugger:\n\nmake[3]: Circular drivers/char/agp/intel-agp.o \u003c- drivers/char/agp/intel-agp.o dependency dropped.\n\nInstead of renameing intel-agp.c I\u0027ve simply created a new module out\nof intel-gtt.c. Renaming intel-agp.ko to something else is not an option\nfor it will surely kill someones boot process.\n\nThis also paves the way to use the gtt code without loading the agp\ndriver.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "02c026ced58f33bb5702d3063c05dae2b651e4ba", "tree": "e51caf2fd184aa931e777f28f02c86956a9fae89", "parents": [ "309b1e3ab750c0ad4d77c6a6e434402e3346baf4" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Aug 24 19:39:48 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:05 2010 +0100" }, "message": "agp/intel: split out gmch/gtt probe, part 2\n\nThis just splits the device list into two and moves the gtt related stuff\nto intel-gtt.c. The two new devices lists also lose the not longer needed\nfields. There where only about 5 cases anyway with both a gmch and a\npossible agp port, so the duplication of entries is rather small.\nAdditionally kill 2 out of the three Ironlake mobile entries that\nonly differed in host bridge pci id.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "309b1e3ab750c0ad4d77c6a6e434402e3346baf4", "tree": "e982b01ef2a240b0d3bd22480bb5e2904c1402fa", "parents": [ "434ed097245423c5ea277d18121c0fad0df42abf" ], "author": { "name": "Matthew Garrett", "email": "mjg@redhat.com", "time": "Tue May 18 13:53:16 2010 -0400" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 21:20:05 2010 +0100" }, "message": "drm/i915: Don\u0027t disable panel for modesetting if pfit hasn\u0027t changed\n\nIt seems to be possible to program a new mode without disabling the panel\nif the panel fitter setup doesn\u0027t change. Add support for that.\n\nSigned-off-by: Matthew Garrett \u003cmjg@redhat.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "434ed097245423c5ea277d18121c0fad0df42abf", "tree": "2fb6acacab73b9931cadc7d7f6a064d4a58ea4ee", "parents": [ "4f0d1aff791db8935ee146fe7928b63bba0f1b59" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Sep 07 14:48:06 2010 -0700" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 12:44:12 2010 +0100" }, "message": "drm/i915: set dither bits on eDP panels too\n\nWe really need a macro to test whether a given connector has a panel\nattached rather than sprinkling HAS_PCH_SPLIT/IS_eDP/has_edp_encoder\netc all over. In the meantime, fix the bug...\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n[ickle: tidy up the duplicity in the conditionals]\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "4f0d1aff791db8935ee146fe7928b63bba0f1b59", "tree": "91338ce138d24060961ccf8b59596d0b1e1d5ef0", "parents": [ "dd2575ffbd71d0922eb31b94adc0923f9808c915" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Sep 07 14:48:05 2010 -0700" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 12:38:17 2010 +0100" }, "message": "drm/i915: fix pipeconf dither bit definitions\n\nMake them match the others and add BPP definitions.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "dd2575ffbd71d0922eb31b94adc0923f9808c915", "tree": "c7939cbc60759ae90efdf5d8311bdc1d3f021d18", "parents": [ "8c80b59b370b4d942f595bdb4a6d23494f77a810" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sat Sep 04 12:59:16 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 11:30:00 2010 +0100" }, "message": "drm/i915: Remove impossible error handling from bit17 swizzling\n\nOur usage of kmap() cannot return NULL here, so remove the unnecessary\nerror handling.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8c80b59b370b4d942f595bdb4a6d23494f77a810", "tree": "cd1faa49986f62e1f37fde2cbc162343a922dd2d", "parents": [ "4b60e5cb707aa1d44fd01680296a2caf45dd6fae" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 08 20:38:12 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 11:29:59 2010 +0100" }, "message": "drm/i915: Add ringbuffer wait reset to hangcheck\n\nThe GPU records whether it is currently waiting for a completion of a\nWAIT_FOR_EVENT in the RB_WAIT bit in the ringbuffer control registers.\nOn third generation chipsets and later, a write of 1 to this bit breaks\nthe hang and returns the GPU to arbitration, i.e. the GPU should\ncontinue executing the reminder of the batchbuffer and return to normal\noperations.\n\nBy adding this to hangcheck we can avoid a full GPU reset under these\nconditions.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "4b60e5cb707aa1d44fd01680296a2caf45dd6fae", "tree": "00a10018f8fd4b2ae04d5df373006f266257351d", "parents": [ "37811fcc9188f748407646e1157f3ed24ae181a4" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 08 11:53:53 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 11:29:58 2010 +0100" }, "message": "drm/i915: Clear scanline waits after disabling the pipe.\n\nIf we disable the pipe and the GPU is currently waiting on a scanline\nWAIT_FOR_EVENT, the GPU will hang. Fortunately, there is a magic bit\nwhich we can write on i915+ to break this wait after disabling the\npipe.\n\nReferences:\n\n Bug 29252 - [Arrandale] Hung WAIT_FOR_EVENT when running rss-glx-skyrocket\n https://bugs.freedesktop.org/show_bug.cgi?id\u003d29252\n\n Bug 28964 - [i965gm] GPU infinite MI_WAIT_FOR_EVENT while watching video in Totem\n https://bugs.freedesktop.org/show_bug.cgi?id\u003d28964\n\nand many others.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "37811fcc9188f748407646e1157f3ed24ae181a4", "tree": "c413000327d80b226c292cedae542c2f8a5293a3", "parents": [ "70d39fe4862c6c69c2582c829ec240e05bf24430" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Aug 25 22:45:57 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 11:29:58 2010 +0100" }, "message": "drm/i915: Show framebuffer info in debugfs\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "70d39fe4862c6c69c2582c829ec240e05bf24430", "tree": "0ec874646351729b9df3caa9af2f087fc3d93714", "parents": [ "b7ac36dadafa69214faa75a34844d56bd0c14e89" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Aug 25 16:03:34 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:24:00 2010 +0100" }, "message": "drm/i915: Show device capabilities in debugfs\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "b7ac36dadafa69214faa75a34844d56bd0c14e89", "tree": "36b90dcfda7b9ff9b973ae335adde657f022011d", "parents": [ "a95735569312f2ab0c80425e2cd1e5cb0b4e1870" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Aug 24 16:07:16 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:59 2010 +0100" }, "message": "drm/i915/tv: After disabling the pipe, use wait_for_vblank_off()\n\nHopefully this is a contributing factor to the spurious TV detection\nrepoted by Ivan Bulatovic and others.\n\nReferences:\n\n Bug 16871 - \"TV1 connected\" with no tv\n https://bugzilla.kernel.org/show_bug.cgi?id\u003d16871\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReported-by: Ivan Bulatovic \u003ccombuster@gmx.com\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a95735569312f2ab0c80425e2cd1e5cb0b4e1870", "tree": "9daf28afa9b797b7f51486f4f759de9359b1e1e9", "parents": [ "5d607f9b038ea03f5e5b3064d2f3993f9ea67e1e" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 22 13:18:16 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:58 2010 +0100" }, "message": "drm/i915: Refactor panel backlight controls\n\nThere were two instances of code to control the panel backlight and\nneither handled the complete set of device variations.\n\nFixes:\n\n Bug 29716 - [GM965] Regression: Backlight resets to minimum when changing resolution\n https://bugs.freedesktop.org/show_bug.cgi?id\u003d29716\n\nAnd a bug on one of my PineView boxes which overflowed the backlight\nvalue.\n\nIncorporates part of a similar patch by Matthew Garrett that exposes a\nnative Intel backlight controller.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "5d607f9b038ea03f5e5b3064d2f3993f9ea67e1e", "tree": "e5da4ce291125abbce7e572dbbf9bbac2c01c504", "parents": [ "995b6762f0fd54377bbfafdf5328b12de698bfa8" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Aug 20 22:37:03 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:57 2010 +0100" }, "message": "drm/i915: Remove redundant initialisation of fb_base\n\nWe do it whilst configuring dev-\u003emode_config, so remove the out-of-place\nearlier initialisation.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "995b6762f0fd54377bbfafdf5328b12de698bfa8", "tree": "4942552ec93f77e7c083885e38083db2cdcd9821", "parents": [ "de227ef0907258359d53e3e1530c1f3678eb2bb9" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Aug 20 13:23:26 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:57 2010 +0100" }, "message": "drm/i915: Quieten sparse warnings for missing prototypes.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "de227ef0907258359d53e3e1530c1f3678eb2bb9", "tree": "86610be283f35dd2913fb94aeaca021720e99b71", "parents": [ "015b9c8ce50e5bfb7ea78613dcad4b30d1a0d9da" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sat Jul 03 07:58:38 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:56 2010 +0100" }, "message": "drm/i915: Kill the active list spinlock\n\nThis spinlock only served debugging purposes in a time when we could not\nbe sure of the mutex ever being released upon a GPU hang. As we now\nshould be able rely on hangcheck to do the job for us (and that error\nreporting should not itself require the struct mutex) we can kill the\nincomplete attempt at protection.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "015b9c8ce50e5bfb7ea78613dcad4b30d1a0d9da", "tree": "9534a33dffc33ab35ca4469e4259085ba49dd25a", "parents": [ "3bd3c9329973a93fa3ef5e9840f2fd6fa2889e3f" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Aug 20 11:26:59 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:55 2010 +0100" }, "message": "drm/i915: Remove the random SyncFlush during initialisation\n\nWe have no idea why we request a SyncFlush via INSTPM at that point in\ntime -- we certainly never check for its completion...\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "3bd3c9329973a93fa3ef5e9840f2fd6fa2889e3f", "tree": "ff0f4e7631d46664c5c6b9990a283842b597b8b1", "parents": [ "b303cf9542b016e2af3b9d17255a7f93cd790ef5" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 19 08:19:30 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:55 2010 +0100" }, "message": "drm/i915: Compile out error state without DEBUG_FS\n\nAlexander reported that the compilation of intel_overlay.c was failing\ndue to an inclusion that was only valid with CONFIG_DEBUG_FS. As the\nwhole error reporting is only useful with debugfs enabled, remove all\nthe redundant error state collection code when compiling without\nCONFIG_DEBUG_FS.\n\nReported-by: Alexander Lam \u003clambchop468@gmail.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "b303cf9542b016e2af3b9d17255a7f93cd790ef5", "tree": "b7debdd1e35190fc1bbd4717287650652b237d22", "parents": [ "23f09ce31ca68af3728ac5eed3e3efb03c5f990a" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 14:03:48 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:54 2010 +0100" }, "message": "drm/i915/overlay: Use a continuation hook to finish work after a flip.\n\nSlightly easier to follow than the state machine and now possible as the\ncontrol structure is opaque and hw_wedged is no longer interferred with.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "23f09ce31ca68af3728ac5eed3e3efb03c5f990a", "tree": "12ecc7a2794fa9853278edf1ea0499d65a3ec29a", "parents": [ "5dcdbcb06badbdf2faa698bf3198e421a1e12840" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 13:53:37 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:53 2010 +0100" }, "message": "drm/i915/overlay: Make the overlay control struct opaque.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "5dcdbcb06badbdf2faa698bf3198e421a1e12840", "tree": "9233236a9593dfb8cf1d76485897caf953a29883", "parents": [ "106dadacbeeea92f61a2c32f3651ee31c1b34e31" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 13:50:28 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:52 2010 +0100" }, "message": "drm/i915/overlay: Pass interruptible to switch_off()\n\nDuring DPMS we currently do not want the overlay code to be\ninterruptible, so pass that information down and only take the\nuninterrruptible paths.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "106dadacbeeea92f61a2c32f3651ee31c1b34e31", "tree": "2f3e22b6fd5d0c1f1c3024613fd2ca9989e70d47", "parents": [ "5fe82c5ee1ba2d04183c376038c5d233a0311ec9" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Jul 16 17:13:01 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:52 2010 +0100" }, "message": "drm/i915/overlay: Workaround i830 overlay activation bug.\n\nOn i830, there exists a bug where an overlay on pipe B requires the mode\nclock on pipe A in order to activate. So workaround this by activating\npipe A when trying to enable the overlay on pipe B.\n\nReferences:\n\n [Bug 29007] GPU hang on video playback with overlay\n https://bugs.freedesktop.org/show_bug.cgi?id\u003d29007\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "5fe82c5ee1ba2d04183c376038c5d233a0311ec9", "tree": "007da86372a409da57a30f28e2ed17c117a0daef", "parents": [ "8dc5d14741dc1ee0074a14b360993a10c2c02d24" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 12:38:21 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:51 2010 +0100" }, "message": "drm/i915/overlay: Make do_put_image() as static\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "8dc5d14741dc1ee0074a14b360993a10c2c02d24", "tree": "9b4885aa1e74161138caf5f611e5f99d379a817e", "parents": [ "5cd68c9864d65e49c910c701716e4e94e09f7ce0" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 12:36:12 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:50 2010 +0100" }, "message": "drm/i915: Preallocate requests\n\nBy allocating the request prior to writing to the ringbuffer, we can\nabort the operation without leaving the GPU in an inconsistent state.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "5cd68c9864d65e49c910c701716e4e94e09f7ce0", "tree": "1c6fe486abe21f56bf53472a8df3e5d7f56ce058", "parents": [ "8dfbc3403113bcc51f0350c3471fa1abf664305f" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 12:21:54 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:50 2010 +0100" }, "message": "drm/i915/overlay: Tidy release_old_vid()\n\nInline the call to wait_flip() and simplify the resulting code.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "8dfbc3403113bcc51f0350c3471fa1abf664305f", "tree": "5e6685d671acb6e12d82726ca656b3b5f3598752", "parents": [ "9bb2ff731b32c023e7a502efdc0dee46157290d5" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 12:07:32 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:49 2010 +0100" }, "message": "drm/i915/overlay: Combine SWITCH_OFF into a single step\n\nWe can program the h/w to first wait on the flip and then switch off\nwithout relying on s/w intervention. This removes the need for a double\nstep switch off, bringing much rejoicing.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "9bb2ff731b32c023e7a502efdc0dee46157290d5", "tree": "735f6a8c3afab088c383825bda3d915c01ae5e22", "parents": [ "b6c028e00445de9dfde2cd0c26521ac53965320a" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 12:02:11 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:48 2010 +0100" }, "message": "drm/i915/overlay: Explicitly pass regs from map to unmap\n\nThe scoping of the validity of the mapping is thus clarified.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "b6c028e00445de9dfde2cd0c26521ac53965320a", "tree": "2c2ac764fbda9173fd0b3d119e8f466fd1204b6b", "parents": [ "9f7c3f442bb7c0d0a0ed25cc287932450a1f2bab" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 11:55:08 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:47 2010 +0100" }, "message": "drm/i915/overlay: Refactor do_wait_request()\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "9f7c3f442bb7c0d0a0ed25cc287932450a1f2bab", "tree": "19369050fefd95a3ef0e6611e8c22a85a8a631cf", "parents": [ "446d2183af68c0fd2772f5ef97a033efe69904a5" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 11:29:34 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:47 2010 +0100" }, "message": "drm/i915/overlay: Tidy check_overlay_dst()\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "446d2183af68c0fd2772f5ef97a033efe69904a5", "tree": "90a15155c7d5fce589685d89b1da4cfb39427358", "parents": [ "7340ea7dcf32227a77ed9df154fc2b2f00ad2fb1" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 11:15:58 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:46 2010 +0100" }, "message": "drm/i915/overlay: Tidy update_pfit_vscale_ratio()\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "7340ea7dcf32227a77ed9df154fc2b2f00ad2fb1", "tree": "07242c363220bde90536e916e23cb27962b7245a", "parents": [ "62cf4e6fef35b4422e206b63b7f0ac90261d4ad9" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 10:57:04 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:45 2010 +0100" }, "message": "drm/i915/overlay: Remove duplicated definition of OFC_UPDATE\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "62cf4e6fef35b4422e206b63b7f0ac90261d4ad9", "tree": "4e39d73ef0b940cd9128c690a7d8fbccf0e1173b", "parents": [ "a29301288f1840bdf9c5456da9cd7c944436edd5" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 10:50:36 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:45 2010 +0100" }, "message": "drm/i915/overlay: Destroy reg_bo on shutdown.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "a29301288f1840bdf9c5456da9cd7c944436edd5", "tree": "af468b9ad5861327446b31f15774b3eac4475bab", "parents": [ "60fc332cb5ab19e5a86d696b210df65814b2ad8a" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 10:47:56 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:44 2010 +0100" }, "message": "drm/i915/overlay: Use the recommended page alignment for physical regs\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "60fc332cb5ab19e5a86d696b210df65814b2ad8a", "tree": "6e765e4a35983bb1668967256a10502313896919", "parents": [ "8d74f656dd78ae1ba813389cd46197c6329696bc" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 10:44:45 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:43 2010 +0100" }, "message": "drm/i915/overlay: Tidy attribute checking.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "8d74f656dd78ae1ba813389cd46197c6329696bc", "tree": "26e2c355fd12faad167c6c76ff5ac1bcc09b6af9", "parents": [ "31578148b2c62612f9516fdcf5ebb64ab32ed12d" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 10:35:26 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:42 2010 +0100" }, "message": "drm/i915/overlay: Use non-atomic mappings for the common case.\n\nThe only time where an atomic mapping is required is during\nerror-capture and there we cannot use the default slot, but need to\nspecifically use one of the IRQ slots. So separate out the two\nconditions and use the atomic mapping only when appropriate.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "31578148b2c62612f9516fdcf5ebb64ab32ed12d", "tree": "0ed59f332fc2b02088dc17511ff0b4808502bbd5", "parents": [ "0ddc1289f3ffd779779ddd3922f26ae7d0a21604" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 09:42:51 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:42 2010 +0100" }, "message": "drm/i915/overlay: Move capabilities bits to common info block.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "0ddc1289f3ffd779779ddd3922f26ae7d0a21604", "tree": "005311e32548ee581272694c174eb6e458d40ce6", "parents": [ "6ba3ddd9838f5e4d6ac7c6dce95648d205e11bff" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 09:35:00 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:41 2010 +0100" }, "message": "drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to writing.\n\nJust makes sure that writes are not being aliased by the CPU cache and\ndo make it out to main memory.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nBugzilla: https://bugs.freedesktop.org/show_bug.cgi?id\u003d24977\nCc: stable@kernel.org\n" }, { "commit": "6ba3ddd9838f5e4d6ac7c6dce95648d205e11bff", "tree": "74f4498fbf3bb4d2f6943912ecbb6b433126b475", "parents": [ "722506f04dae7c88193dab2fc836ff15070190f0" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 09:30:58 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:40 2010 +0100" }, "message": "drm/i915/overlay: Missing breaks between case statements for color depth\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "722506f04dae7c88193dab2fc836ff15070190f0", "tree": "51da3b7562a3ffad9822a36e60dc569a610f50ba", "parents": [ "4fc6ee764620eb3a9364e736d03605d4b233ea61" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 09:28:50 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:40 2010 +0100" }, "message": "drm/i915/overlay: Whitespace\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "4fc6ee764620eb3a9364e736d03605d4b233ea61", "tree": "8ebc140e05d280530dc1a52379b635e4930da9df", "parents": [ "ba3d8d749b01548b918519a49024341d8dc9e71c" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 11 22:53:20 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:39 2010 +0100" }, "message": "drm/i915: drop i915_add_request right in front of i915_wait_request\n\n... take advantage of the new implicit request issuing of\ni915_wait_request.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "ba3d8d749b01548b918519a49024341d8dc9e71c", "tree": "b937406ef24ecc5fc1fdf9e479b3e915c7e60909", "parents": [ "617dbe2787568316eed976f533f93c31fdbc75b9" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 11 22:37:04 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:38 2010 +0100" }, "message": "drm/i915: move the wait_rendering call into flush_gpu_write_domain\n\nOne caller (for the pageflip support) wants a purely pipelined flush.\nDistinguish this case by a new parameter. This will also be useful\nlater on for pipelined fencing.\n\nv2: Simplify the code by depending upon the implicit request emitting\nof i915_wait_request.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n[ickle: And drop the non-interruptible support in the process.]\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "617dbe2787568316eed976f533f93c31fdbc75b9", "tree": "a90dcf84d71ac36210a4e03f06964e0b7bb9cc5c", "parents": [ "86394c669a485cb773ddef9f2b66bebdb23241d0" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 11 22:16:02 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:37 2010 +0100" }, "message": "drm/i915: drop seqno argument from i915_gem_object_move_to_active\n\nBy moving one i915_add_request we can solely depend on the new\nauto-seqno-numbering behaviour.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "86394c669a485cb773ddef9f2b66bebdb23241d0", "tree": "0e62095cb0b259e248b8eb8639a0774771de710e", "parents": [ "8a1a49f954734040dbc7b87e3b1221a050045e43" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Feb 02 22:54:18 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:37 2010 +0100" }, "message": "drm/i915: kill a no longer necessary BUG_ON\n\ni915_gem_object_move_to_active can handle zero seqno for us now.\nAnd not emitting a request is not fatal here - we\u0027ll try to emit\na new one if we have to wait for some rendering to complete.\n\nIn case this assumption ever gets accidentally broken, there\u0027s already\na BUG_ON to catch it in i915_do_wait_request.\n\nSo just silently ignore ENOMEM here instead of screwing up the whole\ndrm.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8a1a49f954734040dbc7b87e3b1221a050045e43", "tree": "4bd64e76791b1e56e5ffc69f065e3831fe0b9979", "parents": [ "a6910434e1b5f2a9fe7cab39b01bae9a7a7bbe70" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 11 22:29:04 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:36 2010 +0100" }, "message": "drm/i915: move flushing list processing to i915_retire_commands\n\n... instead of threading flush_domains through the execbuf code to\ni915_add_request.\n\nWith this change 2 small cleanups are possible (likewise the majority\nof the patch):\n\n- The flush_domains parameter of i915_add_request is always 0. Drop it\n and the corresponding logic.\n- Ditto for the seqno param of i915_gem_process_flushing_list.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "a6910434e1b5f2a9fe7cab39b01bae9a7a7bbe70", "tree": "cc4778226ba2cb98e6daf1d6ba86f1a7273aa04f", "parents": [ "8bff917c93e365a8a145f9b1be99c81257038151" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Feb 02 17:08:37 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:35 2010 +0100" }, "message": "drm/i915: only one interrupt per batchbuffer is not enough!\n\nPreviously I thought that one interrupt per batchbuffer should be\nenough. Now tedious benchmarking showed this to be wrong.\n\nTherefore track whether any commands have been isssued with a future\nseqno (like pipelined fencing changes or flushes). If this is the case\nemit a request before issueing the batchbuffer.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8bff917c93e365a8a145f9b1be99c81257038151", "tree": "c9e336ff77954066572a3a8d43eb8edf7adad80f", "parents": [ "e35a41de3926ec81e3ed2ed31d1f30cecb3513f9" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 11 22:19:40 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:35 2010 +0100" }, "message": "drm/i915: move flushing list processing to i915_gem_flush\n\nNow that we can move objects to the active list without already having\nemitted a request, move the flushing list handling into i915_gem_flush.\nThis makes more sense and allows to drop a few i915_add_request calls\nthat are not strictly necessary.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "e35a41de3926ec81e3ed2ed31d1f30cecb3513f9", "tree": "18cbeb4062a66195c893942cd392c6da9404a3ee", "parents": [ "be282fd48e7492812402a22d73a348c44bf95b63" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 11 22:13:59 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:34 2010 +0100" }, "message": "drm/i915: allow lazy emitting of requests\n\nSometimes (like when flushing in preparation of batchbuffer execution)\nwe know that we\u0027ll emit a request but haven\u0027t yet done so. Allow this\ncase by simply taking the next seqno by default. Ensure that a request\nis eventually emitted before waiting for an request by issuing it\nin i915_wait_request iff this is not yet done.\n\nAlso replace one open-coded version of i915_gem_object_wait_rendering,\nto prevent future code-diversion.\n\nChris Wilson asked me to explain and clarify what this patch does and why.\nHere it goes:\n\nOld way of moving objects onto the active list and associating them with a\nreques:\n\n1. i915_add_request + store the returned seqno somewhere\n2. i915_gem_object_move_to_active (with the stored seqno as parameter)\n\nFor the current users, this is all fine. But I\u0027d like to associate objects\n(and fence regs) with the batchbuffer request deep down in the execbuf\ncall-chain. I thought about three ways of implementing this.\n\na) Don\u0027t care, just emit request when we need a new seqno. When heavily\npipelining fence reg changes, this would have caused tons of superflous\nrequest (and corresponding irqs).\n\nb) Thread all changed fences, objects, whatever through the execbuf-maze,\nso that when we emit a request, we can store the new seqno at all the right\nplaces.\n\nc) Kill that seqno-threading-around business by simply storing the next\nseqno, i.e. allow 2. to be done before 1. in the above sequence.\n\nI\u0027ve decided to implement c) (in this patch). The following patches are\njust fall-out that resulted from this small conceptual change.\n\n* We can handle the flushing list processing where we actually emit a flush\n (i915_gem_flush and i915_retire_commands) instead of in i915_add_request.\n The code makes IMHO more sense this way (and i915_add_request looses the\n flush_domains parameter, obviously).\n\n* We can avoid emitting unnecessary requests. IMHO there\u0027s no point in\n emitting more than one request per batchbuffer (with or without an\n corresponding irq).\n\n* By enforcing 2. before 1. ordering in the above sequence the seqno\n argument of i915_gem_object_move_to_active is redundant and can be\n dropped.\n\nv2: Now i915_wait_request issues request if it is not yet emitted.\nAlso introduce i915_gem_next_request_seqno(dev) just in case we ever\nneed to do some prep work before using a new seqno.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n[ickle: Keep i915_gem_object_set_to_display_plane() uninterruptible.]\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "be282fd48e7492812402a22d73a348c44bf95b63", "tree": "a9c11c714eceef329fce90d2e1633feb60bcc746", "parents": [ "6c9547ff354d867318d78094aa8e9cf5218851e2" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Aug 13 15:50:28 2010 -0700" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:33 2010 +0100" }, "message": "drm/i915: add MMIO debug output\n\nUseful for capturing register read/write traces to send to the hw guys.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "6c9547ff354d867318d78094aa8e9cf5218851e2", "tree": "88907cc36767faa27ea8ea9171d4febac1216de6", "parents": [ "57cd6508da65adabcb14be6ba3b9370d750b647d" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Aug 25 10:05:17 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:23:27 2010 +0100" }, "message": "drm/i915/sdvo: Preserve pixel-multiplier\n\nStore the pixel-multiplier on the adjusted mode and avoid modifying the\nrequested mode.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "57cd6508da65adabcb14be6ba3b9370d750b647d", "tree": "41e7abb39f90c5fd1ff0aa1d6808f9e211380eff", "parents": [ "763a4a019105dccdcd44883f1712571ae8ea8f1f" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 08 12:34:44 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:37 2010 +0100" }, "message": "drm/i915: Sanity check user framebuffer parameters on creation\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "763a4a019105dccdcd44883f1712571ae8ea8f1f", "tree": "b1d5935ab438cc9b09696a3d8714c74086579a08", "parents": [ "974b93315b2213b74a42a87e8a9d4fc8c0dbe90c" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Sep 05 00:52:34 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:37 2010 +0100" }, "message": "drm/i915/tv: Mark the format names as constant and so avoid the memleak\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "974b93315b2213b74a42a87e8a9d4fc8c0dbe90c", "tree": "a26463456326d8c4c76d54a2add6035ddfb8c176", "parents": [ "b8ed2a4f12870bf2ea9c07ff83ccd9d8b6abc2c6" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Sep 05 00:44:20 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:36 2010 +0100" }, "message": "drm/i915/tv: Poll for DAC state change\n\nInstead of sleeping for an arbitrary length of time (the documentation\nfails to specify how long to wait for) wait until the load detection has\nchanged state (or at most the 20ms as before).\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "b8ed2a4f12870bf2ea9c07ff83ccd9d8b6abc2c6", "tree": "4c0b0c5cb715cfdd1bfa331b361a2a585ec498d6", "parents": [ "efe8c25680fcd3548142f956dcd02d5fdaf3f159" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Sep 05 00:43:42 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:35 2010 +0100" }, "message": "drm/i915/tv: Preserve reserved DAC bits during mode-setting\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "efe8c25680fcd3548142f956dcd02d5fdaf3f159", "tree": "8173469ff7d6e183d7dba04d57bb60270bef52b8", "parents": [ "2bbda389632dd810d80c055fc1ec90827a16f687" ], "author": { "name": "Sitsofe Wheeler", "email": "sitsofe@yahoo.com", "time": "Tue Aug 24 16:56:16 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:34 2010 +0100" }, "message": "drm/i915: Revert extra intel_wait_for_vblank to prevent stalls.\n\nWith the extra intel_wait_for_vblank added in commit\n9d0498a2bf7455159b317f19531a3e5db2ecc9c4 periodic stalls were being\ntriggered (which were detected by i915_hangcheck_elapsed). Partially\nrevert this change for now.\n\nSigned-off-by: Sitsofe Wheeler \u003csitsofe@yahoo.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "2bbda389632dd810d80c055fc1ec90827a16f687", "tree": "47ce7265f834ffcc7a8219edde1a6cba726c6b1d", "parents": [ "425904dd8a86d9ca3a3be38eaaa12b4844dceed6" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Sep 02 17:59:39 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:34 2010 +0100" }, "message": "drm/i915: Ironlake page-flipping is per-plane not per-pipe\n\nFix a minor confusion between intel_page_flip_finish(pipe) and\nintel_page_flip_finish_plane(plane) -- should have no effect as\ncurrently we map pipe 0 to plane 0 (and pipe 1 to plane 1).\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "425904dd8a86d9ca3a3be38eaaa12b4844dceed6", "tree": "0e705425cb5fc8747aaefb2a430a305f484b4dc2", "parents": [ "44834a67c0082e2cf74b16be91e49108b1432d65" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 22 18:21:42 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:33 2010 +0100" }, "message": "drm/i915: Addin-offset is an unreliable indicator of LVDS presence (v2)\n\nMy Samsung N210 has a VBT with DEVICE_TYPE_INT_LFP with a zero\naddin-offset. With the check in place, the panel was declared absent.\n\nv2: Only trust BIOS writers that have graduated to writing OpRegions.\n(We are all doomed.)\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Zhao Yakui \u003cyakui.zhao@intel.com\u003e\nCc: Adam Jackson \u003cajax@redhat.com\u003e\nReviewed-by: Adam Jackson \u003cajax@redhat.com\u003e\n" }, { "commit": "44834a67c0082e2cf74b16be91e49108b1432d65", "tree": "ebe2c53b1a08b99a95b579942ae2d7603935709d", "parents": [ "3b61796785e7b0ca8846b7a709216dceb6e2f68d" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 19 16:09:23 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:32 2010 +0100" }, "message": "drm/i915: Use the VBT from OpRegion when available (v3)\n\nIt is recommended that we use the Video BIOS tables that were copied\ninto the OpRegion during POST when initialising the driver. This saves\nus from having to furtle around inside the ROM ourselves and possibly\nallows the vBIOS to adjust the tables prior to initialisation.\n\nOn some systems, such as the Samsung N210, there is no accessible VBIOS\nand the only means of finding the VBT is through the OpRegion.\n\nv2: Rearrange the code so that ASLE is enabled along with ACPI\nv3: Enable OpRegion parsing even without ACPI\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Matthew Garrett \u003cmjg@redhat.com\u003e\n" }, { "commit": "3b61796785e7b0ca8846b7a709216dceb6e2f68d", "tree": "d18355e358fa0830c20fea619647b75d191c6f05", "parents": [ "19c55da11660fea1a0f1ddbb33ecf38d4f728799" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Aug 24 09:02:58 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:31 2010 +0100" }, "message": "drm/i915: Rename i915_opregion.c to intel_opregion.c\n\nIt\u0027s part of the generic Intel driver infrastructure so rename it in\nprepreparation for using it for VBT.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "19c55da11660fea1a0f1ddbb33ecf38d4f728799", "tree": "357a2a5fe9c39873e77ec396dd58589624d250c8", "parents": [ "82d7c9e7da9fa11b8ed968c94a19c7732e11c1ad" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Aug 09 14:50:53 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:31 2010 +0100" }, "message": "drm/i915/crt: Flush register prior to waiting for vblank.\n\nIf we don\u0027t flush the write then we can not be sure that the border\ncolour will have taken effect by the time we try to read it back.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "82d7c9e7da9fa11b8ed968c94a19c7732e11c1ad", "tree": "fc7ba0aea076628adb0bb78cda0ab8da91cda743", "parents": [ "481b6af3d1f36d4a19bd36321c1e9f713db49aad" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sat Aug 07 12:16:25 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:30 2010 +0100" }, "message": "drm/i915: Avoid using msleep under kdb and wait_for()\n\nwait_for() uses msleep() to yield the cpu whilst spinning waiting for a\nregister to change. kdb asserts that mode changes are atomic and so\nprohibits msleep. The alternative would be to use mdelay or to simply\nprobe the register more often instead of busy waiting.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "481b6af3d1f36d4a19bd36321c1e9f713db49aad", "tree": "af86f7fdd673130fe726df2bd822eb45abce63a4", "parents": [ "75ef9da2cdb64e7926404dd2b755bbbfe98eaeaf" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Aug 23 17:43:35 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:29 2010 +0100" }, "message": "drm/i915: Drop the msleep parameter to wait_for()\n\nJesse\u0027s feedback from using the wait_for() macro was that the msleep\nargument was that it was superfluous and made the macro more difficult\nto use and to read. As the actually amount of time to sleep is not\ncritical, the crucial part is to sleep and let the processor schedule\nsomething else whilst we wait for the event, replace the argument with a\nhardcoded value.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "75ef9da2cdb64e7926404dd2b755bbbfe98eaeaf", "tree": "ef200ecba7bb6c9a8cb2ee3d830f30c5d5377207", "parents": [ "c911fc1c6ad61b56869ee521f1a477c741b039da" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Aug 21 00:25:16 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:28 2010 +0100" }, "message": "drm/i915: unload: fix retire_work races\n\nums-gem code correctly cancels the retire work (at lastclose time),\nkms does not do so. Fix this by canceling the work right after ideling\nthe gpu.\n\nWhile staring at the code I noticed that the work function is not\nstatic. Fix this, too.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "c911fc1c6ad61b56869ee521f1a477c741b039da", "tree": "4e6ac0096e85ce04c44fe86ad497f531d8792981", "parents": [ "67e77c5ae8bff6f805d207541f1315051248a87b" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 21:23:20 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:28 2010 +0100" }, "message": "drm/i915: unload: ensure that gem is idle\n\nWhen the module unloads, all users should be gone, hence all bo references\nheld by userspace, too. This should already result in an idle ringbuffer.\nStill, be paranoid and idle gem before starting the unload dance.\n\nAlso kill the call to i915_gem_lastclose under an if (kms), it\u0027s a noop\nfor kms.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "67e77c5ae8bff6f805d207541f1315051248a87b", "tree": "56a845d734e9a8ed8027683ba0897fd95d280652", "parents": [ "3dec0095f71e7d00b7f6180229fd32a2d0a6ce8d" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 22:26:30 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:27 2010 +0100" }, "message": "drm/i915: unload: fix unpin_work related races\n\nKill any outstanding unpin_work when destroying the corresponding\ncrtc. Then flush the workqueue before the gem teardown, in case\nany unpin work is still outstanding.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "3dec0095f71e7d00b7f6180229fd32a2d0a6ce8d", "tree": "77dc949a759d2016c33940d0c5f75e99826fd8ca", "parents": [ "a8b4899e4658e53c0c8f4206af105e358e39ee93" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 21:40:52 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:26 2010 +0100" }, "message": "drm/i915: unload: fix idle_timer/idle_work races\n\nidle_work wasn\u0027t cleaned up at all. It takes \u0026dev-\u003estruct_mutex, but\naccesss the mode_config crtc list (without any other locking!). Hence\nthis work needs to be canceled before calling drm_mode_config_cleanup.\n\nAs evidenced by the kernel\u0027s object debuggin code, the current code\nalso cleans up the timer to early (it gets rearmed). So move it right\nbefore the final cleanup (it seems to work).\n\nAlso unconditionally set up the idle_timer in intel_increase_pllclock.\nIf we\u0027re unlucky the timer might fire right away, rendering the call\nin the modesetting teardown pointless.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "a8b4899e4658e53c0c8f4206af105e358e39ee93", "tree": "73235905364a2202311ed50ae05fd21d9c88db17", "parents": [ "6c0d93500eb50098e4e35b8b79e073f2f2f5b773" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 21:25:11 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:25 2010 +0100" }, "message": "drm/i915: unload: don\u0027t leak error state\n\nWith kms, interrupts now get disabled in the modesetting cleanup. So\nfree the error state afterwards, it currently gets allocated in\nthe interrupt handler.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "6c0d93500eb50098e4e35b8b79e073f2f2f5b773", "tree": "c6ef345799ac6ed7038686f3ba064042401f1566", "parents": [ "bc0c7f14432f7f94b16f972f2d23b8c1248249b4" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 18:26:46 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:24 2010 +0100" }, "message": "drm/i915: unload: fix hotplug_work races\n\nhotplug_work is queued by the hotplug interrupt and only either emits\na hotplug uevent or queues a crt poll slow-work. No other locking. So\nit\u0027s safe to cancel this work _after_ irq\u0027s have been turned off. But\nbefore the modesetting objects are destroyed because the hotplug\nfunction accesses them (without locking).\n\nThe current code (for kms) only switches irqs off after modesetting\nteardown, hence move the irq teardown into the modeset cleanup right\nbefore the crtc cleanup.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "bc0c7f14432f7f94b16f972f2d23b8c1248249b4", "tree": "ccbadf9db22bb0ff1db7bdb9a4414246f184a7bb", "parents": [ "24d05927c37adf62fe8833eceba50585cb78f906" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 18:18:48 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:24 2010 +0100" }, "message": "drm/i915: unload: fix error_work races\n\nThis is the first patch to clean up module unload races due to\noutstanding timers/work. Preparatory step: Thou shalt not destroy\nthe workqueue when new work might still get enqued.\n\nNow error_work gets queued by the hangcheck timer and only (atomically)\nreads the chip wedged status. So cancel it right after the hangcheck\ntimer is killed. But the hangcheck is armed by interrupts, so move\neverything after irqs are disabled.\n\nAlso change a del_timer to a del_timer_sync in the ums gem code, the\nhangcheck timer is self-rearming.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "24d05927c37adf62fe8833eceba50585cb78f906", "tree": "32ea38450f4d114dc74c11a0ba95c3ae3ee6fa61", "parents": [ "b970be7c4114173e733309eec092a0269e1e6a61" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Aug 20 18:08:28 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:23 2010 +0100" }, "message": "drm/i915: unload: fix intel dp encoder cleanup\n\nstruct intel_dp contains both struct intel_encoder at the beginning (as\nit\u0027s base-class) and an i2c adapater. When initializing, the i2c adapter\ngets assigned\n\n\tintel_encoder-\u003eddc_adaptor \u003d \u0026intel_dp-\u003eadapter\n\nand the generic intel_encode_destroy happily calls kfree on this pointer.\nOuch. Fix this by using a dp specific cleanup function.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "b970be7c4114173e733309eec092a0269e1e6a61", "tree": "94b1c201d6330186ee5831d149818143cf9216e3", "parents": [ "c3add4b63438555d5e88c5893d238ab80d1f5959", "cbc60ca04b342a4e1f2a1086a7277c077f07dbed" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:14 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 10:13:14 2010 +0100" }, "message": "Merge remote branch \u0027airlied/drm-core-next\u0027 into HEAD\n" }, { "commit": "c3add4b63438555d5e88c5893d238ab80d1f5959", "tree": "94b0802d55c77870e4c73c730cd97ca17904e76c", "parents": [ "12e8ba25ef52f19e7a42e61aecb3c1fef83b2a82" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 09:14:08 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 09:22:52 2010 +0100" }, "message": "Revert \"drm/i915: Warn if we run out of FIFO space for a mode\"\n\nThis reverts commit b9421ae8f30958deea98d71477b4a77a066856b4.\n\nThis warning was so prelevant, even for apparently working machines,\nthat it was just causing fear, anxiety and panic.\n\nThe root cause still remains, so we will add some better debugging when\nwe focus on fixing it.\n\nBugzilla: https://bugzilla.kernel.org/show_bug.cgi?id\u003d17021\nReported-by: Maciej Rutecki \u003cmaciej.rutecki@gmail.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "12e8ba25ef52f19e7a42e61aecb3c1fef83b2a82", "tree": "a0056ea5a8195d3ab92c9a5dd8093f7bc36417e0", "parents": [ "bc41606aefa8b17000619f510d5809e6c4003d65" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 23:39:28 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Sep 08 08:41:37 2010 +0100" }, "message": "Revert \"drm/i915: Allow LVDS on pipe A on gen4+\"\n\nThis reverts commit 0f3ee801b332d6ff22285386675fe5aaedf035c3.\n\nEnabling LVDS on pipe A was causing excessive wakeups on otherwise idle\nsystems due to i915 interrupts. So restrict the LVDS to pipe B once more,\nwhilst the issue is properly diagnosed.\n\nBugzilla: https://bugzilla.kernel.org/show_bug.cgi?id\u003d16307\nReported-and-tested-by: Enrico Bandiello \u003cenban@postal.uv.es\u003e\nPoked-by: Florian Mickler \u003cflorian@mickler.org\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Adam Jackson \u003cajax@redhat.com\u003e\nCc: stable@kernel.org\n" }, { "commit": "bc41606aefa8b17000619f510d5809e6c4003d65", "tree": "f596640e3f76cb64f2e1aef48d74209c6ca9ea63", "parents": [ "8554048070906579ec9fa19ac381deddd2d7b155" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 21:51:02 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 21:55:52 2010 +0100" }, "message": "Revert \"drm/i915: Enable RC6 on Ironlake.\"\n\nThis reverts commit ce17178094f368d9e3f39b2cb4303da5ed633dd4.\n\nThis commit has been independently bisected a few times as being the cause\nof a s2ram failure.\n\nReported-and-tested-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nReported-and-tested-by: Andy Isaacson \u003cadi@hexapodia.org\u003e\nCc: Zou Nan hai \u003cnanhai.zou@intel.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8554048070906579ec9fa19ac381deddd2d7b155", "tree": "3d43823689bf126d98ff1e45b86a4041f0d09fc3", "parents": [ "a69ffdbfcba8eabf2ca9d384b578e6f28b339c61" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Tue Sep 07 13:45:32 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:44 2010 +0100" }, "message": "intel_agp,i915: Add more sandybridge graphics device ids\n\nNew pci ids for GT2 and GT2+ on desktop and mobile sandybridge,\nand graphics device ids for server sandybridge. Also rename original\nids string to reflect GT1 version.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "a69ffdbfcba8eabf2ca9d384b578e6f28b339c61", "tree": "e0cadb457d040e9ae08f54f86bf6a2e3c0bd6210", "parents": [ "f8f235e5bbf4e61f3e0886a44afb1dc4cfe8f337" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Mon Aug 30 16:12:42 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:44 2010 +0100" }, "message": "drm/i915: Enable MI_FLUSH on Sandybridge\n\nMI_FLUSH is being deprecated, but still available on Sandybridge.\nMake sure it\u0027s enabled as userspace still uses MI_FLUSH.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "f8f235e5bbf4e61f3e0886a44afb1dc4cfe8f337", "tree": "9211554f0542ce636aa1f14ffe58cfa832efa04d", "parents": [ "93f5f7f1249e76a5e8afbdab53f90b10c41fdb61" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Fri Aug 27 11:08:57 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:43 2010 +0100" }, "message": "agp/intel: Fix cache control for Sandybridge\n\nSandybridge GTT has new cache control bits in PTE, which controls\ngraphics page cache in LLC or LLC/MLC, so we need to extend the mask\nfunction to respect the new bits.\n\nAnd set cache control to always LLC only by default on Gen6.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "93f5f7f1249e76a5e8afbdab53f90b10c41fdb61", "tree": "0565797da0c29ed6717977b70ef08a78d7893466", "parents": [ "8dfc2b14ebf538f28a05565f34913ecffedf5024" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Fri Aug 27 11:06:48 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:42 2010 +0100" }, "message": "agp/intel: use #ifdef idiom for intel-agp.h\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8dfc2b14ebf538f28a05565f34913ecffedf5024", "tree": "be4866115ee59b042da6ec0987e36f1a55e7c9c9", "parents": [ "032d2a0d068b0368296a56469761394ef03207c3" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Mon Aug 23 14:37:52 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:41 2010 +0100" }, "message": "agp/intel: fix physical address mask bits for sandybridge\n\nIt should shift bit 39-32 into pte\u0027s bit 11-4.\n\nReported-by:Takashi Iwai \u003ctiwai@suse.de\u003e\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "032d2a0d068b0368296a56469761394ef03207c3", "tree": "d0cba8d5d5befb12334c7da93e16b97f09d2f5b4", "parents": [ "52be11964869c948fbbb9ec7845f9c52b0d3dc09" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Sep 06 16:17:22 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:41 2010 +0100" }, "message": "drm/i915: Prevent double dpms on\n\nArguably this is a bug in drm-core in that we should not be called twice\nin succession with DPMS_ON, however this is still occuring and we see\nFDI link training failures on the second call leading to the occassional\nblank display. For the time being ignore the repeated call.\n\nOriginal patch by Dave Airlie \u003cairlied@redhat.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\n" }, { "commit": "52be11964869c948fbbb9ec7845f9c52b0d3dc09", "tree": "122d27bd189abe10f420f8e7c298f10226ac1e44", "parents": [ "4e5359cd053bfb7d8dabe4a63624a5726848ffbc" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Sep 05 10:01:13 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:40 2010 +0100" }, "message": "drm/i915: Avoid use of uninitialised values when disabling panel-fitter\n\nWe were passing garbage values into the panel-fitter control register\nwhen disabling it on Ironlake - those values (filter modes and reserved\nMBZ bits) would have then be re-used the next time panel-fitting was\nenabled.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "4e5359cd053bfb7d8dabe4a63624a5726848ffbc", "tree": "ea7b81407d31dc62fe495d5a5899c79ea692db33", "parents": [ "8e647a279ca30029f19eca646de08a6338eab924" ], "author": { "name": "Simon Farnsworth", "email": "simon.farnsworth@onelan.co.uk", "time": "Wed Sep 01 17:47:52 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:16:35 2010 +0100" }, "message": "drm/i915: Avoid pageflipping freeze when we miss the flip prepare interrupt\n\nWhen we miss the flip prepare interrupt, we never get into the\nsoftware state needed to restart userspace, resulting in a freeze of a\nfull-screen OpenGL application (such as a compositor).\n\nWork around this by checking DSPxSURF/DSPxBASE to see if the page flip\nhas actually happened. If it has, do the work we would have done when\nthe flip prepare interrupt comes in.\n\nAlso, add debugfs information to tell us what\u0027s going on (based on the\npatch from Chris Wilson attached to bugs.fdo bug #29798).\n\nSigned-off-by: Simon Farnsworth \u003csimon.farnsworth@onelan.co.uk\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8e647a279ca30029f19eca646de08a6338eab924", "tree": "c3d6704c962d50174705abfb4426cadd38d164f6", "parents": [ "a25c25c2a2aa55e609099a9f74453c518aec29a6" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 22 10:54:23 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:14:19 2010 +0100" }, "message": "drm/i915: Tightly scope intel_encoder to prevent invalid use\n\nWe reset intel_encoder for every matching encoder whilst iterating over\nthe encoders attached to this crtc when changing mode. As such in a\ncloned configuration intel_encoder may not correspond to the correct\nis_edp encoder.\n\nBy scoping intel_encoder to the loop, not only is the compiler able to\nspot this mistake, we also improve readiability for ourselves.\n[It might not be a mistake, within this function it is unclear as to\nwhether it is permissable for eDP to be cloned...]\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "a25c25c2a2aa55e609099a9f74453c518aec29a6", "tree": "b625e7d5e23911e6511629dba461c0073e68cbac", "parents": [ "4f7f7b7eb94bd37c449f06932459bbed78826f8d" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Aug 20 14:36:45 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:14:18 2010 +0100" }, "message": "drm/i915: Allocate the PCI resource for the MCHBAR\n\nWe were failing when trying to allocate the resource for MMIO of the\nMCHBAR because we forgot to specify what type of resource we wanted.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: stable@kernel.org\nReviewed-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "4f7f7b7eb94bd37c449f06932459bbed78826f8d", "tree": "eacee3cafd4203425ebef3ce5096368935974353", "parents": [ "b66d842467311ac3434aa19c5c41deaab8295bd0" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Aug 18 18:12:56 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:14:17 2010 +0100" }, "message": "drm/i915/dp: Really try 5 times before giving up.\n\nOnly stop trying if the aux channel sucessfully reports that the\ntransmission was completed, otherwise try again. On the 5th failure,\nbail and report that something is amiss.\n\nThis fixes a sporadic failure in reading the EDID for my external panel\nover DP.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\n" }, { "commit": "b66d842467311ac3434aa19c5c41deaab8295bd0", "tree": "c2e416c77a18a84f5aa6159ecd1fa13185ea196c", "parents": [ "0ad6ef2c587dea59212c4e2ab3ec3b0067500a2a" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Aug 12 15:26:41 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:14:16 2010 +0100" }, "message": "drm/i915/sdvo: Restore guess of the DDC bus in absence of VBIOS\n\nIf the VBIOS tells us the mapping of the SDVO device onto the DDC bus,\nuse it. However, if there is no VBIOS available that mapping is\nuninitialised and we should fallback to our earlier guess.\n\nFix regression introduced in b1083333 (which in turn is a fix for the\nregression caused by the introduction of this guess, 14571b4).\n\nReferences:\n\n Bug 29499 - [945GM] Screen disconnected because of missing VBIOS\n https://bugs.freedesktop.org/show_bug.cgi?id\u003d29499\n\n Bug 15109 - i945GM fails to detect EDID on DVI port\n https://bugzilla.kernel.org/show_bug.cgi?id\u003d15109\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReported-and-tested-by: Paul Neumann \u003cpaul104x@yahoo.de\u003e\nCc: Adam Jackson \u003cajax@redhat.com\u003e\nCc: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\n" }, { "commit": "0ad6ef2c587dea59212c4e2ab3ec3b0067500a2a", "tree": "2c28359e67b4100846175c7e88ce58b93ad8327d", "parents": [ "4e6cfefc729be2aa20647415317577ed98d4f7bf" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Aug 09 17:21:44 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:14:16 2010 +0100" }, "message": "drm/i915/dp: Boost timeout for enabling transcoder to 100ms\n\nAdam Hill reported that his Arrandale system required a much longer, up\nto 200x500us, wait for the panel to initialise or else modesetting would\nfail.\n\nReferences:\n\n https://bugs.freedesktop.org/show_bug.cgi?id\u003d29141\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReported-and-tested-by: Adam Hill \u003csidepipeuk@yahoo.co.uk\u003e\n" }, { "commit": "4e6cfefc729be2aa20647415317577ed98d4f7bf", "tree": "713999d68f48991086f925ed366b623153d0a6fb", "parents": [ "52e68630d13f9668f8f4dd6978fa41039bacfaf6" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 08 13:20:19 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:14:10 2010 +0100" }, "message": "drm/i915: Re-use set_base_atomic to share setting of the display registers\n\nLets try to avoid repeating old bugs.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nReviewed-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "52e68630d13f9668f8f4dd6978fa41039bacfaf6", "tree": "ca2b2b88d5f09592c35553b1802f6c8c6204ac5a", "parents": [ "c96c3a8cb7fadcb33d9a5ebe35fcee8b7d0a7946" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Aug 08 10:15:59 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:13:00 2010 +0100" }, "message": "drm/i915: Fix offset page-flips on i965+\n\ni965 uses the Display Registers to compute the offset from the display\nbase so the new base does not need adjusting when flipping. The older\nchipsets use a fence to access the display and so do perceive the\nsurface as linear and have a single base register which is reprogrammed\nusing the flip.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nReported-by: Marty Jack \u003cmartyj19@comcast.net\u003e\nReviewed-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c96c3a8cb7fadcb33d9a5ebe35fcee8b7d0a7946", "tree": "f713ca433cb32572a0ec1a262d7c40f7c7ec1882", "parents": [ "c877cdce93a44eea96f6cf7fc04be7d0372db2be" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Aug 11 09:59:24 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 07 11:13:00 2010 +0100" }, "message": "drm/i915: Include a generation number in the device info\n\nTo simplify the IS_GEN[234] macros and to enable switching.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "c877cdce93a44eea96f6cf7fc04be7d0372db2be", "tree": "6d14849160a0bfe37f05f3fed41357246a1803a8", "parents": [ "9927a403ca8c97798129953fa9cbb5dc259c7cb9" ], "author": { "name": "Dan Carpenter", "email": "error27@gmail.com", "time": "Wed Jun 23 19:03:01 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Sep 06 23:09:54 2010 +0100" }, "message": "i915: return -EFAULT if copy_to_user fails\n\ncopy_to_user() returns the number of bytes remaining to be copied and\nI\u0027m pretty sure we want to return a negative error code here.\n\nSigned-off-by: Dan Carpenter \u003cerror27@gmail.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\n" }, { "commit": "9927a403ca8c97798129953fa9cbb5dc259c7cb9", "tree": "5ec1c20f078da9d66fb5cd38577640e9e01d98a2", "parents": [ "df51e7aa2cf204e3a65657a1d60b96cfda133e9b" ], "author": { "name": "Dan Carpenter", "email": "error27@gmail.com", "time": "Sat Jun 19 15:12:51 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Sep 06 23:09:53 2010 +0100" }, "message": "i915: return -EFAULT if copy_to_user fails\n\ncopy_to_user returns the number of bytes remaining to be copied, but we\nwant to return a negative error code here. These are returned to\nuserspace.\n\nSigned-off-by: Dan Carpenter \u003cerror27@gmail.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\n" }, { "commit": "df51e7aa2cf204e3a65657a1d60b96cfda133e9b", "tree": "758a3630b9e6b76a4cab9acefe034c62c12309bd", "parents": [ "9f82d23846146990d475f6753be733e55788d88d" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sat Sep 04 14:57:27 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Sep 06 23:09:53 2010 +0100" }, "message": "agp/intel: Promote warning about failure to setup flush to error.\n\nMake sure we always detect when we fail to correctly allocate the Isoch\nFlush Page and print an error to warn the user about the likely memory\ncorruption that will result in invalid rendering or worse.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\n" }, { "commit": "9f82d23846146990d475f6753be733e55788d88d", "tree": "9e9763c3c85c3a1e15be7b123ddd63d5a20efaac", "parents": [ "300387c0b57d75e5218e2881d6ad2720657a8bcf" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Aug 30 21:25:23 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Sep 06 23:09:52 2010 +0100" }, "message": "drm/i915: overlay on gen2 can\u0027t address above 1G\n\nSo set the coherent dma mask accordingly. This dma mask is only used\nfor physical objects, so it won\u0027t really matter allocation-wise.\n\nNow this never really surfaced because sane 32bit kernels only have 1G\nof lowmem. But some eager testers (distros?) still carry around the patch\nto adjust lowmem via a kconfig option. And the kernel seems to favour\nhigh allocations on boot-up, hence the overlay blowing up reliably.\n\nBecause the patch is tiny and nicely shows how broken gen2 is it\u0027s imho\nworth to merge despite the fact that mucking around with the lowmem/\nhighmem division is (no longer) supported.\n\nBugzilla: https://bugs.freedesktop.org/show_bug.cgi?id\u003d28318\nCc: stable@kernel.org\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "300387c0b57d75e5218e2881d6ad2720657a8bcf", "tree": "b176b0a28513678b6f808737af42415824b96d8d", "parents": [ "4f233eff6f32745f8894eb513bc59851213c7833" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Sep 05 20:25:43 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Sep 06 23:09:51 2010 +0100" }, "message": "drm/i915: Clear the vblank status bit before polling for the next vblank\n\nThe vblank status bit is a sticky bit that must be cleared with a write\nof \u00271\u0027 prior to polling for the next vblank.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nTested-by: Sitsofe Wheeler \u003csitsofe@yahoo.com\u003e\n\njbarnes: I\u0027d still rather see a lock, but I think you\u0027re right that\nwe don\u0027t generally wait in code that needs not to miss an interrupt.\nReviewed-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" } ], "next": "4f233eff6f32745f8894eb513bc59851213c7833" }