)]}' { "log": [ { "commit": "486a153f0e294f7cc735838edcb6b32e623cbe52", "tree": "f16a31eb3526968dd08aa93c12cbb211f31f2084", "parents": [ "9c8550ee25e26d14a8f0fe1b761a676e23fe3cf0", "f64a227b6b5cc1f8cc7f6ef9cc3351343636bac9" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Sep 09 15:46:49 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Sep 09 15:46:49 2005 -0700" }, "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild \n" }, { "commit": "e6ae744dd2eae8e00af328b11b1fe77cb0931136", "tree": "726e20fb0950b9a51f602b2b805d016e813ce38a", "parents": [ "0013a85454c281faaf064ccb576e373a2881aac8" ], "author": { "name": "Sam Ravnborg", "email": "sam@mars.(none)", "time": "Fri Sep 09 21:08:59 2005 +0200" }, "committer": { "name": "Sam Ravnborg", "email": "sam@mars.(none)", "time": "Fri Sep 09 21:08:59 2005 +0200" }, "message": "kbuild: arm - use generic asm-offsets.h support\n\nDelete obsoleted stuff from arch Makefile and rename\nconstants.h to asm-offsets.h\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\n" }, { "commit": "d7b6b3589471c3856f1e6dc9c77abc4af962ffdb", "tree": "82751eba321a062ce91af7f0f0bff8c4c5531a1c", "parents": [ "b38d950d3aedf90c8b15b3c7c799b5eb53c47c45" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 08 15:32:23 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 08 15:32:23 2005 +0100" }, "message": "[ARM] Fix ARMv6 VIPT cache \u003e\u003d 32K\n\nThis adds the necessary changes to ensure that we flush the\ncaches correctly with aliasing VIPT caches.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ca6ca91d8c7498d45e0d35800503699164366f10", "tree": "3e340cd984e08f4f1edd7c8f33c4e45cf6ace743", "parents": [ "9bed07d0fed01f7c39d128e59e5d35d7d67ff439" ], "author": { "name": "Timothy Baldwin", "email": "T.E.Baldwin99@members.leeds.ac.uk", "time": "Sun Sep 04 10:13:48 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 04 10:13:48 2005 +0100" }, "message": "[ARM] 2875/1: Data Abort fixes\n\nPatch from Timothy Baldwin\n\nAll data aborts are treated as read accesses. The existing code updates the wrong bit of r1, also the comments are wrong in that the sense of the L bit is inverted.\n\nSigned-off-by: Timothy E. Baldwin \u003cT.E.Baldwin99@members.leeds.ac.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "86a8a83963a3f6beeca4900d26da93c7d2a9d92d", "tree": "67c38d24dc4d2b3360c7d41588244f3a0d424cf5", "parents": [ "103461a80c2f2dd95fe9a39a5decd984622c2a9e" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 01 22:41:55 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 01 22:41:55 2005 +0100" }, "message": "[ARM] Fix ARMv6 page table bits\n\nWe weren\u0027t explicitly setting the page table bits we desired\nin user_prot in the protection table, which resulted in the\nuser mappings for v6 CPUs being marked global.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "103461a80c2f2dd95fe9a39a5decd984622c2a9e", "tree": "01d0fa7bfa325cbbeec6ea484378355a18269444", "parents": [ "08f4ffb3eb4ff23daf9c61bcd523940d43c2270c" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 01 14:51:59 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 01 14:51:59 2005 +0100" }, "message": "[ARM] Simplify setup_mm_for_reboot()\n\nNo point checking what CPU architecture level we have each time\nwithin the loop, so precompute the base PMD flags outside the\nloop.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "08f4ffb3eb4ff23daf9c61bcd523940d43c2270c", "tree": "4aefef161593bc013a0d848a0be05610eaea0d69", "parents": [ "569d2c34dcf259b07977835492aa8813d1168230" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 01 14:45:18 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 01 14:45:18 2005 +0100" }, "message": "[ARM] Convert open-coded __pmd_populate to use inline function\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f21ee2d4245293ee6906eb7afd0a701f40e839b9", "tree": "a7c1339ca77ecc664c53ffa16864788ee41f3933", "parents": [ "3618886f645c2ede45742d3e3d22a96b2ee2f527" ], "author": { "name": "Steve Longerbeam", "email": "stevel@mwwireless.net", "time": "Wed Aug 31 21:22:20 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Aug 31 21:22:20 2005 +0100" }, "message": "[ARM] 2867/2: unaligned ldrd/strd fixups\n\nPatch from Steve Longerbeam\n\nAdds an implementation of unaligned LDRD and STRD fixups.\nAlso fixes a bug where do_alignment() would misinterpret and\nfixup an unaligned LDRD/STRD as LDRH/STRH, causing memory\ncorruption.\nThis is the same as Patch #2867/1, but with minor whitespace\nand comments changes, plus a check for arch-level \u003e\u003d v5TE\nbefore printing ai_dword count in proc_alignment_read().\n\nSigned-off-by: Steve Longerbeam \u003cstevel@mwwireless.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "083bc6b3c9b52b5998cc49d4aa2f8f15c2e84e6b", "tree": "935852aa0f2bee2d68d704d8007a2524189a3f4f", "parents": [ "3e88a579d05e1bb6c51d88f0936e372895edb8ff" ], "author": { "name": "Deepak Saxena", "email": "dsaxena@plexity.net", "time": "Mon Aug 29 22:54:53 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Aug 29 22:54:53 2005 +0100" }, "message": "[ARM] 2853/1: Make alloc_init_supersection() work with 36-bit mappings\n\nPatch from Deepak Saxena\n\nWorking on adding support for 36-bit static mappings for ARMv6 and\nIntel\u0027s XSC3 core and noticed that alloc_init_supersection currently\nincrements the phys addr by 1MB on each of the 16 iterations and then\nforces alignment to supersection size (16MB). This is really uneeded\nb/c we have already forced the phys address to be 16MB aligned in\ncreate_mapping(). Furthermore, this breaks 36-bit addressing b/c bits\n[23:20] of the PMD contain bits [35:32] of the physical address and\nthe masking causes us to loose those bits thus ending up with an\nincorrect virt -\u003e phys translation. The other option is to have an\nalloc_init_supersection36.\nTested on Intel IXP2350 CPU with 36-bit static I/O mappings.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "22d8be866ee23bf3ad9fe867587eef5f4200bf84", "tree": "30776229759256eae069428e15423ce61faed970", "parents": [ "54738e82755f73080e779ba0c8052e232df24d78" ], "author": { "name": "Sean Lee", "email": "beginner2arm@eyou.com", "time": "Wed Aug 17 09:28:26 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Aug 17 09:28:26 2005 +0100" }, "message": "[ARM] 2852/1: Correct the mistake in arch/arm/mm/Kconfig file\n\nPatch from Sean Lee\n\nIn the arch/arm/mm/Kconfig file, the CPU_DCACHE_WRITETHROUGH\noption is depend on the CPU_DISABLE_DCACHE, but the \"Disable\nD-Cache\" option is configured as CPU_DCACHE_DISABLE.\nThe CPU_DISABLE_DCACHE should be CPU_DCACHE_DISABLE\n\nSigned-off-by: Sean Lee \u003cbeginner2arm@eyou.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d93742f5a73c3dff641732c029836170f86392d2", "tree": "d69f618b5b5b7889ae02dd15160338834756cb91", "parents": [ "498de0cc5ea3009af762dc968a46d6f5df96b67a" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Aug 15 16:53:38 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Aug 15 16:53:38 2005 +0100" }, "message": "[ARM] Remove extraneous whitespace introduced in previous ARMv6 patch\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6626a7076d39f0a18156cdd97d4e2cbef91ad701", "tree": "13909ea6ae009b9b418cf3302baebe1baaa0dbd4", "parents": [ "1b9749e7f15bf2db19f5d201f88401c7517910b7" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Aug 10 16:18:35 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Aug 10 16:18:35 2005 +0100" }, "message": "[ARM] Control v6 \u0027global\u0027 bit via Linux PTE entries\n\nUnfortunately, we can\u0027t use the \"user\" bit in the page tables to\ncontrol whether a page table entry is \"global\" or \"asid\" specific,\nsince the vector page is mapped as \"user\" accessible but is not\nprocess specific.\n\nTherefore, give direct control of the ARMv6 \"nG\" (not global)\nbit to the mm layers.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1b9749e7f15bf2db19f5d201f88401c7517910b7", "tree": "43654821aa73118f73f0e98e40bfb470f089e96d", "parents": [ "86b3786078d63242d3194ffc58ae8dae1d1bbef3" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Aug 10 16:15:32 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Aug 10 16:15:32 2005 +0100" }, "message": "[ARM] Use #defined constants for manipulating v6 hardware PTE bits\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ff2afb9df607dfcaacdaf67ea84b773c6fb08f4c", "tree": "8163106927016a97d336a2116518effabab6c0e3", "parents": [ "d95a1b4818f2fe38a3cfc9a7d5817dc9a1a69329" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Aug 04 14:17:33 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Aug 04 14:17:33 2005 +0100" }, "message": "[PATCH] ARM: Fix ARM fault handler for get_user_pages() fixes.\n\nThe ARM fault handler is optimised to make the fast path, err, fast.\nThe renumbering of the VM_FAULT_* codes broke this because numbers\nwere used instead of the definitions. Fix this.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "975ad141eecccb24fc8db1e0f4a08f5580f4a9a9", "tree": "cc392df5cf9909b22bfa608755e0285fccb9b187", "parents": [ "f148af2593ef76ac705d1cc6abe48f455c9912cc" ], "author": { "name": "Deepak Saxena", "email": "dsaxena@plexity.net", "time": "Wed Aug 03 19:49:17 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Aug 03 19:49:17 2005 +0100" }, "message": "[PATCH] ARM: 2839/1: Remove XScale cache and TLB locking code\n\nPatch from Deepak Saxena\n\nThe XScale locking code is not something that has been validated\non 2.6 and needs to be replaced with a more generic API to use\nwith other ARMs that support locking features.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "186efd5275bbe7ffb73d939c1ce5690682668200", "tree": "2d90ed4547cd15249570747d8790005ec7229c2f", "parents": [ "6d9b37a3a80195d317887ff81aad6a58a66954b5" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Jul 26 19:51:26 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jul 26 19:51:26 2005 +0100" }, "message": "[PATCH] ARM SMP: Mark device mappings as \"device\" in ARMv6 parlance\n\nARMv6 introduces memory types into the page tables. Mark devices\nmappings with the \"shared device\" memory type.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b288f75ffa6f26f720d0c69fcd09b4ee7122e17b", "tree": "eb0f051be6693ed4436d23296a9caba2c88d13a7", "parents": [ "af973d2aff6008bc7500277eb5a523db579731c6" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Sun Jul 10 19:58:08 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jul 10 19:58:08 2005 +0100" }, "message": "[PATCH] ARM: 2798/1: OMAP update 2/11: Change ARM Kconfig to support omap1 and omap2\n\nPatch from Tony Lindgren\n\nThis patch by Paul Mundt and other OMAP developers modifies\nARM specific Kconfig to allow sharing code between OMAP1 and\nOMAP2 architectures.\nIn order to share code between OMAP1 and OMAP2, all OMAP1\nspecific code is moved into mach-omap1 directory in the\nfollowing patch. A new mach-omap2 directory will be added\nlater on.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8107338bf9d0367d0b3f42730906b83532b6786f", "tree": "c2245d2507a45034ed594e1094b0f0e2a627be6c", "parents": [ "4bebdab7eb11ee533ff843f4f1fec9975666e64e" ], "author": { "name": "Deepak Saxena", "email": "dsaxena@plexity.net", "time": "Sun Jul 10 19:44:55 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jul 10 19:44:55 2005 +0100" }, "message": "[PATCH] ARM: 2796/1: Fix ARMv5[TEJ] check in MMU initalization\n\nPatch from Deepak Saxena\n\nThe code in mm-armv.c checks for the condition (cpu_architecture()\u003c\u003d ARMv5)\nin a few places but should be checking for ARMv5TEJ as the MMU is shared\nacross all v5 variations.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d1d890edace65721e9a7582545c943f67f500709", "tree": "0c0170ed290533e2d1cf3576090afd5277fed579", "parents": [ "a18bcb7450840f07a772a45229de4811d930f461" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Wed Jul 06 23:06:03 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jul 06 23:06:03 2005 +0100" }, "message": "[PATCH] ARM: 2789/1: Enable access to both CP10 and CP11 on ARMv6\n\nPatch from Catalin Marinas\n\nThe VFP instructions trigger undefined exceptions because the access to\nCP11 is disabled (only CP10 is currently enabled by the kernel). The patch\nfixes this problem.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0d670b413f042eccdffc45bafb9840244752707f", "tree": "5658514d70f4a62ae2268f1837a3d05e3b87bfba", "parents": [ "75f631dc45c7327df26b82b9aea69376a306409c" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Sun Jul 03 17:53:25 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jul 03 17:53:25 2005 +0100" }, "message": "[PATCH] ARM: 2784/1: Fix the block cache flush operation range\n\nPatch from Catalin Marinas\n\nThe range for the ARMv6 block cache operations is inclusive but the\nkernel doesn\u0027t re-calculate the end address, causing a page fault when\nused (this only happens with support for cache aliasing, otherwise the\nblk_flush_kern_dcache_page() is not called). This patch subtracts\nL1_CACHE_BYTES from the end address.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "abaf48a05a8f097654e746af2a5afb2ab95861a1", "tree": "80cd0d34086e3cb8c1781e317b49c84ad6c97841", "parents": [ "c28a814f25d48f193565003223df0ae617796892" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Jun 30 17:04:14 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jun 30 17:04:14 2005 +0100" }, "message": "[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs\n\nPatch from Catalin Marinas\n\nThis patch fixes the V bit setting for the ARM1020x processors. At\nreset, this bit is automatically set to the value of the HIVECSINIT\ninput signal which just happened to be 1 but it is not mandatory.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c19cb1df809dcf343dd1eb6fe60d53639dafcb8c", "tree": "a0c0442cf4cd8e14ea53a193d4e9522b46cef75c", "parents": [ "41359dca9442b0c664336e3fcf3aaf70b6507b1d" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Jun 30 17:04:13 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jun 30 17:04:13 2005 +0100" }, "message": "[PATCH] ARM: 2777/1: Fix broken comment arch/arm/mm/proc-arm1020.S\n\nPatch from Catalin Marinas\n\nThis patch fixes a broken comment in the proc-arm1020.S file which\nprevents the file compilation\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "cfb0810eab39d1162f45b73fc96f45ab1cbcbe8b", "tree": "bbe5ec68ab0a4483324bd4e231cb6fb2358d23ab", "parents": [ "9b4311eedb17fa88f02e4876cd6aa9a08e383cd6" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Jun 30 11:06:49 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jun 30 11:06:49 2005 +0100" }, "message": "[PATCH] ARM: Don\u0027t try to send a signal to pid0\n\nIf we receive an unrecognised abort during boot, don\u0027t try to\nsend a signal to pid0, but instead report the current state.\nThis leads to less confusing debug reports.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n\n" }, { "commit": "564c90aa07cd43dc434d46cef8a15773a23d49a2", "tree": "e9ac4ec0e396359dba8e8eb7e46b42ae33ee944f", "parents": [ "603fff54420a0ccc4c3b48bfef43896fb4e33161" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Jun 28 13:46:09 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jun 28 13:46:09 2005 +0100" }, "message": "[PATCH] ARM SMP: Use local_flush_tlb* where we really want to be local\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a013053d4965d9a45300938e713a4b512e0257d8", "tree": "d0a03ece81d34de8df497f23376918ec2472bd1e", "parents": [ "a343e6075a396e07eeff52c0da5629c8fd396be2" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 27 14:16:47 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jun 27 14:16:47 2005 +0100" }, "message": "[PATCH] ARM: Move memmap freeing into init.c\n\nIt doesn\u0027t make sense for this to be in mm-armv.c now that 26-bit\nARM support is no longer integrated into arch/arm.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a343e6075a396e07eeff52c0da5629c8fd396be2", "tree": "8ee3bcc2d24acb24476e683eea6c4662fb90f514", "parents": [ "2ea83398b75309d8fdc999c4bb252e72d7e4fd9d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 27 14:08:56 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jun 27 14:08:56 2005 +0100" }, "message": "[PATCH] ARM: Move PGD kernel page table initialisation\n\nIt doesn\u0027t make sense to have the PGD kernel pointers initialisation\nseparate from the PGD user pointers, especially when we clean the\ndata cache over the whole range.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "79042f087b5ac7bba819de03dc3e7462bab8aad9", "tree": "0fb7ca4b0d690d59a4a0d5bc6774a345edb43284", "parents": [ "5932ae3f5d610fd8d047ef4693bab9f084e5c56d" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jun 24 21:27:39 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jun 24 21:27:39 2005 +0100" }, "message": "[PATCH] ARM: 2698/1: Enable kernel r/w access to user pages on ARMv6\n\nPatch from Catalin Marinas\n\ncpu_v6_set_pte() sets the kernel access rights to r/o for user\npages (L_PTE_USER) when neither L_PTE_WRITE nor L_PTE_DIRTY are\nset. This causes a kernel data abort when writing the TLS value\nin the 0xffff0000 page. This patch enables the kernel r/w access.\n\nSigned-off-by: Catalin Marinas\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "92a8cbed29eb9bf6e8eec16ca29d54015bc0e8a2", "tree": "142314e2863863a1cbe1ea950ac688fc1aaeef6c", "parents": [ "3a66941106855215127f8bf1afd06099b72dc75b" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Jun 22 21:47:25 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Jun 22 21:47:25 2005 +0100" }, "message": "[PATCH] ARM: Remove explicit page-alignments in memory init\n\nSince meminfo.bank[] array contains page-aligned start/size, we\nno longer need to explicitly round up/down the addresses when\nconverting to PFNs.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1363c3cd8603a913a27e2995dccbd70d5312d8e6", "tree": "405e7fc1ef44678f3ca0a54c536d0457e6e80f45", "parents": [ "e7c8d5c9955a4d2e88e36b640563f5d6d5aba48a" ], "author": { "name": "Wolfgang Wander", "email": "wwc@rentec.com", "time": "Tue Jun 21 17:14:49 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Tue Jun 21 18:46:16 2005 -0700" }, "message": "[PATCH] Avoiding mmap fragmentation\n\nIngo recently introduced a great speedup for allocating new mmaps using the\nfree_area_cache pointer which boosts the specweb SSL benchmark by 4-5% and\ncauses huge performance increases in thread creation.\n\nThe downside of this patch is that it does lead to fragmentation in the\nmmap-ed areas (visible via /proc/self/maps), such that some applications\nthat work fine under 2.4 kernels quickly run out of memory on any 2.6\nkernel.\n\nThe problem is twofold:\n\n 1) the free_area_cache is used to continue a search for memory where\n the last search ended. Before the change new areas were always\n searched from the base address on.\n\n So now new small areas are cluttering holes of all sizes\n throughout the whole mmap-able region whereas before small holes\n tended to close holes near the base leaving holes far from the base\n large and available for larger requests.\n\n 2) the free_area_cache also is set to the location of the last\n munmap-ed area so in scenarios where we allocate e.g. five regions of\n 1K each, then free regions 4 2 3 in this order the next request for 1K\n will be placed in the position of the old region 3, whereas before we\n appended it to the still active region 1, placing it at the location\n of the old region 2. Before we had 1 free region of 2K, now we only\n get two free regions of 1K -\u003e fragmentation.\n\nThe patch addresses thes issues by introducing yet another cache descriptor\ncached_hole_size that contains the largest known hole size below the\ncurrent free_area_cache. If a new request comes in the size is compared\nagainst the cached_hole_size and if the request can be filled with a hole\nbelow free_area_cache the search is started from the base instead.\n\nThe results look promising: Whereas 2.6.12-rc4 fragments quickly and my\n(earlier posted) leakme.c test program terminates after 50000+ iterations\nwith 96 distinct and fragmented maps in /proc/self/maps it performs nicely\n(as expected) with thread creation, Ingo\u0027s test_str02 with 20000 threads\nrequires 0.7s system time.\n\nTaking out Ingo\u0027s patch (un-patch available per request) by basically\ndeleting all mentions of free_area_cache from the kernel and starting the\nsearch for new memory always at the respective bases we observe: leakme\nterminates successfully with 11 distinctive hardly fragmented areas in\n/proc/self/maps but thread creating is gringdingly slow: 30+s(!) system\ntime for Ingo\u0027s test_str02 with 20000 threads.\n\nNow - drumroll ;-) the appended patch works fine with leakme: it ends with\nonly 7 distinct areas in /proc/self/maps and also thread creation seems\nsufficiently fast with 0.71s for 20000 threads.\n\nSigned-off-by: Wolfgang Wander \u003cwwc@rentec.com\u003e\nCredit-to: \"Richard Purdie\" \u003crpurdie@rpsys.net\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e (partly)\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "038c5b602524b33447008492e932cdd0a1e806c9", "tree": "a2a474e180e370dfbc966bfd7f0050469aff4b98", "parents": [ "09f0551d20ddf6d22c333adcc59f2b1148734273" ], "author": { "name": "Bellido Nicolas", "email": "nb-ml@be.rmk.(none)", "time": "Mon Jun 20 18:51:05 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jun 20 18:51:05 2005 +0100" }, "message": "[PATCH] ARM: 2686/2: AAEC-2000 Core support\n\nPatch from Bellido Nicolas\n\nCore support for AAEC-2000 based platforms.\nThis is an updated version of the previous patch, and takes\ninto account Russell\u0027s comments.\nAAED-2000 default configuration will follow as soon\nas some problems with the bootloader are sorted out...\n\nSigned-off-by: Nicolas Bellido\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "09f0551d20ddf6d22c333adcc59f2b1148734273", "tree": "321c877843fc24ef6047225569a66479d9d6269b", "parents": [ "a507ef3ac68f0671fdd3f824885cd7f1ea1040b1" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 20 18:44:37 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 20 18:44:37 2005 +0100" }, "message": "[PATCH] ARM: Add iomap support for ARM\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b8a9b66fbee09d0cc71c272b5c1d1f3320afbbf0", "tree": "25be8fc2ef91f6dcbb7f7dd2b9e3db2a95963477", "parents": [ "8830f04a092b47f3d246271b24685cd9eab82027" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 20 11:31:09 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 20 11:31:09 2005 +0100" }, "message": "[PATCH] ARM: Add common CACHE_COLOUR macro\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8830f04a092b47f3d246271b24685cd9eab82027", "tree": "8258af450ec736fd0ff3cf0864eb5407b3f8b5ff", "parents": [ "d411b845dcc8e1d97e8b02a345e765af5134700f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 20 09:51:03 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Jun 20 09:51:03 2005 +0100" }, "message": "[PATCH] ARM: Fix delayed dcache flush for ARMv6 non-aliasing caches\n\nflush_dcache_page() did nothing for these caches, but since they\nsuffer from I/D cache coherency issues, we need to ensure that data\nis written back to RAM.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4e71e47da3367e8df5994a17fb421ddeaa5025e3", "tree": "25c594c39a3090cef50482b19a45b155a92199ff", "parents": [ "5273a00d9c763108397658d440618f7ac3e40f83" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Jun 09 16:53:28 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Jun 09 16:53:28 2005 +0100" }, "message": "[PATCH] ARM: Remove zero-byte sized file\n\nRemove the remaining zero byte file left over from the Xscale\nfixes.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "dcef1f634657dabe7905af3ccda12cf7f0b6fcc1", "tree": "e1b8bf471c3c268d0be919561268c24f298d031b", "parents": [ "aeabbbbe126f3d5e61e2db07629443cd10932bb2" ], "author": { "name": "Nicolas Pitre", "email": "nico@org.rmk.(none)", "time": "Wed Jun 08 19:00:47 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jun 08 19:00:47 2005 +0100" }, "message": "[PATCH] ARM: 2664/2: add support for atomic ops on pre-ARMv6 SMP systems\n\nPatch from Nicolas Pitre\n\nNot that there might be many of them on the planet, but at least RMK\napparently has one.\n\nSigned-off-by: Nicolas Pitre\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f8f98a9335db4a7d6285b785180fad720bf22864", "tree": "201cf5ce682812b0ed15544269930c0d45e1a42f", "parents": [ "17d82fcc6a15887b7138d35802ab8fc5f249794f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Jun 08 15:28:24 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Jun 08 15:28:24 2005 +0100" }, "message": "[PATCH] ARM: Fix Xscale copy_page implementation\n\nThe ARM copypage changes in 2.6.12-rc4-git1 removed the preempt locking\nfrom the copypage functions which broke the XScale implementation.\nThis patch fixes the locking on XScale and removes the now unneeded\nminicache code.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\nChecked-by: Richard Purdie\n" }, { "commit": "8711a1b902e691c9b3bbd0d0624f836abe9641ca", "tree": "588af68788e56f7e0e6132e52c35af4abcdb4c93", "parents": [ "768cbfbc5273bad91afe12b81471f563b288118a" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon May 16 23:36:22 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon May 16 23:36:22 2005 +0100" }, "message": "[PATCH] ARM: Fix build error\n\nMainline kernels don\u0027t have VECTORS_HIGH nor COPYPAGE_MINICACHE yet.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "70489c88d0b7e5820ac37a039a910bb396e2a4e3", "tree": "47f5ad9729469cad40c926af4961611208bdfdc1", "parents": [ "d7def6c22dfa9f32b3d9e5546a7a6a90c644ff5f" ], "author": { "name": "Nicolas Pitre", "email": "nico@org.rmk.(none)", "time": "Thu May 12 19:27:12 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu May 12 19:27:12 2005 +0100" }, "message": "[PATCH] ARM: 2680/1: refine TLS reg availability some more again\n\nPatch from Nicolas Pitre\n\nNot all ARMv6 processors implement the TLS register.\n\nSigned-off-by: Nicolas Pitre\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "fa4354359f800ef9d68ed644438efd45b559b443", "tree": "57b8fc85f04cb048ec03d01870c597de82f75535", "parents": [ "8d802d28c23122a57d7dddf4886b0486ca183d2d" ], "author": { "name": "Nicolas Pitre", "email": "nico@org.rmk.(none)", "time": "Tue May 10 17:36:29 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue May 10 17:36:29 2005 +0100" }, "message": "[PATCH] ARM: 2663/2: I can\u0027t type\n\nPatch from Nicolas Pitre\n\nSigned-off-by: Nicolas Pitre\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8d802d28c23122a57d7dddf4886b0486ca183d2d", "tree": "f4727bdf06706deffe9516a531275c6aa63d9dba", "parents": [ "08ee4e4c5fd3fb0857eeb6a5a0ff66881432e8a3" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 17:31:43 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 17:31:43 2005 +0100" }, "message": "[PATCH] ARM: Add V6 aliasing cache flush\n\nAdd cache flushing support for aliased V6 caches to\nflush_dcache_page.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "08ee4e4c5fd3fb0857eeb6a5a0ff66881432e8a3", "tree": "a4c70b10a7bbd4dd5606a5d5122d98fd2c82b229", "parents": [ "d2bab05ac1f9a2f5ddcd2f3256237e5c47fc127f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 17:30:47 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 17:30:47 2005 +0100" }, "message": "[PATCH] ARM: Use top_pmd for V6 copy/clear user_page\n\nRemove needless page table walking for v6 page operations.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "d2bab05ac1f9a2f5ddcd2f3256237e5c47fc127f", "tree": "a330a8ac155d82bae9a500d28533888dedad4d1e", "parents": [ "c4e1f6f6bf82af89994a0ee760fc5e036c4d3c1f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 14:23:01 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 14:23:01 2005 +0100" }, "message": "[PATCH] ARM: Move copy/clear user_page locking into implementation\n\nMove the locking for copy_user_page() and clear_user_page() into\nthe implementations which require locking. For simple memcpy/\nmemset based implementations, the locking is extra overhead which\nis not necessary, and prevents preemption occuring.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "c4e1f6f6bf82af89994a0ee760fc5e036c4d3c1f", "tree": "64d5168e48eb879cb7452e80b06b7d7eaa6a709c", "parents": [ "155bb14482cc567761c13b4efc064de400c55e18" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 10:40:19 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue May 10 10:40:19 2005 +0100" }, "message": "[PATCH] ARM: Add top_pmd, which points at the top-most page table\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "155bb14482cc567761c13b4efc064de400c55e18", "tree": "28c9e8989febe619383ceba4b4115ebaafd847bf", "parents": [ "88d7bd8cb9eb8d64bf7997600b0d64f7834047c5" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon May 09 20:52:51 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon May 09 20:52:51 2005 +0100" }, "message": "[PATCH] ARM: Add inline functions to find the pmd from virtual address\n\nAdd pmd_off() and pmd_off_k() to obtain the pmd pointer for a\nvirtual address, and use them throughout the mm initialisation.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\n" }, { "commit": "4b0e07a5566a4e3f141e52c1f17e683e4a5bba91", "tree": "4a2f67e6cb6ea665c6d45529a5b7c61ac255663d", "parents": [ "f7e68bbf405a45d6e7c5b8fc384ff1ba20dd7aa4" ], "author": { "name": "Nicolas Pitre", "email": "nico@org.rmk.(none)", "time": "Thu May 05 23:24:45 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu May 05 23:24:45 2005 +0100" }, "message": "[PATCH] ARM: 2663/1: straightify TLS register emulation a bit more\n\nPatch from Nicolas Pitre\n\nThis better express things, and should cover RMK\u0027s weird SMP toys.\n\nSigned-off-by: Nicolas Pitre\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "48af7215405215e81e72aba1ae8031ca2fea840c", "tree": "ef367f439dd0dfb65cb80fe3e2370368c695ba2d", "parents": [ "a493820df65909d344824499937c939150559ace" ], "author": { "name": "Nicolas Pitre", "email": "nico@org.rmk.(none)", "time": "Tue May 03 22:57:56 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue May 03 22:57:56 2005 +0100" }, "message": "[PATCH] ARM: 2662/1: missing \"default y\" for CONFIG_HAS_TLS_REG\n\nPatch from Nicolas Pitre\n\nSigned-off-by: Nicolas Pitre\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ca315159dfa80a2bfc7d917a717a7ee8d771bdf9", "tree": "6dd27320f571b6d7555424346c21c1d300cb0335", "parents": [ "05f9869bf20e11bcb9b64b9ebd6a9cf89d6b71ba" ], "author": { "name": "George G. Davis", "email": "davis_g@com.rmk.(none)", "time": "Fri Apr 29 22:08:35 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Apr 29 22:08:35 2005 +0100" }, "message": "[PATCH] ARM: 2656/1: Access permission bits are wrong for kernel XIP sections on ARMv6\n\nPatch from George G. Davis\n\nThis patch is required for kernel XIP support on ARMv6 machines. It ensures that the access permission bits for kernel XIP section descriptors are APX\u003d1 and AP[1:0]\u003d01, which is Kernel read-only/User no access permissions. Prior to this change, kernel XIP section descriptor access permissions were set to Kernel no access/User no access on ARMv6 machines and the kernel would therefore hang upon entry to userspace when set_fs(USER_DS) was executed.\n\nSigned-off-by: Steve Longerbeam\nSigned-off-by: George G. Davis\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2d2669b62984b8d76b05a6a045390a3250317d21", "tree": "822f62adf59f2e6302a16289cc99b0f9b873cfb4", "parents": [ "3a1e501511a1e2c665c566939047794dcf86466b" ], "author": { "name": "Nicolas Pitre", "email": "nico@org.rmk.(none)", "time": "Fri Apr 29 22:08:33 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Apr 29 22:08:33 2005 +0100" }, "message": "[PATCH] ARM: 2651/3: kernel helpers for NPTL support\n\nPatch from Nicolas Pitre\n\nThis patch entirely reworks the kernel assistance for NPTL on ARM.\nIn particular this provides an efficient way to retrieve the TLS\nvalue and perform atomic operations without any instruction emulation\nnor special system call. This even allows for pre ARMv6 binaries to\nbe forward compatible with SMP systems without any penalty.\nThe problematic and performance critical operations are performed\nthrough segment of kernel provided user code reachable from user space\nat a fixed address in kernel memory. Those fixed entry points are\nwithin the vector page so we basically get it for free as no extra\nmemory page is required and nothing else may be mapped at that\nlocation anyway.\nThis is different from (but doesn\u0027t preclude) a full blown VDSO\nimplementation, however a VDSO would prevent some assembly tricks with\nconstants that allows for efficient branching to those code segments.\nAnd since those code segments only use a few cycles before returning to\nuser code, the overhead of a VDSO far call would add a significant\noverhead to such minimalistic operations.\nThe ARM_NR_set_tls syscall also changed number. This is done for two\nreasons:\n1) this patch changes the way the TLS value was previously meant to be\n retrieved, therefore we ensure whatever library using the old way\n gets fixed (they only exist in private tree at the moment since the\n NPTL work is still progressing).\n2) the previous number was allocated in a range causing an undefined\n instruction trap on kernels not supporting that syscall and it was\n determined that allocating it in a range returning -ENOSYS would be\n much nicer for libraries trying to determine if the feature is\n present or not.\n\nSigned-off-by: Nicolas Pitre\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3a1e501511a1e2c665c566939047794dcf86466b", "tree": "6803ebc7e2bfd6c9cdc6b4752d79da72cdd6088d", "parents": [ "458a83fa43e83505f9401783ce9ed41b5a8b5591" ], "author": { "name": "George G. Davis", "email": "davis_g@com.rmk.(none)", "time": "Fri Apr 29 22:08:33 2005 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Apr 29 22:08:33 2005 +0100" }, "message": "[PATCH] ARM: 2655/1: ARM1136 SWP instruction abort handler fix\n\nPatch from George G. Davis\n\nAs noted in http://www.arm.com/linux/patch-2.6.9-arm1.gz, the \"Faulty SWP instruction on 1136 doesn\u0027t set bit 11 in DFSR.\" So the v6_early_abort handler does not report the correct rd/wr direction for the SWP instruction which may result in SEGVS or hangs. In order to work around this problem, this patch merely updates the fix contained in the ARM Ltd. patch to use the macroised abort handler fixups.\n\nSigned-off-by: George G. Davis\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d42ce812b8a32adddeee3a692005f82f95ff15a3", "tree": "41cd169ef17e4388189a0f1c46abe88375a7ddd5", "parents": [ "7a228aaa879c119c9fb9b9d7e062ac13cb1a9079" ], "author": { "name": "akpm@osdl.org", "email": "akpm@osdl.org", "time": "Sat Apr 16 15:23:57 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:23:57 2005 -0700" }, "message": "[PATCH] arm: add comment about max_low_pfn/max_pfn\n\n\r)\n\n\nFrom: Russell King \u003crmk+lkml@arm.linux.org.uk\u003e\n\nOddly, max_low_pfn/max_pfn end up being the number of pages in the system,\nrather than the maximum PFN on ARM. This doesn\u0027t seem to cause any problems,\nso just add a note about it.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "2d137c24e9f433e37ffd10b3d5f418157589a8d2", "tree": "9924bec3f5646b6fe6eaa597ccd2f2dc6aa05673", "parents": [ "baaa2c512dc1c47e3afeb9d558c5323c9240bd21" ], "author": { "name": "akpm@osdl.org", "email": "akpm@osdl.org", "time": "Sat Apr 16 15:23:55 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:23:55 2005 -0700" }, "message": "[PATCH] arm: fix SIGBUS handling\n\n\r)\n\n\nFrom: Russell King \u003crmk+lkml@arm.linux.org.uk\u003e\n\nARM wasn\u0027t raising a SIGBUS with a siginfo structure. Fix\n__do_user_fault() to allow us to use it for SIGBUS conditions, and arrange\nfor the sigbus path to use this.\n\nWe need to prevent the siginfo code being called if we do not have a user\nspace context to call it, so consolidate the \"user_mode()\" tests.\n\nThanks to Ian Campbell who spotted this oversight.\n\nSigned-off-by: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2", "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d", "parents": [], "author": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n" } ] }