)]}'
{
  "log": [
    {
      "commit": "249ac17e96811acc3c6402317dd5d5c89d2cbf68",
      "tree": "0a174065460de196861b85f1d9a48c88b2a2675a",
      "parents": [
        "5a0015d62668e64c8b6e02e360fbbea121bfd5e6"
      ],
      "author": {
        "name": "Chris Zankel",
        "email": "czankel@tensilica.com",
        "time": "Thu Jun 23 22:01:20 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Fri Jun 24 00:05:21 2005 -0700"
      },
      "message": "[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4\n\nThe attached patches provides part 4 of an architecture implementation for the\nTensilica Xtensa CPU series.\n\nSigned-off-by: Chris Zankel \u003cchris@zankel.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    }
  ]
}