)]}'
{
  "log": [
    {
      "commit": "085ae41f66657a9655ce832b0a61832a06f0e1dc",
      "tree": "215690b947b14fa18cbb2810db1a4082ad607e7a",
      "parents": [
        "064b53dbcc977dbf2753a67c2b8fc1c061d74f21"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Aug 08 13:19:08 2005 -0700"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Thu Sep 08 14:57:25 2005 -0700"
      },
      "message": "[PATCH] Make sparc64 use setup-res.c\n\nThere were three changes necessary in order to allow\nsparc64 to use setup-res.c:\n\n1) Sparc64 roots the PCI I/O and MEM address space using\n   parent resources contained in the PCI controller structure.\n   I\u0027m actually surprised no other platforms do this, especially\n   ones like Alpha and PPC{,64}.  These resources get linked into the\n   iomem/ioport tree when PCI controllers are probed.\n\n   So the hierarchy looks like this:\n\n   iomem --|\n\t   PCI controller 1 MEM space --|\n\t\t\t\t        device 1\n\t\t\t\t\tdevice 2\n\t\t\t\t\tetc.\n\t   PCI controller 2 MEM space --|\n\t\t\t\t        ...\n   ioport --|\n            PCI controller 1 IO space --|\n\t\t\t\t\t...\n            PCI controller 2 IO space --|\n\t\t\t\t\t...\n\n   You get the idea.  The drivers/pci/setup-res.c code allocates\n   using plain iomem_space and ioport_space as the root, so that\n   wouldn\u0027t work with the above setup.\n\n   So I added a pcibios_select_root() that is used to handle this.\n   It uses the PCI controller struct\u0027s io_space and mem_space on\n   sparc64, and io{port,mem}_resource on every other platform to\n   keep current behavior.\n\n2) quirk_io_region() is buggy.  It takes in raw BUS view addresses\n   and tries to use them as a PCI resource.\n\n   pci_claim_resource() expects the resource to be fully formed when\n   it gets called.  The sparc64 implementation would do the translation\n   but that\u0027s absolutely wrong, because if the same resource gets\n   released then re-claimed we\u0027ll adjust things twice.\n\n   So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()\n   conversion before passing it on to pci_claim_resource().\n\n3) I was mistakedly __init\u0027ing the function methods the PCI controller\n   drivers provide on sparc64 to implement some parts of these\n   routines.  This was, of course, easy to fix.\n\nSo we end up with the following, and that nasty SPARC64 makefile\nifdef in drivers/pci/Makefile is finally zapped.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n"
    },
    {
      "commit": "064b53dbcc977dbf2753a67c2b8fc1c061d74f21",
      "tree": "39efa08fb7b0b7991bbfc4772f4fc3de0e8d11fa",
      "parents": [
        "1248d636122e4ec9d7802b850904e3bb48a0da23"
      ],
      "author": {
        "name": "John W. Linville",
        "email": "linville@tuxdriver.com",
        "time": "Wed Jul 27 10:19:44 2005 -0400"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Thu Sep 08 14:57:24 2005 -0700"
      },
      "message": "[PATCH] PCI: restore BAR values after D3hot-\u003eD0 for devices that need it\n\nSome PCI devices (e.g. 3c905B, 3c556B) lose all configuration\n(including BARs) when transitioning from D3hot-\u003eD0.  This leaves such\na device in an inaccessible state.  The patch below causes the BARs\nto be restored when enabling such a device, so that its driver will\nbe able to access it.\n\nThe patch also adds pci_restore_bars as a new global symbol, and adds a\ncorrepsonding EXPORT_SYMBOL_GPL for that.\n\nSome firmware (e.g. Thinkpad T21) leaves devices in D3hot after a\n(re)boot.  Most drivers call pci_enable_device very early, so devices\nleft in D3hot that lose configuration during the D3hot-\u003eD0 transition\nwill be inaccessible to their drivers.\n\nDrivers could be modified to account for this, but it would\nbe difficult to know which drivers need modification.  This is\nespecially true since often many devices are covered by the same\ndriver.  It likely would be necessary to replicate code across dozens\nof drivers.\n\nThe patch below should trigger only when transitioning from D3hot-\u003eD0\n(or at boot), and only for devices that have the \"no soft reset\" bit\ncleared in the PM control register.  I believe it is safe to include\nthis patch as part of the PCI infrastructure.\n\nThe cleanest implementation of pci_restore_bars was to call\npci_update_resource.  Unfortunately, that does not currently exist\nfor the sparc64 architecture.  The patch below includes a null\nimplemenation of pci_update_resource for sparc64.\n\nSome have expressed interest in making general use of the the\npci_restore_bars function, so that has been exported to GPL licensed\nmodules.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n"
    },
    {
      "commit": "755528c860b05fcecda1c88a2bdaffcb50760a7f",
      "tree": "d8b7aaaec93de93841b46e8e05a3b454d05bd357",
      "parents": [
        "26aad69e3dd854abe9028ca873fb40b410a39dd7"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Aug 26 10:49:22 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Aug 26 10:49:22 2005 -0700"
      },
      "message": "Ignore disabled ROM resources at setup\n\nWriting even a disabled value seems to mess up some matrox graphics\ncards.  It may be a card-related issue, but we may also be writing\nreserved low bits in the result.\n\nThis was a fall-out of switching x86 over to the generic PCI resource\nallocation code, and needs more debugging.  In particular, the old x86\ncode defaulted to not doing any resource allocations at all for ROM\nresources.\n\nIn the meantime, this has been reported to make X happier by Helge\nHafting \u003chelgehaf@aitel.hist.no\u003e.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "dc836b5b6fcde95f750a4790d8200fabaf563dc9",
      "tree": "893613626de4794a7b13fe6793bdebc79420c433",
      "parents": [
        "138b9dd1fd7b44176af4f3b672060c790b0eaf55"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Aug 08 18:46:09 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Aug 08 18:46:09 2005 -0700"
      },
      "message": "Revert \"[PATCH] PCI: restore BAR values...\"\n\nRevert commit fec59a711eef002d4ef9eb8de09dd0a26986eb77, which is\nbreaking sparc64 that doesn\u0027t have a working pci_update_resource.\n\nWe\u0027ll re-do this after 2.6.13 when we\u0027ll do it all properly.\n"
    },
    {
      "commit": "cf7bee5a0bf270a4eace0be39329d6ac0136cc47",
      "tree": "f2df9af0c11dbc0411f628d709e60de46296d799",
      "parents": [
        "0d317fb72fe3cf0f611608cf3a3015bbe6cd2a66"
      ],
      "author": {
        "name": "Ivan Kokshaysky",
        "email": "ink@jurassic.park.msu.ru",
        "time": "Sun Aug 07 13:49:59 2005 +0400"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sun Aug 07 09:50:56 2005 -0700"
      },
      "message": "[PATCH] Fix restore of 64-bit PCI BAR\u0027s\n\nFor 64-bit BAR[i] only pci_dev-\u003eresource[i] is valid, -\u003eresource[i+1]\nslot is unused and contains zeroes in all fields.\n\nSo when we update a PCI BAR, all we need is just to check that we\u0027re\ngoing to update a _valid_ resource.\n\nAlso make sure to write high bits - use \"x \u003e\u003e 16 \u003e\u003e 16\" (rather than the\nsimpler \"\u003e\u003e 32\") to avoid warnings on 32-bit architectures where we\u0027re\nnot going to have any high bits.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "fec59a711eef002d4ef9eb8de09dd0a26986eb77",
      "tree": "4287cefdd94ce686ca0cad40f7897d8acd9c89dc",
      "parents": [
        "c306895167c8384b88bc02945a0d226a04218fa5"
      ],
      "author": {
        "name": "John W. Linville",
        "email": "linville@tuxdriver.com",
        "time": "Thu Aug 04 18:06:10 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Thu Aug 04 21:32:46 2005 -0700"
      },
      "message": "[PATCH] PCI: restore BAR values after D3hot-\u003eD0 for devices that need it\n\nSome PCI devices (e.g. 3c905B, 3c556B) lose all configuration\n(including BARs) when transitioning from D3hot-\u003eD0.  This leaves such\na device in an inaccessible state.  The patch below causes the BARs\nto be restored when enabling such a device, so that its driver will\nbe able to access it.\n\nThe patch also adds pci_restore_bars as a new global symbol, and adds a\ncorrepsonding EXPORT_SYMBOL_GPL for that.\n\nSome firmware (e.g. Thinkpad T21) leaves devices in D3hot after a\n(re)boot.  Most drivers call pci_enable_device very early, so devices\nleft in D3hot that lose configuration during the D3hot-\u003eD0 transition\nwill be inaccessible to their drivers.\n\nDrivers could be modified to account for this, but it would\nbe difficult to know which drivers need modification.  This is\nespecially true since often many devices are covered by the same\ndriver.  It likely would be necessary to replicate code across dozens\nof drivers.\n\nThe patch below should trigger only when transitioning from D3hot-\u003eD0\n(or at boot), and only for devices that have the \"no soft reset\" bit\ncleared in the PM control register.  I believe it is safe to include\nthis patch as part of the PCI infrastructure.\n\nThe cleanest implementation of pci_restore_bars was to call\npci_update_resource.  Unfortunately, that does not currently exist\nfor the sparc64 architecture.  The patch below includes a null\nimplemenation of pci_update_resource for sparc64.\n\nSome have expressed interest in making general use of the the\npci_restore_bars function, so that has been exported to GPL licensed\nmodules.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}