)]}' { "log": [ { "commit": "1c8106528aa6bf16b3f457de80df1cf7462a49a4", "tree": "4aed009c4a36195fd14c9f8d70fe2723a49583da", "parents": [ "1a464cbb3d483f2f195b614cffa4aa1b910a0440", "f93ea733878733f3e98475bc3e2ccf789bebcfb8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 11:08:21 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 11:08:21 2012 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (53 commits)\n iommu/amd: Set IOTLB invalidation timeout\n iommu/amd: Init stats for iommu\u003dpt\n iommu/amd: Remove unnecessary cache flushes in amd_iommu_resume\n iommu/amd: Add invalidate-context call-back\n iommu/amd: Add amd_iommu_device_info() function\n iommu/amd: Adapt IOMMU driver to PCI register name changes\n iommu/amd: Add invalid_ppr callback\n iommu/amd: Implement notifiers for IOMMUv2\n iommu/amd: Implement IO page-fault handler\n iommu/amd: Add routines to bind/unbind a pasid\n iommu/amd: Implement device aquisition code for IOMMUv2\n iommu/amd: Add driver stub for AMD IOMMUv2 support\n iommu/amd: Add stat counter for IOMMUv2 events\n iommu/amd: Add device errata handling\n iommu/amd: Add function to get IOMMUv2 domain for pdev\n iommu/amd: Implement function to send PPR completions\n iommu/amd: Implement functions to manage GCR3 table\n iommu/amd: Implement IOMMUv2 TLB flushing routines\n iommu/amd: Add support for IOMMUv2 domain mode\n iommu/amd: Add amd_iommu_domain_direct_map function\n ...\n" }, { "commit": "f93ea733878733f3e98475bc3e2ccf789bebcfb8", "tree": "ce4981e49a75d5bac7f0d2fa4ddcdcc130cf56f0", "parents": [ "00fb5430f547e411ab03385cfa548776aaac1c92", "95bdaf71ccf2cb4bba0c9a3d2baea0e7916f466b" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Jan 09 13:06:28 2012 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Jan 09 13:06:28 2012 +0100" }, "message": "Merge branches \u0027iommu/page-sizes\u0027 and \u0027iommu/group-id\u0027 into next\n\nConflicts:\n\tdrivers/iommu/amd_iommu.c\n\tdrivers/iommu/intel-iommu.c\n\tinclude/linux/iommu.h\n" }, { "commit": "00fb5430f547e411ab03385cfa548776aaac1c92", "tree": "f2c543e9c9ce4b1400081de08bcaf6fd55b72972", "parents": [ "805a6af8dba5dfdd35ec35dc52ec0122400b2610", "1a36ea815a3557c03819ec7c90a6b2fb128385ca", "1456e9d2c4667a6e9221eda27b9648fb3bcc1e8e" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Jan 09 13:04:05 2012 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Jan 09 13:04:05 2012 +0100" }, "message": "Merge branches \u0027iommu/fixes\u0027, \u0027arm/omap\u0027 and \u0027x86/amd\u0027 into next\n\nConflicts:\n\tdrivers/pci/hotplug/acpiphp_glue.c\n" }, { "commit": "4a2164a7dbf0d3b6a1c2ef6f20c0d54350491a12", "tree": "1ef38a6a3b39f7e539fff848975a5672acc21f44", "parents": [ "15f043a65f655eb8a3aeb831a85da66de520c80f", "45aa0663cc408617b79a2b53f0a5f50e94688a48" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 07:54:53 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 07:54:53 2012 -0800" }, "message": "Merge branch \u0027core-memblock-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027core-memblock-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits)\n memblock: Reimplement memblock allocation using reverse free area iterator\n memblock: Kill early_node_map[]\n score: Use HAVE_MEMBLOCK_NODE_MAP\n s390: Use HAVE_MEMBLOCK_NODE_MAP\n mips: Use HAVE_MEMBLOCK_NODE_MAP\n ia64: Use HAVE_MEMBLOCK_NODE_MAP\n SuperH: Use HAVE_MEMBLOCK_NODE_MAP\n sparc: Use HAVE_MEMBLOCK_NODE_MAP\n powerpc: Use HAVE_MEMBLOCK_NODE_MAP\n memblock: Implement memblock_add_node()\n memblock: s/memblock_analyze()/memblock_allow_resize()/ and update users\n memblock: Track total size of regions automatically\n powerpc: Cleanup memblock usage\n memblock: Reimplement memblock_enforce_memory_limit() using __memblock_remove()\n memblock: Make memblock functions handle overflowing range @size\n memblock: Reimplement __memblock_remove() using memblock_isolate_range()\n memblock: Separate out memblock_isolate_range() from memblock_set_node()\n memblock: Kill memblock_init()\n memblock: Kill sentinel entries at the end of static region arrays\n memblock: Add __memblock_dump_all()\n ...\n" }, { "commit": "89307babf966165171547f105e2253dec261cfa5", "tree": "74225500fcdf8ca4f11dcfa3e54738cdd33702f0", "parents": [ "50b2abed6b0812cbeda9f6dd48cc4c247be80643", "8bd6960c6ae65d7f92bfb708154ee813417d7b26" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 29 17:36:15 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 29 17:36:15 2011 -0800" }, "message": "Merge branch \u0027iommu/fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu\n\n* \u0027iommu/fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:\n iommu: Initialize domain-\u003ehandler in iommu_domain_alloc()\n" }, { "commit": "1456e9d2c4667a6e9221eda27b9648fb3bcc1e8e", "tree": "6ef0a4f1ba7d25c97babd5a0f2a41db068150281", "parents": [ "2655d7a29703f29d4b6b8e4ee1f4d682b3b28f9c" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 22 14:51:53 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 22 14:56:56 2011 +0100" }, "message": "iommu/amd: Set IOTLB invalidation timeout\n\nTo protect the command buffer from hanging when a device\ndoes not respond to an IOTLB invalidation, set a timeout of\n1s for outstanding IOTLB invalidations.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "2655d7a29703f29d4b6b8e4ee1f4d682b3b28f9c", "tree": "34b98c50eb910a4e1bdf1bb9faec83c5b7043bfb", "parents": [ "31342b58b72b2b8480f12ffee648c8ba3297dee1" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 22 12:35:38 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 22 14:56:56 2011 +0100" }, "message": "iommu/amd: Init stats for iommu\u003dpt\n\nThe IOMMUv2 driver added a few statistic counter which are\ninteresting in the iommu\u003dpt mode too. So initialize the\nstatistic counter for that mode too.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "31342b58b72b2b8480f12ffee648c8ba3297dee1", "tree": "72216b2e25fde90006a33bc35f2b6acabfbca8df", "parents": [ "bc21662f729cd17d2af93e149f4eccafc7b10181" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 22 12:18:45 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 22 14:56:56 2011 +0100" }, "message": "iommu/amd: Remove unnecessary cache flushes in amd_iommu_resume\n\nThe caches are already flushed in enable_iommus(), so this\nflush is not necessary.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "45aa0663cc408617b79a2b53f0a5f50e94688a48", "tree": "0a53931c317c3c72a3555bd2fbb70a881ee870f2", "parents": [ "511585a28e5b5fd1cac61e601e42efc4c5dd64b5", "7bd0b0f0da3b1ec11cbcc798eb0ef747a1184077" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 20 12:14:26 2011 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 20 12:14:26 2011 +0100" }, "message": "Merge branch \u0027memblock-kill-early_node_map\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/misc into core/memblock\n" }, { "commit": "2cfab8d74ebfbe06ce2947117945c4f45a5915ec", "tree": "787c8b82533e6f8c358f53ac4aefb2e5e8fd3e2d", "parents": [ "5885b9b3f030f9b430f6b1c7fa396c885033f2f8", "3b5c78a35cf7511c15e09a9b0ffab290a42d9bcf" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Dec 16 11:27:56 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Dec 16 11:27:56 2011 -0800" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 of git://people.freedesktop.org/~keithp/linux\n\n* \u0027drm-intel-fixes\u0027 of git://people.freedesktop.org/~keithp/linux:\n drm/i915/dp: Dither down to 6bpc if it makes the mode fit\n drm/i915: enable semaphores on per-device defaults\n drm/i915: don\u0027t set unpin_work if vblank_get fails\n drm/i915: By default, enable RC6 on IVB and SNB when reasonable\n iommu: Export intel_iommu_enabled to signal when iommu is in use\n drm/i915/sdvo: Include LVDS panels for the IS_DIGITAL check\n drm/i915: prevent division by zero when asking for chipset power\n drm/i915: add PCH info to i915_capabilities\n drm/i915: set the right SDVO transcoder for CPT\n drm/i915: no-lvds quirk for ASUS AT5NM10T-I\n drm/i915: Treat pre-gen4 backlight duty cycle value consistently\n drm/i915: Hook up Ivybridge eDP\n drm/i915: add multi-threaded forcewake support\n" }, { "commit": "8bc1f85c02a20a59956b00b3acea12c04dce9ae8", "tree": "259cc3a7b192afbde9c4b2bf066f0e1a3e4b3999", "parents": [ "522200858093a6f31af9830672109f6d9807dd1e" ], "author": { "name": "Eugeni Dodonov", "email": "eugeni.dodonov@intel.com", "time": "Wed Nov 23 16:42:14 2011 -0200" }, "committer": { "name": "Keith Packard", "email": "keithp@keithp.com", "time": "Fri Dec 16 08:49:57 2011 -0800" }, "message": "iommu: Export intel_iommu_enabled to signal when iommu is in use\n\nIn i915 driver, we do not enable either rc6 or semaphores on SNB when dmar\nis enabled. The new \u0027intel_iommu_enabled\u0027 variable signals when the\niommu code is in operation.\n\nCc: Ted Phelps \u003cphelps@gnusto.com\u003e\nCc: Peter \u003cpab1612@gmail.com\u003e\nCc: Lukas Hejtmanek \u003cxhejtman@fi.muni.cz\u003e\nCc: Andrew Lutomirski \u003cluto@mit.edu\u003e\nCC: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nCc: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\n" }, { "commit": "8bd6960c6ae65d7f92bfb708154ee813417d7b26", "tree": "97ef8b4067aac573b76b1c6cc58588aee30e1f56", "parents": [ "b2c1639135c0fc1560f3fe9a3a83f2c8265a9e02" ], "author": { "name": "KyongHo Cho", "email": "pullip.cho@samsung.com", "time": "Fri Dec 16 21:38:25 2011 +0900" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Dec 16 15:05:13 2011 +0100" }, "message": "iommu: Initialize domain-\u003ehandler in iommu_domain_alloc()\n\nSince it is not guaranteed that an iommu driver initializes in its\ndomain_init() function, it must be initialized with NULL to prevent\ncalling a function in an arbitrary location when iommu fault occurred.\n\nSigned-off-by: KyongHo Cho \u003cpullip.cho@samsung.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "bc21662f729cd17d2af93e149f4eccafc7b10181", "tree": "cb980b6412dc1b42383fefe9898c808167d4a4c6", "parents": [ "52efdb89d60a0f19949129a08af3437a7aab70be" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 07 12:24:42 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 15 11:15:39 2011 +0100" }, "message": "iommu/amd: Add invalidate-context call-back\n\nThis call-back is invoked when the task that is bound to a\npasid is about to exit. The driver can use it to shutdown\nall context related to that context in a safe way.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "52efdb89d60a0f19949129a08af3437a7aab70be", "tree": "f2925a431bd88e68532b205b173ee293b174df84", "parents": [ "46277b75da1b6c57159496d536acc2e9352a7ee0" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 07 12:01:36 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 15 11:15:29 2011 +0100" }, "message": "iommu/amd: Add amd_iommu_device_info() function\n\nThis function can be used to find out which features\nnecessary for IOMMUv2 usage are available on a given device.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "46277b75da1b6c57159496d536acc2e9352a7ee0", "tree": "6cabd9b79c7187fa755d694f96f1d712d2ad8807", "parents": [ "5c11ad95b5ba7d5a3675f3d5829a8131a13b33d5" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 07 14:34:02 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 15 11:05:35 2011 +0100" }, "message": "iommu/amd: Adapt IOMMU driver to PCI register name changes\n\nThe symbolic register names for PCI and PASID changed in\nPCI code. This patch adapts the AMD IOMMU driver to these\nchanges.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "a06ec394c9318e2ee9209ca3c106d3fa6fbfeb00", "tree": "f94f71b5a542b42ecea60e6f903e3f19e5b2eada", "parents": [ "175d6146738b3d04e1adcaa4a971a3b2b0dbd8af", "6c274d1cd5b3aa0834e9f0c3f58038f42278ff8c" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 14 12:41:31 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 14 12:52:09 2011 +0100" }, "message": "Merge branch \u0027iommu/page-sizes\u0027 into x86/amd\n\nConflicts:\n\tdrivers/iommu/amd_iommu.c\n" }, { "commit": "175d6146738b3d04e1adcaa4a971a3b2b0dbd8af", "tree": "02fea4cc4c1205db6d922be017b5bd65359ed3d7", "parents": [ "8736b2c331030733c5d619170dc6e9ef211a4039" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Nov 28 14:36:36 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 14 12:09:39 2011 +0100" }, "message": "iommu/amd: Add invalid_ppr callback\n\nThis callback can be used to change the PRI response code\nsent to a device when a PPR fault fails.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "8736b2c331030733c5d619170dc6e9ef211a4039", "tree": "33a16976842200dc173a55d13c61e7f592ef485d", "parents": [ "028eeacc412a8bebf6711e58629b0cab56a9ba87" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 24 16:21:52 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Dec 14 12:09:17 2011 +0100" }, "message": "iommu/amd: Implement notifiers for IOMMUv2\n\nSince pages are not pinned anymore we need notifications\nwhen the VMM changes the page-tables. Use mmu_notifiers for\nthat.\nAlso use the task_exit notifier from the profiling subsystem\nto shutdown all contexts related to this task.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "028eeacc412a8bebf6711e58629b0cab56a9ba87", "tree": "d5593a1b3cb6e924593f5646343a4432a41b6c8c", "parents": [ "2d5503b624736abfe0e0bad281f9b8d8a705b930" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 24 12:48:13 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:34:50 2011 +0100" }, "message": "iommu/amd: Implement IO page-fault handler\n\nRegister the notifier for PPR faults and handle them as\nnecessary.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "2d5503b624736abfe0e0bad281f9b8d8a705b930", "tree": "6ed415d39c6ac928dbb2997bb86f612b9b87b766", "parents": [ "ed96f228ba9725edf69385bffdc19ee5bb0ec641" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 24 10:41:57 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:34:42 2011 +0100" }, "message": "iommu/amd: Add routines to bind/unbind a pasid\n\nThis patch adds routines to bind a specific process\naddress-space to a given PASID.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "ed96f228ba9725edf69385bffdc19ee5bb0ec641", "tree": "56fc5167fd66b4b7012ac0307d264223a30940e4", "parents": [ "e3c495c74bc008a5c3671bf3411bc7f5382fa58f" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Nov 23 17:30:39 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:32:51 2011 +0100" }, "message": "iommu/amd: Implement device aquisition code for IOMMUv2\n\nThis patch adds the amd_iommu_init_device() and\namd_iommu_free_device() functions which make a device and\nthe IOMMU ready for IOMMUv2 usage.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "e3c495c74bc008a5c3671bf3411bc7f5382fa58f", "tree": "c0557712e92cbfe7358ede7ad8c79862ae7a538f", "parents": [ "399be2f51979aaf4e3391d98d11e3aeaac7633a4" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Nov 09 12:31:15 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:07 2011 +0100" }, "message": "iommu/amd: Add driver stub for AMD IOMMUv2 support\n\nAdd a Kconfig option for the optional driver. Since it is\noptional it can be compiled as a module and will only be\nloaded when required by another driver.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "399be2f51979aaf4e3391d98d11e3aeaac7633a4", "tree": "bcc956e6e6f6766a4d5480e9b582c31f1a35f70a", "parents": [ "6a113ddc03bcc32d3d440dce42b445868d5be093" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 01 16:53:47 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:06 2011 +0100" }, "message": "iommu/amd: Add stat counter for IOMMUv2 events\n\nAdd some interesting statistic counters for events when\nIOMMUv2 is active.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "6a113ddc03bcc32d3d440dce42b445868d5be093", "tree": "2788087070898e12721ea94ddcde336f748ce7ff", "parents": [ "f3572db823decfd747e6afd4c4ddfd67e8af8b6d" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 01 12:04:58 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:06 2011 +0100" }, "message": "iommu/amd: Add device errata handling\n\nAdd infrastructure for errata-handling and handle two known\nerratas in the IOMMUv2 code.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "f3572db823decfd747e6afd4c4ddfd67e8af8b6d", "tree": "e806c8acc077ff9a3827f6dc4ab516fb76c65395", "parents": [ "c99afa25b67339b5fa7ef3767398878be9f60e1f" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Nov 23 12:36:25 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:05 2011 +0100" }, "message": "iommu/amd: Add function to get IOMMUv2 domain for pdev\n\nThe AMD IOMMUv2 driver needs to get the IOMMUv2 domain\nassociated with a particular device. This patch adds a\nfunction to get this information.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "c99afa25b67339b5fa7ef3767398878be9f60e1f", "tree": "6743ac16764459cbdf519f0c83ca4d0c2d923dfb", "parents": [ "b16137b11b4b4d4bb27b61bba7e05f5fda5968f4" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Nov 21 18:19:25 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:05 2011 +0100" }, "message": "iommu/amd: Implement function to send PPR completions\n\nTo send completions for PPR requests this patch adds a\nfunction which can be used by the IOMMUv2 driver.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "b16137b11b4b4d4bb27b61bba7e05f5fda5968f4", "tree": "617f9ae09eaa6b9a4e1f31c1ad73110110a72056", "parents": [ "22e266c79b5bd5441243863c89ea237e6e845295" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Nov 21 16:50:23 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:04 2011 +0100" }, "message": "iommu/amd: Implement functions to manage GCR3 table\n\nThis patch adds functions necessary to set and clear the\nGCR3 values associated with a particular PASID in an IOMMUv2\ndomain.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "22e266c79b5bd5441243863c89ea237e6e845295", "tree": "665f0dc9f3ebbd6c7bda7917eb1dbbfc78bb49d0", "parents": [ "52815b75682e25db45545911fd2b09ef5856e695" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Nov 21 15:59:08 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:19:03 2011 +0100" }, "message": "iommu/amd: Implement IOMMUv2 TLB flushing routines\n\nThe functions added with this patch allow to manage the\nIOMMU and the device TLBs for all devices in an IOMMUv2\ndomain.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "52815b75682e25db45545911fd2b09ef5856e695", "tree": "a54d7812e6d68d0663e6929f29dadf0ce5f74c59", "parents": [ "132bd68f180dd5de9176e20532910503f6393f14" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 17 17:24:28 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 15:18:57 2011 +0100" }, "message": "iommu/amd: Add support for IOMMUv2 domain mode\n\nThis patch adds support for protection domains that\nimplement two-level paging for devices.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "132bd68f180dd5de9176e20532910503f6393f14", "tree": "1fc1a0f0417427a47c6d352a3969ca1e1bf9f5fc", "parents": [ "72e1dcc4192288ad5e37888aa1dbb23b3ef4aa9a" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 17 14:18:46 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:55:13 2011 +0100" }, "message": "iommu/amd: Add amd_iommu_domain_direct_map function\n\nThis function can be used to switch a domain into\npaging-mode 0. In this mode all devices can access physical\nsystem memory directly without any remapping.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "72e1dcc4192288ad5e37888aa1dbb23b3ef4aa9a", "tree": "7e06c2f6ddf2f03dfd6c845f05cf9ce092ceacc2", "parents": [ "5abcdba4fa535c29f736455e37229ee97e0e7f5d" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 19:13:51 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:55:04 2011 +0100" }, "message": "iommu/amd: Implement notifier for PPR faults\n\nAdd a notifer at which a module can attach to get informed\nabout incoming PPR faults.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "5abcdba4fa535c29f736455e37229ee97e0e7f5d", "tree": "228892cf94773b3215fa588fe8e5fc617afa7591", "parents": [ "400a28a05f2cc1a311acb4ff6ac64d8402d21678" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Dec 01 15:49:45 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:54:58 2011 +0100" }, "message": "iommu/amd: Put IOMMUv2 capable devices in pt_domain\n\nIf the device starts to use IOMMUv2 features the dma handles\nneed to stay valid. The only sane way to do this is to use a\nidentity mapping for the device and not translate it by the\niommu. This is implemented with this patch. Since this lifts\nthe device-isolation there is also a new kernel parameter\nwhich allows to disable that feature.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "400a28a05f2cc1a311acb4ff6ac64d8402d21678", "tree": "4dca7cd2b8610ca0bb5ea7a7df4a0af995aa733b", "parents": [ "cbc33a9085995e21f52a66380d108d64916b6787" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Nov 28 15:11:02 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:54:52 2011 +0100" }, "message": "iommu/amd: Add iommuv2 flag to struct amd_iommu\n\nIn mixed IOMMU setups this flag inidicates whether an IOMMU\nsupports the v2 features or not. This patch also adds a\nglobal flag together with a function to query that flag from\nother code. The flag shows if at least one IOMMUv2 is in the\nsystem.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "cbc33a9085995e21f52a66380d108d64916b6787", "tree": "b7e01a392079547bcb2abbce8868ff3ce14c3e5a", "parents": [ "1a29ac014a68e5da8f96d5d8d142b5956eb00b7c" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Nov 25 11:41:31 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:54:44 2011 +0100" }, "message": "iommu/amd: Enable GT mode when supported by IOMMU\n\nThis feature needs to be enabled before IOMMUv2 DTEs can be\nset up.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "1a29ac014a68e5da8f96d5d8d142b5956eb00b7c", "tree": "c0b88ba4f1771eb89e8252bdc0542f60e1e5da03", "parents": [ "62f71abbc64d686064a4caa10a3249c26776995e" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 15:41:40 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:54:37 2011 +0100" }, "message": "iommu/amd: Setup PPR log when supported by IOMMU\n\nAllocate and enable a log buffer for peripheral page faults\nwhen the IOMMU supports this feature.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "62f71abbc64d686064a4caa10a3249c26776995e", "tree": "dd902320a0048af1a46212698f342552b77d943f", "parents": [ "ee6c28684585a64fd79c5a56e849af58ebdc5948" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 14:41:57 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:54:30 2011 +0100" }, "message": "iommu/amd: Get the maximum number of PASIDs supported\n\nRead the number of PASIDs supported by each IOMMU in the\nsystem and take the smallest number as the maximum value\nsupported by the IOMMU driver.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "ee6c28684585a64fd79c5a56e849af58ebdc5948", "tree": "c58aea90ae017d89a53833097b0ecd95a072c8ec", "parents": [ "dc47ce90c3a822cd7c9e9339fe4d5f61dcb26b50" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Nov 09 12:06:03 2011 +0100" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Dec 12 14:54:23 2011 +0100" }, "message": "iommu/amd: Convert dev_table_entry to u64\n\nConvert the contents of \u0027struct dev_table_entry\u0027 to u64 to\nallow updating the DTE wit 64bit writes as required by the\nspec.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "0ee332c1451869963626bf9cac88f165a90990e1", "tree": "a40e6c9c6cfe39ecbca37a08019be3c9e56a4a9b", "parents": [ "a2bf79e7dcc97b4e9654f273453f9264f49e41ff" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:09 2011 -0800" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:09 2011 -0800" }, "message": "memblock: Kill early_node_map[]\n\nNow all ARCH_POPULATES_NODE_MAP archs select HAVE_MEBLOCK_NODE_MAP -\nthere\u0027s no user of early_node_map[] left. Kill early_node_map[] and\nreplace ARCH_POPULATES_NODE_MAP with HAVE_MEMBLOCK_NODE_MAP. Also,\nrelocate for_each_mem_pfn_range() and helper from mm.h to memblock.h\nas page_alloc.c would no longer host an alternative implementation.\n\nThis change is ultimately one to one mapping and shouldn\u0027t cause any\nobservable difference; however, after the recent changes, there are\nsome functions which now would fit memblock.c better than page_alloc.c\nand dependency on HAVE_MEMBLOCK_NODE_MAP instead of HAVE_MEMBLOCK\ndoesn\u0027t make much sense on some of them. Further cleanups for\nfunctions inside HAVE_MEMBLOCK_NODE_MAP in mm.h would be nice.\n\n-v2: Fix compile bug introduced by mis-spelling\n CONFIG_HAVE_MEMBLOCK_NODE_MAP to CONFIG_MEMBLOCK_HAVE_NODE_MAP in\n mmzone.h. Reported by Stephen Rothwell.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\n" }, { "commit": "1a36ea815a3557c03819ec7c90a6b2fb128385ca", "tree": "c215095a0161370a71d8c09ec01b1125346c250e", "parents": [ "608205c082eb4c1326b56fa1525a8106fa7a38c9" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Dec 06 15:22:10 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Dec 06 14:56:08 2011 +0100" }, "message": "iommu/omap: be verbose when omap_iommu_iova_to_phys fails\n\nAn omap_iommu_iova_to_phys failure usually means that iova wasn\u0027t mapped.\n\nWhen that happens, it\u0027s helpful to know the value of iova, so add it\nto the error message.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "61ed26e388ac67da262bb1a95d0474e4cabd4b0d", "tree": "0637ba45080c3d269234659932cfb0d9280bb8b9", "parents": [ "c8f369ab6003a2df3cdae30f9aba641a4a606034" ], "author": { "name": "Sergey Senozhatsky", "email": "sergey.senozhatsky@gmail.com", "time": "Wed Oct 26 19:15:07 2011 +0300" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Dec 05 18:22:53 2011 +0100" }, "message": "intr_remapping: Fix section mismatch in ir_dev_scope_init()\n\nFix:\n\n Section mismatch in reference from the function\n ir_dev_scope_init() to the function\n .init.text:dmar_dev_scope_init() The function\n ir_dev_scope_init() references the function __init dmar_dev_scope_init().\n\nSigned-off-by: Sergey Senozhatsky \u003csergey.senozhatsky@gmail.com\u003e\nCc: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: Youquan Song \u003cyouquan.song@intel.com\u003e\nCc: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nLink: http://lkml.kernel.org/r/20111026161507.GB10103@swordfish\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "c8f369ab6003a2df3cdae30f9aba641a4a606034", "tree": "f51cc613df5c432219ab717346b846f3ad51bf06", "parents": [ "f62ef5f3e9cff065aa845e2b7f487e1810b8e57e" ], "author": { "name": "Sergey Senozhatsky", "email": "sergey.senozhatsky@gmail.com", "time": "Wed Oct 26 18:45:39 2011 +0300" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Dec 05 18:22:51 2011 +0100" }, "message": "intel-iommu: Fix section mismatch in dmar_parse_rmrr_atsr_dev()\n\ndmar_parse_rmrr_atsr_dev() calls rmrr_parse_dev() and\natsr_parse_dev() which are both marked as __init.\n\nSection mismatch in reference from the function\ndmar_parse_rmrr_atsr_dev() to the function\n.init.text:dmar_parse_dev_scope() The function\ndmar_parse_rmrr_atsr_dev() references the function __init\ndmar_parse_dev_scope().\n\nSection mismatch in reference from the function\ndmar_parse_rmrr_atsr_dev() to the function\n.init.text:dmar_parse_dev_scope() The function\ndmar_parse_rmrr_atsr_dev() references the function __init\ndmar_parse_dev_scope().\n\nSigned-off-by: Sergey Senozhatsky \u003csergey.senozhatsky@gmail.com\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: iommu@lists.linux-foundation.org\nCc: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nCc: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nLink: http://lkml.kernel.org/r/20111026154539.GA10103@swordfish\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "fabdbca8c991dfa0ea1ff26214ae7d18e5740cc3", "tree": "eb749033a25fd557e21756936ba83180fefdb8c8", "parents": [ "c8eaab3b74f1326c989e1db8d7c0c14981556e4e" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Oct 11 00:18:33 2011 +0200" }, "committer": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Mon Dec 05 15:47:39 2011 +0200" }, "message": "iommu/omap: eliminate the public omap_find_iommu_device() method\n\nEliminate the public omap_find_iommu_device() method, and don\u0027t\nexpect clients to provide the omap_iommu handle anymore.\n\nInstead, OMAP\u0027s iommu driver now utilizes dev_archdata\u0027s private iommu\nextension to be able to access the required iommu information.\n\nThis way OMAP IOMMU users are now able to use the generic IOMMU API without\nhaving to call any omap-specific binding method.\n\nUpdate omap3isp appropriately.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nAcked-by: Laurent Pinchart \u003claurent.pinchart@ideasonboard.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nCc: Hiroshi Doyu \u003chdoyu@nvidia.com\u003e\n" }, { "commit": "d4bbf7e7759afc172e2bfbc5c416324590049cdd", "tree": "7eab5ee5481cd3dcf1162329fec827177640018a", "parents": [ "a150439c4a97db379f0ed6faa46fbbb6e7bf3cb2", "401d0069cb344f401bc9d264c31db55876ff78c0" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Mon Nov 28 09:46:22 2011 -0800" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Mon Nov 28 09:46:22 2011 -0800" }, "message": "Merge branch \u0027master\u0027 into x86/memblock\n\nConflicts \u0026 resolutions:\n\n* arch/x86/xen/setup.c\n\n\tdc91c728fd \"xen: allow extra memory to be in multiple regions\"\n\t24aa07882b \"memblock, x86: Replace memblock_x86_reserve/free...\"\n\n\tconflicted on xen_add_extra_mem() updates. The resolution is\n\ttrivial as the latter just want to replace\n\tmemblock_x86_reserve_range() with memblock_reserve().\n\n* drivers/pci/intel-iommu.c\n\n\t166e9278a3f \"x86/ia64: intel-iommu: move to drivers/iommu/\"\n\t5dfe8660a3d \"bootmem: Replace work_with_active_regions() with...\"\n\n\tconflicted as the former moved the file under drivers/iommu/.\n\tResolved by applying the chnages from the latter on the moved\n\tfile.\n\n* mm/Kconfig\n\n\t6661672053a \"memblock: add NO_BOOTMEM config symbol\"\n\tc378ddd53f9 \"memblock, x86: Make ARCH_DISCARD_MEMBLOCK a config option\"\n\n\tconflicted trivially. Both added config options. Just\n\tletting both add their own options resolves the conflict.\n\n* mm/memblock.c\n\n\td1f0ece6cdc \"mm/memblock.c: small function definition fixes\"\n\ted7b56a799c \"memblock: Remove memblock_memory_can_coalesce()\"\n\n\tconfliected. The former updates function removed by the\n\tlatter. Resolution is trivial.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\n" }, { "commit": "bcb71abe7d4c5a0d0368c67da0a7def4fc73497a", "tree": "3a043f872b234cb5c47cec1c01b4bbb69539fa0f", "parents": [ "8fbdce659549d93dfb257ec4eabacf63a188e506" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Fri Oct 21 15:56:24 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Nov 15 12:22:31 2011 +0100" }, "message": "iommu: Add option to group multi-function devices\n\nThe option iommu\u003dgroup_mf indicates the that the iommu driver should\nexpose all functions of a multi-function PCI device as the same\niommu_device_group. This is useful for disallowing individual functions\nbeing exposed as independent devices to userspace as there are often\nhidden dependencies. Virtual functions are not affected by this option.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "8fbdce659549d93dfb257ec4eabacf63a188e506", "tree": "7a6e9762593e77775ce47e387d006337b9615db3", "parents": [ "70ae6f0d55bd216b2f773fa5fa5018c0490a9e50" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Fri Oct 21 15:56:18 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Nov 15 12:22:30 2011 +0100" }, "message": "iommu/amd: Implement iommu_device_group\n\nJust use the amd_iommu_alias_table directly.\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "70ae6f0d55bd216b2f773fa5fa5018c0490a9e50", "tree": "d90c8d432e8f1728ccd3c54daee13d6e3e99ed49", "parents": [ "1460432cb513f0c16136ed132c20ecfbf8ccf942" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Fri Oct 21 15:56:11 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Nov 15 12:22:30 2011 +0100" }, "message": "iommu/intel: Implement iommu_device_group\n\nWe generally have BDF granularity for devices, so we just need\nto make sure devices aren\u0027t hidden behind PCIe-to-PCI bridges.\nWe can then make up a group number that\u0027s simply the concatenated\nseg|bus|dev|fn so we don\u0027t have to track them (not that users\nshould depend on that).\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nAcked-By: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "1460432cb513f0c16136ed132c20ecfbf8ccf942", "tree": "f9802b729aa47d9c95fe2de5f41c511d3db7df4c", "parents": [ "1ea6b8f48918282bdca0b32a34095504ee65bab5" ], "author": { "name": "Alex Williamson", "email": "alex.williamson@redhat.com", "time": "Fri Oct 21 15:56:05 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Nov 15 12:22:23 2011 +0100" }, "message": "iommu: Add iommu_device_group callback and iommu_group sysfs entry\n\nAn IOMMU group is a set of devices for which the IOMMU cannot\ndistinguish transactions. For PCI devices, a group often occurs\nwhen a PCI bridge is involved. Transactions from any device\nbehind the bridge appear to be sourced from the bridge itself.\nWe leave it to the IOMMU driver to define the grouping restraints\nfor their platform.\n\nUsing this new interface, the group for a device can be retrieved\nusing the iommu_device_group() callback. Users will compare the\nvalue returned against the value returned for other devices to\ndetermine whether they are part of the same group. Devices with\nno group are not translated by the IOMMU. There should be no\nexpectations about the group numbers as they may be arbitrarily\nassigned by the IOMMU driver and may not be persistent across boots.\n\nWe also provide a sysfs interface to the group numbers here so\nthat userspace can understand IOMMU dependencies between devices\nfor managing safe, userspace drivers.\n\n[Some code changes by Joerg Roedel \u003cjoerg.roedel@amd.com\u003e]\n\nSigned-off-by: Alex Williamson \u003calex.williamson@redhat.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "6c274d1cd5b3aa0834e9f0c3f58038f42278ff8c", "tree": "f31f88dd5150a6e09f1129e0bfe4b0959215ee0c", "parents": [ "6d1c56a9db48977942602a50e88eeb61a3e625eb" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:31 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:38 2011 +0100" }, "message": "iommu/core: remove the temporary pgsize settings\n\nNow that all IOMMU drivers are exporting their supported pgsizes,\nwe can remove the default pgsize settings in register_iommu().\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "6d1c56a9db48977942602a50e88eeb61a3e625eb", "tree": "6d4f915676dde2f287ef5efed30f08ffe10eb28d", "parents": [ "aa3de9c05051ac26355276944789217040e38207" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:30 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:38 2011 +0100" }, "message": "iommu/intel: announce supported page sizes\n\nLet the IOMMU core know we support arbitrary page sizes (as long as\nthey\u0027re an order of 4KiB).\n\nThis way the IOMMU core will retain the existing behavior we\u0027re used to;\nit will let us map regions that:\n- their size is an order of 4KiB\n- they are naturally aligned\n\nNote: Intel IOMMU hardware doesn\u0027t support arbitrary page sizes,\nbut the driver does (it splits arbitrary-sized mappings into\nthe pages supported by the hardware).\n\nTo make everything simpler for now, though, this patch effectively tells\nthe IOMMU core to keep giving this driver the same memory regions it did\nbefore, so nothing is changed as far as it\u0027s concerned.\n\nAt this point, the page sizes announced remain static within the IOMMU\ncore. To correctly utilize the pgsize-splitting of the IOMMU core by\nthis driver, it seems that some core changes should still be done,\nbecause Intel\u0027s IOMMU page size capabilities seem to have the potential\nto be different between different DMA remapping devices.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "aa3de9c05051ac26355276944789217040e38207", "tree": "1d3e81825e0debace5f37f0a71b4fab378696c09", "parents": [ "83427275546a6e36076d4f1a0545335b1bb2afc2" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:29 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:38 2011 +0100" }, "message": "iommu/amd: announce supported page sizes\n\nLet the IOMMU core know we support arbitrary page sizes (as long as\nthey\u0027re an order of 4KiB).\n\nThis way the IOMMU core will retain the existing behavior we\u0027re used to;\nit will let us map regions that:\n- their size is an order of 4KiB\n- they are naturally aligned\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: Joerg Roedel \u003cJoerg.Roedel@amd.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "83427275546a6e36076d4f1a0545335b1bb2afc2", "tree": "8f65c27cb919b5fa38b6731b340df55bcd1cb6bf", "parents": [ "66bc8cf3b1f70227a7847c88c24a36b4886bb3c3" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:28 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:37 2011 +0100" }, "message": "iommu/msm: announce supported page sizes\n\nLet the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes.\n\nThis way the IOMMU core can split any arbitrary-sized physically\ncontiguous regions (that it needs to map) as needed.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nAcked-by: David Brown \u003cdavidb@codeaurora.org\u003e\nCc: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "66bc8cf3b1f70227a7847c88c24a36b4886bb3c3", "tree": "f6eb15b1a1a78212a65fae350ef5d1580272897a", "parents": [ "7d3002cc8c160dbda0e6ab9cd66dc6eb401b8b70" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:27 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:37 2011 +0100" }, "message": "iommu/omap: announce supported page sizes\n\nLet the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes.\n\nThis way the IOMMU core can split any arbitrary-sized physically\ncontiguous regions (that it needs to map) as needed.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: Hiroshi DOYU \u003chdoyu@nvidia.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "7d3002cc8c160dbda0e6ab9cd66dc6eb401b8b70", "tree": "453bad0319d12fc0a3fe6594b8e212615e7e2a70", "parents": [ "5009065d38c95455bd2d27c2838313e3dd0c5bc7" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:26 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:37 2011 +0100" }, "message": "iommu/core: split mapping to page sizes as supported by the hardware\n\nWhen mapping a memory region, split it to page sizes as supported\nby the iommu hardware. Always prefer bigger pages, when possible,\nin order to reduce the TLB pressure.\n\nThe logic to do that is now added to the IOMMU core, so neither the iommu\ndrivers themselves nor users of the IOMMU API have to duplicate it.\n\nThis allows a more lenient granularity of mappings; traditionally the\nIOMMU API took \u0027order\u0027 (of a page) as a mapping size, and directly let\nthe low level iommu drivers handle the mapping, but now that the IOMMU\ncore can split arbitrary memory regions into pages, we can remove this\nlimitation, so users don\u0027t have to split those regions by themselves.\n\nCurrently the supported page sizes are advertised once and they then\nremain static. That works well for OMAP and MSM but it would probably\nnot fly well with intel\u0027s hardware, where the page size capabilities\nseem to have the potential to be different between several DMA\nremapping devices.\n\nregister_iommu() currently sets a default pgsize behavior, so we can convert\nthe IOMMU drivers in subsequent patches. After all the drivers\nare converted, the temporary default settings will be removed.\n\nMainline users of the IOMMU API (kvm and omap-iovmm) are adopted\nto deal with bytes instead of page order.\n\nMany thanks to Joerg Roedel \u003cJoerg.Roedel@amd.com\u003e for significant review!\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: David Brown \u003cdavidb@codeaurora.org\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: Joerg Roedel \u003cJoerg.Roedel@amd.com\u003e\nCc: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\nCc: KyongHo Cho \u003cpullip.cho@samsung.com\u003e\nCc: Hiroshi DOYU \u003chdoyu@nvidia.com\u003e\nCc: Laurent Pinchart \u003claurent.pinchart@ideasonboard.com\u003e\nCc: kvm@vger.kernel.org\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "5009065d38c95455bd2d27c2838313e3dd0c5bc7", "tree": "a957af07e95166bcc014b3f333234fe74cef790e", "parents": [ "1ea6b8f48918282bdca0b32a34095504ee65bab5" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Nov 10 11:32:25 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Thu Nov 10 11:40:37 2011 +0100" }, "message": "iommu/core: stop converting bytes to page order back and forth\n\nExpress sizes in bytes rather than in page order, to eliminate the\nsize-\u003eorder-\u003esize conversions we have whenever the IOMMU API is calling\nthe low level drivers\u0027 map/unmap methods.\n\nAdopt all existing drivers.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: David Brown \u003cdavidb@codeaurora.org\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: Joerg Roedel \u003cJoerg.Roedel@amd.com\u003e\nCc: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\nCc: KyongHo Cho \u003cpullip.cho@samsung.com\u003e\nCc: Hiroshi DOYU \u003chdoyu@nvidia.com\u003e\nCc: Laurent Pinchart \u003claurent.pinchart@ideasonboard.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "08f2e6312c67fed80df9342e06ad36daf11eb80b", "tree": "6e5581f7b6029b1b4516872f38a8c5d133c970b9", "parents": [ "1ea6b8f48918282bdca0b32a34095504ee65bab5" ], "author": { "name": "Ming Lei", "email": "tom.leiming@gmail.com", "time": "Tue Nov 08 18:29:15 2011 +0800" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Nov 08 17:11:57 2011 +0100" }, "message": "iommu: omap: Fix compile failure\n\nFix compile failure in drivers/iommu/omap-iommu-debug.c\nbecause of missing module.h include.\n\nSigned-off-by: Ming Lei \u003ctom.leiming@gmail.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "54485c3005b661077597561fa54e1f0feecc2264", "tree": "50d60dfceb50d026f34ff2b91781516e1d819bf7", "parents": [ "b5a2c4f1996d1d258ac10897e0bbb57c6904a735" ], "author": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Sat Oct 29 10:26:25 2011 -0400" }, "committer": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Mon Oct 31 19:32:14 2011 -0400" }, "message": "intel-iommu: now needs export.h for EXPORT_SYMBOL_GPL\n\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\n" }, { "commit": "0cfdc724390fb9370f27bb9a133eadf69114dd21", "tree": "2abfb0112c46c837c6b42007eadfc389293b7710", "parents": [ "b48aeab65e9fc4b0c9757c5fbc1d722544eb8786", "1abb4ba596a91a839f82e0c9c837b777d574e83d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Oct 30 15:46:19 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Oct 30 15:46:19 2011 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (33 commits)\n iommu/core: Remove global iommu_ops and register_iommu\n iommu/msm: Use bus_set_iommu instead of register_iommu\n iommu/omap: Use bus_set_iommu instead of register_iommu\n iommu/vt-d: Use bus_set_iommu instead of register_iommu\n iommu/amd: Use bus_set_iommu instead of register_iommu\n iommu/core: Use bus-\u003eiommu_ops in the iommu-api\n iommu/core: Convert iommu_found to iommu_present\n iommu/core: Add bus_type parameter to iommu_domain_alloc\n Driver core: Add iommu_ops to bus_type\n iommu/core: Define iommu_ops and register_iommu only with CONFIG_IOMMU_API\n iommu/amd: Fix wrong shift direction\n iommu/omap: always provide iommu debug code\n iommu/core: let drivers know if an iommu fault handler isn\u0027t installed\n iommu/core: export iommu_set_fault_handler()\n iommu/omap: Fix build error with !IOMMU_SUPPORT\n iommu/omap: Migrate to the generic fault report mechanism\n iommu/core: Add fault reporting mechanism\n iommu/core: Use PAGE_SIZE instead of hard-coded value\n iommu/core: use the existing IS_ALIGNED macro\n iommu/msm: -\u003eunmap() should return order of unmapped page\n ...\n\nFixup trivial conflicts in drivers/iommu/Makefile: \"move omap iommu to\ndedicated iommu folder\" vs \"Rename the DMAR and INTR_REMAP config\noptions\" just happened to touch lines next to each other.\n" }, { "commit": "3cfef9524677a4ecb392d6fbffe6ebce6302f1d4", "tree": "88647d9dc50d634dee9cfeb7f354d620977a2f33", "parents": [ "982653009b883ef1529089e3e6f1ae2fee41cbe2", "68cc3990a545dc0da221b4844dd8b9c06623a6c5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 26 16:17:32 2011 +0200" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 26 16:17:32 2011 +0200" }, "message": "Merge branch \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (27 commits)\n rtmutex: Add missing rcu_read_unlock() in debug_rt_mutex_print_deadlock()\n lockdep: Comment all warnings\n lib: atomic64: Change the type of local lock to raw_spinlock_t\n locking, lib/atomic64: Annotate atomic64_lock::lock as raw\n locking, x86, iommu: Annotate qi-\u003eq_lock as raw\n locking, x86, iommu: Annotate irq_2_ir_lock as raw\n locking, x86, iommu: Annotate iommu-\u003eregister_lock as raw\n locking, dma, ipu: Annotate bank_lock as raw\n locking, ARM: Annotate low level hw locks as raw\n locking, drivers/dca: Annotate dca_lock as raw\n locking, powerpc: Annotate uic-\u003elock as raw\n locking, x86: mce: Annotate cmci_discover_lock as raw\n locking, ACPI: Annotate c3_lock as raw\n locking, oprofile: Annotate oprofilefs lock as raw\n locking, video: Annotate vga console lock as raw\n locking, latencytop: Annotate latency_lock as raw\n locking, timer_stats: Annotate table_lock as raw\n locking, rwsem: Annotate inner lock as raw\n locking, semaphores: Annotate inner lock as raw\n locking, sched: Annotate thread_group_cputimer as raw\n ...\n\nFix up conflicts in kernel/posix-cpu-timers.c manually: making\ncputimer-\u003ecputime a raw lock conflicted with the ABBA fix in commit\nbcd5cff7216f (\"cputimer: Cure lock inversion\").\n" }, { "commit": "982653009b883ef1529089e3e6f1ae2fee41cbe2", "tree": "eec3b1fe947d442ee204a2d648133bc5223e5c59", "parents": [ "37d96c28ecf0af1215bb6bbf580dbb1fabb5a6ec", "c020570138f5d9cb1fc0a853f9cf9e641178b5c5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 26 16:11:53 2011 +0200" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 26 16:11:53 2011 +0200" }, "message": "Merge branch \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:\n x86, ioapic: Consolidate the explicit EOI code\n x86, ioapic: Restore the mask bit correctly in eoi_ioapic_irq()\n x86, kdump, ioapic: Reset remote-IRR in clear_IO_APIC\n iommu: Rename the DMAR and INTR_REMAP config options\n x86, ioapic: Define irq_remap_modify_chip_defaults()\n x86, msi, intr-remap: Use the ioapic set affinity routine\n iommu: Cleanup ifdefs in detect_intel_iommu()\n iommu: No need to set dmar_disabled in check_zero_address()\n iommu: Move IOMMU specific code to intel-iommu.c\n intr_remap: Call dmar_dev_scope_init() explicitly\n x86, x2apic: Enable the bios request for x2apic optout\n" }, { "commit": "1abb4ba596a91a839f82e0c9c837b777d574e83d", "tree": "6f77339f0d25d429f767833e09cdb0f60b8ff5ec", "parents": [ "899e3ee404961a90b828ad527573aaaac39f0ab1", "fcd0861db1cf4e6ed99f60a815b7b72c2ed36ea4", "e4efd94bde1a2df9f1344ff936d42b4a78b9acc0", "0ed6d2d27bcc2ace454a8c55446e1bc3efd2d529", "94441c3bd99287b9d84f148a08cc9a44675ec749" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:38:55 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:38:55 2011 +0200" }, "message": "Merge branches \u0027amd/fixes\u0027, \u0027debug/dma-api\u0027, \u0027arm/omap\u0027, \u0027arm/msm\u0027, \u0027core\u0027, \u0027iommu/fault-reporting\u0027 and \u0027api/iommu-ops-per-bus\u0027 into next\n\nConflicts:\n\tdrivers/iommu/amd_iommu.c\n\tdrivers/iommu/iommu.c\n" }, { "commit": "94441c3bd99287b9d84f148a08cc9a44675ec749", "tree": "edf4c7b2b9a78e30cb99f25cc5ac9ec0ec2f74bb", "parents": [ "85eebbc5e4633e6eee10bdddd00d175daadd5841" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 18:58:54 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:23 2011 +0200" }, "message": "iommu/core: Remove global iommu_ops and register_iommu\n\nWith all IOMMU drivers being converted to bus_set_iommu the\nglobal iommu_ops are no longer required. The same is true\nfor the deprecated register_iommu function.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "85eebbc5e4633e6eee10bdddd00d175daadd5841", "tree": "c20104d8db6f9794ddc671411727af585cde77a0", "parents": [ "a65bc64f91623b9f7ef1fc7afa27e857c7b6e4a2" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 17:56:07 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:23 2011 +0200" }, "message": "iommu/msm: Use bus_set_iommu instead of register_iommu\n\nConvert the MSM IOMMU driver for ARM to use the new\ninterface for publishing the iommu_ops.\n\nAcked-by: David Brown \u003cdavidb@codeaurora.org\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "a65bc64f91623b9f7ef1fc7afa27e857c7b6e4a2", "tree": "b1403ddc1c9bfabd13d290b6076023e863578a04", "parents": [ "4236d97df69970680a017cf9255041c827c42b45" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 17:56:07 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:22 2011 +0200" }, "message": "iommu/omap: Use bus_set_iommu instead of register_iommu\n\nConvert the OMAP IOMMU driver on ARM to use the new\ninterface for publishing the iommu_ops.\n\nCc: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "4236d97df69970680a017cf9255041c827c42b45", "tree": "8a369e6eed4bf1640b3bd43b732a9f171b877532", "parents": [ "2cc21c4236f0d1fb67a30d87cfb0f49f185690a0" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 17:56:07 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:22 2011 +0200" }, "message": "iommu/vt-d: Use bus_set_iommu instead of register_iommu\n\nConvert the Intel IOMMU driver to use the new interface for\npublishing the iommu_ops.\n\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "2cc21c4236f0d1fb67a30d87cfb0f49f185690a0", "tree": "914306040d55b9e87bbaf9b539b0d761a06d3ee2", "parents": [ "e5aa7f00776f2d73f410ede5c1f68246cdc83de1" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 17:56:07 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:21 2011 +0200" }, "message": "iommu/amd: Use bus_set_iommu instead of register_iommu\n\nConvert the AMD IOMMU driver to use the new interface for\npublishing the iommu_ops.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "e5aa7f00776f2d73f410ede5c1f68246cdc83de1", "tree": "121c1084903a87bbebddb952470ae9c36e121a33", "parents": [ "a1b60c1cd913c5ccfb38c717ba0bd22622425fa7" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 16:44:29 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:21 2011 +0200" }, "message": "iommu/core: Use bus-\u003eiommu_ops in the iommu-api\n\nUse the per-bus iommu-ops in the functions of the iommu-api\ninstead of the global iommu_ops.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "a1b60c1cd913c5ccfb38c717ba0bd22622425fa7", "tree": "74e5c1e847262ba3c42fb3b0396a3e781c168b6e", "parents": [ "905d66c1e5dc8149e111f04a32bb193f25da1d53" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 18:46:34 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:20 2011 +0200" }, "message": "iommu/core: Convert iommu_found to iommu_present\n\nWith per-bus iommu_ops the iommu_found function needs to\nwork on a bus_type too. This patch adds a bus_type parameter\nto that function and converts all call-places.\nThe function is also renamed to iommu_present because the\nfunction now checks if an iommu is present for a given bus\nand does not check for a global iommu anymore.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "905d66c1e5dc8149e111f04a32bb193f25da1d53", "tree": "3b4d55034f1ca58a7956c88cb71f6af8cda2b697", "parents": [ "ff21776d12ff7993a6b236b8273ef62777d25dfb" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 16:03:26 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:19 2011 +0200" }, "message": "iommu/core: Add bus_type parameter to iommu_domain_alloc\n\nThis is necessary to store a pointer to the bus-specific\niommu_ops in the iommu-domain structure. It will be used\nlater to call into bus-specific iommu-ops.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "ff21776d12ff7993a6b236b8273ef62777d25dfb", "tree": "e4775ee5c1f5f5e7e6975c0887766a3b886c1258", "parents": [ "39d4ebb95925046863dc0ef2698dfcf2c1f1dcbe" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Aug 26 16:48:26 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Oct 21 14:37:19 2011 +0200" }, "message": "Driver core: Add iommu_ops to bus_type\n\nThis is the starting point to make the iommu_ops used for\nthe iommu-api a per-bus-type structure. It is required to\neasily implement bus-specific setup in the iommu-layer.\nThe first user will be the iommu-group attribute in sysfs.\n\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "4399c8bf2b9093696fa8160d79712e7346989c46", "tree": "66363d75fa8e346b84ba6fcdca33f78858456328", "parents": [ "8140a95d228efbcd64d84150e794761a32463947" ], "author": { "name": "Allen Kay", "email": "allen.m.kay@intel.com", "time": "Fri Oct 14 12:32:46 2011 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Oct 19 12:06:22 2011 +0100" }, "message": "intel-iommu: fix superpage support in pfn_to_dma_pte()\n\nIf target_level \u003d\u003d 0, current code breaks out of the while-loop if\nSUPERPAGE bit is set. We should also break out if PTE is not present.\nIf we don\u0027t do this, KVM calls to iommu_iova_to_phys() will cause\npfn_to_dma_pte() to create mapping for 4KiB pages.\n\nSigned-off-by: Allen Kay \u003callen.m.kay@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "8140a95d228efbcd64d84150e794761a32463947", "tree": "5eb55b8a23f8f015ddfcb6b6e0f8e7db9a9456da", "parents": [ "292827cb164ad00cc7689a21283b1261c0b6daed" ], "author": { "name": "Allen Kay", "email": "allen.m.kay@intel.com", "time": "Fri Oct 14 12:32:17 2011 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Oct 19 12:06:20 2011 +0100" }, "message": "intel-iommu: set iommu_superpage on VM domains to lowest common denominator\n\nset dmar-\u003eiommu_superpage field to the smallest common denominator\nof super page sizes supported by all active VT-d engines. Initialize\nthis field in intel_iommu_domain_init() API so intel_iommu_map() API\nwill be able to use iommu_superpage field to determine the appropriate\nsuper page size to use.\n\nSigned-off-by: Allen Kay \u003callen.m.kay@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "292827cb164ad00cc7689a21283b1261c0b6daed", "tree": "9f2627fbecab0c5e885093152910b4a191dd3f68", "parents": [ "3fb39615007d0645ad7f3a509d7120a1987d95b2" ], "author": { "name": "Allen Kay", "email": "allen.m.kay@intel.com", "time": "Fri Oct 14 12:31:54 2011 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Oct 19 12:06:18 2011 +0100" }, "message": "intel-iommu: fix return value of iommu_unmap() API\n\niommu_unmap() API expects IOMMU drivers to return the actual page order\nof the address being unmapped. Previous code was just returning page\norder passed in from the caller. This patch fixes this problem.\n\nSigned-off-by: Allen Kay \u003callen.m.kay@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "c0771df8d5297bfb9c4fbe8ada085a49cb22ec4f", "tree": "6130a2dfb61a3c36b2e811907e358f75eba4893e", "parents": [ "6fbcfb3e467adb414e235eeefaeaf51ad12f2461" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Oct 14 20:59:46 2011 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Oct 14 20:59:46 2011 +0100" }, "message": "intel-iommu: Export a flag indicating that the IOMMU is used for iGFX.\n\nWe really don\u0027t want this to work in the general case; device drivers\n*shouldn\u0027t* care whether they are behind an IOMMU or not. But the\nintegrated graphics is a special case, because the IOMMU and the GTT are\nall kind of smashed into one and generally horrifically buggy, so it\u0027s\nreasonable for the graphics driver to want to know when the IOMMU is\nactive for the graphics hardware.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "6fbcfb3e467adb414e235eeefaeaf51ad12f2461", "tree": "57729514619945cb1480d9cfa7120de364ddc067", "parents": [ "3e7abe2556b583e87dabda3e0e6178a67b20d06f" ], "author": { "name": "David Woodhouse", "email": "dwmw2@infradead.org", "time": "Sun Sep 25 19:11:14 2011 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Oct 14 20:51:44 2011 +0100" }, "message": "intel-iommu: Workaround IOTLB hang on Ironlake GPU\n\nTo work around a hardware issue, we have to submit IOTLB flushes while\nthe graphics engine is idle. The graphics driver will (we hope) go to\ngreat lengths to ensure that it gets that right on the affected\nchipset(s)... so let\u0027s not screw it over by deferring the unmap and\ndoing it later. That wouldn\u0027t be very helpful.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "fcd0861db1cf4e6ed99f60a815b7b72c2ed36ea4", "tree": "eda4a79003476bd19a819dba3c12d5bc9b3d574d", "parents": [ "e33acde91140f1809952d1c135c36feb66a51887" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Oct 11 17:41:32 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Oct 11 17:41:32 2011 +0200" }, "message": "iommu/amd: Fix wrong shift direction\n\nThe shift direction was wrong because the function takes a\npage number and i is the address is the loop.\n\nCc: stable@kernel.org\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "3e7abe2556b583e87dabda3e0e6178a67b20d06f", "tree": "524d965baf3aacc691aedd6535da901cc943cb7a", "parents": [ "65112dccf8a113737684366349d7f9ec373ddc47" ], "author": { "name": "Roland Dreier", "email": "roland@purestorage.com", "time": "Wed Jul 20 06:22:21 2011 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Oct 10 22:02:24 2011 +0100" }, "message": "intel-iommu: Fix AB-BA lockdep report\n\nWhen unbinding a device so that I could pass it through to a KVM VM, I\ngot the lockdep report below. It looks like a legitimate lock\nordering problem:\n\n - domain_context_mapping_one() takes iommu-\u003elock and calls\n iommu_support_dev_iotlb(), which takes device_domain_lock (inside\n iommu-\u003elock).\n\n - domain_remove_one_dev_info() starts by taking device_domain_lock\n then takes iommu-\u003elock inside it (near the end of the function).\n\nSo this is the classic AB-BA deadlock. It looks like a safe fix is to\nsimply release device_domain_lock a bit earlier, since as far as I can\ntell, it doesn\u0027t protect any of the stuff accessed at the end of\ndomain_remove_one_dev_info() anyway.\n\nBTW, the use of device_domain_lock looks a bit unsafe to me... it\u0027s\nat least not obvious to me why we aren\u0027t vulnerable to the race below:\n\n iommu_support_dev_iotlb()\n domain_remove_dev_info()\n\n lock device_domain_lock\n find info\n unlock device_domain_lock\n\n lock device_domain_lock\n find same info\n unlock device_domain_lock\n\n free_devinfo_mem(info)\n\n do stuff with info after it\u0027s free\n\nHowever I don\u0027t understand the locking here well enough to know if\nthis is a real problem, let alone what the best fix is.\n\nAnyway here\u0027s the full lockdep output that prompted all of this:\n\n \u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\n [ INFO: possible circular locking dependency detected ]\n 2.6.39.1+ #1\n -------------------------------------------------------\n bash/13954 is trying to acquire lock:\n (\u0026(\u0026iommu-\u003elock)-\u003erlock){......}, at: [\u003cffffffff812f6421\u003e] domain_remove_one_dev_info+0x121/0x230\n\n but task is already holding lock:\n (device_domain_lock){-.-...}, at: [\u003cffffffff812f6508\u003e] domain_remove_one_dev_info+0x208/0x230\n\n which lock already depends on the new lock.\n\n the existing dependency chain (in reverse order) is:\n\n -\u003e #1 (device_domain_lock){-.-...}:\n [\u003cffffffff8109ca9d\u003e] lock_acquire+0x9d/0x130\n [\u003cffffffff81571475\u003e] _raw_spin_lock_irqsave+0x55/0xa0\n [\u003cffffffff812f8350\u003e] domain_context_mapping_one+0x600/0x750\n [\u003cffffffff812f84df\u003e] domain_context_mapping+0x3f/0x120\n [\u003cffffffff812f9175\u003e] iommu_prepare_identity_map+0x1c5/0x1e0\n [\u003cffffffff81ccf1ca\u003e] intel_iommu_init+0x88e/0xb5e\n [\u003cffffffff81cab204\u003e] pci_iommu_init+0x16/0x41\n [\u003cffffffff81002165\u003e] do_one_initcall+0x45/0x190\n [\u003cffffffff81ca3d3f\u003e] kernel_init+0xe3/0x168\n [\u003cffffffff8157ac24\u003e] kernel_thread_helper+0x4/0x10\n\n -\u003e #0 (\u0026(\u0026iommu-\u003elock)-\u003erlock){......}:\n [\u003cffffffff8109bf3e\u003e] __lock_acquire+0x195e/0x1e10\n [\u003cffffffff8109ca9d\u003e] lock_acquire+0x9d/0x130\n [\u003cffffffff81571475\u003e] _raw_spin_lock_irqsave+0x55/0xa0\n [\u003cffffffff812f6421\u003e] domain_remove_one_dev_info+0x121/0x230\n [\u003cffffffff812f8b42\u003e] device_notifier+0x72/0x90\n [\u003cffffffff8157555c\u003e] notifier_call_chain+0x8c/0xc0\n [\u003cffffffff81089768\u003e] __blocking_notifier_call_chain+0x78/0xb0\n [\u003cffffffff810897b6\u003e] blocking_notifier_call_chain+0x16/0x20\n [\u003cffffffff81373a5c\u003e] __device_release_driver+0xbc/0xe0\n [\u003cffffffff81373ccf\u003e] device_release_driver+0x2f/0x50\n [\u003cffffffff81372ee3\u003e] driver_unbind+0xa3/0xc0\n [\u003cffffffff813724ac\u003e] drv_attr_store+0x2c/0x30\n [\u003cffffffff811e4506\u003e] sysfs_write_file+0xe6/0x170\n [\u003cffffffff8117569e\u003e] vfs_write+0xce/0x190\n [\u003cffffffff811759e4\u003e] sys_write+0x54/0xa0\n [\u003cffffffff81579a82\u003e] system_call_fastpath+0x16/0x1b\n\n other info that might help us debug this:\n\n 6 locks held by bash/13954:\n #0: (\u0026buffer-\u003emutex){+.+.+.}, at: [\u003cffffffff811e4464\u003e] sysfs_write_file+0x44/0x170\n #1: (s_active#3){++++.+}, at: [\u003cffffffff811e44ed\u003e] sysfs_write_file+0xcd/0x170\n #2: (\u0026__lockdep_no_validate__){+.+.+.}, at: [\u003cffffffff81372edb\u003e] driver_unbind+0x9b/0xc0\n #3: (\u0026__lockdep_no_validate__){+.+.+.}, at: [\u003cffffffff81373cc7\u003e] device_release_driver+0x27/0x50\n #4: (\u0026(\u0026priv-\u003ebus_notifier)-\u003erwsem){.+.+.+}, at: [\u003cffffffff8108974f\u003e] __blocking_notifier_call_chain+0x5f/0xb0\n #5: (device_domain_lock){-.-...}, at: [\u003cffffffff812f6508\u003e] domain_remove_one_dev_info+0x208/0x230\n\n stack backtrace:\n Pid: 13954, comm: bash Not tainted 2.6.39.1+ #1\n Call Trace:\n [\u003cffffffff810993a7\u003e] print_circular_bug+0xf7/0x100\n [\u003cffffffff8109bf3e\u003e] __lock_acquire+0x195e/0x1e10\n [\u003cffffffff810972bd\u003e] ? trace_hardirqs_off+0xd/0x10\n [\u003cffffffff8109d57d\u003e] ? trace_hardirqs_on_caller+0x13d/0x180\n [\u003cffffffff8109ca9d\u003e] lock_acquire+0x9d/0x130\n [\u003cffffffff812f6421\u003e] ? domain_remove_one_dev_info+0x121/0x230\n [\u003cffffffff81571475\u003e] _raw_spin_lock_irqsave+0x55/0xa0\n [\u003cffffffff812f6421\u003e] ? domain_remove_one_dev_info+0x121/0x230\n [\u003cffffffff810972bd\u003e] ? trace_hardirqs_off+0xd/0x10\n [\u003cffffffff812f6421\u003e] domain_remove_one_dev_info+0x121/0x230\n [\u003cffffffff812f8b42\u003e] device_notifier+0x72/0x90\n [\u003cffffffff8157555c\u003e] notifier_call_chain+0x8c/0xc0\n [\u003cffffffff81089768\u003e] __blocking_notifier_call_chain+0x78/0xb0\n [\u003cffffffff810897b6\u003e] blocking_notifier_call_chain+0x16/0x20\n [\u003cffffffff81373a5c\u003e] __device_release_driver+0xbc/0xe0\n [\u003cffffffff81373ccf\u003e] device_release_driver+0x2f/0x50\n [\u003cffffffff81372ee3\u003e] driver_unbind+0xa3/0xc0\n [\u003cffffffff813724ac\u003e] drv_attr_store+0x2c/0x30\n [\u003cffffffff811e4506\u003e] sysfs_write_file+0xe6/0x170\n [\u003cffffffff8117569e\u003e] vfs_write+0xce/0x190\n [\u003cffffffff811759e4\u003e] sys_write+0x54/0xa0\n [\u003cffffffff81579a82\u003e] system_call_fastpath+0x16/0x1b\n\nSigned-off-by: Roland Dreier \u003croland@purestorage.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "e4efd94bde1a2df9f1344ff936d42b4a78b9acc0", "tree": "5b81124e2d491069d6c6fdb9c26c0cb0471593b2", "parents": [ "7b6d45f139262aa7b1b604a67963e5c8c01304d3" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Sun Oct 02 14:34:05 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Oct 10 12:03:14 2011 +0200" }, "message": "iommu/omap: always provide iommu debug code\n\nThe iommu module on omap contains a few functions that are\nonly used by the debug module. These are however only there\nwhen the debug code is built as a module. Since it is possible\nto build the debug code into the kernel, the functions should\nalso be provided for the built-in case.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "0ed6d2d27bcc2ace454a8c55446e1bc3efd2d529", "tree": "0ed0c8f9878ee5a921ab69131e38a45864e2498f", "parents": [ "30bd918c7132adddd370c79fd5619bf108efd702" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Sep 27 07:36:40 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Sep 30 16:40:32 2011 +0200" }, "message": "iommu/core: let drivers know if an iommu fault handler isn\u0027t installed\n\nMake report_iommu_fault() return -ENOSYS whenever an iommu fault\nhandler isn\u0027t installed, so IOMMU drivers can then do their own\nplatform-specific default behavior if they wanted.\n\nFault handlers can still return -ENOSYS in case they want to elicit the\ndefault behavior of the IOMMU drivers.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "30bd918c7132adddd370c79fd5619bf108efd702", "tree": "cd81fbdbf65b7cf44af3bcb90209f79bfeb76bf4", "parents": [ "e7f10f02efca2e4c2372bbe4b785959533819919" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Mon Sep 26 09:11:46 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Sep 26 15:51:57 2011 +0200" }, "message": "iommu/core: export iommu_set_fault_handler()\n\ncommit 4f3f8d9 \"iommu/core: Add fault reporting mechanism\" added\nthe public iommu_set_fault_handler() symbol but forgot to export it.\n\nFix that.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "d3f138106b4b40640dc667f0222fd9f137387b32", "tree": "2c5d51deff32ec0999493bbb73cb18a7e4a455c3", "parents": [ "c39d77ffa28c6e72702193df4fa53928c1b6f3e6" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:25 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:22:03 2011 +0200" }, "message": "iommu: Rename the DMAR and INTR_REMAP config options\n\nChange the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent\nwith the other IOMMU options.\n\nRename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the\nirq subsystem name.\n\nAnd define the CONFIG_DMAR_TABLE for the common ACPI DMAR\nroutines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: youquan.song@intel.com\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "f5d1b97bcdd8ac195f48c645bffcb88bcea533e4", "tree": "4c93c43132bbed990fa6ae2c6f4a5422f8f85f19", "parents": [ "80990c5ba6de9040d2df7c06e3c222c61004085d" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:22 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:21:57 2011 +0200" }, "message": "iommu: Cleanup ifdefs in detect_intel_iommu()\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: youquan.song@intel.com\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.386003047@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "80990c5ba6de9040d2df7c06e3c222c61004085d", "tree": "38b4f852b7f20a2f6dee56c022cec550f23db16d", "parents": [ "318fe7df9d8456f778451b01913b5d0dc0a25854" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:21 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:21:55 2011 +0200" }, "message": "iommu: No need to set dmar_disabled in check_zero_address()\n\nBefore the restructruing of the x86 IOMMU code,\nintel_iommu_init() was getting called directly from\npci_iommu_init() and hence needed to explicitly set\ndmar_disabled to 1 for the failure conditions of\ncheck_zero_address().\n\nRecent changes don\u0027t call intel_iommu_init() if the intel iommu\ndetection fails as a result of failure in check_zero_address().\n\nSo no need for this ifdef and the code inside it.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: youquan.song@intel.com\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.334878686@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "318fe7df9d8456f778451b01913b5d0dc0a25854", "tree": "b134ae443ed05996f98660469590034ff19f76b5", "parents": [ "c2c7286ac6d996a8ffc8d391d782ba35570b1236" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:20 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:21:54 2011 +0200" }, "message": "iommu: Move IOMMU specific code to intel-iommu.c\n\nMove the IOMMU specific routines to intel-iommu.c leaving the\ndmar.c to the common ACPI dmar code shared between DMA-remapping\nand Interrupt-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: youquan.song@intel.com\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.282401285@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "c2c7286ac6d996a8ffc8d391d782ba35570b1236", "tree": "beb95a2a13b212bbb35d8c591e4fd83cb6182019", "parents": [ "41750d31fc9599fd81763e685a6b7b42d298c4f8" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:19 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:21:52 2011 +0200" }, "message": "intr_remap: Call dmar_dev_scope_init() explicitly\n\nBoth DMA-remapping aswell as Interrupt-remapping depend on the\ndmar dev scope to be initialized. When both DMA and\nIRQ-remapping are enabled, we depend on DMA-remapping init code\nto call dmar_dev_scope_init(). This resulted in not doing this\ninit when DMA-remapping was turned off but interrupt-remapping\nturned on in the kernel config.\n\nThis caused interrupt routing to break with CONFIG_INTR_REMAP\u003dy\nand CONFIG_DMAR\u003dn.\n\nThis issue was introduced by this commit:\n\n | commit 9d5ce73a64be2be8112147a3e0b551ad9cd1247b\n | Author: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\n | Date: Tue Nov 10 19:46:16 2009 +0900\n |\n | x86: intel-iommu: Convert detect_intel_iommu to use iommu_init hook\n\nFix this by calling dmar_dev_scope_init() explicitly from the\ninterrupt remapping code too.\n\nReported-by: Andrew Vasquez \u003candrew.vasquez@qlogic.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: youquan.song@intel.com\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.229207526@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "41750d31fc9599fd81763e685a6b7b42d298c4f8", "tree": "6cacc746aa159c8bd08f151270f0bffe126caa9d", "parents": [ "9d037a777695993ec7437e5f451647dea7919d4c" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:18 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:21:50 2011 +0200" }, "message": "x86, x2apic: Enable the bios request for x2apic optout\n\nOn the platforms which are x2apic and interrupt-remapping\ncapable, Linux kernel is enabling x2apic even if the BIOS\ndoesn\u0027t. This is to take advantage of the features that x2apic\nbrings in.\n\nSome of the OEM platforms are running into issues because of\nthis, as their bios is not x2apic aware. For example, this was\nresulting in interrupt migration issues on one of the platforms.\nAlso if the BIOS SMI handling uses APIC interface to send SMI\u0027s,\nthen the BIOS need to be aware of x2apic mode that OS has\nenabled.\n\nOn some of these platforms, BIOS doesn\u0027t have a HW mechanism to\nturnoff the x2apic feature to prevent OS from enabling it.\n\nTo resolve this mess, recent changes to the VT-d2 specification:\n\n http://download.intel.com/technology/computing/vptech/Intel(r)_VT_for_Direct_IO.pdf\n\nincludes a mechanism that provides BIOS a way to request system\nsoftware to opt out of enabling x2apic mode.\n\nLook at the x2apic optout flag in the DMAR tables before\nenabling the x2apic mode in the platform. Also print a warning\nthat we have disabled x2apic based on the BIOS request.\n\nKernel boot parameter \"intremap\u003dno_x2apic_optout\" can be used to\noverride the BIOS x2apic optout request.\n\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.171766616@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "7b6d45f139262aa7b1b604a67963e5c8c01304d3", "tree": "037053c8d38952c3018e6a0bbeae131f61c0f873", "parents": [ "5e1b612cb16f446996398bd23b6cd59ea0206938" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Sep 14 16:03:45 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Sep 14 16:06:04 2011 +0200" }, "message": "iommu/omap: Fix build error with !IOMMU_SUPPORT\n\nWithout this patch it is possible to select the VIDEO_OMAP3\ndriver which then selects OMAP_IOVMM. But the omap iommu\ndriver is not compiled without IOMMU_SUPPORT enabled. Fix\nthat by forcing OMAP_IOMMU and OMAP_IOVMM are enabled before\nVIDEO_OMAP3 can be selected.\n\nCc: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: iommu@lists.linux-foundation.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "e7f10f02efca2e4c2372bbe4b785959533819919", "tree": "ec739418369c0fbbf0eec1871f06bf25f984d0e0", "parents": [ "4f3f8d9db359bbc780d482849f2a9c8b12f910b6" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Sep 13 15:26:29 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Sep 14 15:36:35 2011 +0200" }, "message": "iommu/omap: Migrate to the generic fault report mechanism\n\nStart using the generic fault report mechanism, as provided by\nthe IOMMU core, and remove its now-redundant omap_iommu_set_isr API.\n\nCurrently we\u0027re only interested in letting upper layers know about the\nfault, so in case the faulting device is a remote processor, they could\nrestart it.\n\nDynamic PTE/TLB loading is not supported.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "4f3f8d9db359bbc780d482849f2a9c8b12f910b6", "tree": "4875209af7bc93421e9f7541ff0182c5aa5d97c3", "parents": [ "5e1b612cb16f446996398bd23b6cd59ea0206938" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Sep 13 15:25:23 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Wed Sep 14 15:35:36 2011 +0200" }, "message": "iommu/core: Add fault reporting mechanism\n\nAdd iommu fault report mechanism to the IOMMU API, so implementations\ncould report about mmu faults (translation errors, hardware errors,\netc..).\n\nFault reports can be used in several ways:\n- mere logging\n- reset the device that accessed the faulting address (may be necessary\n in case the device is a remote processor for example)\n- implement dynamic PTE/TLB loading\n\nA dedicated iommu_set_fault_handler() API has been added to allow\nusers, who are interested to receive such reports, to provide\ntheir handler.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "477694e71113fd0694b6bb0bcc2d006b8ac62691", "tree": "9ccfa37503514fa53ce26403ccf310d1586ea6e3", "parents": [ "ed585a651681e822089087b426e6ebfb6d3d9873" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Jul 19 16:25:42 2011 +0200" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Sep 13 23:44:53 2011 +0200" }, "message": "x86, iommu: Mark DMAR IRQ as non-threaded\n\nMark this lowlevel IRQ handler as non-threaded. This prevents a boot\ncrash when \"threadirqs\" is on the kernel commandline. Also the\ninterrupt handler is handling hardware critical events which should\nnot be delayed into a thread.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: stable@kernel.org\nSigned-off-by: Ingo Molnar \u003cmingo@kernel.org\u003e\n" }, { "commit": "3b8f40481513a7b6123def5a02db4cff96ae2198", "tree": "b183c44200f644f5f84484aa7603924815b7adbb", "parents": [ "96f8e98bfeba3efa82eca85343bc058f6eced888" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Jul 19 17:02:07 2011 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Sep 13 11:12:20 2011 +0200" }, "message": "locking, x86, iommu: Annotate qi-\u003eq_lock as raw\n\nThe qi-\u003eq_lock lock can be taken in atomic context and therefore\ncannot be preempted on -rt - annotate it.\n\nIn mainline this change documents the low level nature of\nthe lock - otherwise there\u0027s no functional difference. Lockdep\nand Sparse checking will work as usual.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "96f8e98bfeba3efa82eca85343bc058f6eced888", "tree": "2d0938864f0621c5c0c017b50de03a81f1e6da6d", "parents": [ "1f5b3c3fd2d73d6b30e9ef6dcbf131a791d5cbbd" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Jul 19 16:28:19 2011 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Sep 13 11:12:18 2011 +0200" }, "message": "locking, x86, iommu: Annotate irq_2_ir_lock as raw\n\nThe irq_2_ir_lock can be taken in atomic context and therefore\ncannot be preempted on -rt - annotate it.\n\nIn mainline this change documents the low level nature of\nthe lock - otherwise there\u0027s no functional difference. Lockdep\nand Sparse checking will work as usual.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "1f5b3c3fd2d73d6b30e9ef6dcbf131a791d5cbbd", "tree": "1d24f2510bd8c57f5e026bf9a7ff93999ed39577", "parents": [ "289b4e7a48d91fbef7af819020d826ad9f49f568" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Jul 19 16:19:51 2011 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Sep 13 11:12:17 2011 +0200" }, "message": "locking, x86, iommu: Annotate iommu-\u003eregister_lock as raw\n\nThe iommu-\u003eregister_lock can be taken in atomic context and therefore\nmust not be preempted on -rt - annotate it.\n\nIn mainline this change documents the low level nature of\nthe lock - otherwise there\u0027s no functional difference. Lockdep\nand Sparse checking will work as usual.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "51acc0bcfc91987ed38195918e0b40ff05197585", "tree": "04bd7bbd5cfe925600db035e41d6050cee38b139", "parents": [ "c6a21d0b8d667f403bc6186ef215a504a26ab682", "5e1b612cb16f446996398bd23b6cd59ea0206938", "9e28547f887c3040747d8422e1feef79bea93bd8", "85410340e0d0224c78c7d40a3ac7e1b3e9670cf1" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 14:59:21 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 14:59:21 2011 +0200" }, "message": "Merge branches \u0027debug/dma-api\u0027, \u0027arm/omap\u0027, \u0027arm/msm\u0027 and \u0027core\u0027 into api-2\n" }, { "commit": "85410340e0d0224c78c7d40a3ac7e1b3e9670cf1", "tree": "7893219f4af968ae38ca443f44b478cafd0bb519", "parents": [ "4099818842abd98ef2b18a8ac7a2e2ad3bc3d7c2" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 14:36:17 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue Sep 06 14:36:17 2011 +0200" }, "message": "iommu/core: Use PAGE_SIZE instead of hard-coded value\n\nReplace the hard-coded 4kb by PAGE_SIZE to make iommu-api\nimplementations possible on architectures where\nPAGE_SIZE !\u003d 4kb.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "4099818842abd98ef2b18a8ac7a2e2ad3bc3d7c2", "tree": "a7486a45b806b8cf42d8996e712ab4e9d31d620e", "parents": [ "403f81d8ee532c976d50a5e1051f14ec78ae8db3" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Fri Sep 02 13:32:32 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Sep 05 15:15:59 2011 +0200" }, "message": "iommu/core: use the existing IS_ALIGNED macro\n\nReplace iommu\u0027s alignment checks with the existing IS_ALIGNED macro,\nto drop a few lines of code and utilize IS_ALIGNED\u0027s type safety.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "9e28547f887c3040747d8422e1feef79bea93bd8", "tree": "fd00d3147a680c645dd31b73282acbe4efe23766", "parents": [ "c6a389f123b9f68d605bb7e0f9b32ec1e3e14132" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Fri Sep 02 13:32:34 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Sep 05 15:15:14 2011 +0200" }, "message": "iommu/msm: -\u003eunmap() should return order of unmapped page\n\nUsers of the IOMMU API (kvm specifically) assume that iommu_unmap()\nreturns the order of the unmapped page (on success).\n\nFix msm_iommu_unmap() accordingly.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nCc: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\nCc: David Brown \u003cdavidb@codeaurora.org\u003e\nAcked-by: David Brown \u003cdavidb@codeaurora.org\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "5e1b612cb16f446996398bd23b6cd59ea0206938", "tree": "4278a81d31facf01da8d914bcd90e9573824fc32", "parents": [ "b4550d415a2e1668822ebf3a12b481548756b4e3" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Fri Sep 02 13:32:33 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Sep 05 15:14:37 2011 +0200" }, "message": "iommu/omap: -\u003eunmap() should return order of unmapped page\n\nUsers of the IOMMU API (kvm specifically) assume that iommu_unmap()\nreturns the order of the unmapped page.\n\nFix omap_iommu_unmap() to do so and adopt omap-iovmm accordingly.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "b4550d415a2e1668822ebf3a12b481548756b4e3", "tree": "fac76ac3e6c83bcc620b60ca6c51dd9a0fd292bb", "parents": [ "329d8d3b474923087f6988737ff12137b58e55cc" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Fri Sep 02 13:32:31 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Sep 05 15:14:37 2011 +0200" }, "message": "iommu/omap: cleanup: remove a redundant statement\n\nTiny cleanup that removes a redundant \u0027return\u0027 statement.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "329d8d3b474923087f6988737ff12137b58e55cc", "tree": "9db30cae05fb15b6dfede6976aae1dfbd9dfd80d", "parents": [ "024ae884a657f8ddeeff6b472c1fe538f277980e" ], "author": { "name": "Laurent Pinchart", "email": "laurent.pinchart@ideasonboard.com", "time": "Fri Sep 02 13:32:30 2011 -0400" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Mon Sep 05 15:14:37 2011 +0200" }, "message": "iommu/omap-iovmm: support non page-aligned buffers in iommu_vmap\n\nomap_iovmm requires page-aligned buffers, and that sometimes causes\nomap3isp failures (i.e. whenever the buffer passed from userspace is not\npage-aligned).\n\nRemove this limitation by rounding the address of the first page entry\ndown, and adding the offset back to the device address.\n\nSigned-off-by: Laurent Pinchart \u003claurent.pinchart@ideasonboard.com\u003e\nAcked-by: Hiroshi DOYU \u003cHiroshi.DOYU@nokia.com\u003e\n[ohad@wizery.com: rebased, but tested only with aligned buffers]\n[ohad@wizery.com: slightly edited the commit log]\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "e33acde91140f1809952d1c135c36feb66a51887", "tree": "86c6c7d7c76a311604843e919df141c30c5b1160", "parents": [ "f1ca1512e765337a7c09eb875eedef8ea4e07654" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Sep 02 14:19:50 2011 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Fri Sep 02 14:19:50 2011 +0200" }, "message": "iommu/amd: Don\u0027t take domain-\u003elock recursivly\n\nThe domain_flush_devices() function takes the domain-\u003elock.\nBut this function is only called from update_domain() which\nitself is already called unter the domain-\u003elock. This causes\na deadlock situation when the dma-address-space of a domain\ngrows larger than 1GB.\n\nCc: stable@kernel.org\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" } ], "next": "f1ca1512e765337a7c09eb875eedef8ea4e07654" }