)]}' { "log": [ { "commit": "e1288cd72f54e7fc16ae9ebb4d0647537ef848d4", "tree": "b4fd87b9307d8041fb680cb9b8fbf787ec968df7", "parents": [ "e78bf5e6cbe837daa6ab628a5f679548742994d3", "94ae85220a07d357d4937086c490854f63344de4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 17 10:54:41 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 17 10:54:41 2011 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (63 commits)\n ARM: PL08x: cleanup comments\n Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c\n ARM: PL08x: fix a warning\n Fix dmaengine_submit() return type\n dmaengine: at_hdmac: fix race while monitoring channel status\n dmaengine: at_hdmac: flags located in first descriptor\n dmaengine: at_hdmac: use subsys_initcall instead of module_init\n dmaengine: at_hdmac: no need set ACK in new descriptor\n dmaengine: at_hdmac: trivial add precision to unmapping comment\n dmaengine: at_hdmac: use dma_address to program DMA hardware\n pch_dma: support new device ML7213 IOH\n ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels\n ARM: PL08x: allow dma_set_runtime_config() to return errors\n ARM: PL08x: fix locking between prepare function and submit function\n ARM: PL08x: introduce \u0027phychan_hold\u0027 to hold on to physical channels\n ARM: PL08x: put txd\u0027s on the pending list in pl08x_tx_submit()\n ARM: PL08x: rename \u0027desc_list\u0027 as \u0027pend_list\u0027\n ARM: PL08x: implement unmapping of memcpy buffers\n ARM: PL08x: store prep_* flags in async_tx structure\n ARM: PL08x: shrink srcbus/dstbus in txd structure\n ...\n" }, { "commit": "94ae85220a07d357d4937086c490854f63344de4", "tree": "8dda364dc7cbae73a30bbe5ef47ac8d674d998c6", "parents": [ "0261f7416362f6affc2d4fe7fea9320a6bdaaee6" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Sun Jan 16 20:18:05 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 16 16:55:43 2011 -0800" }, "message": "ARM: PL08x: cleanup comments\n\nCleanup the formatting of comments, remove some which don\u0027t make sense\nanymore.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n[fix conflict with 96a608a4]\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0261f7416362f6affc2d4fe7fea9320a6bdaaee6", "tree": "93ea0cddd66bf96d6baa461166276dd8052fad7e", "parents": [ "96a608a4bfd8468c21881b3f92024923886eb015" ], "author": { "name": "Wei Yongquan", "email": "weiyqlq@gmail.com", "time": "Wed Dec 29 20:30:55 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 17:58:12 2011 -0800" }, "message": "Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c\n\nCommit f5e70d0fe3ea990cfb3fc8d7f76a719adcb1e0b5 renamed MD_RAID6_PQ to RAID6_PQ,\nbut iop-adma.c didn\u0027t update synchronously.\n\nSigned-off-by: Wei Yongquan \u003cweiyqlq@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "dda36f9821321edf65d69da5c0807df7e73d26fc", "tree": "2a629da4c1650c11bb0b1783317fbda0a1799ec6", "parents": [ "568f7f0c2e597671d3e646e0b85c95c4a5756fef" ], "author": { "name": "Nicolas Ferre", "email": "nicolas.ferre@atmel.com", "time": "Wed Jan 12 15:39:10 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:54:44 2011 -0800" }, "message": "dmaengine: at_hdmac: fix race while monitoring channel status\n\nWe were reading channel status then taking a lock. This lead to a race because\nthis lock may delay us and then make this channel not idle anymore.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "568f7f0c2e597671d3e646e0b85c95c4a5756fef", "tree": "919c1003e73ee4e815dff0276a1dc73a0780516f", "parents": [ "93d0bec2be4b0f036a27da207ecab97fc3d3bbbe" ], "author": { "name": "Nicolas Ferre", "email": "nicolas.ferre@atmel.com", "time": "Wed Jan 12 15:39:09 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:54:44 2011 -0800" }, "message": "dmaengine: at_hdmac: flags located in first descriptor\n\nPlace flags on first descriptor of chain instead of last.\nThis is the one used by atc_chain_complete() function while unmapping.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "93d0bec2be4b0f036a27da207ecab97fc3d3bbbe", "tree": "303d0b8e3c7bc7fdfc526c8b9c41316e8561d2fc", "parents": [ "58344f25cf5f3453bfcf4b845ea9ec71153e45c3" ], "author": { "name": "Eric Xu", "email": "hong.xu@atmel.com", "time": "Wed Jan 12 15:39:08 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:54:43 2011 -0800" }, "message": "dmaengine: at_hdmac: use subsys_initcall instead of module_init\n\nUse subsys_initcall instead of module_init in order to keep DMA engine rolling\nbefore other peripheral drivers.\n\nSigned-off-by: Eric Xu \u003chong.xu@atmel.com\u003e\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "58344f25cf5f3453bfcf4b845ea9ec71153e45c3", "tree": "7c2f6dd1a59f48c797635de84297c6e6c5e7dc5c", "parents": [ "ebcf9b80f9657f44fcb60ee17abe14eadebf3386" ], "author": { "name": "Nicolas Ferre", "email": "nicolas.ferre@atmel.com", "time": "Wed Jan 12 15:39:07 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:54:43 2011 -0800" }, "message": "dmaengine: at_hdmac: no need set ACK in new descriptor\n\nFollowing descriptor flow in at_hdmac driver, descriptor comming from\natc_desc_get() as already DMA_CTRL_ACK flag set. No need to set it again.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ebcf9b80f9657f44fcb60ee17abe14eadebf3386", "tree": "8147fa2c862cc87a953dd6e1cc7c41ae4fd3144c", "parents": [ "0f70e8cea3ac6a765289811c590a16934bf47711" ], "author": { "name": "Nicolas Ferre", "email": "nicolas.ferre@atmel.com", "time": "Wed Jan 12 15:39:06 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:54:43 2011 -0800" }, "message": "dmaengine: at_hdmac: trivial add precision to unmapping comment\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0f70e8cea3ac6a765289811c590a16934bf47711", "tree": "8e7800effeaf4a37080744f7694f9f1c5677179e", "parents": [ "2cdf2455a660ea860272ef3f833f0e5c4cc80205" ], "author": { "name": "Nicolas Ferre", "email": "nicolas.ferre@atmel.com", "time": "Wed Dec 15 18:50:16 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:25:58 2011 -0800" }, "message": "dmaengine: at_hdmac: use dma_address to program DMA hardware\n\nIn atc_prep_slave_sg() function we use dma_address field of scatterlist with\nsg_dma_address() macro instead of sg_phys(). DMA address is already computed\nby dma_map_sg() or another mapping function in calling driver.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "2cdf2455a660ea860272ef3f833f0e5c4cc80205", "tree": "716d5ba5695ea3a13c5bebe1d5afab5d115dee18", "parents": [ "bc0fa81473c077bf4403e3b7b3397326204b65cd" ], "author": { "name": "Tomoya MORINAGA", "email": "tomoya-linux@dsn.okisemi.com", "time": "Wed Jan 05 17:43:52 2011 +0900" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 14 16:24:53 2011 -0800" }, "message": "pch_dma: support new device ML7213 IOH\n\nSupport new device OKI SEMICONDUCTOR\u0027s ML7213 IOH(Input/Output Hub) which is for\nIVI(In-Vehicle Infotainment) use.\nThe ML7213 is companion chip for Intel Atom E6xx series.\nThe ML7213 is completely compatible for Intel EG20T PCH.\n\nSigned-off-by: Tomoya MORINAGA \u003ctomoya-linux@dsn.okisemi.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "008d23e4852d78bb2618f2035f8b2110b6a6b968", "tree": "81c88f744f6f3fc84132527c1ddc0b4da410c5e2", "parents": [ "8f685fbda43deccd130d192c9fcef1444649eaca", "bfc672dcf323877228682aff79dff8ecd9f30ff8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 13 10:05:56 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 13 10:05:56 2011 -0800" }, "message": "Merge branch \u0027for-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits)\n Documentation/trace/events.txt: Remove obsolete sched_signal_send.\n writeback: fix global_dirty_limits comment runtime -\u003e real-time\n ppc: fix comment typo singal -\u003e signal\n drivers: fix comment typo diable -\u003e disable.\n m68k: fix comment typo diable -\u003e disable.\n wireless: comment typo fix diable -\u003e disable.\n media: comment typo fix diable -\u003e disable.\n remove doc for obsolete dynamic-printk kernel-parameter\n remove extraneous \u0027is\u0027 from Documentation/iostats.txt\n Fix spelling milisec -\u003e ms in snd_ps3 module parameter description\n Fix spelling mistakes in comments\n Revert conflicting V4L changes\n i7core_edac: fix typos in comments\n mm/rmap.c: fix comment\n sound, ca0106: Fix assignment to \u0027channel\u0027.\n hrtimer: fix a typo in comment\n init/Kconfig: fix typo\n anon_inodes: fix wrong function name in comment\n fix comment typos concerning \"consistent\"\n poll: fix a typo in comment\n ...\n\nFix up trivial conflicts in:\n - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c)\n - fs/ext4/ext4.h\n\nAlso fix missed \u0027diabled\u0027 typo in drivers/net/bnx2x/bnx2x.h while at it.\n" }, { "commit": "5a62f995446be44811fefa48f91f9efb7ea172d7", "tree": "e297371f0d513dc6278bb67d582d2216eb7d74ed", "parents": [ "f1d6d6cd9029daa7e7d4a0b14347b5392320f22a", "5d7d8072edc11080a7cf6cc37c9f4e61ca1e93c9" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 11 16:31:41 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 11 16:31:41 2011 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (72 commits)\n powerpc/pseries: Fix build of topology stuff without CONFIG_NUMA\n powerpc/pseries: Fix VPHN build errors on non-SMP systems\n powerpc/83xx: add mpc8308_p1m DMA controller device-tree node\n powerpc/83xx: add DMA controller to mpc8308 device-tree node\n powerpc/512x: try to free dma descriptors in case of allocation failure\n powerpc/512x: add MPC8308 dma support\n powerpc/512x: fix the hanged dma transfer issue\n powerpc/512x: scatter/gather dma fix\n powerpc/powermac: Make auto-loading of therm_pm72 possible\n of/address: Use propper endianess in get_flags\n powerpc/pci: Use printf extension %pR for struct resource\n powerpc: Remove unnecessary casts of void ptr\n powerpc: Disable VPHN polling during a suspend operation\n powerpc/pseries: Poll VPA for topology changes and update NUMA maps\n powerpc: iommu: Add device name to iommu error printks\n powerpc: Record vma-\u003ephys_addr in ioremap()\n powerpc: Update compat_arch_ptrace\n powerpc: Fix PPC_PTRACE_SETHWDEBUG on PPC_BOOK3S\n powerpc/time: printk time stamp init not correct\n powerpc: Minor cleanups for machdep.h\n ...\n" }, { "commit": "bc0fa81473c077bf4403e3b7b3397326204b65cd", "tree": "43e8c8792f787d4b7d23aecd4cc0efccd5ffb248", "parents": [ "0a4bbddde29c038f2c51a7abb03d6d07e679d8af", "b7f758659265c173380b792862aaad1c23c0e004", "d49278e3351b34870cbffffc5067348a318e7b06" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 07 12:47:05 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jan 07 12:47:05 2011 -0800" }, "message": "Merge branches \u0027amba\u0027 and \u0027dma40\u0027 into dmaengine\n" }, { "commit": "661382fe190475c17d0b3a6b5f0350b4f82f5939", "tree": "3609fdecc5b29a6875cbe92cca747096819db7b4", "parents": [ "3c0cb7c31c206aaedb967e44b98442bbeb17a6c4" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Jan 06 17:04:50 2011 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Fri Jan 07 11:03:26 2011 +0900" }, "message": "dma: shdma: don\u0027t register the global die notifier multiple times\n\nA recent patch has added a die notifier to the shdma driver, however,\nit registers a static die-notifier object in the probe routine, i.e.,\nfor each device instance. This is wrong and leads to a system lockup.\nThis patch moves the die notifier registration to module init and\nexit routines respectively.\n\nReported-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "3c0cb7c31c206aaedb967e44b98442bbeb17a6c4", "tree": "3ecba45d7ffae4fba4a5aafaef4af5b0b1105bde", "parents": [ "f70f5b9dc74ca7d0a64c4ead3fb28da09dc1b234", "404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 06 16:50:35 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 06 16:50:35 2011 -0800" }, "message": "Merge branch \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (416 commits)\n ARM: DMA: add support for DMA debugging\n ARM: PL011: add DMA burst threshold support for ST variants\n ARM: PL011: Add support for transmit DMA\n ARM: PL011: Ensure IRQs are disabled in UART interrupt handler\n ARM: PL011: Separate hardware FIFO size from TTY FIFO size\n ARM: PL011: Allow better handling of vendor data\n ARM: PL011: Ensure error flags are clear at startup\n ARM: PL011: include revision number in boot-time port printk\n ARM: vexpress: add sched_clock() for Versatile Express\n ARM i.MX53: Make MX53 EVK bootable\n ARM i.MX53: Some bug fix about MX53 MSL code\n ARM: 6607/1: sa1100: Update platform device registration\n ARM: 6606/1: sa1100: Fix platform device registration\n ARM i.MX51: rename IPU irqs\n ARM i.MX51: Add ipu clock support\n ARM: imx/mx27_3ds: Add PMIC support\n ARM: DMA: Replace page_to_dma()/dma_to_page() with pfn_to_dma()/dma_to_pfn()\n mx51: fix usb clock support\n MX51: Add support for usb host 2\n arch/arm/plat-mxc/ehci.c: fix errors/typos\n ...\n" }, { "commit": "404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34", "tree": "99119edc53fdca73ed7586829b8ee736e09440b3", "parents": [ "28cdac6690cb113856293bf79b40de33dbd8f974", "1051b9f0f9eab8091fe3bf98320741adf36b4cfa" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:33:32 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:33:32 2011 +0000" }, "message": "Merge branch \u0027devel-stable\u0027 into devel\n\nConflicts:\n\tarch/arm/mach-pxa/clock.c\n\tarch/arm/mach-pxa/clock.h\n" }, { "commit": "f862f904d357dc0d3612347a8dbabe6fae037fbb", "tree": "d7f5c2d5f85fd9e1cfc36beae904dc4f9cca04a3", "parents": [ "6f09e41d704fe0bc9157a5357480751d39361d01", "3c0eee3fe6a3a1c745379547c7e7c904aa64f6d5" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Jan 06 18:24:07 2011 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Jan 06 18:24:07 2011 +0900" }, "message": "Merge branch \u0027master\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh-latest\n\nConflicts:\n\tarch/sh/kernel/cpu/sh2a/clock-sh7201.c\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "1051b9f0f9eab8091fe3bf98320741adf36b4cfa", "tree": "68ea1c8f9c446d6ebd96caf3ba4ec73f1fa5ace6", "parents": [ "cde9efef401563943d5a58eb9b7274bfdc08ca9b", "a58154d1c3535f451a409abbd0bda6770b2d9380" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 05 10:23:38 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 05 10:23:38 2011 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable\n" }, { "commit": "b7f758659265c173380b792862aaad1c23c0e004", "tree": "b67550bae43e48026c00284a9a64257ef11aae43", "parents": [ "f0fd944625b6e406dc273b8dffa16e0728c973e6" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:46:17 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels\n\nPrevent dma_set_runtime_config() being used to alter the configuration\nsupplied by the platform for memcpy channel configuration. No one\nshould be trying to change this configuration.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "f0fd944625b6e406dc273b8dffa16e0728c973e6", "tree": "d30767326785455dba0a99de2b6dd1a859be3c26", "parents": [ "c370e594efe2993620d24d41a78f325102e99d1c" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:45:57 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: allow dma_set_runtime_config() to return errors\n\nThere are cases in dma_set_runtime_config() where we fail to perform\nthe requested action - and we just issue a KERN_ERR message in that\ncase. We have the facility to return an error to the caller, so that\nis what we should do.\n\nWhen we encounter an error due to invalid parameters, we should not\nmodify driver state.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c370e594efe2993620d24d41a78f325102e99d1c", "tree": "dfbb5c904bf6ca85c9aba1eec17070fe05c12ca4", "parents": [ "8087aacda040bdbf84940712d132ce80c30b9d5d" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:45:37 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: fix locking between prepare function and submit function\n\nThe PL08x driver holds on to the channel lock with interrupts disabled\nbetween the prepare and the subsequent submit API functions. This\nmeans that the locking state when the prepare function returns is\ndependent on whether it suceeeds or not.\n\nIt did this to ensure that the physical channel wasn\u0027t released, and\nas it used to add the descriptor onto the pending list at prepare time\nrather than submit time.\n\nNow that we have reorganized the code to remove those reasons, we can\nnow safely release the spinlock at the end of preparation and reacquire\nit in our submit function.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8087aacda040bdbf84940712d132ce80c30b9d5d", "tree": "3a59272bc4555eae854a012940a36f80a8f4c1a5", "parents": [ "501e67e82dee68d0a594ec0549f3d6a2943c91f5" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:45:17 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: introduce \u0027phychan_hold\u0027 to hold on to physical channels\n\nIntroduce \u0027phychan_hold\u0027 to hold on to physical DMA channels while we\u0027re\npreparing a new descriptor for it. This will be incremented when we\nallocate a physical channel and set the MUX registers during the\npreparation of the TXD, and will only be decremented when the TXD is\nsubmitted.\n\nThis prevents the physical channel being given up before the new TXD\nis placed on the queue.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "501e67e82dee68d0a594ec0549f3d6a2943c91f5", "tree": "c211a6a59ab79a8c83d432e2053f64586d5b159a", "parents": [ "15c17232fbd1f7687c740c3c26f9e7f337bd9e36" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:44:57 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: put txd\u0027s on the pending list in pl08x_tx_submit()\n\nDon\u0027t place TXDs on the pending list when they\u0027re prepared - place\nthem on the list when they\u0027re ready to be submitted. Also, only\nplace memcpy requests in the wait state when they\u0027re submitted and\ndon\u0027t have a physical channel associated.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "15c17232fbd1f7687c740c3c26f9e7f337bd9e36", "tree": "c3380cdde212259a7b3c790404b870aa2b9aa01d", "parents": [ "3d992e1a6f8465db3921ef75bfc490fbd2f40cd3" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:44:36 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: rename \u0027desc_list\u0027 as \u0027pend_list\u0027\n\nThis \u0027desc_list\u0027 is actually a list of pending descriptors, so name\nit after its function (pending list) rather than what it contains\n(descriptors).\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3d992e1a6f8465db3921ef75bfc490fbd2f40cd3", "tree": "4d7935045ef1654777754360f319c093f5f041e8", "parents": [ "c04287948ec8308fceedda980373bc7d53620255" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:44:16 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:14 2011 -0800" }, "message": "ARM: PL08x: implement unmapping of memcpy buffers\n\nThe DMA engine API requires DMA engine implementations to unmap buffers\npassed into the non-slave DMA methods unless the relevant completion\nflag is set. We aren\u0027t doing this, so implement this facility.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c04287948ec8308fceedda980373bc7d53620255", "tree": "ee5ab1d84715b7c9335036d7471f5d13d237eb84", "parents": [ "d7244e9a27a3da27d62aabf560ee828d7991493e" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:43:56 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: store prep_* flags in async_tx structure\n\nLike other DMA engine drivers do, store the passed flags into the\nasync_tx structure, so they can be checked when the operation\ncompletes.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d7244e9a27a3da27d62aabf560ee828d7991493e", "tree": "a745ef1a7b87208738f379532d10a8932751abb4", "parents": [ "542361f8e385355c68e263eba49d4306739b9220" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:43:35 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: shrink srcbus/dstbus in txd structure\n\nWe only need to store the dma address.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "542361f8e385355c68e263eba49d4306739b9220", "tree": "64d465d026c348f4b5d945cb53aaaf12fb8338a3", "parents": [ "5f638b4f313e345bf02700910e581bccf71212f5" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:43:15 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: don\u0027t manipulate txd-\u003esrcbus or txd-\u003edstbus during LLI fill\n\nDon\u0027t alter any txd-\u003esrcbus or txd-\u003edstbus values while building the\nLLI list. This allows us to see the original dma_addr_t values passed\nin via the prep_memcpy() method.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5f638b4f313e345bf02700910e581bccf71212f5", "tree": "423d49f0935c3f2977e3aae1cb7b4d402d0c257a", "parents": [ "d6cf7b597f7158616106068930d1c6203d9359eb" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:42:55 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: fix fill_bytes calculation\n\nThe number of bytes we want to fill into any LLI is the minimum of:\n- number of bytes remaining in the transfer\n- number of bytes we can transfer in a single LLI\n- number of bytes we can transfer without overflowing the source boundary\n- number of bytes we can transfer without overflowing the destination boundary\n\nThe minimum of the first two is already calculated (target_len). We\nlimit the boundary calculations to this number of bytes, which will\nthen give us the number of bytes we can place into this LLI.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d6cf7b597f7158616106068930d1c6203d9359eb", "tree": "a1d640957f21926f2f65e96804ecd18f72047413", "parents": [ "b61be8d728abad7fd98e62e98f22325f8f254b51" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:42:34 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: use min() to calculate target_len\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b61be8d728abad7fd98e62e98f22325f8f254b51", "tree": "a4c5d5aa7e942122fc24d45d6ab977de5032be99", "parents": [ "0059005f2cbf4847551b9ad9915ffffe23aef0b9" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:42:14 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: ensure pl08x_pre_boundary() works for any value of addr\n\npl08x_pre_boundary() was unsafe with addresses towards the top of\nmemory space:\n\n\tboundary \u003d ((addr \u003e\u003e PL08X_BOUNDARY_SHIFT) + 1)\n\t\t\t\u003c\u003c PL08X_BOUNDARY_SHIFT;\n\nThis can overflow a 32-bit number, producing zero. When it does:\n\n\tif (boundary \u003c addr + len)\n\t\treturn boundary - addr;\n\telse\n\t\treturn len;\n\nresults in (boundary - addr) returning either a large positive value.\nAlso if addr + len overflows, this calculation also fails.\n\nWe can fix this trivially as the only thing we\u0027re actually interested\nin is the value of the least significant PL08X_BOUNDARY_SHIFT bits:\n\n\tboundary_len \u003d PL08X_BOUNDARY_SIZE -\n\t\t(addr \u0026 (PL08X_BOUNDARY_SIZE - 1));\n\ngives us the number of bytes before \u0027addr\u0027 becomes a multiple of\nPL08X_BOUNDARY_SIZE. We can then just take the min() of the two\ncalculated lengths.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0059005f2cbf4847551b9ad9915ffffe23aef0b9", "tree": "ff40c68f8c836d217b81d5c385e4ff2275a335be", "parents": [ "858c21c0f380fb9c78f47f3e372f9baadc54dffe" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:41:54 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: make pl08x_fill_lli_for_desc() return void\n\nWe don\u0027t need pl08x_fill_lli_for_desc() to return num_llis + 1 as\nwe know that\u0027s what it always does. We can just pass in num_llis\nand use post-increment in the caller.\n\nThis makes the code slightly easier to read.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "858c21c0f380fb9c78f47f3e372f9baadc54dffe", "tree": "236ca2bf8b319a38ad7d0988491a64add47d5b55", "parents": [ "30749cb4a40f02a199640011e5ab5c5f60b8482e" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:41:34 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: move callback outside spinlock\u0027d region\n\nCalling the callback handler with spinlocks in the tasklet held leads\nto deadlock when dmaengine functions are called:\n\nBUG: spinlock lockup on CPU#0, sh/417, c1870a08\nBacktrace:\n...\n[\u003cc017b408\u003e] (do_raw_spin_lock+0x0/0x154) from [\u003cc02c4b98\u003e] (_raw_spin_lock_irqsave+0x54/0x60)\n[\u003cc02c4b44\u003e] (_raw_spin_lock_irqsave+0x0/0x60) from [\u003cc01f5828\u003e] (pl08x_prep_channel_resources+0x718/0x8b4)\n[\u003cc01f5110\u003e] (pl08x_prep_channel_resources+0x0/0x8b4) from [\u003cc01f5bb4\u003e] (pl08x_prep_slave_sg+0x120/0x19c)\n[\u003cc01f5a94\u003e] (pl08x_prep_slave_sg+0x0/0x19c) from [\u003cc01be7a0\u003e] (pl011_dma_tx_refill+0x164/0x224)\n[\u003cc01be63c\u003e] (pl011_dma_tx_refill+0x0/0x224) from [\u003cc01bf1c8\u003e] (pl011_dma_tx_callback+0x7c/0xc4)\n[\u003cc01bf14c\u003e] (pl011_dma_tx_callback+0x0/0xc4) from [\u003cc01f4d34\u003e] (pl08x_tasklet+0x60/0x368)\n[\u003cc01f4cd4\u003e] (pl08x_tasklet+0x0/0x368) from [\u003cc004d978\u003e] (tasklet_action+0xa0/0x100)\n\nDan quoted the documentation:\n\u003e 2/ Completion callback routines cannot submit new operations.  This\n\u003e    results in recursion in the synchronous case and spin_locks being\n\u003e    acquired twice in the asynchronous case.\n\nbut then followed up to say:\n\u003e I should clarify, this is the async_memcpy() api requirement which is\n\u003e not used outside of md/raid5. DMA drivers can and do allow new\n\u003e submissions from callbacks, and the ones that do so properly move the\n\u003e callback outside of the driver lock.\n\nSo let\u0027s fix it by moving the callback out of the spinlocked region.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "30749cb4a40f02a199640011e5ab5c5f60b8482e", "tree": "2b079f8f3fb2f888d7afa36423b41c63a1583c3b", "parents": [ "c7da9a56d608145cc763bcfc9329b92c4244d8d9" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:41:13 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: allow AHB master port selection to be configured\n\nPlatforms need to be able to control which AHB master interface is used,\nas each AHB master interface may be asymetric. Allow the interfaces\nused for fetching LLIs, memory, and each peripheral to be configured\nindividually.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c7da9a56d608145cc763bcfc9329b92c4244d8d9", "tree": "2e85075b24b15bc3e252f0295099ad8649c77ade", "parents": [ "1cae78f12028eebdc9107eaf168add46e66fb3f8" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:40:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: move AHB master port selection into prep_* functions\n\nAs we initialize the default cctl value in the prep_* functions along\nwith the increment settings, we don\u0027t need to repeat the selection of\nthe AHB ports each time we create a LLI entry. Do this in the prep_*\nfunctions once per transfer.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1cae78f12028eebdc9107eaf168add46e66fb3f8", "tree": "9d014ecb90ce04452094cab5d2726321ee92f123", "parents": [ "70b5ed6b6d72cd8b1a3d4b7b878a0dd132bec7ba" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:40:33 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:13 2011 -0800" }, "message": "ARM: PL08x: move cctl increment and protection setup to prep_slave_sg\n\nWe don\u0027t need to initialize the cctl increment and protection values\nin the runtime_config method - we have all the inforamtion to setup\nthese values in prep_slave_sg(). Move their initialization there.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "70b5ed6b6d72cd8b1a3d4b7b878a0dd132bec7ba", "tree": "07f37758bcc4f7f44ba9b5f0f04190fd7e38a64a", "parents": [ "09b3c323332206aaadfb7aa13efffa82e7719b35" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:40:13 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: move default cctl into txd structure\n\nRather than modifying platform data while preparing a transfer, copy\nthe cctl value into the txd structure and modify the value there.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "09b3c323332206aaadfb7aa13efffa82e7719b35", "tree": "a64ddedf5178eef4bab335f90adcada034c77138", "parents": [ "4983a04fd2562986360b646b378f267308bc22c0" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:39:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: assign ccfg DMA request signal in prep_phy_channel()\n\nThere is no need to wait until we start processing a tx descriptor\nbefore setting up the DMA request selection in the ccfg register.\nWe know which channel and request will be used in prep_phy_channel(),\nso setup the ccfg request selection at txd creation time in\nprep_phy_channel().\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4983a04fd2562986360b646b378f267308bc22c0", "tree": "365b9fcfe69547f27dc1593565a07ad0465bf37c", "parents": [ "19524d77ec34faf58d313ba34fb755ef6e159216" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:39:33 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: move ccfg into txd structure\n\nThe ccfg register is used to configure the channel parameters - the type\nand direction of transfer, the flow control signal and IRQ mask enables.\nThe type and direction of transfer is known in the relevent prep_*\nfunction where a txd is created. The IRQ mask enables are always set,\nand the flow control signals are always set when we start processing a\ntxd according to phychan-\u003esignal.\n\nIf we store the ccfg value in the txd structure, we can avoid modifying\nplatform data - and even having it in platform data at all.\n\nSo, remove it from platform data too.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "19524d77ec34faf58d313ba34fb755ef6e159216", "tree": "63b24d5a82de3ee5fd8e07a311eb8d573cd21f76", "parents": [ "c885bee4f10323a1ff3f19e1aa2aa6f4e7f89dd8" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:39:13 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: avoid duplicating registers in txd and phychan structures\n\nAs we now have all the code accessing the phychan {csrc,cdst,clli,cctl,\nccfg} members in one function, there\u0027s no point storing the data into\nthe struct. Get rid of the struct members. Re-order the register dump\nin the dev_dbg() to reflect the order we write the registers to the DMA\ndevice.\n\nThe txd {csrc,cdst,clli,cctl} values are duplicates of the lli[0]\nvalues, so there\u0027s no point duplicating these either. Program the DMAC\nregisters directly from the lli[0] values.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c885bee4f10323a1ff3f19e1aa2aa6f4e7f89dd8", "tree": "b087498b048c7f69367123579e20ee872b7fb680", "parents": [ "db9f136a60c8727c8e1c9c4f2494821caebf5a7b" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:38:52 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: combine functions to start DMA into one function\n\nThere is no need for pl08x_config_phychan_for_txd(), pl08x_set_cregs()\nand pl08x_enable_phy_chan() to be separate - they are always called in\nsequence. Combine them into one function.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "db9f136a60c8727c8e1c9c4f2494821caebf5a7b", "tree": "d5311b870e634541e787a680d6d77bf9865f9645", "parents": [ "bfddfb45056fa95a778f0baf463ac0f9fc926d5c" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:38:32 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: clean up LLI lookup\n\nAs the LLI list is an array, we can use maths to locate which LLI\nindex we\u0027re currently at, and then sum up the remaining LLI entries\nuntil we reach the end of the list.\n\nThis makes the code much easier to read, and much less susceptible\nto falling off the end of the array.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "bfddfb45056fa95a778f0baf463ac0f9fc926d5c", "tree": "1839abe79a06f4a7653847b6cc951cc7a08cf01f", "parents": [ "e25761d72c80751c8741f5f93abab14232eef347" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:38:12 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: rename lli.next to lli.lli\n\nThe LLI pointer in the documentation is placed into the LLI register,\nso name it LLI rather than \u0027next\u0027.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e25761d72c80751c8741f5f93abab14232eef347", "tree": "efc7c9136f7a779800fe2b736eaa2d280f7ea1ff", "parents": [ "cace658572ba5d1075f3891e823130a66f3e330f" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:37:52 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: use \u0027u32\u0027 for LLI structure members, not dma_addr_t\n\nUse \u0027u32\u0027 for the LLI structure members, which are defined by hardware\nto be 32-bit. dma_addr_t is much more vague about its actual size.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cace658572ba5d1075f3891e823130a66f3e330f", "tree": "b615e42e2eac3ce2adb4d4cace8033df1ec748b9", "parents": [ "56b618820c92a5efa2145fbbac373fffbb024a94" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:37:31 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: use \u0027size_t\u0027 for lengths\n\nUse size_t for variables denoting lengths throughout, and use the \u0027z\u0027\nqualifier for printing the value. For safety, add a BUG_ON() in\npl08x_fill_lli_for_desc() to catch the remainder potentially becoming\nnegative.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "56b618820c92a5efa2145fbbac373fffbb024a94", "tree": "c0e046e1be9007d35d436f4577d3272bec6c45f6", "parents": [ "4c0df6a3ce8eb947647c7ed2640d0172936d8ef3" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:37:10 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:12 2011 -0800" }, "message": "ARM: PL08x: don\u0027t try to use llis_bus as a pointer\n\nllis_bus is the DMA address of the LLI array. Casting it to be a\npointer just to be able to use pointer arithmetic on it is not nice.\nWe can trivially deal with the places where we do arithmetic on it,\nand it\u0027s actually cleaner this way.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4c0df6a3ce8eb947647c7ed2640d0172936d8ef3", "tree": "4763f62c3f64754864cc8afd70a8792b9ef24008", "parents": [ "19386b3234fdbe4d33492574d83e63a8dace18d3" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:36:50 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: don\u0027t assume that the LLI pointer has the bus bit clear\n\nWe only want use the address of the LLI pointer when locating the\ncorresponding structure in memory, so clear the master bus selection\nbit.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "19386b3234fdbe4d33492574d83e63a8dace18d3", "tree": "0d362485f1dd6fc360f3b707ab2a97ff8b3f2d17", "parents": [ "8c8cc2b1040f51a2f89724edbf976774128339eb" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:36:29 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: ensure loops use cpu_relax()\n\nTight loops should use cpu_relax() to allow CPUs to reduce power\nconsumption while waiting for events.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8c8cc2b1040f51a2f89724edbf976774128339eb", "tree": "367430b053afd6dd07e994da78f840f5221b9dd3", "parents": [ "ac3cd20df9d74bb205bb34f69407477a884ff8a3" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:36:09 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: consolidate physical channel release code\n\nConsolidate duplicated channel release code into release_phy_channel()\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ac3cd20df9d74bb205bb34f69407477a884ff8a3", "tree": "6a740291ec8c7b05cd7647c8dc0d90c5c0d0d68e", "parents": [ "7cb72ad959b16ac594118977b7954a7d2ec7a052" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:35:49 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: consolidate common txd initialization\n\nConsolidate code which allocates and initializes txds.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7cb72ad959b16ac594118977b7954a7d2ec7a052", "tree": "eb6ea7ae69b7a8c2caef7d10eaec1a4dcf1110b4", "parents": [ "f96ca9ec27159c1c8718aa8d0ed03051cd12e884" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:35:28 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: avoid \u0027void *\u0027 struct fields when we can type them properly\n\nAvoid using \u0027void *\u0027 struct fields when the structs are not defined\nin linux/amba/pl08x.h - instead, forward declare the struct names, and\nuse these instead. This ensures we have proper typechecking.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "f96ca9ec27159c1c8718aa8d0ed03051cd12e884", "tree": "38ef312ac8654ab5cf2c19ed258836e1153a6bab", "parents": [ "b58b6b5bedf4d5da7a0cb2dce3b42d010c3aef03" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:35:08 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: constify vendor data pointers\n\nWe should never modify the vendor data structure so make it const.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b58b6b5bedf4d5da7a0cb2dce3b42d010c3aef03", "tree": "f66787ab02b05ca68aad200b193abef636334c07", "parents": [ "ad0a3ad33c96cbba98ba62116771fb836c551e60" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:34:48 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: remove circular buffer support\n\nThe driver already won\u0027t initialize a channel with a circular buffer;\nthe check in pl08x_prep_channel_resources() sees to that. Remove\ncircular buffer support for the time being.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ad0a3ad33c96cbba98ba62116771fb836c551e60", "tree": "7d91cc40d91bf63f6bfd0023c114fcc8d549700e", "parents": [ "730404ac1c47403af67420705980c99e90bf182f" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:34:27 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: remove unnecessary NULL and BUG checks\n\nThe tasklet always is initialized with a non-NULL data argument. It\nis not possible for it to be called with a NULL data argument (unless\nsomething is very wrong in the tasklet code - in which case lots of\nstuff will break). Therefore, as plchan can never be NULL, remove\nthis unnecessary BUG check.\n\nIn pl08x_tasklet(), we\u0027ve already dereferenced plchan-\u003eat, so it can\u0027t\nbe NULL here. Remove this unnecessary BUG check.\n\npl08x_fill_llis_for_desc() and pl08x_free_txd() are always called with\na non-NULL txd argument - either as a consequence of the code paths or\nas a result of other checks already in place. We don\u0027t need to repeat\nthe non-NULL check in these functions.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "730404ac1c47403af67420705980c99e90bf182f", "tree": "2ab740731c2f6d09f3c7ace9e8a6d706d364414f", "parents": [ "9c132992689d7d27a4e17545b6279db4e03c0943" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:34:07 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: remove unnecessary includes\n\nWe don\u0027t need to include linux/pci.h as we aren\u0027t a PCI driver. We\naren\u0027t doing any processor specific functions, so asm/processor.h is\nnot required. asm/cacheflush.h shouldn\u0027t be used, we have the DMA API\nfor this. DMA interfaces aren\u0027t required as we\u0027re only implementing\nthe dmaengine API and not a platform-private DMA API.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9c132992689d7d27a4e17545b6279db4e03c0943", "tree": "d325746290ec84b1b7e03b546c8f585048cbe28a", "parents": [ "b05cd8f4c04a29eebfa65c45fabc78a02f16a782" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:33:47 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: prefix hex numbers with 0x\n\nA driver which emits both decimal and hex numbers in its printk\ncreates confusion as to what is what. Prefix hex numbers with 0x.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b05cd8f4c04a29eebfa65c45fabc78a02f16a782", "tree": "3fd5cbcb3b4560c8b8380177f108de21df66dc79", "parents": [ "9dc2c200a0551754f91e1b322dcb3d782cd709b2" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:33:26 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:11 2011 -0800" }, "message": "ARM: PL08x: improve the announcement printk\n\nInclude the revision number of the PL08x primecell in the boot-time\nprintk to allow proper identification of the peripheral. Reformat\nthe announcement printk format reflect what we do for other primecell\ndrivers - generally \"PLXXX revX at 0xNNNNNNNN irq X\".\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9dc2c200a0551754f91e1b322dcb3d782cd709b2", "tree": "aab2fa7ea1ae3f191f5b6c7abdada93a3b232e02", "parents": [ "3e2a037c1de79af999a54581cbf1e8a5c933fd95" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:33:06 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: add comment explaining the flow control methods\n\nExplain the two flow control methods which the PL08x implements, along\nwith the problem which peripheral flow control presents. This helps\npeople understand why we are unable to use these DMA controllers with\n(eg) the MMCI.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3e2a037c1de79af999a54581cbf1e8a5c933fd95", "tree": "c4efba4ddeeaa99c8eae988feac9a2551d19957c", "parents": [ "98838f90d92f6f0abf6d6a99880c0ff3127633b8" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:32:46 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix sparse warnings\n\ndrivers/dma/amba-pl08x.c:1895:40: warning: Unknown escape \u0027%\u0027\ndrivers/dma/amba-pl08x.c:1903:40: warning: Unknown escape \u0027%\u0027\ndrivers/dma/amba-pl08x.c:513:6: warning: symbol \u0027pl08x_choose_master_bus\u0027 was not declared. Should it be static?\ndrivers/dma/amba-pl08x.c:604:5: warning: symbol \u0027pl08x_fill_llis_for_desc\u0027 was not declared. Should it be static?\ndrivers/dma/amba-pl08x.c:1442:32: warning: symbol \u0027pl08x_prep_slave_sg\u0027 was not declared. Should it be static?\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "98838f90d92f6f0abf6d6a99880c0ff3127633b8", "tree": "011581a93e3ab32c3feaf2e8d93e9fbd3d23be1e", "parents": [ "9c0bb43bbd02fba0b235f8993d1f175734fa8735" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:32:26 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix deadlock in terminate_all\n\nTrying to disable a tasklet while holding a spinlock which the tasklet\nwill take is a recipe for deadlock - tasklet_disable() will wait for the\ntasklet to finish running, which it will never do. In any case, there\nis not a corresponding tasklet_enable(), so once the tasklet is disabled,\nit will never run again until reboot.\n\nIt\u0027s safe to just remove the tasklet_disable() as we remove all current\nand pending descriptors before releasing this spinlock. This means that\nthe tasklet will find no remaining work if it subsequently runs.\n\nThe only remaining issue is that the callback for an already submitted\ntxd may be in progress, or even called after terminate_all() returns.\nThere\u0027s not much that can be done about that as waiting for the callback\nto complete before returning will also lead to deadlocks.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9c0bb43bbd02fba0b235f8993d1f175734fa8735", "tree": "b5b5673a0e44a0e5263f7c8a9ec800b53b1bfc12", "parents": [ "dafa73171be8dd31b485f5839e3376b1ca908e24" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:32:05 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix missed spin-unlock in pl08x_issue_pending()\n\npl08x_issue_pending() returns with the spinlock locked and interrupts\ndisabled if the channel is waiting for a physical DMA to become free.\nThis is wrong - especially as pl08x_issue_pending() is an API function\nas it leads to deadlocks. Fix it to always return with the spinlock\nunlocked.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "dafa73171be8dd31b485f5839e3376b1ca908e24", "tree": "70d6d14b7be6543cbfe777a523c75dc0a332c402", "parents": [ "bf072af461c166964fb110cfcafccd752fbb4c64" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:31:45 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix a leak when preparing TXDs\n\nIf we fail to allocate the LLI, the prep_* function will return NULL.\nHowever, the TXD we allocated will not be placed on any list, nor\nwill it be freed - we\u0027ll just drop all references to it. Make sure\nwe free it rather than leaking TXDs.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "bf072af461c166964fb110cfcafccd752fbb4c64", "tree": "a30b526ad74c2885ae9f8d9f10f412f6d7ff0f59", "parents": [ "91aa5fadb831e7b6ea473a526a6b49c6dc4819ce" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:31:24 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix locking in tasklet\n\nTasklets are run from an interruptible context. The slave DMA functions\ncan be called from within IRQ handlers. Taking the spinlock without\ndisabling interrupts allows an interrupt handler to run, which may try\nto take the spinlock again, resulting in deadlock. Fix this by using\nthe irqsave spinlocks.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "91aa5fadb831e7b6ea473a526a6b49c6dc4819ce", "tree": "4f96e2649b8725b6f58bace588e90c9f38c3dc80", "parents": [ "4440aacf3a171a0ab498feda58d100a320c5d9ff" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:31:04 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix atomic_t usage and tx_submit() return value range\n\nThe last_issued variable uses an atomic type, which is only\nincremented inside a protected region, and then read. Everywhere else\nonly reads the value, so it isn\u0027t using atomic_t correctly, and it\ndoesn\u0027t even need to. Moreover, the DMA engine code provides us with\na variable for this already - chan.cookie. Use chan.cookie instead.\n\nAlso, avoid negative dma_cookie_t values - negative returns from\ntx_submit() mean failure, yet in reality we always succeed. Restart\nfrom cookie 1, just like other DMA engine drivers do.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4440aacf3a171a0ab498feda58d100a320c5d9ff", "tree": "582fa3a2b9a99d2f36394e29d02ac001d72d2ff6", "parents": [ "e8b5e11df3d02e7bbd85c025cc705a8e67746f73" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:30:44 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:16:10 2011 -0800" }, "message": "ARM: PL08x: fix array overflow in dma_set_runtime_config()\n\nIf maxburst was passed in as zero, we would overflow the burst_sizes[]\narray. Fix this by checking for this condition, and defaulting to\nsingle transfer \u0027bursts\u0027.\n\nImprove the readability of the loop using a for() loop rather than\na while() loop with the iterator initialized far from the loop.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e8b5e11df3d02e7bbd85c025cc705a8e67746f73", "tree": "33c31a3b3d56c917babe0c8a675dfb9e6127f8ef", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Mon Jan 03 22:30:24 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 19:13:38 2011 -0800" }, "message": "ARM: PL08x: fix spelling errors\n\nCorrect mis-spellings in comments and printk strings.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d49278e3351b34870cbffffc5067348a318e7b06", "tree": "a8569e9a24286a0bd885f96e27342e4de2fdecbb", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Per Forlin", "email": "per.forlin@stericsson.com", "time": "Mon Dec 20 18:31:38 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 04 17:20:43 2011 -0800" }, "message": "dmaengine: dma40: Add support to split up large elements\n\nThe maximum transfer size of the stedma40 is (64k-1) x data-width.\nIf the transfer size of one element exceeds this limit\nthe job is split up and sent as linked transfer.\n\nSigned-off-by: Per Forlin \u003cper.forlin@linaro.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d45fa563a62c908d0e9a581d4f091fed6371ebd0", "tree": "84b80c025132e7d4619709dd9134681c8b014fa2", "parents": [ "a1cf11d8f673a3ad91012c5da96beed06ecefde1", "8f33d5277fada0291ea495f7fd44a3e7b7aa41d3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 03 11:48:54 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 03 11:48:54 2011 -0800" }, "message": "Merge branch \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n dmaengine: provide dummy functions for DMA_ENGINE\u003dn\n mv_xor: fix race in tasklet function\n" }, { "commit": "8333f65ef094e47020cd01452b4637e7daf5a77f", "tree": "1f41baeedeff9625d25e9c664d3bf762f3371855", "parents": [ "59a609d9b59be9452f168fe228befea53d5962ff" ], "author": { "name": "Saeed Bishara", "email": "saeed@marvell.com", "time": "Tue Dec 21 16:53:39 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 03 01:39:26 2011 -0800" }, "message": "mv_xor: fix race in tasklet function\n\nuse mv_xor_slot_cleanup() instead of __mv_xor_slot_cleanup() as the former function\naquires the spin lock that needed to protect the drivers data.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1fef891761ddcbd7e57ec3961a0fb748003222ac", "tree": "d192f1677521e17f1a943f8df570dd6449aa0da8", "parents": [ "d3d4b60b12369eded0ea0c5dffee0888ec4d80cd", "1d3f33d541312acd34bd2fa780396d111a0f73b1" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 03 10:15:11 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 03 10:15:11 2011 +0100" }, "message": "Merge branch \u0027sgu/mxs-core-v8\u0027 of git://git.pengutronix.de/git/ukl/linux-2.6 into imx-for-2.6.38-new\n" }, { "commit": "a276991357c63bfb8d3ffdf5800054dba4f8d558", "tree": "8a3bb0d23eb2011f69e426ab1d87bbe311567c96", "parents": [ "ba2eea251f815b3674cde13ecdba4772332bf56e" ], "author": { "name": "Ilya Yanok", "email": "yanok@emcraft.com", "time": "Wed Oct 27 01:52:58 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed Dec 29 22:29:36 2010 -0700" }, "message": "powerpc/512x: try to free dma descriptors in case of allocation failure\n\nCurrently completed descriptors are processed in the tasklet. This can\nlead to dead lock in case of CONFIG_NET_DMA enabled (new requests are\nsubmitted from softirq context and dma_memcpy_to_iovec() busy loops until\nthe requests is submitted). To prevent this we should process completed\ndescriptors from the allocation failure path in prepare_memcpy too.\n\nSigned-off-by: Ilya Yanok \u003cyanok@emcraft.com\u003e\nCc: Piotr Ziecik \u003ckosmo@semihalf.com\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "ba2eea251f815b3674cde13ecdba4772332bf56e", "tree": "858c0d3657b5aabed3bcd5f5fbf677dd3f95d9f9", "parents": [ "2862559e8a1e7c47bb3003f0edbc9db9009dc32b" ], "author": { "name": "Ilya Yanok", "email": "yanok@emcraft.com", "time": "Wed Oct 27 01:52:57 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed Dec 29 22:29:02 2010 -0700" }, "message": "powerpc/512x: add MPC8308 dma support\n\nMPC8308 has pretty much the same DMA controller as MPC5121 and\nthis patch adds support for MPC8308 to the mpc512x_dma driver.\n\nSigned-off-by: Ilya Yanok \u003cyanok@emcraft.com\u003e\nAcked-by: Wolfgang Denk \u003cwd@denx.de\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "2862559e8a1e7c47bb3003f0edbc9db9009dc32b", "tree": "2737fe6a622fe36a1a9dc49224cdb39608e9cac8", "parents": [ "6504cf3412373f42b53a675363c056901c1596cf" ], "author": { "name": "Ilya Yanok", "email": "yanok@emcraft.com", "time": "Wed Oct 27 01:52:56 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed Dec 29 22:28:14 2010 -0700" }, "message": "powerpc/512x: fix the hanged dma transfer issue\n\nCurrent code clears interrupt active status _after_ submitting new\ntransfers. This leaves a possibility of clearing the interrupt for this\nnew transfer (if it is triggered fast enough) and thus lose this\ninterrupt. We want to clear interrupt active status _before_ new\ntransfers is submitted and for current channel only.\n\nSigned-off-by: Ilya Yanok \u003cyanok@emcraft.com\u003e\nAcked-by: Wolfgang Denk \u003cwd@denx.de\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "6504cf3412373f42b53a675363c056901c1596cf", "tree": "920b990614e44a692057a2a75d6110ca501579cc", "parents": [ "d392da5207352f09030e95d9ea335a4225667ec0" ], "author": { "name": "Ilya Yanok", "email": "yanok@emcraft.com", "time": "Wed Oct 27 01:52:55 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed Dec 29 22:27:31 2010 -0700" }, "message": "powerpc/512x: scatter/gather dma fix\n\nWhile testing mpc512x-dma driver with dmatest module I\u0027ve found that\nI can hang the mpc512x-dma issuing request from multiple threads to\nthe single channel.\n\n insmod dmatest.ko max_channels\u003d1 threads_per_chan\u003d16\n\nAfter investigating this case I\u0027ve managed to find that this happens\nif and only if we have more than one queued requests.\nIn this case the driver tries to make use of hardware scatter/gather\nfunctionality. I\u0027ve found two problems with scatter/gather:\n\n 1. When TCD is copied form RAM to the TCD register space with memcpy_io()\ne_sg bit eventually gets cleared. This results in only first TCD being\nexecuted. I\u0027ve added setting of e_sg bit explicitly in the TCD registers.\nBTW, what is the correct way to do this? (How can I use setbits with bitfield\nstructure?) After that hardware loads consecutive TCDs and we hit the\nsecond issue.\n\n 2. Existing code clears int_maj bit in the last TCD so we never get\nan interrupt on transfer completion.\n\nWith these fixes my tests with many threads of single channel succeed but\ntests that use many channels simultaneously still don\u0027t work reliable.\n\nSigned-off-by: Ilya Yanok \u003cyanok@emcraft.com\u003e\nAcked-by: Wolfgang Denk \u003cwd@denx.de\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "4b7bd364700d9ac8372eff48832062b936d0793b", "tree": "0dbf78c95456a0b02d07fcd473281f04a87e266d", "parents": [ "c0d8768af260e2cbb4bf659ae6094a262c86b085", "90a8a73c06cc32b609a880d48449d7083327e11a" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Wed Dec 22 18:57:02 2010 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Wed Dec 22 18:57:02 2010 +0100" }, "message": "Merge branch \u0027master\u0027 into for-next\n\nConflicts:\n\tMAINTAINERS\n\tarch/arm/mach-omap2/pm24xx.c\n\tdrivers/scsi/bfa/bfa_fcpim.c\n\nNeeded to update to apply fixes for which the old branch was too\noutdated.\n" }, { "commit": "03aa18f550900855c1d3d17ac83c14a3d668d344", "tree": "6aab2e924e1c11a931fa6e491215e7f6b45b343a", "parents": [ "76496f8f2e104b8bb08db09c063a6817d18829a6" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Fri Dec 17 19:16:10 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Fri Dec 17 19:16:10 2010 +0900" }, "message": "dma: shdma: NMI support.\n\nPresently DMA transfers are interrupted and aborted by the NMI. This\nimplements some basic logic for more gracefully handling and clearing\neach controller\u0027s NMIF flag via the NMI die chain, needed to resume\ntransfers post-NMI.\n\nReported-by: Michael Szafranek \u003cMichael.Szafranek@emtrion.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "5d43a1de26f37080b75d7c0cf2a0b97523457568", "tree": "824aa8c3a2ee1ce231aa30d2643f21b66c03c919", "parents": [ "7103b71b0ff6a5d8d71438e63dfc539a6f0a61bd", "59a609d9b59be9452f168fe228befea53d5962ff" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Dec 14 13:35:47 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Dec 14 13:35:47 2010 -0800" }, "message": "Merge branch \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n dmaengine: at_hdmac: fix buffer transfer size specification\n fsldma: fix issue of slow dma\n dmaengine i.MX SDMA: initialize on module_init\n dma : EG20T PCH: Fix miss-setting DMA descriptor\n intel_mid_dma: fix section mismatch warnings\n dmaengine: imx-sdma: fix bug in buffer descriptor initialization\n drivers/dma/ppc4xx: Use printf extension %pR for struct resource\n drivers/dma/ioat: Use the ccflag-y instead of EXTRA_CFLAGS\n drivers/dma/: Use the ccflag-y instead of EXTRA_CFLAGS\n dma: intel_mid_dma: fix double free on mid_setup_dma error path\n dma: imx-dma: fix imxdma_probe error path\n" }, { "commit": "59a609d9b59be9452f168fe228befea53d5962ff", "tree": "6ac0fe91c963ceefea29cf9cea039c4374f6aa24", "parents": [ "f3c677b997757326e1f29d33060719a6a5091950" ], "author": { "name": "Nicolas Ferre", "email": "nicolas.ferre@atmel.com", "time": "Mon Dec 13 13:48:41 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 14 00:39:29 2010 -0800" }, "message": "dmaengine: at_hdmac: fix buffer transfer size specification\n\nBuffer transfer size is the number of transfers to be performed in\nrelation with the width of the _source_ interface.\nSo in the DMA_FROM_DEVICE case, it should be the register width that\nshould be taken into account.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "f3c677b997757326e1f29d33060719a6a5091950", "tree": "3135e7ee4a04d5abd929cc863168c0c6a574e824", "parents": [ "c989a7fc139ec8975fdc230e2de42f3c4555880e" ], "author": { "name": "Forrest Shi", "email": "b29237@freescale.com", "time": "Thu Dec 09 16:14:04 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Dec 13 14:05:27 2010 -0800" }, "message": "fsldma: fix issue of slow dma\n\nFixed fsl dma slow issue by initializing dma mode register with\nbandwidth control. It boosts dma performance and should works\nwith 85xx board.\n\nSigned-off-by: Forrest Shi \u003cb29237@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0a4bbddde29c038f2c51a7abb03d6d07e679d8af", "tree": "4257a25f3802a2879d9bcfc5e1a5e1e38e59d948", "parents": [ "c989a7fc139ec8975fdc230e2de42f3c4555880e", "e2c8e425baa01a4c8e6ae1b90194ed3d3cde0c66", "0be035f3485379d812d617ee7eaa255cde97dbfa" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 07 17:10:52 2010 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 07 17:10:52 2010 -0800" }, "message": "Merge branches \u0027fsldma\u0027 and \u0027intel-mid\u0027 into dmaengine\n" }, { "commit": "c989a7fc139ec8975fdc230e2de42f3c4555880e", "tree": "02c2a4d1b8c9210db13c74cbb36882f1d121377c", "parents": [ "943d8d8bca431d6c93f17bf38f4b09c65e0a81d7" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Dec 06 11:09:57 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 07 15:38:07 2010 -0800" }, "message": "dmaengine i.MX SDMA: initialize on module_init\n\nThe firmware framework gets initialized during fs_initcall time, so\nwe are not allowed to call request_firmware earlier.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "943d8d8bca431d6c93f17bf38f4b09c65e0a81d7", "tree": "e9b81cba5e8c3f761a4848c4e7de73e4ab0b5aab", "parents": [ "cf2f9c59807f173b1c6a537fde7c83c8da876e56" ], "author": { "name": "Tomoya MORINAGA", "email": "tomoya-linux@dsn.okisemi.com", "time": "Wed Dec 01 19:49:48 2010 +0900" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 07 15:07:08 2010 -0800" }, "message": "dma : EG20T PCH: Fix miss-setting DMA descriptor\n\nCurrently, in case of using scatter/gather mode, head of data is not sent to\n\ndestination. The cause is second descriptor address is set to NEXT.\n\nThe NEXT must have head of descriptor address.\n\nThis patch sets head of descriptor address to the NEXT.\n\nAcked-by: Yong Wang \u003cyoug.y.wang@intel.com\u003e\nSigned-off-by: Tomoya MORINAGA \u003ctomoya-linux@dsn.okisemi.com\u003e\n[dan.j.williams@intel.com: fixed up usage of virt_to_phys()]\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0be035f3485379d812d617ee7eaa255cde97dbfa", "tree": "42b298c929d3100229112bc0fa1f88166f788622", "parents": [ "66bde0b70aa2e348ac2c9b9626743c1402b9d466" ], "author": { "name": "Feng Tang", "email": "feng.tang@intel.com", "time": "Thu Dec 02 17:14:30 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 04 15:09:50 2010 -0800" }, "message": "intel_mid_dma: add support for single item scatter-gather list\n\nCurrent driver\u0027s device_prep_slave_sg can\u0027t be used by DMAC2 even\nthe sg list contains one item, this patch will enable DMAC2 to\nuse this API.\n\nSigned-off-by: Feng Tang \u003cfeng.tang@intel.com\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cf2f9c59807f173b1c6a537fde7c83c8da876e56", "tree": "2de933c0f35e842bd08ae90b30edc64acc9a8fa1", "parents": [ "d2f5c276ea4b7b7e1b953926bac9d0b148fcce4e" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 04 14:53:32 2010 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 04 15:03:56 2010 -0800" }, "message": "intel_mid_dma: fix section mismatch warnings\n\nRename intel_mid_dma_pci to intel_mid_dma_pci_driver to pick up the\napplied annotations of that suffix.\n\nReported-by: \u003cmajor_Lee@wistron.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d2f5c276ea4b7b7e1b953926bac9d0b148fcce4e", "tree": "5811fc0b75149a20fb5cdc7102d697ec699d005c", "parents": [ "a584bff5efae8c1d026e3a930e3d13a90264fafc" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Mon Nov 22 18:35:18 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 04 15:03:46 2010 -0800" }, "message": "dmaengine: imx-sdma: fix bug in buffer descriptor initialization\n\nCurrently while submitting scatterlists with more than one SG\nentry the DMA buffer address from the first SG entry is inserted\ninto all initialized DMA buffer descriptors. This is due to the\ntypo in the for_each_sg() loop where the scatterlist pointer is\nused for obtaining the DMA buffer address and _not_ the SG list\niterator.\n\nAs a result all received data will be written only into the first\nDMA buffer while reading. While writing the data from the first\nDMA buffer is send to the device multiple times. This caused\nthe filesystem destruction on the MMC card when using DMA in\nmxcmmc driver.\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nAcked-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a584bff5efae8c1d026e3a930e3d13a90264fafc", "tree": "32aab71b23d45526d51963fb8ad8167375ef524b", "parents": [ "bca364d30d63825f36a03dcacf390943d4c2cb74" ], "author": { "name": "Joe Perches", "email": "joe@perches.com", "time": "Fri Nov 12 13:37:54 2010 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 04 15:03:40 2010 -0800" }, "message": "drivers/dma/ppc4xx: Use printf extension %pR for struct resource\n\nUsing %pR standardizes the struct resource output.\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "bca364d30d63825f36a03dcacf390943d4c2cb74", "tree": "cbb5dec99c272e1bb64e3072557df08e328bd966", "parents": [ "87e51107323a84e26a5004337217fc954e8d9545" ], "author": { "name": "Tracey Dent", "email": "tdent48227@gmail.com", "time": "Sat Nov 06 17:01:37 2010 -0400" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 04 15:03:06 2010 -0800" }, "message": "drivers/dma/ioat: Use the ccflag-y instead of EXTRA_CFLAGS\n\nChanged Makefile to use \u003cmodules\u003e-y instead of \u003cmodules\u003e-objs. Following\n(documentation/kbuild/makefiles.txt).\n\nSigned-off-by: Tracey Dent \u003ctdent48227@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e2c8e425baa01a4c8e6ae1b90194ed3d3cde0c66", "tree": "cb35b0e102d0207c42d65e88f78352dc8199f43e", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Thu Nov 11 20:16:29 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Dec 03 14:02:45 2010 -0800" }, "message": "fsldma: add support to 36-bit physical address\n\nExpand the dma_mask of fsldma device to 36-bit, indicating that the\nDMA engine can deal with 36-bit physical address and does not need\nthe SWIOTLB to create bounce buffer for it when doing dma_map_*().\n\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5b28aa319bba96987316425a1131813d87cbab35", "tree": "7fac8d3e54717355d83ac3d3fd1e4ec7440d7126", "parents": [ "9ab4650f718a0e1cb8792bab4ef97efca4ac75c2" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Oct 06 15:41:15 2010 +0200" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Fri Dec 03 11:04:54 2010 +0100" }, "message": "dmaengine i.MX SDMA: Allow to run without firmware\n\nThe SDMA firmware consists of a ROM part and a RAM part.\nThe ROM part is always present in the SDMA engine and\nis sufficient for many cases.\nThis patch allows to pass in platform data containing\nthe script addresses in ROM, so loading a firmware is\noptional now.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "87e51107323a84e26a5004337217fc954e8d9545", "tree": "8472fe98f9f4192579c2e03d200402dc648c4ae9", "parents": [ "51a1efe2e84493439db32c07471e835c752a7923" ], "author": { "name": "Tracey Dent", "email": "tdent48227@gmail.com", "time": "Sat Nov 06 17:01:36 2010 -0400" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Dec 03 01:51:43 2010 -0800" }, "message": "drivers/dma/: Use the ccflag-y instead of EXTRA_CFLAGS\n\nUse the ccflag-y flag instead of EXTRA_CFLAGS because EXTRA_CFLAGS is\ndeprecated and should now be switched. According to (documentation/kbuild/makefiles.txt).\n\nSigned-off-by: Tracey Dent \u003ctdent48227@gmail.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "51a1efe2e84493439db32c07471e835c752a7923", "tree": "7608eba539917e5b666c9f67a63aa82449aeb43e", "parents": [ "cbeae41888bddb2d8c23db281de5f38f4be6a9bb" ], "author": { "name": "Axel Lin", "email": "axel.lin@gmail.com", "time": "Tue Nov 02 09:52:17 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Dec 03 01:46:07 2010 -0800" }, "message": "dma: intel_mid_dma: fix double free on mid_setup_dma error path\n\nWe should not call kfree(dma) in mid_setup_dma error path because\nthe memory is allocated in intel_mid_dma_probe and will be freed\nin intel_mid_dma_probe error path if mid_setup_dma return error.\n\nSigned-off-by: Axel Lin \u003caxel.lin@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cbeae41888bddb2d8c23db281de5f38f4be6a9bb", "tree": "ab4a16f0652337986a5def2929e06865e9fbbfbe", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Axel Lin", "email": "axel.lin@gmail.com", "time": "Tue Nov 02 09:12:57 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Dec 03 01:39:03 2010 -0800" }, "message": "dma: imx-dma: fix imxdma_probe error path\n\notherwise, i will be -1 inside the latest iteration of the while loop.\n\nSigned-off-by: Axel Lin \u003caxel.lin@gmail.com\u003e\nAcked-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "66bde0b70aa2e348ac2c9b9626743c1402b9d466", "tree": "6a3a9413f3fe14308dcd8a068fbc55c9729adcf9", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Dan Carpenter", "email": "error27@gmail.com", "time": "Thu Oct 28 15:41:56 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Dec 03 01:05:24 2010 -0800" }, "message": "dma/intel_mid_dma: remove unneeded null check\n\nSmatch complains because we dereference \"mid\" before checking it. It\nturns out that \"mid\" is always a valid pointer here so we can just\nremove the check.\n\nSigned-off-by: Dan Carpenter \u003cerror27@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e5843341e3ad8ff00332376cd0745026e4b5d45f", "tree": "3be222f33d467f1e4da62c231bfe664dcb8cc6b1", "parents": [ "698fd6a2c3ca05ec796072defb5c415289a86cdc" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Nov 24 09:48:10 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Thu Nov 25 16:29:41 2010 +0900" }, "message": "dma: shdma: add a MODULE_ALIAS() to allow module autoloading\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "b595076a180a56d1bb170e6eceda6eb9d76f4cd3", "tree": "bc01ec7283808013e0b8ce7713fd6fc40f810429", "parents": [ "6aaccece1c483f189f76f1282b3984ff4c7ecb0a" ], "author": { "name": "Uwe Kleine-König", "email": "u.kleine-koenig@pengutronix.de", "time": "Mon Nov 01 15:38:34 2010 -0400" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Nov 01 15:38:34 2010 -0400" }, "message": "tree-wide: fix comment/printk typos\n\n\"gadget\", \"through\", \"command\", \"maintain\", \"maintain\", \"controller\", \"address\",\n\"between\", \"initiali[zs]e\", \"instead\", \"function\", \"select\", \"already\",\n\"equal\", \"access\", \"management\", \"hierarchy\", \"registration\", \"interest\",\n\"relative\", \"memory\", \"offset\", \"already\",\n\nSigned-off-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "d2df40857fd57f02906e6ac1484d10cb7accbc86", "tree": "e38165d29e15ada205297786ca33e088ad92a347", "parents": [ "1e431a9d6478940c0b5fcfa1c17a336fc0683409" ], "author": { "name": "Valdis.Kletnieks@vt.edu", "email": "Valdis.Kletnieks@vt.edu", "time": "Fri Oct 29 17:03:46 2010 -0400" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 14:14:02 2010 -0700" }, "message": "drivers/dma/Kconfig: add part number for Topcliff.\n\nProduct codenames are OK, but once an actual product name is available,\nit should be referenced as well.\n\n http://ark.intel.com/chipset.aspx?familyID\u003d52499\n\nSigned-off-by: Valdis Kletnieks \u003cvaldis.kletnieks@vt.edu\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e3e1288e86a07cdeb0aee5860a2dff111c6eff79", "tree": "cd22f8051a456c9d2b95698b6fe402776a67469b", "parents": [ "9ae6d039224def926656206725ae6e89d1331417", "964dc256bb91e990277010a3f6dc66daa130be8b" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 27 19:04:36 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 27 19:04:36 2010 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits)\n DMAENGINE: move COH901318 to arch_initcall\n dma: imx-dma: fix signedness bug\n dma/timberdale: simplify conditional\n ste_dma40: remove channel_type\n ste_dma40: remove enum for endianess\n ste_dma40: remove TIM_FOR_LINK option\n ste_dma40: move mode_opt to separate config\n ste_dma40: move channel mode to a separate field\n ste_dma40: move priority to separate field\n ste_dma40: add variable to indicate valid dma_cfg\n async_tx: make async_tx channel switching opt-in\n move async raid6 test to lib/Kconfig.debug\n dmaengine: Add Freescale i.MX1/21/27 DMA driver\n intel_mid_dma: change the slave interface\n intel_mid_dma: fix the WARN_ONs\n intel_mid_dma: Add sg list support to DMA driver\n intel_mid_dma: Allow DMAC2 to share interrupt\n intel_mid_dma: Allow IRQ sharing\n intel_mid_dma: Add runtime PM support\n DMAENGINE: define a dummy filter function for ste_dma40\n ...\n" }, { "commit": "87acf5ad87b275660e2508e6935b570a20b6a073", "tree": "c0a5d543289a953961171bcb8294e09eb912af0f", "parents": [ "abbce906d05ec37289cd0c3b4e35b2db26eab19b" ], "author": { "name": "Dzianis Kahanovich", "email": "mahatma@bspu.unibel.by", "time": "Wed Oct 27 20:33:05 2010 -0600" }, "committer": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Wed Oct 27 20:33:05 2010 +1030" }, "message": "NULL-terminate all pci_device_id tables\n\nNULL-terminating pci_device_id in pch_dma.c and scx200_acb.c\nfor appying MODULE_DEVICE_TABLE (to publish modalias-es).\n\nSigned-off-by: Dzianis Kahanovich \u003cmahatma@eu.by\u003e\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\n" }, { "commit": "964dc256bb91e990277010a3f6dc66daa130be8b", "tree": "9908fa6c07c9feefa9635f1b66c9e2365aeea83e", "parents": [ "8267f16e8b67ea272f37f7072933dc0d3839693d" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Thu Oct 21 21:04:38 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Oct 22 11:08:38 2010 -0700" }, "message": "DMAENGINE: move COH901318 to arch_initcall\n\nAfter moving the PL022 driver to subsys_initcall() due to the need\nof having stuff like regulators on the other end of the SPI link,\nI noticed that the COH901318 DMA engine will get probed before\nthe DMA engine, so move it to an arch_initcall().\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8267f16e8b67ea272f37f7072933dc0d3839693d", "tree": "672a25b5bb2db8c1a440d0221d1069231071f6aa", "parents": [ "42e55736f7efd7658f8826a5f441c3ccb962db74" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Oct 20 08:37:19 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Oct 22 11:08:27 2010 -0700" }, "message": "dma: imx-dma: fix signedness bug\n\nmxdmac-\u003echannel was unsigned, so check (imxdmac-\u003echannel \u003c 0) for\nfailed imx_dma_request_by_prio() made no sence. Explicitly check\nsigned values.\nAlso, fix uninitialzed use of ret.\n\nSigned-off-by: Vasiliy Kulikov \u003csegooon@gmail.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" } ], "next": "092e0e7e520a1fca03e13c9f2d157432a8657ff2" }