)]}' { "log": [ { "commit": "80cb9aee01245b38325dd84f1359b14a3f01f10d", "tree": "aa261392fa976e86dba2bea43b8afc9a64228b89", "parents": [ "469d02293d494d30dba81895cd3d34b0a3a6d51a" ], "author": { "name": "Randy Vinson", "email": "rvinson@mvista.com", "time": "Fri Jan 20 13:53:38 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Mar 20 14:49:55 2006 -0800" }, "message": "[PATCH] USB: EHCI for Freescale 83xx\n\nAdding a Host Mode USB driver for the Freescale 83xx.\n\nThis driver supports both the Dual-Role (DR) controller and the\nMulti-Port-Host (MPH) controller present in the Freescale MPC8349. It has\nbeen tested with the MPC8349CDS reference system. This driver depends on\nplatform support code for setting up the pins on the device package in a\nmanner appropriate for the board in use. Note that this patch requires\nselecting the EHCI controller option under the USB Host menu.\n\nSigned-off-by: Randy Vinson \u003crvinson@mvista.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "e266a12492f7ca9142882710bff92e902b7c95c8", "tree": "7554164a34ba64b5420858edbcd7bf49c4057c2f", "parents": [ "9628416a542488230b53df48d90d4a967dea41c8" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Tue Nov 08 21:05:43 2005 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Mar 20 14:49:54 2006 -0800" }, "message": "[PATCH] USB: drivers/usb/core/message.c: make usb_get_string() static\n\nAfter the removal of usb-midi.c, there\u0027s no longer any external user of\nusb_get_string().\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "c4a1745aa09fc110afdefea0e5d025043e348bae", "tree": "6d28dc3a0c1bf18437b3d49f28e5c81b850cdb2f", "parents": [ "88dcb91177cfa5b26143a29074389a2aa259c7cf", "ac0eb3eb7e54b700386068be025a43d2a3958ee5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 11:57:50 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 11:57:50 2006 -0800" }, "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6\n\n* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (230 commits)\n [SPARC64]: Update defconfig.\n [SPARC64]: Fix 2 bugs in huge page support.\n [SPARC64]: CONFIG_BLK_DEV_RAM fix\n [SPARC64]: Optimized TSB table initialization.\n [SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build.\n [SPARC64]: Use SLAB caches for TSB tables.\n [SPARC64]: Don\u0027t kill the page allocator when growing a TSB.\n [SPARC64]: Randomize mm-\u003emmap_base when PF_RANDOMIZE is set.\n [SPARC64]: Increase top of 32-bit process stack.\n [SPARC64]: Top-down address space allocation for 32-bit tasks.\n [SPARC64] bbc_i2c: Fix cpu check and add missing module license.\n [SPARC64]: Fix and re-enable dynamic TSB sizing.\n [SUNSU]: Fix missing spinlock initialization.\n [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.\n [SPARC64]: First cut at VIS simulator for Niagara.\n [SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.\n [SPARC64]: Add SMT scheduling support for Niagara.\n [SPARC64]: Fix 32-bit truncation which broke sparsemem.\n [SPARC64]: Move over to sparsemem.\n [SPARC64]: Fix new context version SMP handling.\n ...\n" }, { "commit": "c7cace6437b2f8bbab5ef05b465738283a9a100a", "tree": "304a7dca0354eaa8ac21aa05cd287e317fa21b8c", "parents": [ "a90779bfc83b7489270a8ce2c3fc9df20dac2b24", "2e9ff56efbc005ab2b92b68df65940c7459446c6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 10:30:31 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 10:30:31 2006 -0800" }, "message": "Merge branch \u0027upstream-linus\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6\n\n* \u0027upstream-linus\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (150 commits)\n [PATCH] ipw2100: Update version ipw2100 stamp to 1.2.2\n [PATCH] ipw2100: move mutex.h include from ipw2100.c to ipw2100.h\n [PATCH] ipw2100: semaphore to mutexes conversion\n [PATCH] ipw2100: Fix radiotap code gcc warning\n [PATCH] ipw2100: add radiotap headers to packtes captured in monitor mode\n [PATCH] ipw2x00: expend Copyright to 2006\n [PATCH] drivers/net/wireless/ipw2200.c: fix an array overun\n [PATCH] ieee80211: Don\u0027t update network statistics from off-channel packets.\n [PATCH] ipw2200: Update ipw2200 version stamp to 1.1.1\n [PATCH] ipw2200: switch to the new ipw2200-fw-3.0 image format\n [PATCH] ipw2200: wireless extension sensitivity threshold support\n [PATCH] ipw2200: Enables the \"slow diversity\" algorithm\n [PATCH] ipw2200: Set a meaningful silence threshold value\n [PATCH] ipw2200: export `debug\u0027 module param only if CONFIG_IPW2200_DEBUG\n [PATCH] ipw2200: Change debug level for firmware error logging\n [PATCH] ipw2200: Filter unsupported channels out in ad-hoc mode\n [PATCH] ipw2200: Fix ipw_sw_reset() implementation inconsistent with comment\n [PATCH] ipw2200: Fix rf_kill is activated after mode change with \u0027disable\u003d1\u0027\n [PATCH] ipw2200: remove the WPA card associates to non-WPA AP checking\n [PATCH] ipw2200: Add signal level to iwlist scan output\n ...\n" }, { "commit": "a90779bfc83b7489270a8ce2c3fc9df20dac2b24", "tree": "53a41d0e419024619c621facb2baf6e782e16f35", "parents": [ "7705a8792b0fc82fd7d4dd923724606bbfd9fb20", "e572ec7e4e432de7ecf7bd2e62117646fa64e518" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 10:28:51 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 10:28:51 2006 -0800" }, "message": "Merge branch \u0027block-fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/viro/block\n\n* \u0027block-fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/viro/block:\n [PATCH] fix rmmod problems with elevator attributes, clean them up\n [PATCH] elevator_t lifetime rules and sysfs fixes\n [PATCH] noise removal: cfq-iosched.c\n [PATCH] don\u0027t bother with refcounting for cfq_data\n [PATCH] fix sysfs interaction and lifetime rules handling for queues\n [PATCH] regularize blk_cleanup_queue() use\n [PATCH] fix cfq_get_queue()/ioprio_set(2) races\n [PATCH] deal with rmmod/put_io_context() races\n [PATCH] stop elv_unregister() from rogering other iosched\u0027s data, fix locking\n [PATCH] stop cfq from pinning queue down\n [PATCH] make cfq_exit_queue() prune the cfq_io_context for that queue\n [PATCH] fix the exclusion for ioprio_set()\n [PATCH] keep sync and async cfq_queue separate\n [PATCH] switch to use of -\u003ekey to get cfq_data by cfq_io_context\n [PATCH] stop leaking cfq_data in cfq_set_request()\n [PATCH] fix cfq hash lookups\n [PATCH] fix locking in queue_requests_store()\n [PATCH] fix double-free in blk_init_queue_node()\n [PATCH] don\u0027t do exit_io_context() until we know we won\u0027t be doing any IO\n" }, { "commit": "d378aca6ec708bfb24df5c47801b1f2399efc481", "tree": "7535f96bf34314df071698d2e06054b8d5223ebb", "parents": [ "abc71c46dc0a12ab7fddc18cfe4f4aa26808c79b", "7705a8792b0fc82fd7d4dd923724606bbfd9fb20" ], "author": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Mon Mar 20 04:38:03 2006 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Mon Mar 20 04:38:03 2006 -0500" }, "message": "Merge branch \u0027master\u0027\n" }, { "commit": "f6b83f070e9b7ad9075f7cc5646260e56c7d0219", "tree": "48586ca4f4c75ee3862f63be332351e78f2d5476", "parents": [ "467418f3508b426adbc7df795ebf3baaed4fbefc" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 01:17:17 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 01:17:17 2006 -0800" }, "message": "[SPARC64]: Fix 2 bugs in huge page support.\n\n1) huge_pte_offset() did not check the page table hierarchy\n elements as being empty correctly, resulting in an OOPS\n\n2) Need platform specific hugetlb_get_unmapped_area() to handle\n the top-down vs. bottom-up address space allocation strategies.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bb8646d8340fa7c1b66a037428e39f85f8738f0a", "tree": "931d4505a0ba65124b662f0f8b5935e0b154bd66", "parents": [ "88d7079458f87d6f2d2261b2f87b7b9416019f5e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Mar 18 23:55:11 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:41 2006 -0800" }, "message": "[SPARC64]: Optimized TSB table initialization.\n\nWe only need to write an invalid tag every 16 bytes,\nso taking advantage of this can save many instructions\ncompared to the simple memset() call we make now.\n\nA prefetching implementation is implemented for sun4u\nand a block-init store version if implemented for Niagara.\n\nThe next trick is to be able to perform an init and\na copy_tsb() in parallel when growing a TSB table.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d61e16df940e02e25679bdc1aee8c25786f6de90", "tree": "de76f4007d526835b8564203341ebf66ca29b12d", "parents": [ "a91690ddd05ab0b7fbdd37733875525ac75c20f2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 17 17:33:56 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:36 2006 -0800" }, "message": "[SPARC64]: Increase top of 32-bit process stack.\n\nPut it one page below the top of the 32-bit address space.\nThis gives us ~16MB more address space to work with.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a91690ddd05ab0b7fbdd37733875525ac75c20f2", "tree": "f6937c0ce29c79078d6df8346a374a7b9947f360", "parents": [ "b5e7ae5dd034c2c0ed75c31fca04a805097817bc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 17 14:41:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:35 2006 -0800" }, "message": "[SPARC64]: Top-down address space allocation for 32-bit tasks.\n\nCurrently allocations are very constrained for 32-bit processes.\nIt grows down-up from 0x70000000 to 0xf0000000 which gives about\n2GB of stack + dynamic mmap() space.\n\nSo support the top-down method, and we need to override the\ngeneric helper function in order to deal with D-cache coloring.\n\nWith these changes I was able to squeeze out a mmap() just over\n3.6GB in size in a 32-bit process.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7a1ac5264108fc3ed22d17a3cdd76212ed1666d1", "tree": "75378a1b470afa54900f1f15a5b41966d301520d", "parents": [ "a858f1ca726edc5eb7ed39722f7966d005f1c9ca" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Mar 16 02:02:32 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:33 2006 -0800" }, "message": "[SPARC64]: Fix and re-enable dynamic TSB sizing.\n\nThis is good for up to %50 performance improvement of some test cases.\nThe problem has been the race conditions, and hopefully I\u0027ve plugged\nthem all up here.\n\n1) There was a serious race in switch_mm() wrt. lazy TLB\n switching to and from kernel threads.\n\n We could erroneously skip a tsb_context_switch() and thus\n use a stale TSB across a TSB grow event.\n\n There is a big comment now in that function describing\n exactly how it can happen.\n\n2) All code paths that do something with the TSB need to be\n guarded with the mm-\u003econtext.lock spinlock. This makes\n page table flushing paths properly synchronize with both\n TSB growing and TLB context changes.\n\n3) TSB growing events are moved to the end of successful fault\n processing. Previously it was in update_mmu_cache() but\n that is deadlock prone. At the end of do_sparc64_fault()\n we hold no spinlocks that could deadlock the TSB grow\n sequence. We also have dropped the address space semaphore.\n\nWhile we\u0027re here, add prefetching to the copy_tsb() routine\nand put it in assembler into the tsb.S file. This piece of\ncode is quite time critical.\n\nThere are some small negative side effects to this code which\ncan be improved upon. In particular we grab the mm-\u003econtext.lock\neven for the tsb insert done by update_mmu_cache() now and that\u0027s\na bit excessive. We can get rid of that locking, and the same\nlock taking in flush_tsb_user(), by disabling PSTATE_IE around\nthe whole operation including the capturing of the tsb pointer\nand tsb_nentries value. That would work because anyone growing\nthe TSB won\u0027t free up the old TSB until all cpus respond to the\nTSB change cross call.\n\nI\u0027m not quite so confident in that optimization to put it in\nright now, but eventually we might be able to and the description\nis here for reference.\n\nThis code seems very solid now. It passes several parallel GCC\nbootstrap builds, and our favorite \"nut cruncher\" stress test which is\na full \"make -j8192\" build of a \"make allmodconfig\" kernel. That puts\nabout 256 processes on each cpu\u0027s run queue, makes lots of process cpu\nmigrations occur, causes lots of page table and TLB flushing activity,\nincurs many context version number changes, and it swaps the machine\nreal far out to disk even though there is 16GB of ram on this test\nsystem. :-)\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "90a6646bf6a1ca821f32d5510e935855612904df", "tree": "035420e4ab615cb837b1246fc26c55e0b8d233b4", "parents": [ "8935dced547afbf37d0fcfcac9a3556494e53104" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 08 17:18:19 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:25 2006 -0800" }, "message": "[SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.\n\nReport \u0027sun4v\u0027 when appropriate in /proc/cpuinfo\n\nRemove all the verifications of the OBP version string. Just\nmake sure it\u0027s there, and report it raw in the bootup logs and\nvia /proc/cpuinfo.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8935dced547afbf37d0fcfcac9a3556494e53104", "tree": "0ae802875c73e99b86e4f90be6e953ec0c528dea", "parents": [ "17b0e199a10184d8c5bbbd79a4cee993bb1fb257" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 08 16:09:19 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:24 2006 -0800" }, "message": "[SPARC64]: Add SMT scheduling support for Niagara.\n\nThe mapping is a simple \"(cpuid \u003e\u003e 2) \u003d\u003d core\" for now.\nLater we\u0027ll add more sophisticated code that will walk\nthe sun4v machine description and figure this out from\nthere.\n\nWe should also add core mappings for jaguar and panther\nprocessors.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d1112018b4bc82adf5c8a9c15a08954328f023ae", "tree": "4d94ef6c153f028cfaaff711cf7d4f07aa90e9b4", "parents": [ "ee29074d3bd23848905f52c515974e0cd0219faa" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 08 02:16:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:22 2006 -0800" }, "message": "[SPARC64]: Move over to sparsemem.\n\nThis has been pending for a long time, and the fact\nthat we waste a ton of ram on some configurations\nkind of pushed things over the edge.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ee29074d3bd23848905f52c515974e0cd0219faa", "tree": "d5306446b2e26d9e45f65467b4f3b3f3b0c8494c", "parents": [ "a77754b4d0731321db266c6c60ffcd7c62757da5" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 06 22:50:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:21 2006 -0800" }, "message": "[SPARC64]: Fix new context version SMP handling.\n\nDon\u0027t piggy back the SMP receive signal code to do the\ncontext version change handling.\n\nInstead allocate another fixed PIL number for this\nasynchronous cross-call. We can\u0027t use smp_call_function()\nbecause this thing is invoked with interrupts disabled\nand a few spinlocks held.\n\nAlso, fix smp_call_function_mask() to count \"cpus\" correctly.\nThere is no guarentee that the local cpu is in the mask\nyet that is exactly what this code was assuming.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a77754b4d0731321db266c6c60ffcd7c62757da5", "tree": "37cc4c6793e2b616791d42ee840e5a007a13eccb", "parents": [ "9132983ae140a8ca81e95e081d5a4c0dd7a7f670" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 06 19:59:50 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:20 2006 -0800" }, "message": "[SPARC64]: Bulletproof MMU context locking.\n\n1) Always spin_lock_init() in init_context(). The caller essentially\n clears it out, or copies the mm info from the parent. In both\n cases we need to explicitly initialize the spinlock.\n\n2) Always do explicit IRQ disabling while taking mm-\u003econtext.lock\n and ctx_alloc_lock.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8bcd17411643beb9a601e032d0cf1016909a81d3", "tree": "fc71e788df4fada768247fa7c12e983d2f6f1a32", "parents": [ "45f791eb0f03e760183d30d3f1f18dc2b8e902fe" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Mar 02 18:12:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:14 2006 -0800" }, "message": "[SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole.\n\nThe UltraSPARC T1 manual recommends this because the chip\ncould instruction prefetch into the VA hole, and this would\nalso make decoding certain kinds of memory access traps\nmore difficult (because the chip sign extends certain pieces\nof trap state).\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e22990451a6a6263250cdd267708548dfa08a8f2", "tree": "5d280a9aa0d2b49824d917be85afaa37bb93aede", "parents": [ "8ba706a95bb92c3b14b812f6d507890336d19136" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 01 22:25:43 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:11 2006 -0800" }, "message": "[SPARC64]: Kill bogus function externs in asm/pgtable.h\n\nThese are all implemented inline earlier in the file.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b830ab665ad96c6b20d51a89b35cbc09ab5a2c29", "tree": "57c2c75b3e069f9f244259ae02f6f2fe3de68612", "parents": [ "aac0aadf09b98ba36eab0bb02a560ebcb82ac39f" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Feb 28 15:10:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:09 2006 -0800" }, "message": "[SPARC64]: Fix bugs in SUN4V cpu mondo dispatch.\n\nThere were several bugs in the SUN4V cpu mondo dispatch code.\n\nIn fact, if we ever got a EWOULDBLOCK or other error from\nthe hypervisor call, we\u0027d potentially send a cpu mondo multiple\ntimes to the same cpu and even worse we could loop until the\ntimeout resending the same mondo over and over to such cpus.\n\nSo let\u0027s bulletproof this thing as follows:\n\n1) Implement cpu_mondo_send() and cpu_state() hypervisor calls\n in arch/sparc64/kernel/entry.S, add prototypes to asm/hypervisor.h\n\n2) Don\u0027t build and update the cpulist using inline functions, this\n was causing the cpu mask to not get updated in the caller.\n\n3) Disable interrupts during the entire mondo send, otherwise our\n cpu list and/or mondo block could get overwritten if we take\n an interrupt and do a cpu mondo send on the current cpu.\n\n4) Check for all possible error return types from the cpu_mondo_send()\n hypervisor call. In particular:\n\n HV_EOK) Our work is done, all cpus have received the mondo.\n HV_CPUERROR) One or more of the cpus in the cpu list we passed\n to the hypervisor are in error state. Use cpu_state()\n calls over the entries in the cpu list to see which\n\t\tones. Record them in \"error_mask\" and report this\n\t\tafter we are done sending the mondo to cpus which are\n\t\tnot in error state.\n HV_EWOULDBLOCK) We need to keep trying.\n\n Any other error we consider fatal, we report the event and exit\n immediately.\n\n5) We only timeout if forward progress is not made. Forward progress\n is defined as having at least one cpu get the mondo successfully\n in a given cpu_mondo_send() call. Otherwise we bump a counter\n and delay a little. If the counter hits a limit, we signal an\n error and report the event.\n\nAlso, smp_call_function_mask() error handling reports the number\nof cpus incorrectly.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "97c4b6f95afadea5846b78ce589d25de2a245c56", "tree": "11110547d3c92657ae8199f039e35c3a74d32107", "parents": [ "7a591cfe4efef8a232e4938d44ae6693b319f6d7" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 26 20:37:41 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:06 2006 -0800" }, "message": "[SPARC64]: Use 13-bit context size always.\n\nWe no longer have the problems that require using the smaller\nsizes.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "36344762396ca868d6076c41a84bda25f1ed9d3c", "tree": "7471ce9b78736e538417267f1bc27687a1b09542", "parents": [ "c4e9249b1924118693f298ee8d38f7fe43587af3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 25 17:16:29 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:03 2006 -0800" }, "message": "[SPARC64]: Niagara optimized XOR functions for RAID.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a0663a79ad4faebe1db4a56e2e767b120b12333a", "tree": "612a53e387a6aea6116f8a1637050fa13c6d9f80", "parents": [ "074d82cf688fe2dfa7ba4a2317c56f62d13fb522" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Feb 23 14:19:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:00 2006 -0800" }, "message": "[SPARC64]: Fix TLB context allocation with SMT style shared TLBs.\n\nThe context allocation scheme we use depends upon there being a 1\u003c--\u003e1\nmapping from cpu to physical TLB for correctness. Chips like Niagara\nbreak this assumption.\n\nSo what we do is notify all cpus with a cross call when the context\nversion number changes, and if necessary this makes them allocate\na valid context for the address space they are running at the time.\n\nStress tested with make -j1024, make -j2048, and make -j4096 kernel\nbuilds on a 32-strand, 8 core, T2000 with 16GB of ram.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "0f05da6d577b80eb00f15994c86e4812ae60f1b9", "tree": "39d981c896ab6b90aa30f124fb25cbdf4f242c83", "parents": [ "fc504928677049f0ad3f1fd4e0bb3908172df8f3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 22 16:20:11 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:57 2006 -0800" }, "message": "[SPARC64]: Fix %tstate ASI handling in start_thread{,32}()\n\nNiagara helps us find a ancient bug in the sparc64 port :-)\n\nThe ASI_* values are plain constant defines, thus signed 32-bit\non sparc64. To put shift this into the regs-\u003etstate value we were\ndoing or\u0027ing \"(ASI_PNF \u003c\u003c 24)\" into there.\n\nASI_PNF is 0x82 and shifted left by 24 makes that topmost bit the\nsign bit in a 32-bit value. This would get sign extended to 64-bits\nand thus corrupt the top-half of the reg-\u003etstate value.\n\nThis never caused problems in pre-Niagara cpus because the only thing\nup there were the condition code values. But Niagara has the global\nregister level field, and this all 1\u0027s value is illegal there so\nNiagara gives an illegal instruction trap due to this bug.\n\nI\u0027m pretty sure this bug is about as old as the sparc64 port itself.\n\nThis also points out that we weren\u0027t setting ASI_PNF for 32-bit tasks.\nWe should, so fix that while we\u0027re here.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d7744a09504d5ae84edc8289a02254e1f2102410", "tree": "be0f245ee0725f2f066bf87d17d254ce1e7279bf", "parents": [ "9cc3a1ac9a819cadff05ca37bb7f208013a22035" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Feb 21 22:31:11 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:56 2006 -0800" }, "message": "[SPARC64]: Create a seperate kernel TSB for 4MB/256MB mappings.\n\nIt can map all of the linear kernel mappings with zero TSB hash\nconflicts for systems with 16GB or less ram. In such cases, on\nSUN4V, once we load up this TSB the first time with all the\nmappings, we never take a linear kernel mapping TLB miss ever\nagain, the hypervisor handles them all.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6f5374c91f0dd1d92408ed44c066c32bcce5ce69", "tree": "e5d2ade79d39f043af66030c42d2410d1cd6f483", "parents": [ "1bd0cd74d102a527b2a72907698d73fad4b82cbd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 21 15:42:09 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:52 2006 -0800" }, "message": "[SPARC64]: Add sun4v_cpu_yield().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1bd0cd74d102a527b2a72907698d73fad4b82cbd", "tree": "2df2dede361dd259b6cd4b91c3ab8d5c783401ac", "parents": [ "8ca2557c48000daa8183b07d83f582a597705ebe" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 21 15:41:01 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:51 2006 -0800" }, "message": "[SPARC64]: Kill cpudata-\u003eidle_volume.\n\nSet, but never used.\n\nWe used to use this for dynamic IRQ retargetting, but that\ncode died a long time ago.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "0f15952ac8641bde1045162ffd4a7b474cc318b0", "tree": "f1837150e0e1589dda97f1780e99962bf6c905af", "parents": [ "f6c1fe529217788f095f6953c2b66bec1196ad3d" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 18 12:43:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:36 2006 -0800" }, "message": "[SPARC64]: Export a PAGE_SHARED symbol.\n\nFor drivers/media/*, noticed by Fabbione.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f6c1fe529217788f095f6953c2b66bec1196ad3d", "tree": "609476e09d7778c55775e88879ba77dd4a23f1f2", "parents": [ "8b234274418d6d79527c4ac3a72da446ca4cb35f" ], "author": { "name": "Fabio M. Di Nitto", "email": "fabbione@ubuntu.com", "time": "Sat Feb 18 00:32:31 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:35 2006 -0800" }, "message": "[SPARC64] Fix build if CONFIG_HUGETLB_PAGE is not set\n\nSigned-off-by: Fabio M. Di Nitto \u003cfabbione@ubuntu.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8b234274418d6d79527c4ac3a72da446ca4cb35f", "tree": "ab4ab14fa7f1cab7889ecc2339f0261253a5d0e1", "parents": [ "7adb37fe80d06cbd40de9b225b12a3a9ec40b6bb" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 18:01:02 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:34 2006 -0800" }, "message": "[SPARC64]: More TLB/TSB handling fixes.\n\nThe SUN4V convention with non-shared TSBs is that the context\nbit of the TAG is clear. So we have to choose an \"invalid\"\nbit and initialize new TSBs appropriately. Otherwise a zero\nTAG looks \"valid\".\n\nMake sure, for the window fixup cases, that we use the right\nglobal registers and that we don\u0027t potentially trample on\nthe live global registers in etrap/rtrap handling (%g2 and\n%g6) and that we put the missing virtual address properly\nin %g5.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "3763be32d591cacf808c36390a8af3f2784cde5f", "tree": "124ae01bf91905a6d3af931caf28acf82900699b", "parents": [ "3f19a84e39619053f117bd5bb9183c5bfea7db45" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 12:33:13 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:29 2006 -0800" }, "message": "[SPARC64]: Define ARCH_HAS_READ_CURRENT_TIMER.\n\nThis gives more consistent bogomips and delay() semantics,\nespecially on sun4v. It gives weird looking values though...\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c857e3fdbc306e95fdcaad1d8f3ea6bc8e7eea99", "tree": "6fb1cfc9b8742b56db032fcdb4294e693bb75ffa", "parents": [ "46f860471483dce9ba5ce682a69c61cbceb54e52" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 10:35:23 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:28 2006 -0800" }, "message": "[SPARC64]: __bzero_noasi --\u003e __clear_user\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "97532f598273d03cab8bb5206669b6fdd654eb63", "tree": "a2d06b6f9861bad04d1378fef104a1c2d81777df", "parents": [ "3b3ab2eb9cf07ef1bc7a676c19aab994adb41a87" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 10:14:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:26 2006 -0800" }, "message": "[SPARC64]: Add HWCAP_SPARC_BLKINIT elf capability flag for Niagara.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ebd8c56c5ae154e2c6cfb7453a76a4e7265b2377", "tree": "155df85100a1316ac103dcaed140d20ddc72c855", "parents": [ "101d5c18a928ef82b6c7bf99a9eaa536b5ccf593" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 08:38:06 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:24 2006 -0800" }, "message": "[SPARC64]: Fix uniprocessor IRQ targetting on SUN4V.\n\nWe need to use the real hardware processor ID when\ntargetting interrupts, not the \"define to 0\" thing\nthe uniprocessor build gives us.\n\nAlso, fill in the Node-ID and Agent-ID fields properly\non sun4u/Safari.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "72aff53f1fe74153eccef303ab2f79de888d248c", "tree": "a229645be99274d36bed04bed355d74ec3c0baa2", "parents": [ "19a0d585e80e84b54bb9bf120bf0c826045dd3dd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 01:29:17 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:22 2006 -0800" }, "message": "[SPARC64]: Get SUN4V SMP working.\n\nThe sibling cpu bringup is extremely fragile. We can only\nperform the most basic calls until we take over the trap\ntable from the firmware/hypervisor on the new cpu.\n\nThis means no accesses to %g4, %g5, %g6 since those can\u0027t be\nTLB translated without our trap handlers.\n\nIn order to achieve this:\n\n1) Change sun4v_init_mondo_queues() so that it can operate in\n several modes.\n\n It can allocate the queues, or install them in the current\n processor, or both.\n\n The boot cpu does both in it\u0027s call early on.\n\n Later, the boot cpu allocates the sibling cpu queue, starts\n the sibling cpu, then the sibling cpu loads them in.\n\n2) init_cur_cpu_trap() is changed to take the current_thread_info()\n as an argument instead of reading %g6 directly on the current\n cpu.\n\n3) Create a trampoline stack for the sibling cpus. We do our basic\n kernel calls using this stack, which is locked into the kernel\n image, then go to our proper thread stack after taking over the\n trap table.\n\n4) While we are in this delicate startup state, we put 0xdeadbeef\n into %g4/%g5/%g6 in order to catch accidental accesses.\n\n5) On the final prom_set_trap_table*() call, we put \u0026init_thread_union\n into %g6. This is a hack to make prom_world(0) work. All that\n wants to do is restore the %asi register using\n get_thread_current_ds().\n\nLonger term we should just do the OBP calls to set the trap table by\nhand just like we do for everything else. This would avoid that silly\nprom_world(0) issue, then we can remove the init_thread_union hack.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4ff7ac417d4b628c23df3ae8301d17e29e6e8f16", "tree": "8a0ad85722f0e927ac6c1388032481636424fb10", "parents": [ "22780e23c629303474797d17e7f09ad7721ef55b" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 16 16:22:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:18 2006 -0800" }, "message": "[SPARC64]: Add GET_GL_GLOBAL() macro for SUN4V.\n\nSo we can read the %gl register for debugging.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "94f8762db9a80ed34252e9fe5fa38be87bb7826b", "tree": "22279c62d2d4d583c64f1d2c6122f4eb98b429a6", "parents": [ "bc45e32e0fbf661d0c5c5b9c981bc0fe5da4901f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 16 14:26:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:16 2006 -0800" }, "message": "[SPARC64]: Add sun4v_cpu_qconf() hypervisor call.\n\nCall it from register_one_mondo().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bc45e32e0fbf661d0c5c5b9c981bc0fe5da4901f", "tree": "cf4a313304153b39bd155c062b934d607500f2ae", "parents": [ "8e42550c683b2ad4869fc4fa438204841fd9b7cc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Mar 05 16:46:58 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:15 2006 -0800" }, "message": "[SPARC]: Kill off these __put_user_ret things.\n\nThey are bogus and haven\u0027t been referenced in years.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "9d29a3fafd06534ad73427fee3c968c094d05b9b", "tree": "4afd7455d6249d9143acea6c4704f69aa98d311a", "parents": [ "7890f794e0e6f7dce2a5f4a03ba64b0b3fe306bd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 15 19:48:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:05 2006 -0800" }, "message": "[SPARC64]: Decode virtual-devices interrupts correctly.\n\nNeed to translate through the interrupt-map{,-mask] properties.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7890f794e0e6f7dce2a5f4a03ba64b0b3fe306bd", "tree": "a9cc7c67498616a47108c667a9c001f9fe468318", "parents": [ "63c2a0e598c2fa769a08a6e9ad124bf270b4436e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 15 02:26:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:04 2006 -0800" }, "message": "[SPARC64]: Add prom_{start,stop}cpu_cpuid().\n\nUse prom_startcpu_cpuid() on SUN4V instead of prom_startcpu().\n\nWe should really test for \"SUNW,start-cpu-by-cpuid\" presence\nand use it if present even on SUN4U.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7c3514e4501565d76f9e4dec43e1fc17389f4811", "tree": "e3f4766232189faaa98a59d53a44e424025e9561", "parents": [ "f03b8a546868fcf43feb455b69b152eb867606b2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 15 00:41:47 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:02 2006 -0800" }, "message": "[SPARC64]: Fixup TSTATE layout diagram in asm/pstate.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "50f4f23c3bd95afc82e931254a71e7b1b3699fd2", "tree": "5ed7cc71e1140a3a839c8d65ca95b755012d4bde", "parents": [ "3af6e01e9acfb786c5dd2862f57f206b0b3cb889" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 14 01:32:29 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:53 2006 -0800" }, "message": "[SPARC64]: Fix gcc-3.3.x warnings.\n\nIt doesn\u0027t like const variables being passed into\n\"i\" constraing asm operations. It\u0027s a bug, but\nthere is nothing we can really do but work around\nit.\n\nBased upon a report from Andrew Morton.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c4bea2883974a59ab7a0ac6c01d34f7ae0e8cd8e", "tree": "3d32f942cd0a62f6ca89fe7781f59708845d7a38", "parents": [ "4bf447d6f7c2357dec8bdc24ce0fcffd71cc29c0" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 22:56:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:51 2006 -0800" }, "message": "[SPARC64]: Make error codes available from sun4v_intr_get*().\n\nAnd check for errors at call sites.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5259d5bfaf5b2953b130e9a500277a905bd37823", "tree": "3768df7a92c63a2eeec0d29aadca60ce57f36de7", "parents": [ "f4266ab45a3f08bd76c2d414a2d7a1a9dc2501c0" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 21:15:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:46 2006 -0800" }, "message": "[SPARC64]: Fix comment typo in asm/hypervisor.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e77227eb4e17591a6a511b9c0ff6e8ad7350c575", "tree": "be8b7f13fd2ff0543879286b04045f6c3587dda3", "parents": [ "d5eb4004303b4dd04ec83b926b5fc2d9ceda4b2e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 20:42:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:44 2006 -0800" }, "message": "[SPARC64]: Probe virtual-devices root node on sun4v.\n\nThis is where we learn how to get the interrupts\nfor things like the hypervisor console device.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e3999574b48125c9bb0c95e3e9f1c696bf96c3e3", "tree": "a6651da06fa36c3dde33a7be5f0b7192b8442cd7", "parents": [ "10804828fd06a43ce964e9d9852332e7ff1507b1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 18:16:10 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:40 2006 -0800" }, "message": "[SPARC64]: Generic sun4v_build_irq().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6c0f402f6cc62314ef83b975f3430350dcb6055f", "tree": "394a2e981ee8fff3e6eda7aec2d20be8542ecae1", "parents": [ "85dfa19ba92f88fa1c1482f655c7247119dfdcd5" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 00:23:32 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:37 2006 -0800" }, "message": "[SPARC64]: Implement rest of generic interrupt hypervisor calls.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "85dfa19ba92f88fa1c1482f655c7247119dfdcd5", "tree": "28038115f626e5c84bb50ad9ff5eed5dc943fcde", "parents": [ "059833eb817fec3a5a7f62fba9592749c4cebc73" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 00:02:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:36 2006 -0800" }, "message": "[SPARC64]: Move devino_to_sysino out of pci_sun4v_asm.S\n\nIt is not PCI specific, it is for all system interrupts.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "cf627156c450cd5a0741b31f55181db3400d4887", "tree": "e8f44d2509f5544ee5b5d583da3e10ac99ca3629", "parents": [ "ff02e0d26f139ad95ec3a7e94f88faccaa180dff" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 12 21:10:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:32 2006 -0800" }, "message": "[SPARC64]: Use inline patching for critical PTE operations.\n\nThis handles the SUN4U vs SUN4V PTE layout differences\nwith near zero performance cost.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ff02e0d26f139ad95ec3a7e94f88faccaa180dff", "tree": "7a872c9792561c77c672ba640b80134c592d93c7", "parents": [ "221b2fb818c307e1cb47e036a1671ca554d9cd0a" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 12 17:07:51 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:31 2006 -0800" }, "message": "[SPARC64]: Move PTE field definitions back into asm/pgtable.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1a7a242c898dd131f2df005c492e9b44fb8900e0", "tree": "5f00961b9c6539951adda7bfaafda030cea39c38", "parents": [ "02fead75055246d01af56a45a9d1b311d506da3e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 23:24:30 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:28 2006 -0800" }, "message": "[SPARC64]: Recognize \"virtual-console\" as input and output console device.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c4bce90ea2069e5a87beac806de3090ab32128d5", "tree": "3983a206c8060ef65ba17945d1c9f69e68d88b3d", "parents": [ "490384e752a43aa281ed533e9de2da36df25c337" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 21:57:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:25 2006 -0800" }, "message": "[SPARC64]: Deal with PTE layout differences in SUN4V.\n\nYes, you heard it right, they changed the PTE layout for\nSUN4V. Ho hum...\n\nThis is the simple and inefficient way to support this.\nIt\u0027ll get optimized, don\u0027t worry.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "490384e752a43aa281ed533e9de2da36df25c337", "tree": "ec087a27a481b9a63aeda6703971acf4adeab19b", "parents": [ "459b6e621e0e15315c25bac47fa7113e5818d45d" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 14:41:18 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:23 2006 -0800" }, "message": "[SPARC64]: Register kernel TSB with hypervisor.\n\nWe do this right after we take over the trap table from OBP.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "459b6e621e0e15315c25bac47fa7113e5818d45d", "tree": "4bbff0ec1dafb7fba8b247c84ad708f54cc687fe", "parents": [ "fd05068d7b22b64211f9202aa67ad44b51d44242" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 12:21:20 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:23 2006 -0800" }, "message": "[SPARC64]: Fix some SUN4V TLB miss bugs.\n\nCode patching did not sign extend negative branch\noffsets correctly.\n\nKernel TLB miss path needs patching and %g4 register\npreservation in order to handle SUN4V correctly.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "02fd473bd4844befc74f7ca67cd60891e0a2d890", "tree": "4c338418dcfdd73c88d3ca8e969944be42cde60e", "parents": [ "4bdff41464c2954c6f62f849df0e73eb9fa21c65" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 02:25:21 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:18 2006 -0800" }, "message": "[SPARC64]: Add SUN4V Hypervisor Console driver.\n\nSince it can do things like BREAK and HUP, we implement\nthis as a serial uart driver.\n\nThis still needs interrupt probing code, as I haven\u0027t figured\nout how interrupts will work or be probed for on SUN4V yet.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "12eaa328f9fb2d3fcb5afb682c762690d05a3cd8", "tree": "cce4e68b971757010a3e0bbf035fc65a381a3cd4", "parents": [ "18397944642cbca7fcd4a109b43ed5b4652e95b9" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 10 15:39:51 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:15 2006 -0800" }, "message": "[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.\n\nThis is where the virtual address of the fault status\narea belongs.\n\nTo set it up we don\u0027t make a hypervisor call, instead\nwe call OBP\u0027s SUNW,set-trap-table with the real address\nof the fault status area as the second argument. And\nright before that call we write the virtual address into\nASI_SCRATCHPAD vaddr 0x0.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "dedacf623283cb24933ec9f7d5bf539f19173cd4", "tree": "e628dffa192236c89e3d646eb62c49ef1c98aab4", "parents": [ "7eae642f75e0f7fbce7c37b2dfe0641ff1e9ebfd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 22:26:34 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:13 2006 -0800" }, "message": "[SPARC64]: Add HV_PCI_TSBID() macro.\n\nFor constructing hypervisor PCI TSB IDs.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bade5622167181844cd4e60087971c1f949e149f", "tree": "0bd0144e472786f8ba5b37a2bb90204ff6bf204b", "parents": [ "8f6a93a196ba6c569c3e8daa6e81cca7e3ba81b1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 22:05:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:11 2006 -0800" }, "message": "[SPARC64]: More SUN4V PCI controller work.\n\nAdd assembler file for PCI hypervisor calls.\nSetup basic skeleton of SUN4V PCI controller driver.\n\nAdd 32-bit devhandle to PBM struct, as this is needed for\nhypervisor calls.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8f6a93a196ba6c569c3e8daa6e81cca7e3ba81b1", "tree": "80d4747608148c56fd8c67baf016ad4fc58610ea", "parents": [ "4cce4b7cc56abc3d7b269d09224b8297aad15138" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 21:32:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:10 2006 -0800" }, "message": "[SPARC64]: Beginnings of SUN4V PCI controller support.\n\nAbstract out IOMMU operations so that we can have a different\nset of calls on sun4v, which needs to do things through\nhypervisor calls.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5fe91cf6254c8f23d90efb5fc11fff57dd5ab8dd", "tree": "3a5d3ec9a752a7996f8e9060710fee322f2d5214", "parents": [ "ed6b0b45437dcf7ef1c48b3be413bebcc84771d8" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 20:45:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:08 2006 -0800" }, "message": "[SPARC]: Clean up idprom header files.\n\nDelete unused macros, and use fixed sized types in\nsparc32 header.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "618e9ed98aed924a1fc664eb6522db4a5e927043", "tree": "08ace6185b8f9709cb22a23d329def1dae622666", "parents": [ "aa9143b9719c07fb6f1f6207790c9c5086ae07e7" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 17:21:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:06 2006 -0800" }, "message": "[SPARC64]: Hypervisor TSB context switching.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "aa9143b9719c07fb6f1f6207790c9c5086ae07e7", "tree": "74d56ecc53ed0542f200d6c6257c8f051095111c", "parents": [ "12816ab38adddc9d7e9b3315d1739655dedc7c9f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 16:12:22 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:05 2006 -0800" }, "message": "[SPARC64]: Implement sun4v TSB miss handlers.\n\nWhen we register a TSB with the hypervisor, so that it or hardware can\nhandle TLB misses and do the TSB walk for us, the hypervisor traps\ndown to these trap when it incurs a TSB miss.\n\nProcessing is simple, we load the missing virtual address and context,\nand do a full page table walk.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d82ace7dc4073b090a55b9740700e32b9a9ae302", "tree": "d5aa8e10664b05bbfe31eacf95e2066c03cab102", "parents": [ "1d2f1f90a1e004b0c1b8a73ed4394a93f09104b3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 02:52:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:03 2006 -0800" }, "message": "[SPARC64]: Detect sun4v early in boot process.\n\nWe look for \"SUNW,sun4v\" in the \u0027compatible\u0027 property\nof the root OBP device tree node.\n\nProtect every %ver register access, to make sure it is\nnot touched on sun4v, as %ver is hyperprivileged there.\n\nLock kernel TLB entries using hypervisor calls instead of\ncalls into OBP.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1d2f1f90a1e004b0c1b8a73ed4394a93f09104b3", "tree": "2fcc0840b52218631020311d7b6d785e9a15db6a", "parents": [ "5b0c0572fcd6204675c5f7ddfa572b5017f817dd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 08 16:41:20 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:02 2006 -0800" }, "message": "[SPARC64]: Sun4v cross-call sending support.\n\nTechnically the hypervisor call supports sending in a list\nof all cpus to get the cross-call, but I only pass in one\ncpu at a time for now.\n\nThe multi-cpu support is there, just ifdef\u0027d out so it\u0027s easy to\nenable or delete it later.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5b0c0572fcd6204675c5f7ddfa572b5017f817dd", "tree": "1075a61338e887bd6d4ecd4517646ef95dc09fbc", "parents": [ "ac29c11d4cd4fa1fac968e99998a956405732f2f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 08 02:53:50 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:01 2006 -0800" }, "message": "[SPARC64]: Sun4v interrupt handling.\n\nSun4v has 4 interrupt queues: cpu, device, resumable errors,\nand non-resumable errors. A set of head/tail offset pointers\nhelp maintain a work queue in physical memory. The entries\nare 64-bytes in size.\n\nEach queue is allocated then registered with the hypervisor\nas we bring cpus up.\n\nThe two error queues each get a kernel side buffer that we\nuse to quickly empty the main interrupt queue before we\ncall up to C code to log the event and possibly take evasive\naction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7202c55c5c57d2ad4611a751544c9368d7fba93a", "tree": "282219004791550b35f7de50d449d96f396be8f6", "parents": [ "3bfd6f3e77f58479ec53aa91d0b078abbb4c0868" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 22:53:56 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:58 2006 -0800" }, "message": "[SPARC64]: Add sun4v mondo queue bases to struct trap_per_cpu.\n\nAlso, correct TRAP_PER_CPU_FAULT_INFO define, it should be\n0x40 not 0x20.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "3bfd6f3e77f58479ec53aa91d0b078abbb4c0868", "tree": "1ec49afc137feed4e70b1be7728920165e90b838", "parents": [ "8b11bd12aff76e02cdc2cbc9e439bba88d281223" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 22:49:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:57 2006 -0800" }, "message": "[SPARC64]: Fix some comment typos in asm/hypervisor.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8b11bd12aff76e02cdc2cbc9e439bba88d281223", "tree": "903ab8830616bfbe5a821e4359f642842c8060a4", "parents": [ "481295f982b21b1dbe71cbf41d3a93028fee30d1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 22:13:05 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:56 2006 -0800" }, "message": "[SPARC64]: Patch up mmu context register writes for sun4v.\n\nsun4v uses ASI_MMU instead of ASI_DMMU\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "481295f982b21b1dbe71cbf41d3a93028fee30d1", "tree": "5b1af84a7f83021698bcf138c8875d7290e65282", "parents": [ "89a5264f065672a882f555228000614a6b2182b7" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 21:51:08 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:55 2006 -0800" }, "message": "[SPARC64]: Register per-cpu fault status area with sun4v hypervisor.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "89a5264f065672a882f555228000614a6b2182b7", "tree": "4fa226fed4b8119096e50ff8c915d2c0f8d6cd6d", "parents": [ "8591e3027235d6d11b958e43379f2ee7b7114841" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 21:15:41 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:55 2006 -0800" }, "message": "[SPARC64]: asm/cpudata.h needs asm/asi.h\n\nFor the expansion of __GET_CPUID() on SMP.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "df7d6aec96ab98cb182dd5138a85bdc363a9bf0d", "tree": "d71808a328639a32b16c53b24ce8a6b641f43ad2", "parents": [ "d257d5da39a78b32721ca84b2ba7f461f2f7ed7f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 00:00:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:53 2006 -0800" }, "message": "[SPARC64]: Rename gl_{1,2}insn_patch --\u003e sun4v_{1,2}insn_patch\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d257d5da39a78b32721ca84b2ba7f461f2f7ed7f", "tree": "ac28d377688ebe13a4d38e05f4ff65ba73d8652a", "parents": [ "840aaef8db32572b6d11e0d5cb5e6efcbc812000" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 06 23:44:37 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:52 2006 -0800" }, "message": "[SPARC64]: Initial sun4v TLB miss handling infrastructure.\n\nThings are a little tricky because, unlike sun4u, we have\nto:\n\n1) do a hypervisor trap to do the TLB load.\n2) do the TSB lookup calculations by hand\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "45fec05f805a113372c9a7ff4c653ac749f6921c", "tree": "36fc99d10656775acb8e9442719447d64ac30a03", "parents": [ "314981ac7177a933319e3c071a5cf0a579205e6e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 05 22:27:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:50 2006 -0800" }, "message": "[SPARC64]: Sanitize %pstate writes for sun4v.\n\nIf we\u0027re just switching between different alternate global\nsets, nop it out on sun4v. Also, get rid of all of the\nalternate global save/restore in the OBP CIF trampoline code.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "314981ac7177a933319e3c071a5cf0a579205e6e", "tree": "11895da391ba91195d6d7a67debaa32a28c1215e", "parents": [ "936f482af1743141d637483ec10eb881537c26dc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 05 21:59:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:49 2006 -0800" }, "message": "[SPARC64]: Kill all %pstate changes in context switch code.\n\nThey are totally unnecessary because:\n\n1) Interrupts are already disabled when switch_to()\n runs.\n\n2) We don\u0027t use hard-coded alternate globals any longer.\n\nThis found a case in rtrap, which still assumed alternate\nglobal %g6 was current_thread_info(), and that is fixed\nby this changeset as well.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "936f482af1743141d637483ec10eb881537c26dc", "tree": "913da89a4d9f4038c510c9ecf2f5957b0f6d167f", "parents": [ "6e02493a7f33ac89e698b980a657d77ab2749eaf" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 05 21:29:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:48 2006 -0800" }, "message": "[SPARC64]: Add initial code to twiddle %gl on trap entry/exit.\n\nInstead of setting/clearing PSTATE_AG we have to change\nthe %gl register value on sun4v.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d619d7f11670f5b1cfca30e6645e44c8a6014820", "tree": "cad4f39ece5f59f2a16327a13e25863d2f466f14", "parents": [ "d96b81533ba3d5775e45aee6986b2aa33c10801c" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 04 23:59:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:46 2006 -0800" }, "message": "[SPARC64]: Add define for \"GL\" field of sun4v %tstate register.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d96b81533ba3d5775e45aee6986b2aa33c10801c", "tree": "334af39452d650cc14b389c58a30cc54e9e130dd", "parents": [ "e1c21c4f476f2270c98aad1fe55e5f33e25f77f5" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 04 15:40:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:45 2006 -0800" }, "message": "[SPARC64]: Add sun4v case to __GET_CPUID() patch tables.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e1c21c4f476f2270c98aad1fe55e5f33e25f77f5", "tree": "830ae146cd0cf807d949b09641ec8e82c6ed8149", "parents": [ "277b6dd9600613b01f66cadef2f0065514fecf69" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:12:14 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:44 2006 -0800" }, "message": "[SPARC64]: Sun4v interrupt queue register definitions.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "277b6dd9600613b01f66cadef2f0065514fecf69", "tree": "f9e9f42f05b3204fe17778a999fecd9fa63b1e7e", "parents": [ "d398ee230f94a8ba386d8abb63f4fea129e4eaba" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:12:02 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:44 2006 -0800" }, "message": "[SPARC64]: Sun4v scratchpad register layout.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d398ee230f94a8ba386d8abb63f4fea129e4eaba", "tree": "bcad4a48333ddbdd04f890d7136c0e3efb829cec", "parents": [ "398d10830843bda7798f71052b54a5341a8ddd53" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:11:50 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:43 2006 -0800" }, "message": "[SPARC64]: Sun4v specific ASI defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "30ddbdb03339fc62480ddbff800a44066bb14455", "tree": "6d064ae396014418601acd8fc678463750f2bffa", "parents": [ "a43fe0e789f5445f5224511034f410adf11f153b" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:11:17 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:41 2006 -0800" }, "message": "[SPARC64]: Add Niagara init-store twin-load ASI defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1633a53c79498455b16d051451f4e3f83ab4e7dd", "tree": "3f28700c60a0464879833a6d76875f387388e20c", "parents": [ "52bf082f0a6e49e08ed99d4d9518c662dc735c7a" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:09:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:39 2006 -0800" }, "message": "[SPARC64]: Add \u0027hypervisor\u0027 to ultra_tlb_type enumeration.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "766f861fbbd968a1850295ed6dec4504b4500dcc", "tree": "76729285f448b58c812469b1bddf64f92e9f8d6e", "parents": [ "314ef6859750b6539eac48d78059bb7986f29cb1" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:01:45 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:37 2006 -0800" }, "message": "[SPARC64]: SUN4V hypervisor interface defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "314ef6859750b6539eac48d78059bb7986f29cb1", "tree": "26c7da386349c1cf377225356e1012ae62da6f07", "parents": [ "ffe483d55229fadbaf4cc7316d47024a24ecd1a2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 04 00:10:01 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:36 2006 -0800" }, "message": "[SPARC64]: Refine register window trap handling.\n\nWhen saving and restoing trap state, do the window spill/fill\nhandling inline so that we never trap deeper than 2 trap levels.\nThis is important for chips like Niagara.\n\nThe window fixup code is massively simplified, and many more\nimprovements are now possible.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ffe483d55229fadbaf4cc7316d47024a24ecd1a2", "tree": "70bdb6c94d5b3512a7b2a3ff06979ac2e4e869bf", "parents": [ "92704a1c63c3b481870d02636d0b5a70c7e21cd1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 02 21:55:10 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:35 2006 -0800" }, "message": "[SPARC64]: Add explicit register args to trap state loading macros.\n\nThis, as well as making the code cleaner, allows a simplification in\nthe TSB miss handling path.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "92704a1c63c3b481870d02636d0b5a70c7e21cd1", "tree": "098f96da6ab50a1d878425e2b91a9cf22f78ac80", "parents": [ "f4e841da30b4bcbb8f1cc20a01157a788ff58b21" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 26 23:27:19 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:35 2006 -0800" }, "message": "[SPARC64]: Refine code sequences to get the cpu id.\n\nOn uniprocessor, it\u0027s always zero for optimize that.\n\nOn SMP, the jmpl to the stub kills the return address stack in the cpu\nbranch prediction logic, so expand the code sequence inline and use a\ncode patching section to fix things up. This also always better and\nexplicit register selection, which will be taken advantage of in a\nfuture changeset.\n\nThe hard_smp_processor_id() function is big, so do not inline it.\n\nFix up tests for Jalapeno to also test for Serrano chips too. These\ntests want \"jbus Ultra-IIIi\" cases to match, so that is what we should\ntest for.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7bec08e38a7d0f088994f6eec9b6374652ea71fb", "tree": "df0c24e8417d08aff3d3de7d9dc7b13c4e05931b", "parents": [ "517af33237ecfc3c8a93b335365fa61e741ceca4" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Feb 02 01:20:18 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:33 2006 -0800" }, "message": "[SPARC64]: Correctable ECC errors cannot occur at trap level \u003e 0.\n\nThe are distrupting, which by the sparc v9 definition means they\ncan only occur when interrupts are enabled in the %pstate register.\nThis never occurs in any of the trap handling code running at\ntrap levels \u003e 0.\n\nSo just mark it as an unexpected trap.\n\nThis allows us to kill off the cee_stuff member of struct thread_info.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "517af33237ecfc3c8a93b335365fa61e741ceca4", "tree": "58eff40eb4c517c4fd49fd347d38273ee1e1ee4b", "parents": [ "b0fd4e49aea8a460afab7bc67cd618e2d19291d4" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 01 15:55:21 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:32 2006 -0800" }, "message": "[SPARC64]: Access TSB with physical addresses when possible.\n\nThis way we don\u0027t need to lock the TSB into the TLB.\nThe trick is that every TSB load/store is registered into\na special instruction patch section. The default uses\nvirtual addresses, and the patch instructions use physical\naddress load/stores.\n\nWe can\u0027t do this on all chips because only cheetah+ and later\nhave the physical variant of the atomic quad load.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b0fd4e49aea8a460afab7bc67cd618e2d19291d4", "tree": "a596c793cbc918bdcea462bcfe2f2f41fe8afeb2", "parents": [ "30a6ecad9670d97c9d0fbfa7d80970aeb339bdec" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Jan 31 23:13:29 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:31 2006 -0800" }, "message": "[SPARC64]: Kill out-of-date commentary in asm-sparc64/tsb.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "86b818687d4894063ecd1190e54717a0cce8c009", "tree": "d2951295358502c88f7fe0c02517d729cff4eb9a", "parents": [ "9954863975910a1b9372b7d5006a6cba43bdd288" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:34:51 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:29 2006 -0800" }, "message": "[SPARC64]: Fix race in LOAD_PER_CPU_BASE()\n\nSince we use %g5 itself as a temporary, it can get clobbered\nif we take an interrupt mid-stream and thus cause end up with\nthe final %g5 value too early as a result of rtrap processing.\n\nSet %g5 at the very end, atomically, to avoid this problem.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2f7ee7c63f08b7f883b710a29d91c1891b81b8e1", "tree": "c0539482cecfd3cbc0b983a23058315811dc8b55", "parents": [ "a8b900d801697609d1b56cc9c110148c64678068" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:33:49 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:26 2006 -0800" }, "message": "[SPARC64]: Increase swapper_tsb size to 32K.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a8b900d801697609d1b56cc9c110148c64678068", "tree": "47602480aba29d17f8a79cc76dfe8af4d62f2599", "parents": [ "3487d1d4414fbfab5d98ec559e6f84f55520cb15" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:33:37 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:25 2006 -0800" }, "message": "[SPARC64]: Kill sole argument passed to setup_tba().\n\nNo longer used, and move extern declaration to a header file.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4753eb2ac7022b999e5e484f1a5dc001dba22bd3", "tree": "138321ebd3b3c3aeb99517ec5158a65f556da774", "parents": [ "96c6e0d8e2a0eb1338751598be47fa1ffed91704" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:32:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:21 2006 -0800" }, "message": "[SPARC64]: Fix incorrect TSB lock bit handling.\n\nThe TSB_LOCK_BIT define is actually a special\nvalue shifted down by 32-bits for the assembler\ncode macros.\n\nIn C code, this isn\u0027t what we want.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b70c0fa1613c4f69b4a340a0e2bee387560ebbb1", "tree": "f7bf22ab75cb9118f5772353fef6efd923faa212", "parents": [ "bd40791e1d289d807b8580abe1f117e9c62894e4" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:32:04 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:19 2006 -0800" }, "message": "[SPARC64]: Preload TSB entries from update_mmu_cache().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bd40791e1d289d807b8580abe1f117e9c62894e4", "tree": "2b47e24c8dc0e668dfd7ba0e3879165180c49c65", "parents": [ "98c5584cfc47932c4f3ccf5eee2e0bae1447b85e" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:31:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:18 2006 -0800" }, "message": "[SPARC64]: Dynamically grow TSB in response to RSS growth.\n\nAs the RSS grows, grow the TSB in order to reduce the likelyhood\nof hash collisions and thus poor hit rates in the TSB.\n\nThis definitely needs some serious tuning.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "98c5584cfc47932c4f3ccf5eee2e0bae1447b85e", "tree": "c067ac8bfc081bbe0b3073374cb15708458e04ab", "parents": [ "09f94287f7260e03bbeab497e743691fafcc22c3" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:31:20 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:17 2006 -0800" }, "message": "[SPARC64]: Add infrastructure for dynamic TSB sizing.\n\nThis also cleans up tsb_context_switch(). The assembler\nroutine is now __tsb_context_switch() and the former is\nan inline function that picks out the bits from the mm_struct\nand passes it into the assembler code as arguments.\n\nsetup_tsb_parms() computes the locked TLB entry to map the\nTSB. Later when we support using the physical address quad\nload instructions of Cheetah+ and later, we\u0027ll simply use\nthe physical address for the TSB register value and set\nthe map virtual and PTE both to zero.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "09f94287f7260e03bbeab497e743691fafcc22c3", "tree": "ebdb365a7cfe25a1587a930d852f2eaa0e1e773a", "parents": [ "56fb4df6da76c35dca22036174e2d1edef83ff1f" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:31:06 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:16 2006 -0800" }, "message": "[SPARC64]: TSB refinements.\n\nMove {init_new,destroy}_context() out of line.\n\nDo not put huge pages into the TSB, only base page size translations.\nThere are some clever things we could do here, but for now let\u0027s be\ncorrect instead of fancy.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "56fb4df6da76c35dca22036174e2d1edef83ff1f", "tree": "b39f152ec9ed682edceca965a85680fd4bf736a7", "parents": [ "3c936465249f863f322154ff1aaa628b84ee5750" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 26 23:24:22 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:16 2006 -0800" }, "message": "[SPARC64]: Elminate all usage of hard-coded trap globals.\n\nUltraSPARC has special sets of global registers which are switched to\nfor certain trap types. There is one set for MMU related traps, one\nset of Interrupt Vector processing, and another set (called the\nAlternate globals) for all other trap types.\n\nFor what seems like forever we\u0027ve hard coded the values in some of\nthese trap registers. Some examples include:\n\n1) Interrupt Vector global %g6 holds current processors interrupt\n work struct where received interrupts are managed for IRQ handler\n dispatch.\n\n2) MMU global %g7 holds the base of the page tables of the currently\n active address space.\n\n3) Alternate global %g6 held the current_thread_info() value.\n\nSuch hardcoding has resulted in some serious issues in many areas.\nThere are some code sequences where having another register available\nwould help clean up the implementation. Taking traps such as\ncross-calls from the OBP firmware requires some trick code sequences\nwherein we have to save away and restore all of the special sets of\nglobal registers when we enter/exit OBP.\n\nWe were also using the IMMU TSB register on SMP to hold the per-cpu\narea base address, which doesn\u0027t work any longer now that we actually\nuse the TSB facility of the cpu.\n\nThe implementation is pretty straight forward. One tricky bit is\ngetting the current processor ID as that is different on different cpu\nvariants. We use a stub with a fancy calling convention which we\npatch at boot time. The calling convention is that the stub is\nbranched to and the (PC - 4) to return to is in register %g1. The cpu\nnumber is left in %g6. This stub can be invoked by using the\n__GET_CPUID macro.\n\nWe use an array of per-cpu trap state to store the current thread and\nphysical address of the current address space\u0027s page tables. The\nTRAP_LOAD_THREAD_REG loads %g6 with the current thread from this\ntable, it uses __GET_CPUID and also clobbers %g1.\n\nTRAP_LOAD_IRQ_WORK is used by the interrupt vector processing to load\nthe current processor\u0027s IRQ software state into %g6. It also uses\n__GET_CPUID and clobbers %g1.\n\nFinally, TRAP_LOAD_PGD_PHYS loads the physical address base of the\ncurrent address space\u0027s page tables into %g7, it clobbers %g1 and uses\n__GET_CPUID.\n\nMany refinements are possible, as well as some tuning, with this stuff\nin place.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "3c936465249f863f322154ff1aaa628b84ee5750", "tree": "2bd7a229236f197d20a655133370e5d0c1bf886c", "parents": [ "05e28f9de65a38bb0c769080e91b6976e7e1e70c" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:30:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:14 2006 -0800" }, "message": "[SPARC64]: Kill pgtable quicklists and use SLAB.\n\nTaking a nod from the powerpc port.\n\nWith the per-cpu caching of both the page allocator and SLAB, the\npgtable quicklist scheme becomes relatively silly and primitive.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "05e28f9de65a38bb0c769080e91b6976e7e1e70c", "tree": "e1d3fcc1381ea6612ce4c082ca8596e84b637216", "parents": [ "74bf4312fff083ab25c3f357cc653ada7995e5f6" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:30:13 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:13 2006 -0800" }, "message": "[SPARC64]: No need to D-cache color page tables any longer.\n\nUnlike the virtual page tables, the new TSB scheme does not\nrequire this ugly hack.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "74bf4312fff083ab25c3f357cc653ada7995e5f6", "tree": "c23dea461e32485f4cd7ca4b8c33c632655eb906", "parents": [ "30d4d1ffed7098afe2641536d67eef150499da02" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 31 18:29:18 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:13 2006 -0800" }, "message": "[SPARC64]: Move away from virtual page tables, part 1.\n\nWe now use the TSB hardware assist features of the UltraSPARC\nMMUs.\n\nSMP is currently knowingly broken, we need to find another place\nto store the per-cpu base pointers. We hid them away in the TSB\nbase register, and that obviously will not work any more :-)\n\nAnother known broken case is non-8KB base page size.\n\nAlso noticed that flush_tlb_all() is not referenced anywhere, only\nthe internal __flush_tlb_all() (local cpu only) is used by the\nsparc64 port, so we can get rid of flush_tlb_all().\n\nThe kernel gets it\u0027s own 8KB TSB (swapper_tsb) and each address space\ngets it\u0027s own private 8K TSB. Later we can add code to dynamically\nincrease the size of per-process TSB as the RSS grows. An 8KB TSB is\ngood enough for up to about a 4MB RSS, after which the TSB starts to\nincur many capacity and conflict misses.\n\nWe even accumulate OBP translations into the kernel TSB.\n\nAnother area for refinement is large page size support. We could use\na secondary address space TSB to handle those.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" } ], "next": "4657190936883adb819f81957e33439d447c0035" }