)]}'
{
  "log": [
    {
      "commit": "8e1a6dd2fddcc73c9e933758361e3d9c076c688a",
      "tree": "30d6c0cdc7f21d1357917517351a1c259f3eba4b",
      "parents": [
        "48b415ca13bac91f83db3b9d362fd5ae0ce275cb"
      ],
      "author": {
        "name": "Chris Zankel",
        "email": "czankel@tensilica.com",
        "time": "Thu Jun 23 22:01:10 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Fri Jun 24 00:05:21 2005 -0700"
      },
      "message": "[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 1\n\nThe attached patches provides part 1 of an architecture implementation for the\nTensilica Xtensa CPU series.\n\nSigned-off-by: Chris Zankel \u003cchris@zankel.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    }
  ]
}