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review.evervolv.com / android_kernel_htc_msm8960 / 989a7241df87526bfef0396567e71ebe53a84ae4 / arch / sh / kernel / cpu / init.c
  1. cd01204 sh: Encode L1/L2 cache shape in auxvt. by Paul Mundt · 18 years ago
  2. cbaa118 sh: Preparation for uncached jumps through PMB. by Stuart Menefy · 18 years ago
  3. 27a511c sh: Disable initial cache flush on SH-5. by Paul Mundt · 18 years ago
  4. c881cbc sh: Don't reference UBC code in CPU init on sh64. by Paul Mundt · 18 years ago
  5. aba1030 sh: Bring SMP support back from the dead. by Paul Mundt · 19 years ago
  6. e7bd34a sh: Support explicit L1 cache disabling. by Paul Mundt · 19 years ago
  7. 357d594 sh: Tidy up dependencies for SH-2 build. by Paul Mundt · 19 years ago
  8. 45ed285 sh: speculative execution support for SH7780. by Paul Mundt · 19 years ago
  9. ffe1b4e sh: Fix SH-3 cache entry_mask and way_size calculation. by Paul Mundt · 19 years ago
  10. 11c1965 sh: Fixup cpu_data references for the non-boot CPUs. by Paul Mundt · 19 years ago
  11. aec5e0e sh: Use a per-cpu ASID cache. by Paul Mundt · 19 years ago
  12. 9d4436a sh: Add support for SH7206 and SH7619 CPU subtypes. by Yoshinori Sato · 19 years ago
  13. f3c2575 sh: Calculate shm alignment at runtime. by Paul Mundt · 20 years ago
  14. b638d0b sh: Optimized cache handling for SH-4/SH-4A caches. by Richard Curnow · 20 years ago
  15. 9b41046 [PATCH] Don't pass boot parameters to argv_init[] by OGAWA Hirofumi · 20 years ago
  16. 1da177e Linux-2.6.12-rc2 by Linus Torvalds · 21 years ago