)]}' { "log": [ { "commit": "9176c0b1f5a9099cebc07458042ae6a7c75af7b2", "tree": "80dedb71f8cd01f8b1fa37612fdf57a6f5caeb06", "parents": [ "101fd46a753f8931a05d252bf5564c9415a5f8d7" ], "author": { "name": "Jens Osterkamp", "email": "jens@de.ibm.com", "time": "Thu Feb 28 11:26:21 2008 +0100" }, "committer": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Mon Mar 03 08:03:14 2008 +0100" }, "message": "[POWERPC] move celleb DABRX definitions\n\nThis moves the private DABRX definitions for celleb from beat.h to\nreg.h to make them usable for all.\n\nSigned-off-by: Jens Osterkamp \u003cjens@de.ibm.com\u003e\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "39aef685af431c032ffd2763ec8782b13c32520c", "tree": "2e6c8761ec9d62521418f6b0b2cf05f8e269407d", "parents": [ "0367aad1ad5f8085ed15e9e30604f50108a1ea06" ], "author": { "name": "Andy Fleming", "email": "afleming@freescale.com", "time": "Mon Feb 04 18:27:55 2008 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Feb 05 23:34:14 2008 -0600" }, "message": "[POWERPC] Made FSL Book-E PMC support more generic\n\nSome of the more recent e300 cores have the same performance monitor\nimplementation as the e500. e300 isn\u0027t book-e, so the name isn\u0027t\nreally appropriate. In preparation for e300 support, rename a bunch\nof fsl_booke things to say fsl_emb (Freescale Embedded Performance Monitors).\n\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "cda563fb9ca2c26ff720110b25e96205b71d3bae", "tree": "31af3cb25b1447b6b4c4addb4760453d71920664", "parents": [ "496b010e1e70a9b4286fa34f19523f24a194f119" ], "author": { "name": "Geoff Levand", "email": "geoffrey.levand@am.sony.com", "time": "Sat Jan 19 07:29:47 2008 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Jan 25 22:52:51 2008 +1100" }, "message": "[POWERPC] Add definition of Cell bookmark SPR\n\nAdd a definition for the Cell bookmark SPR to asm-powerpc/regs.h.\n\nSigned-off-by: Geoff Levand \u003cgeoffrey.levand@am.sony.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "584f8b71a2e8abdaeb4b6f4fddaf542b61392453", "tree": "c14f26334e3a3524046f0790f96564a4a4f22d92", "parents": [ "44ef339073f67d4abcc62ae52a5fbc069d7a4d29" ], "author": { "name": "Michael Neuling", "email": "mikey@neuling.org", "time": "Thu Dec 06 17:24:48 2007 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Dec 11 13:45:56 2007 +1100" }, "message": "[POWERPC] Use SLB size from the device tree\n\nCurrently we hardwire the number of SLBs to 64, but PAPR says we\nshould use the ibm,slb-size property to obtain the number of SLB\nentries. This uses this property instead of assuming 64. If no\nproperty is found, we assume 64 entries as before.\n\nThis soft patches the SLB handler, so it shouldn\u0027t change performance\nat all.\n\nSigned-off-by: Michael Neuling \u003cmikey@neuling.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "e6b6e3ffb9ee8926f9f2f7dc9147df73e27d5828", "tree": "ecda5a24187801c1ad46e0d9d90a9fc5f547a52b", "parents": [ "8237bf080e9ef6adc3f2adce26060722685bbb15" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Mon Aug 27 23:29:53 2007 +0200" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Sep 17 15:15:04 2007 +1000" }, "message": "[POWERPC] Remove APUS support from arch/ppc\n\nCurrent status of APUS:\n- arch/powerpc/: removed in 2.6.23\n- arch/ppc/: marked BROKEN since 2 years\n\nThis therefore removes the remaining parts of APUS support from\narch/ppc, include/asm-ppc, arch/powerpc and include/asm-powerpc.\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "2e1957fd47b9d4b7bf35be2ec3d4b5e3eefe5cc0", "tree": "7ed199444a5e6dec86afbb91a8f2031c272221d8", "parents": [ "4d442331e57b7bbc28b5a20f7d069bc12e9c503e" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Sep 05 12:09:06 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Sep 14 01:33:21 2007 +1000" }, "message": "[POWERPC] pasemi: Export more SPRs to sysfs when CONFIG_DEBUG_KERNEL\u003dy\n\nExport some of the implementation-specific registers via sysfs.\nUseful when debugging, etc.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "078f194045f892a10f4a5406e7cb06a7f8d42c57", "tree": "c81b15e94d451cddf43c71657a86adf2e8773a11", "parents": [ "f5e6a280d153bff3b0cd15651d29d409f8dea698" ], "author": { "name": "will schmidt", "email": "will_schmidt@vnet.ibm.com", "time": "Wed Jun 27 02:12:33 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Jul 10 21:55:48 2007 +1000" }, "message": "[POWERPC] Oprofile enhanced instruction sampling support\n\nOprofile enhanced instruction sampling support.\n\nWhen performing instruction sampling, the mmcra[SLOT] field can be used to\nmore accurately identify the address of the sampled instruction.\n\nTested on power4, js20, power5 and power5+.\n\nSigned-off-by: Will Schmidt \u003cwill_schmidt@vnet.ibm.com\u003e\ncc: Maynard Johnson \u003cmaynardj@us.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "25fc530eed1ca9ccde2a1e96d0b2060867f76bb2", "tree": "e8f8705562939146413b79f50963acca5f64fab5", "parents": [ "7e8bddf56661a16b7d5945390a37cd2e9c5e45fe" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Apr 18 16:38:21 2007 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Apr 24 21:31:51 2007 +1000" }, "message": "[POWERPC] pasemi: PA6T oprofile support\n\nOprofile support for PA6T, kernel side.\n\nAlso rename the PA6T_SPRN.* defines to SPRN_PA6T.*.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "c388cfebbf22acd2b6adf757b35e28d4be66ac7c", "tree": "dc367aa9c8dd94dddefad9062bf43ac16dcd1ea6", "parents": [ "f620be99e9355c41693f0c748ba9260f69278ee0" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Sun Feb 04 16:36:53 2007 -0600" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Feb 07 14:03:22 2007 +1100" }, "message": "[POWERPC] pasemi: SMP timebase sync\n\nTimebase update is simple on PA6T, since global updates can be done from\none core by writing to an SPR.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "1199919b69ff9559a3d3444fb5eb45b7cc48264d", "tree": "40313402be457e274e777b385703b25fa359f9b2", "parents": [ "bfed9d32d968b2054a036d419537e9e9909bb343" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Sun Feb 04 16:36:51 2007 -0600" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Feb 07 14:03:22 2007 +1100" }, "message": "[POWERPC] pasemi: Idle loops\n\nPowersave support on PA6T. Right now it only uses \u0027doze\u0027 mode, and\nwill default to no savings (spin).\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "6529c13dfe413e437ad1ed0e97783dcf69137114", "tree": "4042f247433dd413a196764d6b3b74f05568d8e3", "parents": [ "7583b6e424ebaa278342f6a8c2a61211af56dad1" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Sun Jan 28 21:25:57 2007 -0600" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Feb 07 14:03:19 2007 +1100" }, "message": "[POWERPC] PA6T PMC support\n\nSupport for PA6T-style PMC registers.\n\nPMCs are completely implementation-dependent on PPC, and PA6T numbers them\ndifferently from the IBM model.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "f050982a9b7c4edc414f0d5543c3cb24504223c6", "tree": "250bc2206aacc6cdabfcd4e0ada3c8ae30ca39c2", "parents": [ "4c198557c6b45956a6f54b958fb97a15b02a6a3b" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Fri Dec 08 17:51:13 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Dec 09 11:39:06 2006 +1100" }, "message": "[POWERPC] Add SPURR SPR to sysfs\n\nNow we have a SPURR cpu feature bit, we can export it to userspace in\nsysfs.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "4c198557c6b45956a6f54b958fb97a15b02a6a3b", "tree": "91db4a694f01f4e4d29bcd7f3bc90c3ef311aebf", "parents": [ "396a1a5832ae28ce2c4150f98827873cbef554f5" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Fri Dec 08 17:46:58 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Sat Dec 09 11:39:05 2006 +1100" }, "message": "[POWERPC] Add DSCR SPR to sysfs\n\nPOWER6 adds a new SPR, the data stream control register (DSCR). It can\nbe used to adjust how agressive the prefetch mechanisms are.\n\nIts possible we may want to context switch this, but for now just export\nit to userspace via sysfs so we can adjust it.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "859deea949c382d9ccb6397fe33df3703ecef45d", "tree": "b0fe2d7a814143f3ff61a73a0727522a1a3dd6e4", "parents": [ "21c4ff80cba5e24932f3ef79c8482c0491630b2b" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Oct 20 14:37:05 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 25 11:54:18 2006 +1000" }, "message": "[POWERPC] Cell timebase bug workaround\n\nThe Cell CPU timebase has an erratum. When reading the entire 64 bits\nof the timebase with one mftb instruction, there is a handful of cycles\nwindow during which one might read a value with the low order 32 bits\nalready reset to 0x00000000 but the high order bits not yet incremeted\nby one. This fixes it by reading the timebase again until the low order\n32 bits is no longer 0. That might introduce occasional latencies if\nhitting mftb just at the wrong time, but no more than 70ns on a cell\nblade, and that was considered acceptable.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "362ff7b2ac0234152b4a334dd006b77f4fa2ab23", "tree": "4b9d3c03c119b0216ff04b744c8901823e61d10b", "parents": [ "7f8c4c50bda13d27afc03679d25aa1fcac8df551" ], "author": { "name": "Jake Moilanen", "email": "moilanen@austin.ibm.com", "time": "Wed Oct 18 10:47:22 2006 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Oct 23 18:23:17 2006 +1000" }, "message": "[POWERPC] Add 970GX cputable entry\n\n970GX cputable entry from Steve Winiecki.\n\nSigned-off-by: Jake Moilanen \u003cmoilanen@austin.ibm.com\u003e\n\n arch/powerpc/kernel/cputable.c | 15 +++++++++++++++\n arch/powerpc/oprofile/op_model_power4.c | 2 +-\n include/asm-powerpc/reg.h | 1 +\n 3 files changed, 17 insertions(+), 1 deletion(-)\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "52aed7cd52ce8a1d576e26976c3950512e1af8b6", "tree": "05fdd0726f44fc24ce67b2f7a0612b315365e9cb", "parents": [ "3afbf5d6ef791be61d18329ae5302bbf1cd83723" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Fri Oct 06 02:54:07 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Oct 06 21:10:41 2006 +1000" }, "message": "[POWERPC] Update MTFSF_L() comment\n\nDavid Woodhouse points out that the comment accompanying the MTFSF_L\nmacro is misleading. We should make it clear that the L bit is ignored\non older CPUS, not the entire instruction.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "b3ebd1d862d6c23caa58e40d341eefc426f835e1", "tree": "c4db512b520833be44b72b97aab0c439138bfb5e", "parents": [ "0024300000769eadcb4a4fcdff531d45ee7735d4" ], "author": { "name": "Olof Johansson", "email": "olof@lixom.net", "time": "Wed Sep 06 14:35:57 2006 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Sep 13 18:39:52 2006 +1000" }, "message": "[POWERPC] powerpc: PA6T cputable entry, PVR value\n\nIntroduce PWRficient PA6T cputable entries and feature bits.\n\nSigned-off-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "acf7d76827a577059636e949079021e6af6dd702", "tree": "283e94488c79e75dd3df9a376e1e8a27a69e26ec", "parents": [ "ef82a306b46dbedaecbb154b24d05dfab937df35" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Mon Jun 19 20:33:16 2006 +0200" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Jun 21 15:01:29 2006 +1000" }, "message": "[POWERPC] cell: add RAS support\n\nThis is a first version of support for the Cell BE \"Reliability,\nAvailability and Serviceability\" features.\n\nIt doesn\u0027t yet handle some of the RAS interrupts (the ones described in\niic_is/iic_irr), I\u0027m still working on a proper way to expose these. They\nare essentially a cascaded controller by themselves (sic !) though I may\njust handle them locally to the iic driver. I need also to sync with\nDavid Erb on the way he hooked in the performance monitor interrupt.\n\nSo that\u0027s all for 2.6.17 and I\u0027ll do more work on that with my rework of\nthe powerpc interrupt layer that I\u0027m hacking on at the moment.\n\nSigned-off-by: Arnd Bergmann \u003carnd.bergmann@de.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "9e6e3c2c796f1e0ef335804d5c87073e365dea50", "tree": "0d749f2b5f2c9eb67f9084c88ef10151199cc4ff", "parents": [ "df310656c7552ae7b8252e4b3d8e300cff164b16" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Sat Jun 10 23:14:51 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Jun 15 19:31:26 2006 +1000" }, "message": "[POWERPC] Fix HV bit handling on non partitioned machines\n\nOn non partitioned machines we currently set the HV bit in kernel space\nonly. It turns out we are supposed to maintain the HV bit in both user\nand kernel space.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1", "tree": "afcd54f2ad36353abcf2282fdf15a05e77fcba4a", "parents": [ "30d8caf7c625203b295a78f143820cdc3124830b" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Sat Jun 10 20:18:39 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Jun 15 19:31:25 2006 +1000" }, "message": "[POWERPC] 64bit FPSCR support\n\nForthcoming machines will extend the FPSCR to 64 bits. We already\nhad a 64-bit save area for the FPSCR, but we need to use a new form\nof the mtfsf instruction. Fortunately this new form is decoded as\nan ordinary mtfsf by existing 64-bit processors.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "e78dbc800c37f035d476c4fdebdf43cdecfcb731", "tree": "3b5ff1242c284e0c77e755b62d7e8600aafceb25", "parents": [ "8eb6c6e3b9c8bfed3d75536ab142d7694627c2e5" ], "author": { "name": "Michael Neuling", "email": "mikey@neuling.org", "time": "Thu Jun 08 14:42:34 2006 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Jun 09 21:24:05 2006 +1000" }, "message": "[PATCH] powerpc: oprofile support for POWER6\n\nPOWER6 moves some of the MMCRA bits and also requires some bits to be\ncleared each PMU interrupt.\n\nSigned-off-by: Michael Neuling \u003cmikey@neuling.org\u003e\nAcked-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "d6b89a196dfb03fdfbe3d574ab6773fe14a1d2c6", "tree": "e2434d227933e425af867f37ed822fafcd76ef80", "parents": [ "485a2d54dbc7cf939bd0c22daad74e2cf6f001d7" ], "author": { "name": "Michael Neuling", "email": "mikey@neuling.org", "time": "Tue May 09 11:33:38 2006 -0500" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri May 19 14:35:25 2006 +1000" }, "message": "[PATCH] powerpc: whitespace cleanup in reg.h\n\nIn reg.h we mostly have #define\u003cspace\u003e but there are a few #define\u003ctab\u003e\naround. Clean these up so we use space exclusively.\n\nSigned-off-by: Michael Neuling \u003cmikey@neuling.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "a0652fc9a28c3ef8cd59264bfcb089c44d1b0e06", "tree": "a28527b65237b3067553a993f5ad06dfb24df044", "parents": [ "55aab8cd3a498201b769a19de861c77516bdfd45" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Mar 27 15:03:03 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Mar 27 15:03:03 2006 +1100" }, "message": "powerpc: Unify the 32 and 64 bit idle loops\n\nThis unifies the 32-bit (ARCH\u003dppc and ARCH\u003dpowerpc) and 64-bit idle\nloops. It brings over the concept of having a ppc_md.power_save\nfunction from 32-bit to ARCH\u003dpowerpc, which lets us get rid of\nnative_idle(). With this we will also be able to simplify the idle\nhandling for pSeries and cell.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "cb2c9b2741346eb23b177187a51ff5abf08295bd", "tree": "31433b46f96a00e22ca7e8402fd0bfe1fea3408d", "parents": [ "47f78a49206b7f9b0d283ba46a2a5a6ee1796472" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Mon Feb 13 14:48:35 2006 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Feb 24 11:36:31 2006 +1100" }, "message": "[PATCH] powerpc: Fix runlatch performance issues\n\nThe runlatch SPR can take a lot of time to write. My original runlatch\ncode would set it on every exception entry even though most of the time\nthis was not required. It would also continually set it in the idle\nloop, which is an issue on an SMT capable processor.\n\nNow we cache the runlatch value in a threadinfo bit, and only check for\nit in decrementer and hardware interrupt exceptions as well as the idle\nloop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "c902be71dc6d5e8473bd021feafc8c3608e2b82a", "tree": "527b15800ed84edd16a5d53d165275a48cea1915", "parents": [ "017e0fad3e40ece983527ec88a92b3da8fcdecea" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Wed Jan 04 19:55:53 2006 +0000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Jan 09 15:44:32 2006 +1100" }, "message": "[PATCH] cell: enable pause(0) in cpu_idle\n\nThis patch enables support for pause(0) power management state\nfor the Cell Broadband Processor, which is import for power efficient\noperation. The pervasive infrastructure will in the future enable\nus to introduce more functionality specific to the Cell\u0027s\npervasive unit.\n\nFrom: Maximino Aguilar \u003cmaguilar@us.ibm.com\u003e\nSigned-off-by: Arnd Bergmann \u003carndb@de.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "555d97ac87aef08bb55dff6f05e68fe2987d6f6d", "tree": "7016485d112af04b972dcc749e437a7131424252", "parents": [ "e5cd040409dc0f8d34a21827d6b74918b3a4fccf" ], "author": { "name": "Andy Fleming", "email": "afleming@freescale.com", "time": "Thu Dec 15 20:02:04 2005 -0600" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Jan 09 15:06:03 2006 +1100" }, "message": "[PATCH] powerpc: G4+ oprofile support\n\nThis patch adds oprofile support for the 7450 and all its multitudinous\nderivatives.\n\n* Added 7450 (and derivatives) support for oprofile\n* Changed e500 cputable to have oprofile model and cpu_type fields\n* Added support for classic 32-bit performance monitor interrupt\n* Cleaned up common powerpc oprofile code to be as common as possible\n* Cleaned up oprofile_impl.h to reflect 32 bit classic code\n* Added 32-bit MMCRx bitfield definitions and SPR numbers\n\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "799d6046d3fb557006e6d7c9767fdb96479b0e0a", "tree": "fff321e3c0c0e6d1192f453aab23ad204f350851", "parents": [ "3ddfbcf19b15ccd25a0b4b2dc2e38000e08de739" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Nov 10 13:37:51 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Nov 10 13:37:51 2005 +1100" }, "message": "[PATCH] powerpc: merge code values for identifying platforms\n\nThis patch merges platform codes. systemcfg-\u003eplatform is no longer used,\nsystemcfg use in general is deprecated as much as possible (and renamed\n_systemcfg before it gets completely moved elsewhere in a future patch),\n_machine is now used on ppc64 along as ppc32. Platform codes aren\u0027t gone\nyet but we are getting a step closer. A bunch of asm code in head[_64].S\nis also turned into C code.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "26ef5c09576496dfd08d2b36ec1d08a6f917a0eb", "tree": "6a0bc875966eb00dc04dc2fdf7deeac96262698b", "parents": [ "e130bedb7ce718a8eb6b56a3806b96281f618111" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Thu Nov 10 11:50:16 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Thu Nov 10 13:09:22 2005 +1100" }, "message": "[PATCH] powerpc: Merge cacheflush.h and cache.h\n\nThe ppc32 and ppc64 versions of cacheflush.h were almost identical.\nThe two versions of cache.h are fairly similar, except for a bunch of\nregister definitions in the ppc32 version which probably belong better\nelsewhere. This patch, therefore, merges both headers. Notable\npoints:\n\t- there are several functions in cacheflush.h which exist only\non ppc32 or only on ppc64. These are handled by #ifdef for now, but\nthese should probably be consolidated, along with the actual code\nbehind them later.\n\t- Confusingly, both ppc32 and ppc64 have a\nflush_dcache_range(), but they\u0027re subtly different: it uses dcbf on\nppc32 and dcbst on ppc64, ppc64 has a flush_inval_dcache_range() which\nuses dcbf. These too should be merged and consolidated later.\n\t- Also flush_dcache_range() was defined in cacheflush.h on\nppc64, and in cache.h on ppc32. In the merged version it\u0027s in\ncacheflush.h\n\t- On ppc32 flush_icache_range() is a normal function from\nmisc.S. On ppc64, it was wrapper, testing a feature bit before\ncalling __flush_icache_range() which does the actual flush. This\npatch takes the ppc64 approach, which amounts to no change on ppc32,\nsince CPU_FTR_COHERENT_ICACHE will never be set there, but does mean\nrenaming flush_icache_range() to __flush_icache_range() in\narch/ppc/kernel/misc.S and arch/powerpc/kernel/misc_32.S\n\t- The PReP register info from asm-ppc/cache.h has moved to\narch/ppc/platforms/prep_setup.c\n\t- The 8xx register info from asm-ppc/cache.h has moved to a\nnew asm-powerpc/reg_8xx.h, included from reg.h\n\t- flush_dcache_all() was defined on ppc32 (only), but was\nnever called (although it was exported). Thus this patch removes it\nfrom cacheflush.h and from ARCH\u003dpowerpc (misc_32.S) entirely. It\u0027s\nleft in ARCH\u003dppc for now, with the prototype moved to ppc_ksyms.c.\n\nBuilt for Walnut (ARCH\u003dppc), 32-bit multiplatform (pmac, CHRP and PReP\nARCH\u003dppc, pmac and CHRP ARCH\u003dpowerpc). Built and booted on POWER5\nLPAR (ARCH\u003dpowerpc and ARCH\u003dppc64).\n\nBuilt for 32-bit powermac (ARCH\u003dppc and ARCH\u003dpowerpc). Built and\nbooted on POWER5 LPAR (ARCH\u003dpowerpc and ARCH\u003dppc64). Built and booted\non G5 (ARCH\u003dpowerpc)\n\nSigned-off-by: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "4350147a816b9c5b40fa59e4fa23f17490630b79", "tree": "c333986047de60aa90809d669895726610c0c3e5", "parents": [ "a82765b6eee3d1267ded3320ca67b39fe1844599" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Mon Nov 07 14:27:33 2005 +1100" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Nov 08 11:17:34 2005 +1100" }, "message": "[PATCH] ppc64: SMU based macs cpufreq support\n\nCPU freq support using 970FX powertune facility for iMac G5 and SMU\nbased single CPU desktop.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "f78541dcec327b0c46b150ee7d727f3db80275c4", "tree": "9336801742d93ffa0c84c76e2b3cdc5b50c7125b", "parents": [ "c032524f0ddea5fcc3a2cece0d4a61f37e5ca9cd" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Oct 28 22:53:37 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Oct 28 22:53:37 2005 +1000" }, "message": "powerpc: Merge xmon\n\nThe merged version follows the ppc64 version pretty closely mostly,\nand in fact ARCH\u003dppc64 now uses the arch/powerpc/xmon version.\nThe main difference for ppc64 is that the \u0027p\u0027 command to call\nshow_state (which was always pretty dodgy) has been replaced by\nthe ppc32 \u0027p\u0027 command, which calls a given procedure (so in fact\nthe old \u0027p\u0027 command behaviour can be achieved with \u0027p $show_state\u0027).\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "c032524f0ddea5fcc3a2cece0d4a61f37e5ca9cd", "tree": "c4ece990e6083cfedc640a06f908bfe33fd344bd", "parents": [ "d73e0c99f5c45e7b86d38725a4ff49f6746f5353" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Oct 28 22:48:08 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Fri Oct 28 22:48:08 2005 +1000" }, "message": "powerpc: Make single-stepping emulation (mostly) usable on 32-bit\n\nThe sc instruction emulation can\u0027t be done the same way on 32-bit\nas 64-bit yet, but this should work OK.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "a6f3546ecd00a1566cee6e0d992f4c33c2d28287", "tree": "e77f204d13dc153672b90a850006fbcac1c7677e", "parents": [ "6d7f58b04d824843f7539a132e1ad8220bbe589a" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Mon Oct 24 15:07:26 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Wed Oct 26 16:00:09 2005 +1000" }, "message": "[PATCH] powerpc: Remove duplicate definition of set_tb()\n\nSomewhere along the line we got two definitions of set_tb(). They look to\nbe identical although they\u0027re not textually identical. So remove the #ifdef\nCONFIG_PPC64 version, leaving the common version in time.h.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "fd582ec88eb8d2d907876603e4ecebe6eab330d9", "tree": "bafacc1916098001051b8235722daa6b9b52e63a", "parents": [ "35d81a4bfe28a6ea81c9f67c9ce40543124ded0b" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Oct 11 22:08:12 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Oct 11 22:08:12 2005 +1000" }, "message": "ppc: Various minor compile fixes\n\nThis fixes up a variety of minor problems in compiling with ARCH\u003dppc\narising from using the merged versions of various header files.\nA lot of the changes are just adding #include \u003casm/machdep.h\u003e to\nfiles that use ppc_md or smp_ops_t.\n\nThis also arranges for us to use semaphore.c, vecemu.c, vector.S and\nfpu.S from arch/powerpc/kernel when compiling with ARCH\u003dppc.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "9f04b9e327c495f8ddbf89c08da6cbe626e1b1b3", "tree": "381e9786b837085bd555c705542047f54cd2beab", "parents": [ "b60fc8bbd2d0ea2a9b1fc7271d521fcf47f27bfd" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Oct 10 14:19:43 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Oct 10 14:19:43 2005 +1000" }, "message": "powerpc: Merged processor.h.\n\nThis adds register definitions from the ppc64 processor.h to reg.h,\nand makes a single merged processor.h. I moved __is_processor from\nthe ppc64 system.h to the merged reg.h along with the PVR register\nconstants.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" }, { "commit": "bbeb3f4c55f666df7bcd2655b303dfb8c4d1a119", "tree": "30180a33fb5bb9a5c633e93d533b7f4ffc800e2e", "parents": [ "51a0885ed7f883758462926b35fbd6f09f9c717c" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Tue Sep 27 13:51:59 2005 +1000" }, "committer": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Tue Sep 27 13:51:59 2005 +1000" }, "message": "powerpc: clean up after powermac build merge\n\nComplete moving arch/ppc64/kernel/mpic.h,\n include/asm-ppc/reg.h, include/asm-ppc64/kdebug.h\n\t and include/asm-ppc64/kprobes.h\nAdd arch/powerpc/platforms/Makefile and use it from\n\tarch/powerpc/Makefile\nIntroduce OLDARCH temporarily so we can point back to\n\tthe originating architecture\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\n" }, { "commit": "14cf11af6cf608eb8c23e989ddb17a715ddce109", "tree": "271a97ce73e265f39c569cb159c195c5b4bb3f8c", "parents": [ "e5baa396af7560382d2cf3f0871d616b61fc284c" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Sep 26 16:04:21 2005 +1000" }, "committer": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Mon Sep 26 16:04:21 2005 +1000" }, "message": "powerpc: Merge enough to start building in arch/powerpc.\n\nThis creates the directory structure under arch/powerpc and a bunch\nof Kconfig files. It does a first-cut merge of arch/powerpc/mm,\narch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough\nto build a 32-bit powermac kernel with ARCH\u003dpowerpc.\n\nFor now we are getting some unmerged files from arch/ppc/kernel and\narch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes\nto files in those directories and files outside arch/powerpc.\n\nThe boot directory is still not merged. That\u0027s going to be interesting.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n" } ] }