)]}'
{
  "log": [
    {
      "commit": "aa04b4cc5be64b4fb9ef4e0fdf2418e2f4737fb2",
      "tree": "97a3ff14e43424e28a27e0f3be088649818c1b76",
      "parents": [
        "371fefd6f2dc46668e00871930dde613b88d4bde"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:25:44 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:57 2011 +0300"
      },
      "message": "KVM: PPC: Allocate RMAs (Real Mode Areas) at boot for use by guests\n\nThis adds infrastructure which will be needed to allow book3s_hv KVM to\nrun on older POWER processors, including PPC970, which don\u0027t support\nthe Virtual Real Mode Area (VRMA) facility, but only the Real Mode\nOffset (RMO) facility.  These processors require a physically\ncontiguous, aligned area of memory for each guest.  When the guest does\nan access in real mode (MMU off), the address is compared against a\nlimit value, and if it is lower, the address is ORed with an offset\nvalue (from the Real Mode Offset Register (RMOR)) and the result becomes\nthe real address for the access.  The size of the RMA has to be one of\na set of supported values, which usually includes 64MB, 128MB, 256MB\nand some larger powers of 2.\n\nSince we are unlikely to be able to allocate 64MB or more of physically\ncontiguous memory after the kernel has been running for a while, we\nallocate a pool of RMAs at boot time using the bootmem allocator.  The\nsize and number of the RMAs can be set using the kvm_rma_size\u003dxx and\nkvm_rma_count\u003dxx kernel command line options.\n\nKVM exports a new capability, KVM_CAP_PPC_RMA, to signal the availability\nof the pool of preallocated RMAs.  The capability value is 1 if the\nprocessor can use an RMA but doesn\u0027t require one (because it supports\nthe VRMA facility), or 2 if the processor requires an RMA for each guest.\n\nThis adds a new ioctl, KVM_ALLOCATE_RMA, which allocates an RMA from the\npool and returns a file descriptor which can be used to map the RMA.  It\nalso returns the size of the RMA in the argument structure.\n\nHaving an RMA means we will get multiple KMV_SET_USER_MEMORY_REGION\nioctl calls from userspace.  To cope with this, we now preallocate the\nkvm-\u003earch.ram_pginfo array when the VM is created with a size sufficient\nfor up to 64GB of guest memory.  Subsequently we will get rid of this\narray and use memory associated with each memslot instead.\n\nThis moves most of the code that translates the user addresses into\nhost pfns (page frame numbers) out of kvmppc_prepare_vrma up one level\nto kvmppc_core_prepare_memory_region.  Also, instead of having to look\nup the VMA for each page in order to check the page size, we now check\nthat the pages we get are compound pages of 16MB.  However, if we are\nadding memory that is mapped to an RMA, we don\u0027t bother with calling\nget_user_pages_fast and instead just offset from the base pfn for the\nRMA.\n\nTypically the RMA gets added after vcpus are created, which makes it\ninconvenient to have the LPCR (logical partition control register) value\nin the vcpu-\u003earch struct, since the LPCR controls whether the processor\nuses RMA or VRMA for the guest.  This moves the LPCR value into the\nkvm-\u003earch struct and arranges for the MER (mediated external request)\nbit, which is the only bit that varies between vcpus, to be set in\nassembly code when going into the guest if there is a pending external\ninterrupt request.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "371fefd6f2dc46668e00871930dde613b88d4bde",
      "tree": "35fe799343861405914d27873eb175eb04d6dce5",
      "parents": [
        "54738c097163c3f01e67ccc85462b78d4d4f495f"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:23:08 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:57 2011 +0300"
      },
      "message": "KVM: PPC: Allow book3s_hv guests to use SMT processor modes\n\nThis lifts the restriction that book3s_hv guests can only run one\nhardware thread per core, and allows them to use up to 4 threads\nper core on POWER7.  The host still has to run single-threaded.\n\nThis capability is advertised to qemu through a new KVM_CAP_PPC_SMT\ncapability.  The return value of the ioctl querying this capability\nis the number of vcpus per virtual CPU core (vcore), currently 4.\n\nTo use this, the host kernel should be booted with all threads\nactive, and then all the secondary threads should be offlined.\nThis will put the secondary threads into nap mode.  KVM will then\nwake them from nap mode and use them for running guest code (while\nthey are still offline).  To wake the secondary threads, we send\nthem an IPI using a new xics_wake_cpu() function, implemented in\narch/powerpc/sysdev/xics/icp-native.c.  In other words, at this stage\nwe assume that the platform has a XICS interrupt controller and\nwe are using icp-native.c to drive it.  Since the woken thread will\nneed to acknowledge and clear the IPI, we also export the base\nphysical address of the XICS registers using kvmppc_set_xics_phys()\nfor use in the low-level KVM book3s code.\n\nWhen a vcpu is created, it is assigned to a virtual CPU core.\nThe vcore number is obtained by dividing the vcpu number by the\nnumber of threads per core in the host.  This number is exported\nto userspace via the KVM_CAP_PPC_SMT capability.  If qemu wishes\nto run the guest in single-threaded mode, it should make all vcpu\nnumbers be multiples of the number of threads per core.\n\nWe distinguish three states of a vcpu: runnable (i.e., ready to execute\nthe guest), blocked (that is, idle), and busy in host.  We currently\nimplement a policy that the vcore can run only when all its threads\nare runnable or blocked.  This way, if a vcpu needs to execute elsewhere\nin the kernel or in qemu, it can do so without being starved of CPU\nby the other vcpus.\n\nWhen a vcore starts to run, it executes in the context of one of the\nvcpu threads.  The other vcpu threads all go to sleep and stay asleep\nuntil something happens requiring the vcpu thread to return to qemu,\nor to wake up to run the vcore (this can happen when another vcpu\nthread goes from busy in host state to blocked).\n\nIt can happen that a vcpu goes from blocked to runnable state (e.g.\nbecause of an interrupt), and the vcore it belongs to is already\nrunning.  In that case it can start to run immediately as long as\nthe none of the vcpus in the vcore have started to exit the guest.\nWe send the next free thread in the vcore an IPI to get it to start\nto execute the guest.  It synchronizes with the other threads via\nthe vcore-\u003eentry_exit_count field to make sure that it doesn\u0027t go\ninto the guest if the other vcpus are exiting by the time that it\nis ready to actually enter the guest.\n\nNote that there is no fixed relationship between the hardware thread\nnumber and the vcpu number.  Hardware threads are assigned to vcpus\nas they become runnable, so we will always use the lower-numbered\nhardware threads in preference to higher-numbered threads if not all\nthe vcpus in the vcore are runnable, regardless of which vcpus are\nrunnable.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "54738c097163c3f01e67ccc85462b78d4d4f495f",
      "tree": "cba8d389d50251856cbe967c16ba2193a30d6d12",
      "parents": [
        "a8606e20e41a8149456bafdf76ad29d47672027c"
      ],
      "author": {
        "name": "David Gibson",
        "email": "dwg@au1.ibm.com",
        "time": "Wed Jun 29 00:22:41 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:56 2011 +0300"
      },
      "message": "KVM: PPC: Accelerate H_PUT_TCE by implementing it in real mode\n\nThis improves I/O performance for guests using the PAPR\nparavirtualization interface by making the H_PUT_TCE hcall faster, by\nimplementing it in real mode.  H_PUT_TCE is used for updating virtual\nIOMMU tables, and is used both for virtual I/O and for real I/O in the\nPAPR interface.\n\nSince this moves the IOMMU tables into the kernel, we define a new\nKVM_CREATE_SPAPR_TCE ioctl to allow qemu to create the tables.  The\nioctl returns a file descriptor which can be used to mmap the newly\ncreated table.  The qemu driver models use them in the same way as\nuserspace managed tables, but they can be updated directly by the\nguest with a real-mode H_PUT_TCE implementation, reducing the number\nof host/guest context switches during guest IO.\n\nThere are certain circumstances where it is useful for userland qemu\nto write to the TCE table even if the kernel H_PUT_TCE path is used\nmost of the time.  Specifically, allowing this will avoid awkwardness\nwhen we need to reset the table.  More importantly, we will in the\nfuture need to write the table in order to restore its state after a\ncheckpoint resume or migration.\n\nSigned-off-by: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "a8606e20e41a8149456bafdf76ad29d47672027c",
      "tree": "b50699b3e41fa234b32b01cf5b79ba7bc2ff1f14",
      "parents": [
        "de56a948b9182fbcf92cb8212f114de096c2d574"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:22:05 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:55 2011 +0300"
      },
      "message": "KVM: PPC: Handle some PAPR hcalls in the kernel\n\nThis adds the infrastructure for handling PAPR hcalls in the kernel,\neither early in the guest exit path while we are still in real mode,\nor later once the MMU has been turned back on and we are in the full\nkernel context.  The advantage of handling hcalls in real mode if\npossible is that we avoid two partition switches -- and this will\nbecome more important when we support SMT4 guests, since a partition\nswitch means we have to pull all of the threads in the core out of\nthe guest.  The disadvantage is that we can only access the kernel\nlinear mapping, not anything vmalloced or ioremapped, since the MMU\nis off.\n\nThis also adds code to handle the following hcalls in real mode:\n\nH_ENTER       Add an HPTE to the hashed page table\nH_REMOVE      Remove an HPTE from the hashed page table\nH_READ        Read HPTEs from the hashed page table\nH_PROTECT     Change the protection bits in an HPTE\nH_BULK_REMOVE Remove up to 4 HPTEs from the hashed page table\nH_SET_DABR    Set the data address breakpoint register\n\nPlus code to handle the following hcalls in the kernel:\n\nH_CEDE        Idle the vcpu until an interrupt or H_PROD hcall arrives\nH_PROD        Wake up a ceded vcpu\nH_REGISTER_VPA Register a virtual processor area (VPA)\n\nThe code that runs in real mode has to be in the base kernel, not in\nthe module, if KVM is compiled as a module.  The real-mode code can\nonly access the kernel linear mapping, not vmalloc or ioremap space.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "de56a948b9182fbcf92cb8212f114de096c2d574",
      "tree": "633ab73672aa2543b683686fc8fb023629c5f8f8",
      "parents": [
        "3c42bf8a717cb636e0ed2ed77194669e2ac3ed56"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:21:34 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:54 2011 +0300"
      },
      "message": "KVM: PPC: Add support for Book3S processors in hypervisor mode\n\nThis adds support for KVM running on 64-bit Book 3S processors,\nspecifically POWER7, in hypervisor mode.  Using hypervisor mode means\nthat the guest can use the processor\u0027s supervisor mode.  That means\nthat the guest can execute privileged instructions and access privileged\nregisters itself without trapping to the host.  This gives excellent\nperformance, but does mean that KVM cannot emulate a processor\narchitecture other than the one that the hardware implements.\n\nThis code assumes that the guest is running paravirtualized using the\nPAPR (Power Architecture Platform Requirements) interface, which is the\ninterface that IBM\u0027s PowerVM hypervisor uses.  That means that existing\nLinux distributions that run on IBM pSeries machines will also run\nunder KVM without modification.  In order to communicate the PAPR\nhypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code\nto include/linux/kvm.h.\n\nCurrently the choice between book3s_hv support and book3s_pr support\n(i.e. the existing code, which runs the guest in user mode) has to be\nmade at kernel configuration time, so a given kernel binary can only\ndo one or the other.\n\nThis new book3s_hv code doesn\u0027t support MMIO emulation at present.\nSince we are running paravirtualized guests, this isn\u0027t a serious\nrestriction.\n\nWith the guest running in supervisor mode, most exceptions go straight\nto the guest.  We will never get data or instruction storage or segment\ninterrupts, alignment interrupts, decrementer interrupts, program\ninterrupts, single-step interrupts, etc., coming to the hypervisor from\nthe guest.  Therefore this introduces a new KVMTEST_NONHV macro for the\nexception entry path so that we don\u0027t have to do the KVM test on entry\nto those exception handlers.\n\nWe do however get hypervisor decrementer, hypervisor data storage,\nhypervisor instruction storage, and hypervisor emulation assist\ninterrupts, so we have to handle those.\n\nIn hypervisor mode, real-mode accesses can access all of RAM, not just\na limited amount.  Therefore we put all the guest state in the vcpu.arch\nand use the shadow_vcpu in the PACA only for temporary scratch space.\nWe allocate the vcpu with kzalloc rather than vzalloc, and we don\u0027t use\nanything in the kvmppc_vcpu_book3s struct, so we don\u0027t allocate it.\nWe don\u0027t have a shared page with the guest, but we still need a\nkvm_vcpu_arch_shared struct to store the values of various registers,\nso we include one in the vcpu_arch struct.\n\nThe POWER7 processor has a restriction that all threads in a core have\nto be in the same partition.  MMU-on kernel code counts as a partition\n(partition 0), so we have to do a partition switch on every entry to and\nexit from the guest.  At present we require the host and guest to run\nin single-thread mode because of this hardware restriction.\n\nThis code allocates a hashed page table for the guest and initializes\nit with HPTEs for the guest\u0027s Virtual Real Memory Area (VRMA).  We\nrequire that the guest memory is allocated using 16MB huge pages, in\norder to simplify the low-level memory management.  This also means that\nwe can get away without tracking paging activity in the host for now,\nsince huge pages can\u0027t be paged or swapped.\n\nThis also adds a few new exports needed by the book3s_hv code.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "3c42bf8a717cb636e0ed2ed77194669e2ac3ed56",
      "tree": "4f543088e6a64ce7f1a771c1618668ff27752ecc",
      "parents": [
        "923c53caea446d246949c94703be83e68f251af7"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:20:58 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:53 2011 +0300"
      },
      "message": "KVM: PPC: Split host-state fields out of kvmppc_book3s_shadow_vcpu\n\nThere are several fields in struct kvmppc_book3s_shadow_vcpu that\ntemporarily store bits of host state while a guest is running,\nrather than anything relating to the particular guest or vcpu.\nThis splits them out into a new kvmppc_host_state structure and\nmodifies the definitions in asm-offsets.c to suit.\n\nOn 32-bit, we have a kvmppc_host_state structure inside the\nkvmppc_book3s_shadow_vcpu since the assembly code needs to be able\nto get to them both with one pointer.  On 64-bit they are separate\nfields in the PACA.  This means that on 64-bit we don\u0027t need to\ncopy the kvmppc_host_state in and out on vcpu load/unload, and\nin future will mean that the book3s_hv code doesn\u0027t need a\nshadow_vcpu struct in the PACA at all.  That does mean that we\nhave to be careful not to rely on any values persisting in the\nhstate field of the paca across any point where we could block\nor get preempted.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "923c53caea446d246949c94703be83e68f251af7",
      "tree": "ab9c8b76e630cb94a41951369e6ffc354d0b91c3",
      "parents": [
        "df6909e5d52f67be01862c5cb453e509aee661f1"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:20:24 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:52 2011 +0300"
      },
      "message": "powerpc: Set up LPCR for running guest partitions\n\nIn hypervisor mode, the LPCR controls several aspects of guest\npartitions, including virtual partition memory mode, and also controls\nwhether the hypervisor decrementer interrupts are enabled.  This sets\nup LPCR at boot time so that guest partitions will use a virtual real\nmemory area (VRMA) composed of 16MB large pages, and hypervisor\ndecrementer interrupts are disabled.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "df6909e5d52f67be01862c5cb453e509aee661f1",
      "tree": "aab39c039a693e5381f922df4125aa7b72be681c",
      "parents": [
        "f9e0554deca54a42fb2cf7f68c05a4a37461c205"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:19:50 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:51 2011 +0300"
      },
      "message": "KVM: PPC: Move guest enter/exit down into subarch-specific code\n\nInstead of doing the kvm_guest_enter/exit() and local_irq_dis/enable()\ncalls in powerpc.c, this moves them down into the subarch-specific\nbook3s_pr.c and booke.c.  This eliminates an extra local_irq_enable()\ncall in book3s_pr.c, and will be needed for when we do SMT4 guest\nsupport in the book3s hypervisor mode code.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "f9e0554deca54a42fb2cf7f68c05a4a37461c205",
      "tree": "e81771fec16fe3d4466e51f902ccf8ccd3e85c14",
      "parents": [
        "3cf658b605393d793ea52416c2306b86fbde9d9a"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:19:22 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:50 2011 +0300"
      },
      "message": "KVM: PPC: Pass init/destroy vm and prepare/commit memory region ops down\n\nThis arranges for the top-level arch/powerpc/kvm/powerpc.c file to\npass down some of the calls it gets to the lower-level subarchitecture\nspecific code.  The lower-level implementations (in booke.c and book3s.c)\nare no-ops.  The coming book3s_hv.c will need this.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "3cf658b605393d793ea52416c2306b86fbde9d9a",
      "tree": "ea852deef56e782ca62b9736323b7fa8ce833e1a",
      "parents": [
        "b01c8b54a1a271c0fc4243845927fe1d250767a3"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:18:52 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:49 2011 +0300"
      },
      "message": "KVM: PPC: Deliver program interrupts right away instead of queueing them\n\nDoing so means that we don\u0027t have to save the flags anywhere and gets\nrid of the last reference to to_book3s(vcpu) in arch/powerpc/kvm/book3s.c.\n\nDoing so is OK because a program interrupt won\u0027t be generated at the\nsame time as any other synchronous interrupt.  If a program interrupt\nand an asynchronous interrupt (external or decrementer) are generated\nat the same time, the program interrupt will be delivered, which is\ncorrect because it has a higher priority, and then the asynchronous\ninterrupt will be masked.\n\nWe don\u0027t ever generate system reset or machine check interrupts to the\nguest, but if we did, then we would need to make sure they got delivered\nrather than the program interrupt.  The current code would be wrong in\nthis situation anyway since it would deliver the program interrupt as\nwell as the reset/machine check interrupt.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "b01c8b54a1a271c0fc4243845927fe1d250767a3",
      "tree": "4e818a41d602aa07cbdc06eca9372b9b95c533a4",
      "parents": [
        "f05ed4d56e9cff1c46d2b3049ba0c72e7e29392f"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:18:26 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:48 2011 +0300"
      },
      "message": "powerpc, KVM: Rework KVM checks in first-level interrupt handlers\n\nInstead of branching out-of-line with the DO_KVM macro to check if we\nare in a KVM guest at the time of an interrupt, this moves the KVM\ncheck inline in the first-level interrupt handlers.  This speeds up\nthe non-KVM case and makes sure that none of the interrupt handlers\nare missing the check.\n\nBecause the first-level interrupt handlers are now larger, some things\nhad to be move out of line in exceptions-64s.S.\n\nThis all necessitated some minor changes to the interrupt entry code\nin KVM.  This also streamlines the book3s_32 KVM test.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "f05ed4d56e9cff1c46d2b3049ba0c72e7e29392f",
      "tree": "1e31d94a782229cf363779645247de49b0d7a76d",
      "parents": [
        "c4befc58a0cc5a8cc5b4a7234d67b6b16dec4e70"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:17:58 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:47 2011 +0300"
      },
      "message": "KVM: PPC: Split out code from book3s.c into book3s_pr.c\n\nIn preparation for adding code to enable KVM to use hypervisor mode\non 64-bit Book 3S processors, this splits book3s.c into two files,\nbook3s.c and book3s_pr.c, where book3s_pr.c contains the code that is\nspecific to running the guest in problem state (user mode) and book3s.c\ncontains code which should apply to all Book 3S processors.\n\nIn doing this, we abstract some details, namely the interrupt offset,\nupdating the interrupt pending flag, and detecting if the guest is\nin a critical section.  These are all things that will be different\nwhen we use hypervisor mode.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "c4befc58a0cc5a8cc5b4a7234d67b6b16dec4e70",
      "tree": "3f2fbc510d7bb613fd5362acd8f0c16809f7a8af",
      "parents": [
        "149dbdb1859be46a063a5b1b0aa99a5f999b7632"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:17:33 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:46 2011 +0300"
      },
      "message": "KVM: PPC: Move fields between struct kvm_vcpu_arch and kvmppc_vcpu_book3s\n\nThis moves the slb field, which represents the state of the emulated\nSLB, from the kvmppc_vcpu_book3s struct to the kvm_vcpu_arch, and the\nhpte_hash_[v]pte[_long] fields from kvm_vcpu_arch to kvmppc_vcpu_book3s.\nThis is in accord with the principle that the kvm_vcpu_arch struct\nrepresents the state of the emulated CPU, and the kvmppc_vcpu_book3s\nstruct holds the auxiliary data structures used in the emulation.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "149dbdb1859be46a063a5b1b0aa99a5f999b7632",
      "tree": "2629bd148e3e0a5a64ddb7c4bc070debade48c69",
      "parents": [
        "3c8c652ae4c984a950d0672597085db866509914"
      ],
      "author": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Wed Jun 29 00:16:42 2011 +0000"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:45 2011 +0300"
      },
      "message": "KVM: PPC: Fix machine checks on 32-bit Book3S\n\nCommit 69acc0d3ba (\"KVM: PPC: Resolve real-mode handlers through\nfunction exports\") resulted in vcpu-\u003earch.trampoline_lowmem and\nvcpu-\u003earch.trampoline_enter ending up with kernel virtual addresses\nrather than physical addresses.  This is OK on 64-bit Book3S machines,\nwhich ignore the top 4 bits of the effective address in real mode,\nbut on 32-bit Book3S machines, accessing these addresses in real mode\ncauses machine check interrupts, as the hardware uses the whole\neffective address as the physical address in real mode.\n\nThis fixes the problem by using __pa() to convert these addresses\nto physical addresses.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "3c8c652ae4c984a950d0672597085db866509914",
      "tree": "fd7e197f05c178a1311147dd292356fc217cdf44",
      "parents": [
        "92c1c1e85bdd72b41f9fd39b9d43d4b3c146d02d"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Fri Jul 01 01:37:24 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:44 2011 +0300"
      },
      "message": "KVM: MMU: Introduce is_last_gpte() to clean up walk_addr_generic()\n\nSuggested by Ingo and Avi.\n\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "92c1c1e85bdd72b41f9fd39b9d43d4b3c146d02d",
      "tree": "c754a7a47d3a9733ac9bfdb5b68ff2d6889d39b9",
      "parents": [
        "134291bf3cb434a9039298ba6b15ef33e65ba542"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Fri Jul 01 01:36:07 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:43 2011 +0300"
      },
      "message": "KVM: MMU: Rename the walk label in walk_addr_generic()\n\nThe current name does not explain the meaning well.  So give it a better\nname \"retry_walk\" to show that we are trying the walk again.\n\nThis was suggested by Ingo Molnar.\n\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "134291bf3cb434a9039298ba6b15ef33e65ba542",
      "tree": "b4eb6e5dcb032e8bbf499f6692f65e7475c7ca35",
      "parents": [
        "f8f7e5ee1037e347eafff8f526913b92cec54873"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Fri Jul 01 01:34:56 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:42 2011 +0300"
      },
      "message": "KVM: MMU: Clean up the error handling of walk_addr_generic()\n\nAvoid two step jump to the error handling part.  This eliminates the use\nof the variables present and rsvd_fault.\n\nWe also use the const type qualifier to show that write/user/fetch_fault\ndo not change in the function.\n\nBoth of these were suggested by Ingo Molnar.\n\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "f8f7e5ee1037e347eafff8f526913b92cec54873",
      "tree": "6513b6b15ae84c36cb94526b2b689cb0265b2b89",
      "parents": [
        "1aee47a0276f75a371e13a936a48f64eb5d3ec1b"
      ],
      "author": {
        "name": "Marcelo Tosatti",
        "email": "mtosatti@redhat.com",
        "time": "Tue Jun 21 14:00:10 2011 -0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:41 2011 +0300"
      },
      "message": "Revert \"KVM: MMU: make kvm_mmu_reset_context() flush the guest TLB\"\n\nThis reverts commit bee931d31e588b8eb86b7edee32fac2d16930cd7.\n\nTLB flush should be done lazily during guest entry, in\nkvm_mmu_load().\n\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "1aee47a0276f75a371e13a936a48f64eb5d3ec1b",
      "tree": "a8fa2c437a7a562b61b8a028e3d8c78a422d2e1f",
      "parents": [
        "dd9ebf1f94354b010f2ac7a98bf69168636cb08e"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:35:20 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:40 2011 +0300"
      },
      "message": "KVM: PPC: e500: Don\u0027t search over the entire TLB0.\n\nOnly look in the 4 entries that could possibly contain the\nentry we\u0027re looking for.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "dd9ebf1f94354b010f2ac7a98bf69168636cb08e",
      "tree": "d7a6cbe2b31cd7349913d289b715fa1086ba0a1a",
      "parents": [
        "08b7fa92b9250eab0f493f7721977e781a887b3d"
      ],
      "author": {
        "name": "Liu Yu",
        "email": "yu.liu@freescale.com",
        "time": "Tue Jun 14 18:35:14 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:39 2011 +0300"
      },
      "message": "KVM: PPC: e500: Add shadow PID support\n\nDynamically assign host PIDs to guest PIDs, splitting each guest PID into\nmultiple host (shadow) PIDs based on kernel/user and MSR[IS/DS].  Use\nboth PID0 and PID1 so that the shadow PIDs for the right mode can be\nselected, that correspond both to guest TID \u003d zero and guest TID \u003d guest\nPID.\n\nThis allows us to significantly reduce the frequency of needing to\ninvalidate the entire TLB.  When the guest mode or PID changes, we just\nupdate the host PID0/PID1.  And since the allocation of shadow PIDs is\nglobal, multiple guests can share the TLB without conflict.\n\nNote that KVM does not yet support the guest setting PID1 or PID2 to\na value other than zero.  This will need to be fixed for nested KVM\nto work.  Until then, we enforce the requirement for guest PID1/PID2\nto stay zero by failing the emulation if the guest tries to set them\nto something else.\n\nSigned-off-by: Liu Yu \u003cyu.liu@freescale.com\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "08b7fa92b9250eab0f493f7721977e781a887b3d",
      "tree": "c798369236627a144d541809b9c298332509455e",
      "parents": [
        "a4cd8b23ac5786943202c0174c717956947db43c"
      ],
      "author": {
        "name": "Liu Yu",
        "email": "yu.liu@freescale.com",
        "time": "Tue Jun 14 18:34:59 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:38 2011 +0300"
      },
      "message": "KVM: PPC: e500: Stop keeping shadow TLB\n\nInstead of a fully separate set of TLB entries, keep just the\npfn and dirty status.\n\nSigned-off-by: Liu Yu \u003cyu.liu@freescale.com\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "a4cd8b23ac5786943202c0174c717956947db43c",
      "tree": "46e1dc4646d6c2a27fc83944e24aad1c1fafb292",
      "parents": [
        "9973d54eeafcd1c3a2e89f0f59280c4c1e03e73b"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:41 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:37 2011 +0300"
      },
      "message": "KVM: PPC: e500: enable magic page\n\nThis is a shared page used for paravirtualization.  It is always present\nin the guest kernel\u0027s effective address space at the address indicated\nby the hypercall that enables it.\n\nThe physical address specified by the hypercall is not used, as\ne500 does not have real mode.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "9973d54eeafcd1c3a2e89f0f59280c4c1e03e73b",
      "tree": "80a68f063e34b88d217fb669227cd1e537c884d2",
      "parents": [
        "59c1f4e35c3db6c7ea5a04503a43bcbeb98977df"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:39 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:36 2011 +0300"
      },
      "message": "KVM: PPC: e500: Support large page mappings of PFNMAP vmas.\n\nThis allows large pages to be used on guest mappings backed by things like\n/dev/mem, resulting in a significant speedup when guest memory\nis mapped this way (it\u0027s useful for directly-assigned MMIO, too).\n\nThis is not a substitute for hugetlbfs integration, but is useful for\nconfigurations where devices are directly assigned on chips without an\nIOMMU -- in these cases, we need guest physical and true physical to\nmatch, and be contiguous, so static reservation and mapping via /dev/mem\nis the most straightforward way to set things up.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "59c1f4e35c3db6c7ea5a04503a43bcbeb98977df",
      "tree": "97e4a733a4e99e0208495eb04d158bfdf90b1181",
      "parents": [
        "0ef309956cecbaf6d96c31371bf393c296886fa6"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:37 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:35 2011 +0300"
      },
      "message": "KVM: PPC: e500: Eliminate shadow_pages[], and use pfns instead.\n\nThis is in line with what other architectures do, and will allow us to\nmap things other than ordinary, unreserved kernel pages -- such as\ndedicated devices, or large contiguous reserved regions.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "0ef309956cecbaf6d96c31371bf393c296886fa6",
      "tree": "6ac269ebbf1a23490854d038314bb9abc1dc1720",
      "parents": [
        "6fc4d1eb911cced6bc103f2b36497397e99e8c43"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:35 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:34 2011 +0300"
      },
      "message": "KVM: PPC: e500: don\u0027t use MAS0 as intermediate storage.\n\nThis avoids races.  It also means that we use the shadow TLB way,\nrather than the hardware hint -- if this is a problem, we could do\na tlbsx before inserting a TLB0 entry.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "6fc4d1eb911cced6bc103f2b36497397e99e8c43",
      "tree": "d0dc20dd4412525d05e2876e27f06918181d64b2",
      "parents": [
        "4cd35f675ba41a99a477e28a6add4a66833325f2"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:34 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:33 2011 +0300"
      },
      "message": "KVM: PPC: e500: Disable preloading TLB1 in tlb_load().\n\nSince TLB1 loading doesn\u0027t check the shadow TLB before allocating another\nentry, you can get duplicates.\n\nOnce shadow PIDs are enabled in a later patch, we won\u0027t need to\ninvalidate the TLB on every switch, so this optimization won\u0027t be\nneeded anyway.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "4cd35f675ba41a99a477e28a6add4a66833325f2",
      "tree": "d4b26dadccbad63b63ce90b358efa5903c4e075e",
      "parents": [
        "ecee273fc48f7f48f0c2f074335c43aaa790c308"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:31 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:32 2011 +0300"
      },
      "message": "KVM: PPC: e500: Save/restore SPE state\n\nThis is done lazily.  The SPE save will be done only if the guest has\nused SPE since the last preemption or heavyweight exit.  Restore will be\ndone only on demand, when enabling MSR_SPE in the shadow MSR, in response\nto an SPE fault or mtmsr emulation.\n\nFor SPEFSCR, Linux already switches it on context switch (non-lazily), so\nthe only remaining bit is to save it between qemu and the guest.\n\nSigned-off-by: Liu Yu \u003cyu.liu@freescale.com\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "ecee273fc48f7f48f0c2f074335c43aaa790c308",
      "tree": "ba12981dbad927816a9cc51042aa2febd85fc74e",
      "parents": [
        "c51584d52e3878aa9b2bb98cdfb87173e7acf560"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:29 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:32 2011 +0300"
      },
      "message": "KVM: PPC: booke: use shadow_msr\n\nKeep the guest MSR and the guest-mode true MSR separate, rather than\nmodifying the guest MSR on each guest entry to produce a true MSR.\n\nAny bits which should be modified based on guest MSR must be explicitly\npropagated from vcpu-\u003earch.shared-\u003emsr to vcpu-\u003earch.shadow_msr in\nkvmppc_set_msr().\n\nWhile we\u0027re modifying the guest entry code, reorder a few instructions\nto bury some load latencies.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "c51584d52e3878aa9b2bb98cdfb87173e7acf560",
      "tree": "c52d3133b30fcc6b68555b8b55232f89fb4b7c84",
      "parents": [
        "685659ee70db0bac47ffd619c726cf600e504fd7"
      ],
      "author": {
        "name": "Scott Wood",
        "email": "scottwood@freescale.com",
        "time": "Tue Jun 14 18:34:27 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:31 2011 +0300"
      },
      "message": "powerpc/e500: SPE register saving: take arbitrary struct offset\n\nPreviously, these macros hardcoded THREAD_EVR0 as the base of the save\narea, relative to the base register passed.  This base offset is now\npassed as a separate macro parameter, allowing reuse with other SPE\nsave areas, such as used by KVM.\n\nAcked-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "685659ee70db0bac47ffd619c726cf600e504fd7",
      "tree": "80d17e740132295a77732b539ce620203c3646ba",
      "parents": [
        "a22a2daccfa3ade5cdd9ef1e8a05cf1e6ffca42b"
      ],
      "author": {
        "name": "yu liu",
        "email": "yu.liu@freescale.com",
        "time": "Tue Jun 14 18:34:25 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:30 2011 +0300"
      },
      "message": "powerpc/e500: Save SPEFCSR in flush_spe_to_thread()\n\ngiveup_spe() saves the SPE state which is protected by MSR[SPE].\nHowever, modifying SPEFSCR does not trap when MSR[SPE]\u003d0.\nAnd since SPEFSCR is already saved/restored in _switch(),\nnot all the callers want to save SPEFSCR again.\nThus, saving SPEFSCR should not belong to giveup_spe().\n\nThis patch moves SPEFSCR saving to flush_spe_to_thread(),\nand cleans up the caller that needs to save SPEFSCR accordingly.\n\nSigned-off-by: Liu Yu \u003cyu.liu@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "a22a2daccfa3ade5cdd9ef1e8a05cf1e6ffca42b",
      "tree": "70b14bb0f62fb61569d3f1e89edce9ac01b6cd27",
      "parents": [
        "24294b9a3fbe00289c039fb3e80087be66b8c415"
      ],
      "author": {
        "name": "Alexander Graf",
        "email": "agraf@suse.de",
        "time": "Tue Jun 07 20:45:34 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:29 2011 +0300"
      },
      "message": "KVM: PPC: Resolve real-mode handlers through function exports\n\nUp until now, Book3S KVM had variables stored in the kernel that a kernel module\nor the kvm code in the kernel could read from to figure out where some real mode\nhelper functions are located.\n\nThis is all unnecessary. The high bits of the EA get ignore in real mode, so we\ncan just use the pointer as is. Also, it\u0027s a lot easier on relocations when we\nuse the normal way of resolving the address to a function, instead of jumping\nthrough hoops.\n\nThis patch fixes compilation with CONFIG_RELOCATABLE\u003dy.\n\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "24294b9a3fbe00289c039fb3e80087be66b8c415",
      "tree": "2199e25d9944af4b13940ef9f27c36b082146d96",
      "parents": [
        "45bd07b9d5202c910b31c92bd15572b560198c26"
      ],
      "author": {
        "name": "Stuart Yoder",
        "email": "stuart.yoder@freescale.com",
        "time": "Tue May 17 18:26:00 2011 -0500"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:28 2011 +0300"
      },
      "message": "KVM: PPC: fix partial application of \"exit timing in ticks\"\n\nWhen http://www.spinics.net/lists/kvm-ppc/msg02664.html\nwas applied to produce commit b51e7aa7ed6d8d134d02df78300ab0f91cfff4d2,\nthe removal of the conversion in add_exit_timing was left out.\n\nSigned-off-by: Stuart Yoder \u003cstuart.yoder@freescale.com\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n"
    },
    {
      "commit": "45bd07b9d5202c910b31c92bd15572b560198c26",
      "tree": "3f4b996f14c03e166bc8636ad167d1c0662f4ac4",
      "parents": [
        "411c588dfb863feee78b721d5e7c86ac38921c49"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Sun Jun 12 18:14:08 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:27 2011 +0300"
      },
      "message": "KVM: MMU: make kvm_mmu_reset_context() flush the guest TLB\n\nkvm_set_cr0() and kvm_set_cr4(), and possible other functions,\nassume that kvm_mmu_reset_context() flushes the guest TLB.  However,\nit does not.\n\nFix by flushing the tlb (and syncing the new root as well).\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "411c588dfb863feee78b721d5e7c86ac38921c49",
      "tree": "bb60c136f0392fbbd8f222fd2049f265746a7eae",
      "parents": [
        "a01c8f9b4e266df1d7166d23216f2060648f862d"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Mon Jun 06 16:11:54 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:26 2011 +0300"
      },
      "message": "KVM: MMU: Adjust shadow paging to work when SMEP\u003d1 and CR0.WP\u003d0\n\nWhen CR0.WP\u003d0, we sometimes map user pages as kernel pages (to allow\nthe kernel to write to them).  Unfortunately this also allows the kernel\nto fetch from these pages, even if CR4.SMEP is set.\n\nAdjust for this by also setting NX on the spte in these circumstances.\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "a01c8f9b4e266df1d7166d23216f2060648f862d",
      "tree": "9f1255015b195cc96a8e88da5a1bee1300a541ed",
      "parents": [
        "176f61da82435eae09cc96f70b530d1ba0746b8b"
      ],
      "author": {
        "name": "Yang, Wei",
        "email": "wei.y.yang@intel.com",
        "time": "Tue Jun 14 15:19:06 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:25 2011 +0300"
      },
      "message": "KVM: Enable ERMS feature support for KVM\n\nThis patch exposes ERMS feature to KVM guests.\n\nThe REP MOVSB/STOSB instruction can enhance fast strings attempts to\nmove as much of the data with larger size load/stores as possible.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "176f61da82435eae09cc96f70b530d1ba0746b8b",
      "tree": "7f31a0c846d40967b4475c53b709063679f0ee8d",
      "parents": [
        "74dc2b4ffe3af1eac367be0178f88487cb9b240a"
      ],
      "author": {
        "name": "Yang, Wei",
        "email": "wei.y.yang@intel.com",
        "time": "Tue Jun 14 20:10:19 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:24 2011 +0300"
      },
      "message": "KVM: Expose RDWRGSFS bit to KVM guests\n\nThis patch exposes RDWRGSFS bit to KVM guests.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "74dc2b4ffe3af1eac367be0178f88487cb9b240a",
      "tree": "2f5e4cb1281f9fd91a2db67c722864db7e39fbc3",
      "parents": [
        "d9c3476d8a99455cd3af1bd773acd77aa947a934"
      ],
      "author": {
        "name": "Yang, Wei",
        "email": "wei.y.yang@intel.com",
        "time": "Tue Jun 14 20:10:18 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:23 2011 +0300"
      },
      "message": "KVM: Add RDWRGSFS support when setting CR4\n\nThis patch adds RDWRGSFS support when setting CR4.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "d9c3476d8a99455cd3af1bd773acd77aa947a934",
      "tree": "10665cefbb20c26fd0e7793b3789284cc181e49a",
      "parents": [
        "4a00efdf0c7c93dc6f6b3ce7e2d6bd4cd1ac1651"
      ],
      "author": {
        "name": "Yang, Wei",
        "email": "wei.y.yang@intel.com",
        "time": "Tue Jun 14 20:10:17 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:22 2011 +0300"
      },
      "message": "KVM: Remove RDWRGSFS bit from CR4_RESERVED_BITS\n\nThis patch removes RDWRGSFS bit from CR4_RESERVED_BITS.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "4a00efdf0c7c93dc6f6b3ce7e2d6bd4cd1ac1651",
      "tree": "c6db2aa1b867285a9764f4dd35e4ab25c0ecec1e",
      "parents": [
        "02668b061db1b9f7f18872e594ac68e237db0bed"
      ],
      "author": {
        "name": "Yang, Wei Y",
        "email": "wei.y.yang@intel.com",
        "time": "Mon Jun 13 21:52:33 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:21 2011 +0300"
      },
      "message": "KVM: Enable DRNG feature support for KVM\n\nThis patch exposes DRNG feature to KVM guests.\n\nThe RDRAND instruction can provide software with sequences of\nrandom numbers generated from white noise.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "02668b061db1b9f7f18872e594ac68e237db0bed",
      "tree": "8af89c7a18a1ce2aef57336c9d257eb00c29c4db",
      "parents": [
        "58f0964ee445d6703bf2bfd5170e75fb0920ad8f"
      ],
      "author": {
        "name": "Andre Przywara",
        "email": "andre.przywara@amd.com",
        "time": "Fri Jun 10 11:35:30 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:20 2011 +0300"
      },
      "message": "KVM: fix XSAVE bit scanning (now properly)\n\ncommit 123108f1c1aafd51d6a5c79cc04d7999dd88a930 tried to fix KVMs\nXSAVE valid feature scanning, but it was wrong. It was not considering\nthe sparse nature of this bitfield, instead reading values from\nuninitialized members of the entries array.\nThis patch now separates subleaf indicies from KVM\u0027s array indicies\nand fills the entry before querying it\u0027s value.\nThis fixes AVX support in KVM guests.\n\nSigned-off-by: Andre Przywara \u003candre.przywara@amd.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "58f0964ee445d6703bf2bfd5170e75fb0920ad8f",
      "tree": "f8125cb31c2a9197c778918f9ce26c5344b16595",
      "parents": [
        "9f3191aec595ef9f3c80bc96664fd7aef57ef5be"
      ],
      "author": {
        "name": "Jan Kiszka",
        "email": "jan.kiszka@siemens.com",
        "time": "Sat Jun 11 12:24:24 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:19 2011 +0300"
      },
      "message": "KVM: Fix KVM_ASSIGN_SET_MSIX_ENTRY documentation\n\nThe documented behavior did not match the implemented one (which also\nnever changed).\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "9f3191aec595ef9f3c80bc96664fd7aef57ef5be",
      "tree": "53be5ad0a1b677fa9a43bd8b2c22e1c5bad76a54",
      "parents": [
        "1dda606c5f94b14a8f36c220d1d8844bab68a720"
      ],
      "author": {
        "name": "Jan Kiszka",
        "email": "jan.kiszka@siemens.com",
        "time": "Sat Jun 11 12:23:55 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:18 2011 +0300"
      },
      "message": "KVM: Fix off-by-one in overflow check of KVM_ASSIGN_SET_MSIX_NR\n\nKVM_MAX_MSIX_PER_DEV implies that up to that many MSI-X entries can be\nrequested. But the kernel so far rejected already the upper limit.\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "1dda606c5f94b14a8f36c220d1d8844bab68a720",
      "tree": "cf78b5aa3d499d239079c392491bcf656fbe05e6",
      "parents": [
        "91e3d71db29d9b3b67b64e2a08e724a7ff538b4c"
      ],
      "author": {
        "name": "Alexander Graf",
        "email": "agraf@suse.de",
        "time": "Wed Jun 08 02:45:37 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:17 2011 +0300"
      },
      "message": "KVM: Add compat ioctl for KVM_SET_SIGNAL_MASK\n\nKVM has an ioctl to define which signal mask should be used while running\ninside VCPU_RUN. At least for big endian systems, this mask is different\non 32-bit and 64-bit systems (though the size is identical).\n\nAdd a compat wrapper that converts the mask to whatever the kernel accepts,\nallowing 32-bit kvm user space to set signal masks.\n\nThis patch fixes qemu with --enable-io-thread on ppc64 hosts when running\n32-bit user land.\n\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "91e3d71db29d9b3b67b64e2a08e724a7ff538b4c",
      "tree": "5bdaf33de54e039faa8892ab4291e6089de03675",
      "parents": [
        "e57d4a356ad3ac46881399c424cc6cf6dd16359d"
      ],
      "author": {
        "name": "Jan Kiszka",
        "email": "jan.kiszka@siemens.com",
        "time": "Fri Jun 03 08:51:05 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:16 2011 +0300"
      },
      "message": "KVM: Clarify KVM_ASSIGN_PCI_DEVICE documentation\n\nNeither host_irq nor the guest_msi struct are used anymore today.\nTag the former, drop the latter to avoid confusion.\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "e57d4a356ad3ac46881399c424cc6cf6dd16359d",
      "tree": "c1b903ecb1a70905510f635adfa74cf582334a03",
      "parents": [
        "611c120f7486a19e7df2225f875a52ef0b599ae8"
      ],
      "author": {
        "name": "Yang, Wei Y",
        "email": "wei.y.yang@intel.com",
        "time": "Fri Jun 03 11:14:16 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:15 2011 +0300"
      },
      "message": "KVM: Add instruction fetch checking when walking guest page table\n\nThis patch adds instruction fetch checking when walking guest page table,\nto implement SMEP when emulating instead of executing natively.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Shan, Haitao \u003chaitao.shan@intel.com\u003e\nSigned-off-by: Li, Xin \u003cxin.li@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "611c120f7486a19e7df2225f875a52ef0b599ae8",
      "tree": "52f8d2ce975953d081bdd1176a4ab32cd548bd48",
      "parents": [
        "c68b734fba402b9bfdd49e23b776c42dbeaf1f5b"
      ],
      "author": {
        "name": "Yang, Wei Y",
        "email": "wei.y.yang@intel.com",
        "time": "Fri Jun 03 11:14:03 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:14 2011 +0300"
      },
      "message": "KVM: Mask function7 ebx against host capability word9\n\nThis patch masks CPUID leaf 7 ebx against host capability word9.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Shan, Haitao \u003chaitao.shan@intel.com\u003e\nSigned-off-by: Li, Xin \u003cxin.li@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "c68b734fba402b9bfdd49e23b776c42dbeaf1f5b",
      "tree": "4d149de96cf2e4021e8f1b4c4e678bd0ffe21754",
      "parents": [
        "8d9c975fc5b825cb76953a1b45a84195ffc6f4ab"
      ],
      "author": {
        "name": "Yang, Wei Y",
        "email": "wei.y.yang@intel.com",
        "time": "Fri Jun 03 11:13:42 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:13 2011 +0300"
      },
      "message": "KVM: Add SMEP support when setting CR4\n\nThis patch adds SMEP handling when setting CR4.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Shan, Haitao \u003chaitao.shan@intel.com\u003e\nSigned-off-by: Li, Xin \u003cxin.li@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "8d9c975fc5b825cb76953a1b45a84195ffc6f4ab",
      "tree": "515ef4471a7debf2f2c60b37024b0b7a7959a98d",
      "parents": [
        "509c75ea198fe524adaf90ca1021487b733447ce"
      ],
      "author": {
        "name": "Yang, Wei Y",
        "email": "wei.y.yang@intel.com",
        "time": "Fri Jun 03 11:13:35 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:12 2011 +0300"
      },
      "message": "KVM: Remove SMEP bit from CR4_RESERVED_BITS\n\nThis patch removes SMEP bit from CR4_RESERVED_BITS.\n\nSigned-off-by: Yang, Wei \u003cwei.y.yang@intel.com\u003e\nSigned-off-by: Shan, Haitao \u003chaitao.shan@intel.com\u003e\nSigned-off-by: Li, Xin \u003cxin.li@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "509c75ea198fe524adaf90ca1021487b733447ce",
      "tree": "ca92220fc48fca56c882a395bd8527863983a936",
      "parents": [
        "7f4382e8fd8c87bcb7122a2f63c03e8713f594a0"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Thu Jun 02 11:54:52 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:11 2011 +0300"
      },
      "message": "KVM: nVMX: Fix bug preventing more than two levels of nesting\n\nThe nested VMX feature is supposed to fully emulate VMX for the guest. This\n(theoretically) not only allows it to run its own guests, but also also\nto further emulate VMX for its own guests, and allow arbitrarily deep nesting.\n\nThis patch fixes a bug (discovered by Kevin Tian) in handling a VMLAUNCH\nby L2, which prevented deeper nesting.\n\nDeeper nesting now works (I only actually tested L3), but is currently\n*absurdly* slow, to the point of being unusable.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "7f4382e8fd8c87bcb7122a2f63c03e8713f594a0",
      "tree": "a0582d9034795e77c9243a1193264b6d830bca37",
      "parents": [
        "9dac77fa4011bdb4b541a8db087eac96a602faec"
      ],
      "author": {
        "name": "Jan Kiszka",
        "email": "jan.kiszka@web.de",
        "time": "Thu Jun 02 16:16:20 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:10 2011 +0300"
      },
      "message": "KVM: Fixup documentation section numbering\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "9dac77fa4011bdb4b541a8db087eac96a602faec",
      "tree": "13305ebc63f91513d9ff579748fd73385603c8dd",
      "parents": [
        "36dd9bb5ce32bc39e25a5fcc61415f13e3ed5d17"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Wed Jun 01 15:34:25 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:09 2011 +0300"
      },
      "message": "KVM: x86 emulator: fold decode_cache into x86_emulate_ctxt\n\nThis saves a lot of pointless casts x86_emulate_ctxt and decode_cache.\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "36dd9bb5ce32bc39e25a5fcc61415f13e3ed5d17",
      "tree": "6c007056ff4a4945d414026401d0c9bf9e66a16d",
      "parents": [
        "2e4ce7f574369f374ad537a180b4870e2098cf0e"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Wed Jun 01 15:34:24 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:09 2011 +0300"
      },
      "message": "KVM: x86 emulator: rename decode_cache::eip to _eip\n\nThe name eip conflicts with a field of the same name in x86_emulate_ctxt,\nwhich we plan to fold decode_cache into.\n\nThe name _eip is unfortunate, but what\u0027s really needed is a refactoring\nhere, not a better name.\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "2e4ce7f574369f374ad537a180b4870e2098cf0e",
      "tree": "1aa7d1c65b79fcba30c820abb22b47607257376b",
      "parents": [
        "f411e6cdc275e63ead2ffb427d0497daae6f6069"
      ],
      "author": {
        "name": "Jan Kiszka",
        "email": "jan.kiszka@siemens.com",
        "time": "Wed Jun 01 12:57:30 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:08 2011 +0300"
      },
      "message": "KVM: VMX: Silence warning on 32-bit hosts\n\na is unused now on CONFIG_X86_32.\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "f411e6cdc275e63ead2ffb427d0497daae6f6069",
      "tree": "847d4298b99054f51524ce9fd538d91838d9b444",
      "parents": [
        "d06e03adcb30f9e9fff4df1d80a3087f54a62d9a"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 22:05:15 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:07 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for CLI/STI(FA/FB)\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "d06e03adcb30f9e9fff4df1d80a3087f54a62d9a",
      "tree": "c944856cbdf9fac510f99a84914c845dc3d23d02",
      "parents": [
        "5c5df76b8b32055956ee4cca338d29046016b13e"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 22:04:08 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:06 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for LOOP/JCXZ\n\n  LOOP/LOOPcc      : E0-E2\n  JCXZ/JECXZ/JRCXZ : E3\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "5c5df76b8b32055956ee4cca338d29046016b13e",
      "tree": "572e449ac053fd778289bafcbd2216bbc176dcfe",
      "parents": [
        "1bd5f469b2d54330ba41d9c4b857dc5051e8dcf7"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 22:02:55 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:04 2011 +0300"
      },
      "message": "KVM: x86 emulator: Clean up INT n/INTO/INT 3(CC/CD/CE)\n\nCall emulate_int() directly to avoid spaghetti goto\u0027s.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "1bd5f469b2d54330ba41d9c4b857dc5051e8dcf7",
      "tree": "f4c23a7cbf965b63d02b67b8f592b09641f766b3",
      "parents": [
        "ebda02c2a5a6001c787f311b4d5a0dc827ce2d92"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 22:01:33 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:03 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for MOV(8C/8E)\n\nDifferent functions for those which take segment register operands.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "ebda02c2a5a6001c787f311b4d5a0dc827ce2d92",
      "tree": "310ab8c2b6e742b69de2047b0bdbbe968f6acf91",
      "parents": [
        "e4f973ae913028bac8c07187e0fd49c1dc08ce58"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 22:00:22 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:02 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for RET(C3)\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "e4f973ae913028bac8c07187e0fd49c1dc08ce58",
      "tree": "039a3c0bb5776f9d1f7dc5c1766850fd30239ed8",
      "parents": [
        "9f21ca599cd609502de8a56c1d4c4688d40abb2d"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 21:59:09 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:01 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for XCHG(86/87)\n\nIn addition, replace one \"goto xchg\" with an em_xchg() call.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "9f21ca599cd609502de8a56c1d4c4688d40abb2d",
      "tree": "6741823f140817294f313154752f2dfaa4fc10f5",
      "parents": [
        "db5b0762f3cab58398f16379ab37ef66ef9ba497"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 21:57:53 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:16:00 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for TEST(84/85, A8/A9)\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "db5b0762f3cab58398f16379ab37ef66ef9ba497",
      "tree": "d4b7c00fcb088ad41f9fbddcacf250c2b5cb4a9f",
      "parents": [
        "e01991e71a179ddab494c8e02100ad73bc0010c4"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 21:56:26 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:15:59 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use opcode::execute for some instructions\n\nMove the following functions to the opcode tables:\n\n  RET (Far return) : CB\n  IRET             : CF\n  JMP (Jump far)   : EA\n\n  SYSCALL          : 0F 05\n  CLTS             : 0F 06\n  SYSENTER         : 0F 34\n  SYSEXIT          : 0F 35\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "e01991e71a179ddab494c8e02100ad73bc0010c4",
      "tree": "3ffb2330bf79b5d45bdeb82be3492e249a1ddd82",
      "parents": [
        "9d74191ab1ea857d1cc27e439316eebf8ae46d19"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 21:55:10 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:15:58 2011 +0300"
      },
      "message": "KVM: x86 emulator: Rename emulate_xxx() to em_xxx()\n\nThe next patch will change these to be called by opcode::execute.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "9d74191ab1ea857d1cc27e439316eebf8ae46d19",
      "tree": "aed0f1486f410231366c96047a8cc8267b5e4468",
      "parents": [
        "55399a02e90fdc6cd45165b2df5dd97b7c3f018f"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Sun May 29 21:53:48 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:15:57 2011 +0300"
      },
      "message": "KVM: x86 emulator: Use the pointers ctxt and c consistently\n\nWe should use the local variables ctxt and c when the emulate_ctxt and\ndecode appears many times.  At least, we need to be consistent about\nhow we use these in a function.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "55399a02e90fdc6cd45165b2df5dd97b7c3f018f",
      "tree": "6922e5531791206ac55996cdd4ce49417b0bc6bc",
      "parents": [
        "823e396558e509b7c3225cd76806f3d6643ff5f8"
      ],
      "author": {
        "name": "Sasha Levin",
        "email": "levinsasha928@gmail.com",
        "time": "Sat May 28 14:12:30 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:15:56 2011 +0300"
      },
      "message": "KVM: Document KVM_IOEVENTFD\n\nDocument KVM_IOEVENTFD that can be used to receive\nnotifications of PIO/MMIO events without triggering\nan exit.\n\nSigned-off-by: Sasha Levin \u003clevinsasha928@gmail.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "823e396558e509b7c3225cd76806f3d6643ff5f8",
      "tree": "af8bc2c12b9cc31571d6280621a15b0657907512",
      "parents": [
        "2844d8490523c5768cc37f21e065c76c45232724"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:17:11 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 13:15:22 2011 +0300"
      },
      "message": "KVM: nVMX: Documentation\n\nThis patch includes a brief introduction to the nested vmx feature in the\nDocumentation/kvm directory. The document also includes a copy of the\nvmcs12 structure, as requested by Avi Kivity.\n\n[marcelo: move to Documentation/virtual/kvm]\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "2844d8490523c5768cc37f21e065c76c45232724",
      "tree": "1740764c4419cd2ac6fcf280bc9a1fe7e890e270",
      "parents": [
        "7b8050f570a03718d21fc8662c54586192ea2dac"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:16:40 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:19 2011 +0300"
      },
      "message": "KVM: nVMX: Miscellenous small corrections\n\nSmall corrections of KVM (spelling, etc.) not directly related to nested VMX.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "7b8050f570a03718d21fc8662c54586192ea2dac",
      "tree": "dd8ca0722d30e4639b3e73a33b05b4bb5ab0a373",
      "parents": [
        "7991825b8558a719eb7cfb93c4458d767ae1f2eb"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:16:10 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:19 2011 +0300"
      },
      "message": "KVM: nVMX: Add VMX to list of supported cpuid features\n\nIf the \"nested\" module option is enabled, add the \"VMX\" CPU feature to the\nlist of CPU features KVM advertises with the KVM_GET_SUPPORTED_CPUID ioctl.\n\nQemu uses this ioctl, and intersects KVM\u0027s list with its own list of desired\ncpu features (depending on the -cpu option given to qemu) to determine the\nfinal list of features presented to the guest.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "7991825b8558a719eb7cfb93c4458d767ae1f2eb",
      "tree": "6d9a09a6175a3f607737680525ba9486ac95dbab",
      "parents": [
        "36cf24e01e9eba8c9ea201202762081ced2f8cdf"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:15:39 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:19 2011 +0300"
      },
      "message": "KVM: nVMX: Additional TSC-offset handling\n\nIn the unlikely case that L1 does not capture MSR_IA32_TSC, L0 needs to\nemulate this MSR write by L2 by modifying vmcs02.tsc_offset. We also need to\nset vmcs12.tsc_offset, for this change to survive the next nested entry (see\nprepare_vmcs02()).\nAdditionally, we also need to modify vmx_adjust_tsc_offset: The semantics\nof this function is that the TSC of all guests on this vcpu, L1 and possibly\nseveral L2s, need to be adjusted. To do this, we need to adjust vmcs01\u0027s\ntsc_offset (this offset will also apply to each L2s we enter). We can\u0027t set\nvmcs01 now, so we have to remember this adjustment and apply it when we\nlater exit to L1.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "36cf24e01e9eba8c9ea201202762081ced2f8cdf",
      "tree": "e6c5514da59a7095385c6e7a961d3651a8a6fdb4",
      "parents": [
        "eeadf9e7558ce2c34c0d91985d26047a6e2245e7"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:15:08 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:18 2011 +0300"
      },
      "message": "KVM: nVMX: Further fixes for lazy FPU loading\n\nKVM\u0027s \"Lazy FPU loading\" means that sometimes L0 needs to set CR0.TS, even\nif a guest didn\u0027t set it. Moreover, L0 must also trap CR0.TS changes and\nNM exceptions, even if we have a guest hypervisor (L1) who didn\u0027t want these\ntraps. And of course, conversely: If L1 wanted to trap these events, we\nmust let it, even if L0 is not interested in them.\n\nThis patch fixes some existing KVM code (in update_exception_bitmap(),\nvmx_fpu_activate(), vmx_fpu_deactivate()) to do the correct merging of L0\u0027s\nand L1\u0027s needs. Note that handle_cr() was already fixed in the above patch,\nand that new code in introduced in previous patches already handles CR0\ncorrectly (see prepare_vmcs02(), prepare_vmcs12(), and nested_vmx_vmexit()).\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "eeadf9e7558ce2c34c0d91985d26047a6e2245e7",
      "tree": "bdf4b3bdb4fdcd5672990e51a211b8dc15e04ae1",
      "parents": [
        "66c78ae40cd0a7258d01ef433ede74e33e4adbbe"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:14:38 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:18 2011 +0300"
      },
      "message": "KVM: nVMX: Handling of CR0 and CR4 modifying instructions\n\nWhen L2 tries to modify CR0 or CR4 (with mov or clts), and modifies a bit\nwhich L1 asked to shadow (via CR[04]_GUEST_HOST_MASK), we already do the right\nthing: we let L1 handle the trap (see nested_vmx_exit_handled_cr() in a\nprevious patch).\nWhen L2 modifies bits that L1 doesn\u0027t care about, we let it think (via\nCR[04]_READ_SHADOW) that it did these modifications, while only changing\n(in GUEST_CR[04]) the bits that L0 doesn\u0027t shadow.\n\nThis is needed for corect handling of CR0.TS for lazy FPU loading: L0 may\nwant to leave TS on, while pretending to allow the guest to change it.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "66c78ae40cd0a7258d01ef433ede74e33e4adbbe",
      "tree": "22d9eb8927a86342475ca4988a8d3b3d97c272cd",
      "parents": [
        "0b6ac343fc8e120b7d32fd2d51a8f81354086fa0"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:14:07 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:18 2011 +0300"
      },
      "message": "KVM: nVMX: Correct handling of idt vectoring info\n\nThis patch adds correct handling of IDT_VECTORING_INFO_FIELD for the nested\ncase.\n\nWhen a guest exits while delivering an interrupt or exception, we get this\ninformation in IDT_VECTORING_INFO_FIELD in the VMCS. When L2 exits to L1,\nthere\u0027s nothing we need to do, because L1 will see this field in vmcs12, and\nhandle it itself. However, when L2 exits and L0 handles the exit itself and\nplans to return to L2, L0 must inject this event to L2.\n\nIn the normal non-nested case, the idt_vectoring_info case is discovered after\nthe exit, and the decision to inject (though not the injection itself) is made\nat that point. However, in the nested case a decision of whether to return\nto L2 or L1 also happens during the injection phase (see the previous\npatches), so in the nested case we can only decide what to do about the\nidt_vectoring_info right after the injection, i.e., in the beginning of\nvmx_vcpu_run, which is the first time we know for sure if we\u0027re staying in\nL2.\n\nTherefore, when we exit L2 (is_guest_mode(vcpu)), we disable the regular\nvmx_complete_interrupts() code which queues the idt_vectoring_info for\ninjection on next entry - because such injection would not be appropriate\nif we will decide to exit to L1. Rather, we just save the idt_vectoring_info\nand related fields in vmcs12 (which is a convenient place to save these\nfields). On the next entry in vmx_vcpu_run (*after* the injection phase,\npotentially exiting to L1 to inject an event requested by user space), if\nwe find ourselves in L1 we don\u0027t need to do anything with those values\nwe saved (as explained above). But if we find that we\u0027re in L2, or rather\n*still* at L2 (it\u0027s not nested_run_pending, meaning that this is the first\nround of L2 running after L1 having just launched it), we need to inject\nthe event saved in those fields - by writing the appropriate VMCS fields.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "0b6ac343fc8e120b7d32fd2d51a8f81354086fa0",
      "tree": "7f5605a9a68c32458e6e744847813277e62fb9c5",
      "parents": [
        "b6f1250edb4462e38d72c7f6cce35911df21d31b"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:13:36 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:17 2011 +0300"
      },
      "message": "KVM: nVMX: Correct handling of exception injection\n\nSimilar to the previous patch, but concerning injection of exceptions rather\nthan external interrupts.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "b6f1250edb4462e38d72c7f6cce35911df21d31b",
      "tree": "bf7d3aa1cce21eb3fbb5751f942db38a398a4234",
      "parents": [
        "644d711aa0e16111d8aba6d289caebec013e26ea"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:13:06 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:17 2011 +0300"
      },
      "message": "KVM: nVMX: Correct handling of interrupt injection\n\nThe code in this patch correctly emulates external-interrupt injection\nwhile a nested guest L2 is running.\n\nBecause of this code\u0027s relative un-obviousness, I include here a longer-than-\nusual justification for what it does - much longer than the code itself ;-)\n\nTo understand how to correctly emulate interrupt injection while L2 is\nrunning, let\u0027s look first at what we need to emulate: How would things look\nlike if the extra L0 hypervisor layer is removed, and instead of L0 injecting\nan interrupt, we had hardware delivering an interrupt?\n\nNow we have L1 running on bare metal with a guest L2, and the hardware\ngenerates an interrupt. Assuming that L1 set PIN_BASED_EXT_INTR_MASK to 1, and\nVM_EXIT_ACK_INTR_ON_EXIT to 0 (we\u0027ll revisit these assumptions below), what\nhappens now is this: The processor exits from L2 to L1, with an external-\ninterrupt exit reason but without an interrupt vector. L1 runs, with\ninterrupts disabled, and it doesn\u0027t yet know what the interrupt was. Soon\nafter, it enables interrupts and only at that moment, it gets the interrupt\nfrom the processor. when L1 is KVM, Linux handles this interrupt.\n\nNow we need exactly the same thing to happen when that L1-\u003eL2 system runs\non top of L0, instead of real hardware. This is how we do this:\n\nWhen L0 wants to inject an interrupt, it needs to exit from L2 to L1, with\nexternal-interrupt exit reason (with an invalid interrupt vector), and run L1.\nJust like in the bare metal case, it likely can\u0027t deliver the interrupt to\nL1 now because L1 is running with interrupts disabled, in which case it turns\non the interrupt window when running L1 after the exit. L1 will soon enable\ninterrupts, and at that point L0 will gain control again and inject the\ninterrupt to L1.\n\nFinally, there is an extra complication in the code: when nested_run_pending,\nwe cannot return to L1 now, and must launch L2. We need to remember the\ninterrupt we wanted to inject (and not clear it now), and do it on the\nnext exit.\n\nThe above explanation shows that the relative strangeness of the nested\ninterrupt injection code in this patch, and the extra interrupt-window\nexit incurred, are in fact necessary for accurate emulation, and are not\njust an unoptimized implementation.\n\nLet\u0027s revisit now the two assumptions made above:\n\nIf L1 turns off PIN_BASED_EXT_INTR_MASK (no hypervisor that I know\ndoes, by the way), things are simple: L0 may inject the interrupt directly\nto the L2 guest - using the normal code path that injects to any guest.\nWe support this case in the code below.\n\nIf L1 turns on VM_EXIT_ACK_INTR_ON_EXIT, things look very different from the\ndescription above: L1 expects to see an exit from L2 with the interrupt vector\nalready filled in the exit information, and does not expect to be interrupted\nagain with this interrupt. The current code does not (yet) support this case,\nso we do not allow the VM_EXIT_ACK_INTR_ON_EXIT exit-control to be turned on\nby L1.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "644d711aa0e16111d8aba6d289caebec013e26ea",
      "tree": "73894074e7f2f6a01033fa82f60e7ca0440cba4b",
      "parents": [
        "7c1779384a2b2479722e90778721c40811e1b7a7"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:12:35 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:16 2011 +0300"
      },
      "message": "KVM: nVMX: Deciding if L0 or L1 should handle an L2 exit\n\nThis patch contains the logic of whether an L2 exit should be handled by L0\nand then L2 should be resumed, or whether L1 should be run to handle this\nexit (using the nested_vmx_vmexit() function of the previous patch).\n\nThe basic idea is to let L1 handle the exit only if it actually asked to\ntrap this sort of event. For example, when L2 exits on a change to CR0,\nwe check L1\u0027s CR0_GUEST_HOST_MASK to see if L1 expressed interest in any\nbit which changed; If it did, we exit to L1. But if it didn\u0027t it means that\nit is we (L0) that wished to trap this event, so we handle it ourselves.\n\nThe next two patches add additional logic of what to do when an interrupt or\nexception is injected: Does L0 need to do it, should we exit to L1 to do it,\nor should we resume L2 and keep the exception to be injected later.\n\nWe keep a new flag, \"nested_run_pending\", which can override the decision of\nwhich should run next, L1 or L2. nested_run_pending\u003d1 means that we *must* run\nL2 next, not L1. This is necessary in particular when L1 did a VMLAUNCH of L2\nand therefore expects L2 to be run (and perhaps be injected with an event it\nspecified, etc.). Nested_run_pending is especially intended to avoid switching\nto L1 in the injection decision-point described above.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "7c1779384a2b2479722e90778721c40811e1b7a7",
      "tree": "586847b6e8b562a1c8118138533735b7f7104248",
      "parents": [
        "4704d0befb0721274bda863192c4782febb6b94c"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:12:04 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:16 2011 +0300"
      },
      "message": "KVM: nVMX: vmcs12 checks on nested entry\n\nThis patch adds a bunch of tests of the validity of the vmcs12 fields,\naccording to what the VMX spec and our implementation allows. If fields\nwe cannot (or don\u0027t want to) honor are discovered, an entry failure is\nemulated.\n\nAccording to the spec, there are two types of entry failures: If the problem\nwas in vmcs12\u0027s host state or control fields, the VMLAUNCH instruction simply\nfails. But a problem is found in the guest state, the behavior is more\nsimilar to that of an exit.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "4704d0befb0721274bda863192c4782febb6b94c",
      "tree": "f460a211f2307a9ba2db1f641b6907d9572f6cf6",
      "parents": [
        "99e65e805dea4df061aa4038211112aa96416412"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:11:34 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:16 2011 +0300"
      },
      "message": "KVM: nVMX: Exiting from L2 to L1\n\nThis patch implements nested_vmx_vmexit(), called when the nested L2 guest\nexits and we want to run its L1 parent and let it handle this exit.\n\nNote that this will not necessarily be called on every L2 exit. L0 may decide\nto handle a particular exit on its own, without L1\u0027s involvement; In that\ncase, L0 will handle the exit, and resume running L2, without running L1 and\nwithout calling nested_vmx_vmexit(). The logic for deciding whether to handle\na particular exit in L1 or in L0, i.e., whether to call nested_vmx_vmexit(),\nwill appear in a separate patch below.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "99e65e805dea4df061aa4038211112aa96416412",
      "tree": "5783fc09f0e0a5331d9ec0e8ca815aa59f58b393",
      "parents": [
        "cd232ad02f00286c3f8c9df30948da17212ef905"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:11:03 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:15 2011 +0300"
      },
      "message": "KVM: nVMX: No need for handle_vmx_insn function any more\n\nBefore nested VMX support, the exit handler for a guest executing a VMX\ninstruction (vmclear, vmlaunch, vmptrld, vmptrst, vmread, vmread, vmresume,\nvmwrite, vmon, vmoff), was handle_vmx_insn(). This handler simply threw a #UD\nexception. Now that all these exit reasons are properly handled (and emulate\nthe respective VMX instruction), nothing calls this dummy handler and it can\nbe removed.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "cd232ad02f00286c3f8c9df30948da17212ef905",
      "tree": "f09e56976cadce581f89ad341b2cbb43a936ccfe",
      "parents": [
        "fe3ef05c7572d68721c1ddd4d36009611f565ba2"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:10:33 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:15 2011 +0300"
      },
      "message": "KVM: nVMX: Implement VMLAUNCH and VMRESUME\n\nImplement the VMLAUNCH and VMRESUME instructions, allowing a guest\nhypervisor to run its own guests.\n\nThis patch does not include some of the necessary validity checks on\nvmcs12 fields before the entry. These will appear in a separate patch\nbelow.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "fe3ef05c7572d68721c1ddd4d36009611f565ba2",
      "tree": "a26236a08fa32a1d312842e88380a24a4f5189c9",
      "parents": [
        "bf8179a011d40e7322d34440039b5e86a0d03aed"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:10:02 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:14 2011 +0300"
      },
      "message": "KVM: nVMX: Prepare vmcs02 from vmcs01 and vmcs12\n\nThis patch contains code to prepare the VMCS which can be used to actually\nrun the L2 guest, vmcs02. prepare_vmcs02 appropriately merges the information\nin vmcs12 (the vmcs that L1 built for L2) and in vmcs01 (our desires for our\nown guests).\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "bf8179a011d40e7322d34440039b5e86a0d03aed",
      "tree": "1b3cc83c1787d48da7f0f0a6b5370dc0ed4d35cc",
      "parents": [
        "a3a8ff8ebf87cbd828f54276d902c3c8ee0c4781"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:09:31 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:14 2011 +0300"
      },
      "message": "KVM: nVMX: Move control field setup to functions\n\nMove some of the control field setup to common functions. These functions will\nalso be needed for running L2 guests - L0\u0027s desires (expressed in these\nfunctions) will be appropriately merged with L1\u0027s desires.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "a3a8ff8ebf87cbd828f54276d902c3c8ee0c4781",
      "tree": "cec59762740530e9120e1df76deea620e1ddea36",
      "parents": [
        "49f705c5324aa13bb5623b392c23996e23eabc23"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:09:01 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:14 2011 +0300"
      },
      "message": "KVM: nVMX: Move host-state field setup to a function\n\nMove the setting of constant host-state fields (fields that do not change\nthroughout the life of the guest) from vmx_vcpu_setup to a new common function\nvmx_set_constant_host_state(). This function will also be used to set the\nhost state when running L2 guests.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "49f705c5324aa13bb5623b392c23996e23eabc23",
      "tree": "3b9ad512eb7d63f1d7a2b60d2671a963c632397c",
      "parents": [
        "6a4d7550601b5b17df227959bdbec208384f729c"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:08:30 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:14 2011 +0300"
      },
      "message": "KVM: nVMX: Implement VMREAD and VMWRITE\n\nImplement the VMREAD and VMWRITE instructions. With these instructions, L1\ncan read and write to the VMCS it is holding. The values are read or written\nto the fields of the vmcs12 structure introduced in a previous patch.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "6a4d7550601b5b17df227959bdbec208384f729c",
      "tree": "ccc7403ae0e31c34ad5f769bbcaf445817092a6b",
      "parents": [
        "63846663eac783eabbc1ab7c325e41a3627d986f"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:08:00 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:13 2011 +0300"
      },
      "message": "KVM: nVMX: Implement VMPTRST\n\nThis patch implements the VMPTRST instruction.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "63846663eac783eabbc1ab7c325e41a3627d986f",
      "tree": "2ff22aa2b03951943373a035254bc231ff5d774e",
      "parents": [
        "27d6c865211662721e6cf305706e4a3da35f12b4"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:07:29 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:12 2011 +0300"
      },
      "message": "KVM: nVMX: Implement VMPTRLD\n\nThis patch implements the VMPTRLD instruction.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "27d6c865211662721e6cf305706e4a3da35f12b4",
      "tree": "8ddad7953792e3ff0148e952dc9747db6a1b6305",
      "parents": [
        "0140caea3b9972f826416a796271f17b42cbe827"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:06:59 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:12 2011 +0300"
      },
      "message": "KVM: nVMX: Implement VMCLEAR\n\nThis patch implements the VMCLEAR instruction.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "0140caea3b9972f826416a796271f17b42cbe827",
      "tree": "c3a37c37274622361cf6a8974fdc17acc2c02a72",
      "parents": [
        "22bd035868b06a614debf7352c09fb3efdc7c269"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:06:28 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:12 2011 +0300"
      },
      "message": "KVM: nVMX: Success/failure of VMX instructions.\n\nVMX instructions specify success or failure by setting certain RFLAGS bits.\nThis patch contains common functions to do this, and they will be used in\nthe following patches which emulate the various VMX instructions.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "22bd035868b06a614debf7352c09fb3efdc7c269",
      "tree": "fd7efb3e2928e9b2a5e9764799aa4a23c640a77e",
      "parents": [
        "ff2f6fe9618806d365f76a6f11a4f37881919412"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:05:57 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:11 2011 +0300"
      },
      "message": "KVM: nVMX: Add VMCS fields to the vmcs12\n\nIn this patch we add to vmcs12 (the VMCS that L1 keeps for L2) all the\nstandard VMCS fields.\n\nLater patches will enable L1 to read and write these fields using VMREAD/\nVMWRITE, and they will be used during a VMLAUNCH/VMRESUME in preparing vmcs02,\na hardware VMCS for running L2.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "ff2f6fe9618806d365f76a6f11a4f37881919412",
      "tree": "f9434971981ca95302f973d2403b00ffa7d7e810",
      "parents": [
        "064aea774768749c6fd308b37818ea3a9600583d"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:05:27 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:11 2011 +0300"
      },
      "message": "KVM: nVMX: Introduce vmcs02: VMCS used to run L2\n\nWe saw in a previous patch that L1 controls its L2 guest with a vcms12.\nL0 needs to create a real VMCS for running L2. We call that \"vmcs02\".\nA later patch will contain the code, prepare_vmcs02(), for filling the vmcs02\nfields. This patch only contains code for allocating vmcs02.\n\nIn this version, prepare_vmcs02() sets *all* of vmcs02\u0027s fields each time we\nenter from L1 to L2, so keeping just one vmcs02 for the vcpu is enough: It can\nbe reused even when L1 runs multiple L2 guests. However, in future versions\nwe\u0027ll probably want to add an optimization where vmcs02 fields that rarely\nchange will not be set each time. For that, we may want to keep around several\nvmcs02s of L2 guests that have recently run, so that potentially we could run\nthese L2s again more quickly because less vmwrites to vmcs02 will be needed.\n\nThis patch adds to each vcpu a vmcs02 pool, vmx-\u003enested.vmcs02_pool,\nwhich remembers the vmcs02s last used to run up to VMCS02_POOL_SIZE L2s.\nAs explained above, in the current version we choose VMCS02_POOL_SIZE\u003d1,\nI.e., one vmcs02 is allocated (and loaded onto the processor), and it is\nreused to enter any L2 guest. In the future, when prepare_vmcs02() is\noptimized not to set all fields every time, VMCS02_POOL_SIZE should be\nincreased.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "064aea774768749c6fd308b37818ea3a9600583d",
      "tree": "2661c607089ed44b71f6478d376de6ae571da37f",
      "parents": [
        "b87a51ae2893a5907f796eadb4beb60747a69209"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:04:56 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:11 2011 +0300"
      },
      "message": "KVM: nVMX: Decoding memory operands of VMX instructions\n\nThis patch includes a utility function for decoding pointer operands of VMX\ninstructions issued by L1 (a guest hypervisor)\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "b87a51ae2893a5907f796eadb4beb60747a69209",
      "tree": "0dfe98e545b1e69268d37121eb9ad42726a6b8d4",
      "parents": [
        "a9d30f33dd21b67b2f4db09f3dfe63a7c390d1b3"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:04:25 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:11 2011 +0300"
      },
      "message": "KVM: nVMX: Implement reading and writing of VMX MSRs\n\nWhen the guest can use VMX instructions (when the \"nested\" module option is\non), it should also be able to read and write VMX MSRs, e.g., to query about\nVMX capabilities. This patch adds this support.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "a9d30f33dd21b67b2f4db09f3dfe63a7c390d1b3",
      "tree": "fabac8174f7dbf9322f593ee9e45632d4ae26379",
      "parents": [
        "5e1746d6205d1efa3193cc0c67aa2d15e54799bd"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:03:55 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:10 2011 +0300"
      },
      "message": "KVM: nVMX: Introduce vmcs12: a VMCS structure for L1\n\nAn implementation of VMX needs to define a VMCS structure. This structure\nis kept in guest memory, but is opaque to the guest (who can only read or\nwrite it with VMX instructions).\n\nThis patch starts to define the VMCS structure which our nested VMX\nimplementation will present to L1. We call it \"vmcs12\", as it is the VMCS\nthat L1 keeps for its L2 guest. We will add more content to this structure\nin later patches.\n\nThis patch also adds the notion (as required by the VMX spec) of L1\u0027s \"current\nVMCS\", and finally includes utility functions for mapping the guest-allocated\nVMCSs in host memory.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "5e1746d6205d1efa3193cc0c67aa2d15e54799bd",
      "tree": "9234ab8fddb5e7a8d86b506a19d7697566d51cfb",
      "parents": [
        "ec378aeef9dfc7c4ba72e9bd6cd4bd6f7d5fd0cc"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:03:24 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:10 2011 +0300"
      },
      "message": "KVM: nVMX: Allow setting the VMXE bit in CR4\n\nThis patch allows the guest to enable the VMXE bit in CR4, which is a\nprerequisite to running VMXON.\n\nWhether to allow setting the VMXE bit now depends on the architecture (svm\nor vmx), so its checking has moved to kvm_x86_ops-\u003eset_cr4(). This function\nnow returns an int: If kvm_x86_ops-\u003eset_cr4() returns 1, __kvm_set_cr4()\nwill also return 1, and this will cause kvm_set_cr4() will throw a #GP.\n\nTurning on the VMXE bit is allowed only when the nested VMX feature is\nenabled, and turning it off is forbidden after a vmxon.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "ec378aeef9dfc7c4ba72e9bd6cd4bd6f7d5fd0cc",
      "tree": "d6ae108db5cae27c7b07fa16f78c5eaafa2096d9",
      "parents": [
        "801d342432190947928e18f893f073fd87cd8bdf"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:02:54 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:09 2011 +0300"
      },
      "message": "KVM: nVMX: Implement VMXON and VMXOFF\n\nThis patch allows a guest to use the VMXON and VMXOFF instructions, and\nemulates them accordingly. Basically this amounts to checking some\nprerequisites, and then remembering whether the guest has enabled or disabled\nVMX operation.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "801d342432190947928e18f893f073fd87cd8bdf",
      "tree": "3967b58452246c2064741b0591fd076724c19bc7",
      "parents": [
        "b5c9ff731f3cee5a2f2d7154f48f8006b48eb66d"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@il.ibm.com",
        "time": "Wed May 25 23:02:23 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:09 2011 +0300"
      },
      "message": "KVM: nVMX: Add \"nested\" module option to kvm_intel\n\nThis patch adds to kvm_intel a module option \"nested\". This option controls\nwhether the guest can use VMX instructions, i.e., whether we allow nested\nvirtualization. A similar, but separate, option already exists for the\nSVM module.\n\nThis option currently defaults to 0, meaning that nested VMX must be\nexplicitly enabled by giving nested\u003d1. When nested VMX matures, the default\nshould probably be changed to enable nested VMX by default - just like\nnested SVM is currently enabled by default.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "b5c9ff731f3cee5a2f2d7154f48f8006b48eb66d",
      "tree": "bbea807577dd211bf52eca8397c6630f0bc7a01d",
      "parents": [
        "adf52235b4082e67f31bf1fba36f1dce312633d6"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Wed May 25 11:09:38 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:09 2011 +0300"
      },
      "message": "KVM: x86 emulator: Avoid clearing the whole decode_cache\n\nDuring tracing the emulator, we noticed that init_emulate_ctxt()\nsometimes took a bit longer time than we expected.\n\nThis patch is for mitigating the problem by some degree.\n\nBy looking into the function, we soon notice that it clears the whole\ndecode_cache whose size is about 2.5K bytes now.  Furthermore, most of\nthe bytes are taken for the two read_cache arrays, which are used only\nby a few instructions.\n\nConsidering the fact that we are not assuming the cache arrays have\nbeen cleared when we store actual data, we do not need to clear the\narrays: 2K bytes elimination.  In addition, we can avoid clearing the\nfetch_cache and regs arrays.\n\nThis patch changes the initialization not to clear the arrays.\n\nOn our 64-bit host, init_emulate_ctxt() becomes 0.3 to 0.5us faster with\nthis patch applied.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nCc: Gleb Natapov \u003cgleb@redhat.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "adf52235b4082e67f31bf1fba36f1dce312633d6",
      "tree": "a1bb9e64f46b7f6ae993c875e99dcc0a9776e4c0",
      "parents": [
        "d780592b99d7d8a5ff905f6bacca519d4a342c76"
      ],
      "author": {
        "name": "Takuya Yoshikawa",
        "email": "yoshikawa.takuya@oss.ntt.co.jp",
        "time": "Wed May 25 11:06:16 2011 +0900"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:08 2011 +0300"
      },
      "message": "KVM: x86 emulator: Clean up init_emulate_ctxt()\n\nUse a local pointer to the emulate_ctxt for simplicity.  Then, arrange\nthe hard-to-read mode selection lines neatly.\n\nSigned-off-by: Takuya Yoshikawa \u003cyoshikawa.takuya@oss.ntt.co.jp\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "d780592b99d7d8a5ff905f6bacca519d4a342c76",
      "tree": "b1779fdd8dfef925161ff804582b5377c0f86cd8",
      "parents": [
        "d462b8192368f10e979250377930f9695a4039d0"
      ],
      "author": {
        "name": "Jan Kiszka",
        "email": "jan.kiszka@siemens.com",
        "time": "Mon May 23 10:33:05 2011 +0200"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:08 2011 +0300"
      },
      "message": "KVM: Clean up error handling during VCPU creation\n\nSo far kvm_arch_vcpu_setup is responsible for freeing the vcpu struct if\nit fails. Move this confusing resonsibility back into the hands of\nkvm_vm_ioctl_create_vcpu. Only kvm_arch_vcpu_setup of x86 is affected,\nall other archs cannot fail.\n\nSigned-off-by: Jan Kiszka \u003cjan.kiszka@siemens.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "d462b8192368f10e979250377930f9695a4039d0",
      "tree": "4ea7e4c8cf963742cfab9a0400f1b4d671684b67",
      "parents": [
        "24c82e576b7860a4f02a21103e9df39e11e97006"
      ],
      "author": {
        "name": "Nadav Har\u0027El",
        "email": "nyh@math.technion.ac.il",
        "time": "Tue May 24 15:26:10 2011 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:08 2011 +0300"
      },
      "message": "KVM: VMX: Keep list of loaded VMCSs, instead of vcpus\n\nIn VMX, before we bring down a CPU we must VMCLEAR all VMCSs loaded on it\nbecause (at least in theory) the processor might not have written all of its\ncontent back to memory. Since a patch from June 26, 2008, this is done using\na per-cpu \"vcpus_on_cpu\" linked list of vcpus loaded on each CPU.\n\nThe problem is that with nested VMX, we no longer have the concept of a\nvcpu being loaded on a cpu: A vcpu has multiple VMCSs (one for L1, a pool for\nL2s), and each of those may be have been last loaded on a different cpu.\n\nSo instead of linking the vcpus, we link the VMCSs, using a new structure\nloaded_vmcs. This structure contains the VMCS, and the information pertaining\nto its loading on a specific cpu (namely, the cpu number, and whether it\nwas already launched on this cpu once). In nested we will also use the same\nstructure to hold L2 VMCSs, and vmx-\u003eloaded_vmcs is a pointer to the\ncurrently active VMCS.\n\nSigned-off-by: Nadav Har\u0027El \u003cnyh@il.ibm.com\u003e\nAcked-by: Acked-by: Kevin Tian \u003ckevin.tian@intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "24c82e576b7860a4f02a21103e9df39e11e97006",
      "tree": "2b16caf22244df1611c168472e9f8e2108673095",
      "parents": [
        "bcdd9a93c57571652c887cb522176db741893581"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Wed May 18 05:56:07 2011 -0400"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:07 2011 +0300"
      },
      "message": "KVM: Sanitize cpuid\n\nInstead of blacklisting known-unsupported cpuid leaves, whitelist known-\nsupported leaves.  This is more conservative and prevents us from reporting\nfeatures we don\u0027t support.  Also whitelist a few more leaves while at it.\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nAcked-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    },
    {
      "commit": "bcdd9a93c57571652c887cb522176db741893581",
      "tree": "a9d7521a43062db39644e0e4b45f6844de7ff63a",
      "parents": [
        "38e3b2b28c5f8fe7914172f4ba631ef4552824d6"
      ],
      "author": {
        "name": "Xiao Guangrong",
        "email": "xiaoguangrong@cn.fujitsu.com",
        "time": "Sun May 15 23:28:29 2011 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Tue Jul 12 11:45:07 2011 +0300"
      },
      "message": "KVM: MMU: cleanup for dropping parent pte\n\nIntroduce drop_parent_pte to remove the rmap of parent pte and\nclear parent pte\n\nSigned-off-by: Xiao Guangrong \u003cxiaoguangrong@cn.fujitsu.com\u003e\nSigned-off-by: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\n"
    }
  ],
  "next": "38e3b2b28c5f8fe7914172f4ba631ef4552824d6"
}