)]}'
{
  "log": [
    {
      "commit": "cf68d7a3f7f7dfb5f51a34c843bddbe176799ce9",
      "tree": "1c330c5fc8ae7ad42c65515895eb2e0657bd8f0b",
      "parents": [
        "33efecf03dc975a818685ee3d74a47ab93b483d2"
      ],
      "author": {
        "name": "Michael Bohan",
        "email": "mbohan@codeaurora.org",
        "time": "Wed Jan 11 17:53:05 2012 -0800"
      },
      "committer": {
        "name": "Michael Bohan",
        "email": "mbohan@codeaurora.org",
        "time": "Mon Jan 16 14:25:55 2012 -0800"
      },
      "message": "irq: irqdomain: Add API to find free irq range\n\nWhen registering irq chip drivers, one common requirement is to\nspecify the irq_domain irq_base and nr_irq. These fields represent\nthe system wide logical interrupt range the domain occupies.\nFor systems with only one interrupt controller, it\u0027s trivial to\nknow these values. But for systems with several irq chip drivers,\nit becomes painful to keep track of interrupt ranges in platform\ndefines. These create needless compile time dependencies, of\nwhich the Device Tree aims to solve.\n\nirq_alloc_desc() can search for a free irq, but is very\ninefficient for determining the availability of large ranges.\nAdditionally, some irq chip drivers allocate irq descriptors\nlazily. For example, portions of the Device Tree may not be parsed\nuntil a particular bus is probed. But of_irq_init() is intended to\nbe run at init time, and this is a natural time to allocate irq\ndomains. Thus by the time we allocate our irq descriptors, we already\nneed to know a range of acceptable irqs to use for the domain.\n\nTo solve these problems, let\u0027s introduce\nirq_domain_find_free_range(), which will return to the caller the\nfirst available irq domain range not used already by the system.\nThis range can then be specified with irq_domain_add().\n\nChange-Id: I8b0f5d25b173c76b8fc5d4f46b3fe9c6bf5c3c8f\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n"
    },
    {
      "commit": "6f4df41a29fadd17da7fdca722a8e07e02bb4829",
      "tree": "ac1835fb7c133656cd5b2d54d3f5ab9ab73cec95",
      "parents": [
        "b8635c3f53352d245f146ffa1facd13a6db3bea3"
      ],
      "author": {
        "name": "Michael Bohan",
        "email": "mbohan@codeaurora.org",
        "time": "Wed Jan 11 11:45:16 2012 -0800"
      },
      "committer": {
        "name": "Michael Bohan",
        "email": "mbohan@codeaurora.org",
        "time": "Mon Jan 16 14:25:54 2012 -0800"
      },
      "message": "irq: irqdomain: Change irq_domain_add to detect errors\n\nIt should not be valid to add an irq_domain with a logical irq\nrange that overlaps with another already registered to the\nsystem. Return an error on such an occurrence.\n\nThis change also inherently sorts the irq_domains by logical\nirq_base as they are added.\n\nChange-Id: Idef697dbe4584d783703d053fbf09f1b17e62ab0\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n"
    },
    {
      "commit": "e6717fdd1fbc2bbc3fb7c7a9932a195eee6b1522",
      "tree": "d0bf06a3d2bd0268969d7d26c2a8de5e58a4ea9a",
      "parents": [
        "56b42db68ddf6aac9bc33130535e2a52d309ceea"
      ],
      "author": {
        "name": "Michael Bohan",
        "email": "mbohan@codeaurora.org",
        "time": "Tue Jan 03 16:37:43 2012 -0800"
      },
      "committer": {
        "name": "Michael Bohan",
        "email": "mbohan@codeaurora.org",
        "time": "Mon Jan 16 14:25:42 2012 -0800"
      },
      "message": "irq: irqdomain: Add support for dynamic irq_desc allocations\n\nThe current irq_domain_add() design assumes the underlying\nirq_descs are valid when irq_domain_add() is called. It also\nassumes that every hwirq enlisted in the irq_domain is valid.\nOften, these assumptions are not correct.\n\nTypically, irq_domain_add() is called at board_init time, but\nsometimes interrupt chip drivers are not initialized until an\nunderlying bus is probed. When using SPARSE_IRQ, it\u0027s quite\nnatural to hold off allocating irq_descs until the board\ntopology specifies them as included.\n\nAnd in such device topologies, there\u0027s no guarantee that chip\ninterrupt numbers will be contiguous. For example, each hwirq may\nmap to a particular device, but that device may or may not be\npresent in the actual hardware configuration. In order to support\nthis, we need the concept of an irq_domain that supports holes\nin it.\n\nIn order to solve these problems, let\u0027s break the irq_domain\ncreation from the irq registration process. The irq_domain\ncreation can occur at init time and then have no dependencies. An\ninterrupt is not \u0027registered\u0027 with the domain until its resources\nhave already been allocated by the chip driver. For simple cases,\nan additional API is provided to register the entire\nlogical irq_domain range to provide feature parity with what\nalready exists.\n\nChange-Id: Ie3340d07ba8663196dc87d1185e3bb7fbed4be4d\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n"
    },
    {
      "commit": "60fe460c072b19aeda65adf17cd59bf3a946db8d",
      "tree": "c8f8202e3c3e42eb290bf304605034305576186b",
      "parents": [
        "36b2c36335003a8d7eee62ae3ab73cfd99268302"
      ],
      "author": {
        "name": "Rob Herring",
        "email": "rob.herring@calxeda.com",
        "time": "Fri Sep 30 10:48:38 2011 -0500"
      },
      "committer": {
        "name": "Trilok Soni",
        "email": "tsoni@codeaurora.org",
        "time": "Mon Dec 26 15:47:59 2011 +0530"
      },
      "message": "irq: support domains with non-zero hwirq base\n\nInterrupt controllers can have non-zero starting value for h/w irq numbers.\nAdding support in irq_domain allows the domain hwirq numbering to match\nthe interrupt controllers\u0027 numbering.\n\nAs this makes looping over irqs for a domain more complicated, add loop\niterators to iterate over all hwirqs and irqs for a domain.\n\nChange-Id: I64774aea2f3efb883fe11e9f6161970f7e7dc0fc\nSigned-off-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nReviewed-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nTested-by: Thomas Abraham \u003cthomas.abraham@linaro.org\u003e\nAcked-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Trilok Soni \u003ctsoni@codeaurora.org\u003e\n"
    },
    {
      "commit": "19d9d54b6b92b04eb8edccc1a3b86270caa84b89",
      "tree": "c5717c07488b0f64943483adccfa0c82a6308cea",
      "parents": [
        "303ecac2f92962a452e5e4956a8cb07a20b242b6"
      ],
      "author": {
        "name": "Rob Herring",
        "email": "robherring2@gmail.com",
        "time": "Wed Sep 14 11:31:36 2011 -0500"
      },
      "committer": {
        "name": "Trilok Soni",
        "email": "tsoni@codeaurora.org",
        "time": "Mon Dec 26 15:47:56 2011 +0530"
      },
      "message": "irq: Add declaration of irq_domain_simple_ops to irqdomain.h\n\nirq_domain_simple_ops is exported, but is not declared in irqdomain.h,\nso add it.\n\nChange-Id: I04f6ba1621d349c29becea9c989ec87ef15a64bb\nSigned-off-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nCc: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nCc: marc.zyngier@arm.com\nCc: thomas.abraham@linaro.org\nCc: jamie@jamieiles.com\nCc: b-cousson@ti.com\nCc: shawn.guo@linaro.org\nCc: linux-arm-kernel@lists.infradead.org\nCc: devicetree-discuss@lists.ozlabs.org\nLink: http://lkml.kernel.org/r/1316017900-19918-2-git-send-email-robherring2@gmail.com\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Trilok Soni \u003ctsoni@codeaurora.org\u003e\n"
    },
    {
      "commit": "971a0ee566cbe64558020ee6c254910516a43549",
      "tree": "a2d7fa66effa881da7c7fdb70c702a2867446550",
      "parents": [
        "6469dfb4eeada88ded776eebdd8a687146ffa286"
      ],
      "author": {
        "name": "Grant Likely",
        "email": "grant.likely@secretlab.ca",
        "time": "Tue Jul 26 03:19:06 2011 -0600"
      },
      "committer": {
        "name": "Sathish Ambley",
        "email": "sambley@codeaurora.org",
        "time": "Mon Oct 24 10:42:45 2011 -0700"
      },
      "message": "dt/irq: add irq_domain_generate_simple() helper\n\nirq_domain_generate_simple() is an easy way to generate an irq translation\ndomain for simple irq controllers.  It assumes a flat 1:1 mapping from\nhardware irq number to an offset of the first linux irq number assigned\nto the controller\n\nChange-Id: I0820754314a0c15b1cc9881bc38b75b0de2509b2\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nSigned-off-by: Sathish Ambley \u003csambley@codeaurora.org\u003e\n"
    },
    {
      "commit": "6469dfb4eeada88ded776eebdd8a687146ffa286",
      "tree": "bda65acc3b37508de2c9829cb18bc90ea9fabdd1",
      "parents": [
        "00f0deb25f2074062b0af7db870b8f34b4906b1d"
      ],
      "author": {
        "name": "Grant Likely",
        "email": "grant.likely@secretlab.ca",
        "time": "Tue Jul 26 03:19:06 2011 -0600"
      },
      "committer": {
        "name": "Sathish Ambley",
        "email": "sambley@codeaurora.org",
        "time": "Mon Oct 24 10:42:45 2011 -0700"
      },
      "message": "irq: add irq_domain translation infrastructure\n\nThis patch adds irq_domain infrastructure for translating from\nhardware irq numbers to linux irqs.  This is particularly important\nfor architectures adding device tree support because the current\nimplementation (excluding PowerPC and SPARC) cannot handle\ntranslation for more than a single interrupt controller.  irq_domain\nsupports device tree translation for any number of interrupt\ncontrollers.\n\nThis patch converts x86, Microblaze, ARM and MIPS to use irq_domain\nfor device tree irq translation.  x86 is untested beyond compiling it,\nirq_domain is enabled for MIPS and Microblaze, but the old behaviour is\npreserved until the core code is modified to actually register an\nirq_domain yet.  On ARM it works and is required for much of the new\nARM device tree board support.\n\nPowerPC has /not/ been converted to use this new infrastructure.  It\nis still missing some features before it can replace the virq\ninfrastructure already in powerpc (see documentation on\nirq_domain_map/unmap for details).  Followup patches will add the\nmissing pieces and migrate PowerPC to use irq_domain.\n\nSPARC has its own method of managing interrupts from the device tree\nand is unaffected by this change.\n\nChange-Id: Ia5fa674a97c85e2fc8e30275753b1494a97bd1d9\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nSigned-off-by: Sathish Ambley \u003csambley@codeaurora.org\u003e\n"
    }
  ]
}