)]}' { "log": [ { "commit": "b203bd3f6b9c3db3b1979c2ff79bb2b9be8f03a3", "tree": "647397b857fcad368078a72711ad2d25c7ea030a", "parents": [ "6c11371dd17c5bd29e3a53cf5263be6ea67c51e4" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Thu Mar 03 07:54:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 17:52:35 2011 -0800" }, "message": "dmatest: fix automatic buffer unmap type\n\nThe dmatest code relies on the DMAEngine API to automatically call\ndma_unmap_single() on src buffers. The flags it passes are incorrect,\nfix them.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6c11371dd17c5bd29e3a53cf5263be6ea67c51e4", "tree": "012aaba103ad8f685cd1b6bb882472b56818b446", "parents": [ "f5539af572ffa35545f21f604fb747eae55c8042", "0b863b333f529c7ddd8bee58e6696a7254417a05" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 14:56:58 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 14:56:58 2011 -0800" }, "message": "Merge branch \u0027for_dan\u0027 of git://git.infradead.org/users/vkoul/slave-dma into dmaengine\n\n* \u0027for_dan\u0027 of git://git.infradead.org/users/vkoul/slave-dma:\n drivers, pch_dma: Fix warning when CONFIG_PM\u003dn.\n dmaengine/dw_dmac fix: use readl \u0026 writel instead of __raw_readl \u0026 __raw_writel\n avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize\n dw_dmac: Setting Default Burst length for transfers as 16.\n dw_dmac: Allow src/dst msize \u0026 flow controller to be configured at runtime\n dw_dmac: Changing type of src_master and dest_master to u8.\n dw_dmac: Pass Channel Priority from platform_data\n dw_dmac: Pass Channel Allocation Order from platform_data\n dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finish\n dw_dmac: Change value of DWC_MAX_COUNT to 4095.\n dw_dmac: Adding support for 64 bit access width for memcpy xfers\n dw_dmac: Calling dwc_scan_descriptors from dwc_tx_status() after taking lock\n dw_dmac: Move single descriptor from dwc-\u003equeue to dwc-\u003eactive_list in dwc_complete_all\n dw_dmac: Replace module_init() with subsys_initcall()\n dw_dmac: Remove compilation dependency from AVR32 and put on HAVE_CLK\n dmaengine: mxs-dma: add dma support for i.MX23/28\n pch_dma: set the number of array correctly\n pch_dma: fix kernel error issue\n" }, { "commit": "f5539af572ffa35545f21f604fb747eae55c8042", "tree": "86b0e51b9257ce8ffc63bebb379259e7f4ff4bf9", "parents": [ "0670e7157f75ec6d2231fbc6f67b075d6b6d486f", "4abed0af1e9bc911f28bb525eece522d94d047f2" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 14:45:54 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 11 14:45:54 2011 -0800" }, "message": "Merge branch \u0027dmaengine-fixes\u0027 into dmaengine\n" }, { "commit": "0b863b333f529c7ddd8bee58e6696a7254417a05", "tree": "4f25d8bd9fa20d6d9f4b60ef8dc8675c4b2cbeaa", "parents": [ "29782da5f0206335e2325508ba4fee0d624ddab6" ], "author": { "name": "Rakib Mullick", "email": "rakib.mullick@gmail.com", "time": "Sun Mar 06 17:26:10 2011 +0600" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:26:50 2011 +0530" }, "message": "drivers, pch_dma: Fix warning when CONFIG_PM\u003dn.\n\nWhen CONFIG_PM\u003dn, we get the following warning:\n\ndrivers/dma/pch_dma.c:741: warning: ‘pch_dma_suspend’ defined but not used\ndrivers/dma/pch_dma.c:755: warning: ‘pch_dma_resume’ defined but not used\n\nTo fix it, wrap pch_dma_{suspend,resume} and\npch_dma_{save,restore}_regs functions with CONFIG_PM.\n\nSigned-off-by: Rakib Mullick \u003crakib.mullick@gmail.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "29782da5f0206335e2325508ba4fee0d624ddab6", "tree": "e9398004d1647b7082b86dcc392999de69e8e16b", "parents": [ "1c5b0538c719f52cface39f699fb5d39a50149d6" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Fri Mar 04 14:58:32 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dmaengine/dw_dmac fix: use readl \u0026 writel instead of __raw_readl \u0026 __raw_writel\n\nOn ARMv7 cores, device memory mapped as Normal Non-cacheable, may not guarantee\nordered access causing failures in device drivers that do not use the mandatory\nmemory barriers. readl \u0026 writel versions contain necessary memory barriers for\nthis.\n\ncommit 79f64dbf68c8a9779a7e9a25e0a9f0217a25b57a: \"ARM: 6273/1: Add barriers to\nthe I/O accessors if ARM_DMA_MEM_BUFFERABLE\" can be referred for more\ninformation on this.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "1c5b0538c719f52cface39f699fb5d39a50149d6", "tree": "e06d61c874c41d50ee1f64393597385263f25dcf", "parents": [ "e51dc53b8c7fa2d9ac4ef8f317f5dfe07a79e65a" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:26 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize\n\nNow that the dw_dmac DMA driver supports configurable Flow Controller, source\nand destination burst or msize, we need to specify which ones to use. Msize or\nburst size was previously hardcoded to 1, Flow controller was DMA for both\nM2P \u0026 P2M transfers.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "e51dc53b8c7fa2d9ac4ef8f317f5dfe07a79e65a", "tree": "dedf52405560df64c96b2e33b7d55ac1f3df3b39", "parents": [ "ee66509d7f354eecb45ac99f21ea6aa8650dea7e" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:25 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Setting Default Burst length for transfers as 16.\n\nThis patch sets default Burst length for all transfer to 16. This will\nenhance performance when user doesn\u0027t have any chan-\u003eprivate data.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "ee66509d7f354eecb45ac99f21ea6aa8650dea7e", "tree": "206438e7c0ef9a7f0633fe44d6f306fdbf4b0b4e", "parents": [ "59c22fc11d12b69da36c6585a38229863ba0bb16" ], "author": { "name": "Viresh KUMAR", "email": "viresh.kumar@st.com", "time": "Fri Mar 04 15:42:51 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Allow src/dst msize \u0026 flow controller to be configured at runtime\n\nMsize or Burst Size is peripheral dependent in case of prep_slave_sg and\ncyclic_prep transfers, and in case of memcpy transfers it is platform dependent.\nSo msize configuration must come from platform data.\n\nAlso some peripherals (ex: JPEG), need to be flow controller for dma transfers,\nso this information in case of slave_sg \u0026 cyclic_prep transfers must come from\nplatform data.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "59c22fc11d12b69da36c6585a38229863ba0bb16", "tree": "9c39bb6032e724142d6f7de643149f5858ac7a11", "parents": [ "93317e8e35b77633d589fe0e132291195757d785" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:23 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Changing type of src_master and dest_master to u8.\n\nsrc_master \u0026 dest_master don\u0027t required u32 as they have values limited to u8\nonly. Also their description is missing from doc style comment. This patch\nfixes above mentioned issues.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "93317e8e35b77633d589fe0e132291195757d785", "tree": "c3419c1a02e3952506ca0af281f9f9c5bc52888d", "parents": [ "b0c3130d69bda5cd91aa3b3f08e7878df49fde69" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:22 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Pass Channel Priority from platform_data\n\nIn Synopsys designware, channel priority is programmable. This patch adds\nsupport for passing channel priority through platform data. By default Ascending\nchannel priority will be followed, i.e. channel 0 will get highest priority and\nchannel 7 will get lowest.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "b0c3130d69bda5cd91aa3b3f08e7878df49fde69", "tree": "a75091d3489cc2db2a806cd30d0ef6f80419e86d", "parents": [ "e518076ef8cb56adb558ff56ad5bfa0cd9f3abd9" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:21 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:28 2011 +0530" }, "message": "dw_dmac: Pass Channel Allocation Order from platform_data\n\nIn SPEAr Platform channels 4-7 have more Fifo depth. So we must get better\nchannel first. This patch introduces concept of channel allocation order in\ndw_dmac. If user doesn\u0027t pass anything or 0, than normal (ascending) channel\nallocation will follow, else channels will be allocated in descending order.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "e518076ef8cb56adb558ff56ad5bfa0cd9f3abd9", "tree": "ce195fa32ee663a23a346ac042b70b01385ab58d", "parents": [ "418e74070662e1ae7d9bb5202f773d35c9a7f05e" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:20 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finish\n\ndwc_desc_get checks all descriptors for DMA_CTRL_ACK before allocating them for\ntransfers. And descriptors are not marked with DMA_CRTL_ACK after transfer\nfinishes. Thus descriptor once used is not usable again. This patch marks\ndescriptors with DMA_CRTL_ACK after dma xfer finishes\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "418e74070662e1ae7d9bb5202f773d35c9a7f05e", "tree": "23bd64f0d62af665ae69b67f608cb416e60e16ea", "parents": [ "a02274564dd78f7edde3c9ff197ed44f2f8a5a81" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Fri Mar 04 15:42:50 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Change value of DWC_MAX_COUNT to 4095.\n\nEvery descriptor can transfer a maximum count of 4095 (12 bits, in control reg),\nSo we must have DWC_MAX_COUNT as 4095 instead of 2048.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a02274564dd78f7edde3c9ff197ed44f2f8a5a81", "tree": "ffbce0c15b05ea36a1fb2470ad5ab573ba175f98", "parents": [ "569432efa7975f5795efb8142134f5a098942381" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:18 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Adding support for 64 bit access width for memcpy xfers\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "569432efa7975f5795efb8142134f5a098942381", "tree": "a62ccafa3526a7da531b56d2a75c1bc21b3ff05c", "parents": [ "f336e42f73d93b74fd21bf9176ee6c7ab8b195c5" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:17 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Calling dwc_scan_descriptors from dwc_tx_status() after taking lock\n\nLock must be taken before calling dwc_scan_descriptors, as this may\naccess/modify shared data and queues. dwc_tx_status wasn\u0027t taking lock before\ncalling this routine. This patch add code that takes lock before calling\ndwc_scan_descriptors.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f336e42f73d93b74fd21bf9176ee6c7ab8b195c5", "tree": "fd42f601403891f212943fe3c186a30bc5698c0f", "parents": [ "cb689a706d17ef19a61735670ded60466dd015fa" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:16 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Move single descriptor from dwc-\u003equeue to dwc-\u003eactive_list in dwc_complete_all\n\ndwc_complete_all and other routines was removing all descriptors from dwc-\u003equeue\nand pushing them to dwc-\u003eactive_list. Only one was required to be removed. Also\nwe are calling dwc_dostart, once list is fixed.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "cb689a706d17ef19a61735670ded60466dd015fa", "tree": "34172bc4222c9d4a5970a7509f5adde79e500d46", "parents": [ "f44ad7e91dd12bed0959b3e715f4f3ab84951a59" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:15 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Replace module_init() with subsys_initcall()\n\nIn some cases users of dw_dmac are initialized before dw_dmac, and if they try\nto use dw_dmac, they simply fail. So its better we register init() routine\nof driver using subsys_initcall() instead of module_init(), so that dma driver\nis available at the earliest possible.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "f44ad7e91dd12bed0959b3e715f4f3ab84951a59", "tree": "ad40522874528c87cfc367f882df147afdf71e9d", "parents": [ "a580b8c5429a624d120cd603e1498bf676e2b4da" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Thu Mar 03 15:47:14 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Mon Mar 07 01:12:27 2011 +0530" }, "message": "dw_dmac: Remove compilation dependency from AVR32 and put on HAVE_CLK\n\nThis driver will now be used in atleast two platforms AVR32 \u0026 ARM. And there is\nno actual hardware dependency of this driver over AVR32 or ARM. So this\ndependency can be removed altogether.\n\nAlso dw_dmac driver uses clk framework and must have compilation dependency on\nHAVE_CLK\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "a580b8c5429a624d120cd603e1498bf676e2b4da", "tree": "14e4bd82f203bf9f43fa19341d85d993e5a4c569", "parents": [ "26d890f0d09fd58f7194aad651e86283cb9e6574" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Sun Feb 27 00:47:42 2011 +0800" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Wed Mar 02 07:06:27 2011 +0530" }, "message": "dmaengine: mxs-dma: add dma support for i.MX23/28\n\nThis patch adds dma support for Freescale MXS-based SoC i.MX23/28,\nincluding apbh-dma and apbx-dma.\n\n* apbh-dma and apbx-dma are supported in the driver as two mxs-dma\n instances.\n\n* apbh-dma is different between mx23 and mx28, hardware version\n register is used to differentiate.\n\n* mxs-dma supports pio function besides data transfer. The driver\n uses dma_data_direction DMA_NONE to identify the pio mode, and\n steals sgl and sg_len to get pio words and numbers from clients.\n\n* mxs dmaengine has some very specific features, like sense function\n and the special NAND support (nand_lock, nand_wait4ready). These\n are too specific to implemented in generic dmaengine driver.\n\n* The driver refers to imx-sdma and only a single descriptor is\n statically assigned to each channel.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "26d890f0d09fd58f7194aad651e86283cb9e6574", "tree": "28cc2ba40f6d8d1e106f27662d49edf430a0a884", "parents": [ "c5a9f9d0895b2c16908979244d3d678fd6db0545" ], "author": { "name": "Tomoya MORINAGA", "email": "tomoya-linux@dsn.okisemi.com", "time": "Fri Feb 18 10:01:21 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Feb 26 20:18:33 2011 +0530" }, "message": "pch_dma: set the number of array correctly\n\nset the number of array correctly.\n\nSigned-off-by: Tomoya MORINAGA \u003ctomoya-linux@dsn.okisemi.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "c5a9f9d0895b2c16908979244d3d678fd6db0545", "tree": "da7855891e874662423a796e5834ba06294adccb", "parents": [ "0670e7157f75ec6d2231fbc6f67b075d6b6d486f" ], "author": { "name": "Tomoya MORINAGA", "email": "tomoya-linux@dsn.okisemi.com", "time": "Fri Feb 18 10:01:20 2011 +0530" }, "committer": { "name": "Vinod Koul", "email": "vinod.koul@intel.com", "time": "Sat Feb 26 20:18:29 2011 +0530" }, "message": "pch_dma: fix kernel error issue\n\nfix the following kernel error\n\n------------[ cut here ]------------\nWARNING: at kernel/softirq.c:159 _local_bh_enable_ip.clone.5+0x35/0x71()\nHardware name: To be filled by O.E.M.\nModules linked in: pch_uart pch_dma fuse mga drm cpufreq_ondemand acpi_cpufreq mperf ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_filter ip6_tables ipv6 uinput snd_hda_codec_realtek snd_hda_intel snd_hda_codec matroxfb_base snd_hwdep 8250_pnp snd_seq snd_seq_device matroxfb_DAC1064 snd_pcm joydev 8250 matroxfb_accel snd_timer matroxfb_Ti3026 ppdev pegasus parport_pc snd parport matroxfb_g450 g450_pll serial_core video output matroxfb_misc soundcore snd_page_alloc serio_raw pcspkr ext4 jbd2 crc16 sdhci_pci sdhci mmc_core floppy [last unloaded: scsi_wait_scan]\nPid: 0, comm: swapper Not tainted 2.6.37.upstream_check+ #8\nCall Trace:\n [\u003cc0433add\u003e] warn_slowpath_common+0x65/0x7a\n [\u003cc043825b\u003e] ? _local_bh_enable_ip.clone.5+0x35/0x71\n [\u003cc0433b01\u003e] warn_slowpath_null+0xf/0x13\n [\u003cc043825b\u003e] _local_bh_enable_ip.clone.5+0x35/0x71\n [\u003cc043829f\u003e] local_bh_enable_ip+0x8/0xa\n [\u003cc06ec471\u003e] _raw_spin_unlock_bh+0x10/0x12\n [\u003cf82b57dd\u003e] pd_prep_slave_sg+0xba/0x200 [pch_dma]\n [\u003cf82f7b7a\u003e] pch_uart_interrupt+0x44d/0x6aa [pch_uart]\n [\u003cc046fa97\u003e] handle_IRQ_event+0x1d/0x9e\n [\u003cc047146f\u003e] handle_fasteoi_irq+0x90/0xc7\n [\u003cc04713df\u003e] ? handle_fasteoi_irq+0x0/0xc7\n \u003cIRQ\u003e [\u003cc04045af\u003e] ? do_IRQ+0x3e/0x89\n [\u003cc04035a9\u003e] ? common_interrupt+0x29/0x30\n [\u003cc04400d8\u003e] ? sys_getpriority+0x12d/0x1a2\n [\u003cc058bb2b\u003e] ? arch_local_irq_enable+0x5/0xb\n [\u003cc058c740\u003e] ? acpi_idle_enter_bm+0x22a/0x261\n [\u003cc0648b11\u003e] ? cpuidle_idle_call+0x70/0xa1\n [\u003cc0401f44\u003e] ? cpu_idle+0x49/0x6a\n [\u003cc06d9fc4\u003e] ? rest_init+0x58/0x5a\n [\u003cc089e762\u003e] ? start_kernel+0x2d0/0x2d5\n [\u003cc089e0ce\u003e] ? i386_start_kernel+0xce/0xd5\n\nSigned-off-by: Tomoya MORINAGA \u003ctomoya-linux@dsn.okisemi.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\n" }, { "commit": "0670e7157f75ec6d2231fbc6f67b075d6b6d486f", "tree": "64591858de42da54afc979338ee083d1e6d672a0", "parents": [ "80cc07af0f6692a7d8fdc5087594d1988a701266", "4aa5f366431fef0afca0df348ca9782c63ac9911" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:51 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:51 2011 -0800" }, "message": "Merge branch \u0027dw_dmac\u0027 into dmaengine\n" }, { "commit": "80cc07af0f6692a7d8fdc5087594d1988a701266", "tree": "a21ae71038bbfd75306b81a85c0c65121cd84f4f", "parents": [ "e19d1d4988f8020c25bf1758f9a898e1374cef35", "0c842b551063c5f7382ac9b457992f3b34972801" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:44 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 03:36:44 2011 -0800" }, "message": "Merge branch \u0027dma40\u0027 into dmaengine\n" }, { "commit": "4abed0af1e9bc911f28bb525eece522d94d047f2", "tree": "479c8dbf74f0735d3f669da4ca5694ad82f76b03", "parents": [ "e19d1d4988f8020c25bf1758f9a898e1374cef35" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 00:42:08 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:42:00 2011 -0800" }, "message": "dmaengine: add slave-dma maintainer\n\nSlave-dma has become the predominant usage model for dmaengine and needs\nspecial attention. Memory-to-memory dma usage cases will continue to be\nmaintained by Dan.\n\nCc: Alan Cox \u003calan@linux.intel.com\u003e\nAcked-by: Vinod Koul \u003cvinod.koul@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e19d1d4988f8020c25bf1758f9a898e1374cef35", "tree": "5bd1ba3f13178becefad85b41a8bfe8c4652cee2", "parents": [ "a646bd7f0824d3e0f02ff8d7410704f965de01bc", "60f1df5dc6ecd07befc332ae30109fb86505634c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:40:46 2011 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:40:46 2011 -0800" }, "message": "Merge branch \u0027imx\u0027 into dmaengine-fixes\n" }, { "commit": "a646bd7f0824d3e0f02ff8d7410704f965de01bc", "tree": "8504b83156a36ce508821a334b67d8a55b7dca89", "parents": [ "8179661694595eb3a4f2ff9bb0b73acbb7d2f4a9" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Mon Jan 31 13:22:29 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Feb 14 02:28:16 2011 -0800" }, "message": "dma: ipu_idmac: do not lose valid received data in the irq handler\n\nCurrently when two or more buffers are queued by the camera driver\nand so the double buffering is enabled in the idmac, we lose one\nframe comming from CSI since the reporting of arrival of the first\nframe is deferred by the DMAIC_7_EOF interrupt handler and reporting\nof the arrival of the last frame is not done at all. So when requesting\nN frames from the image sensor we actually receive N - 1 frames in\nuser space.\n\nThe reason for this behaviour is that the DMAIC_7_EOF interrupt\nhandler misleadingly assumes that the CUR_BUF flag is pointing to the\nbuffer used by the IDMAC. Actually it is not the case since the\nCUR_BUF flag will be flipped by the FSU when the FSU is sending the\n\u003cTASK\u003e_NEW_FRM_RDY signal when new frame data is delivered by the CSI.\nWhen sending this singal, FSU updates the DMA_CUR_BUF and the\nDMA_BUFx_RDY flags: the DMA_CUR_BUF is flipped, the DMA_BUFx_RDY\nis cleared, indicating that the frame data is beeing written by\nthe IDMAC to the pointed buffer. DMA_BUFx_RDY is supposed to be\nset to the ready state again by the MCU, when it has handled the\nreceived data. DMAIC_7_CUR_BUF flag won\u0027t be flipped here by the\nIPU, so waiting for this event in the EOF interrupt handler is wrong.\nActually there is no spurious interrupt as described in the comments,\nthis is the valid DMAIC_7_EOF interrupt indicating reception of the\nframe from CSI.\n\nThe patch removes code that waits for flipping of the DMAIC_7_CUR_BUF\nflag in the DMAIC_7_EOF interrupt handler. As the comment in the\ncurrent code denotes, this waiting doesn\u0027t help anyway. As a result\nof this removal the reporting of the first arrived frame is not\ndeferred to the time of arrival of the next frame and the drivers\nsoftware flag \u0027ichan-\u003eactive_buffer\u0027 is in sync with DMAIC_7_CUR_BUF\nflag, so the reception of all requested frames works.\n\nThis has been verified on the hardware which is triggering the\nimage sensor by the programmable state machine, allowing to\nobtain exact number of frames. On this hardware we do not tolerate\nlosing frames.\n\nThis patch also removes resetting the DMA_BUFx_RDY flags of\nall channels in ipu_disable_channel() since transfers on other\nDMA channels might be triggered by other running tasks and the\nbuffers should always be ready for data sending or reception.\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nReviewed-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nTested-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "60f1df5dc6ecd07befc332ae30109fb86505634c", "tree": "77cb78a15424ff493f4d171d66752009b4483420", "parents": [ "2335d338a20a6f5ac70ae4338733c8ff5933f978", "341b9419a8c0a4cdb75773c576870f1eb655516d" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:51 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:51 2011 +0100" }, "message": "Merge branch \u0027dmaengine-shawn\u0027 into dmaengine\n" }, { "commit": "2335d338a20a6f5ac70ae4338733c8ff5933f978", "tree": "32d4d5270a761c72854258c9c3d1180de34ebb4b", "parents": [ "f8a356ff96a9070156f863e4f7716e2a0eb8c995", "23889c6352ab4a842a30221bb412ff49954b2fb3" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:48 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:48 2011 +0100" }, "message": "Merge branch \u0027dmaengine-sdma\u0027 into dmaengine\n" }, { "commit": "341b9419a8c0a4cdb75773c576870f1eb655516d", "tree": "cfa8912c361d8cf24a67a8bc560523537769695f", "parents": [ "1e9cebb42de57f1243261939c77ab5b0f9bcf311" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:39 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:23 2011 +0100" }, "message": "dmaengine: imx-sdma: fix up param for the last BD in sdma_prep_slave_sg()\n\nAs per the reference manual, bit \"L\" should be set while bit \"C\"\nshould be cleared for the last buffer descriptor in the non-cyclic\nchain, so that sdma can stop trying to find the next BD and end\nthe transfer.\n\nIn case of sdma_prep_slave_sg(), BD_LAST needs to be set and BD_CONT\nbe cleared for the last BD.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1e9cebb42de57f1243261939c77ab5b0f9bcf311", "tree": "aaeee8f1f5d9e61e0adc7adb9273558761b3892f", "parents": [ "8a9659114c7be6f88253618252881ea6fe0588b4" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:38 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:42:12 2011 +0100" }, "message": "dmaengine: imx-sdma: correct sdmac-\u003estatus in sdma_handle_channel_loop()\n\nsdma_handle_channel_loop() is the handler of cyclic tx. One period\nsuccess does not really mean the success of the tx. Instead of\nDMA_SUCCESS, DMA_IN_PROGRESS should be the one to tell.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "8a9659114c7be6f88253618252881ea6fe0588b4", "tree": "4845609a6f7c48391ec1fee2a01c854590855415", "parents": [ "4b2ce9ddb370c4eb573540611c347d78ac4b54a0" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:37 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:41:59 2011 +0100" }, "message": "dmaengine: imx-sdma: return sdmac-\u003estatus in sdma_tx_status()\n\nThe sdmac-\u003estatus was designed to reflect the status of the tx,\nso simply return it in sdma_tx_status(). Then dma client can call\ndma_async_is_tx_complete() to know the status of the tx.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "4b2ce9ddb370c4eb573540611c347d78ac4b54a0", "tree": "c4fa0f7baab20d7990ca4b2628af6f60ac249386", "parents": [ "1797c33f0edcdcc9a483c06233a203786666a97f" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:36 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:41:50 2011 +0100" }, "message": "dmaengine: imx-sdma: set sdmac-\u003estatus to DMA_ERROR in err_out of sdma_prep_slave_sg()\n\nsdma_prep_dma_cyclic() sets sdmac-\u003estatus to DMA_ERROR in err_out,\nand sdma_prep_slave_sg() needs to do the same. Otherwise,\nsdmac-\u003estatus stays at DMA_IN_PROGRESS, which will make the function\nreturn immediately next time it gets called.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1797c33f0edcdcc9a483c06233a203786666a97f", "tree": "2916f6f267029f871028347c9fcb9739f7110329", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Thu Jan 20 05:50:35 2011 +0800" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:41:43 2011 +0100" }, "message": "dmaengine: imx-sdma: remove IMX_DMA_SG_LOOP handling in sdma_prep_slave_sg()\n\nThis is a leftover from the time that the driver did not have\nsdma_prep_dma_cyclic callback and implemented sound dma as a looped\nsg chain. And it can be removed now.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "f8a356ff96a9070156f863e4f7716e2a0eb8c995", "tree": "841388fffbd9bbca97f48cc64d6b58c8cfa829cd", "parents": [ "97a43dfe84119528ec2576129b91d619219ab716" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 11:35:59 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:36:23 2011 +0100" }, "message": "dmaengine i.MX dma: initialize dma capabilities outside channel loop\n\nThe capabilities are device specific fields, not channel specific fields.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "97a43dfe84119528ec2576129b91d619219ab716", "tree": "575ba990a8d34e35534366aa91d41b4afc474855", "parents": [ "d07102a1bb0e759ce4571df30c62998ef5d8a8d3" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 11:35:44 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:36:10 2011 +0100" }, "message": "dmaengine i.MX DMA: do not initialize chan_id field\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "d07102a1bb0e759ce4571df30c62998ef5d8a8d3", "tree": "f1b093f2a642600823ef733ca0da7245751a8a2b", "parents": [ "1e070a60997f5bbaadd498c34380e2aa110336cf" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 14:13:23 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:36:02 2011 +0100" }, "message": "dmaengine i.MX dma: check sg entries for valid addresses and lengths\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1e070a60997f5bbaadd498c34380e2aa110336cf", "tree": "a590491c8bcc33851553b5d70cfa4eb2ae4640be", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 13:14:37 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:35:52 2011 +0100" }, "message": "dmaengine i.MX dma: set maximum segment size for our device\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "23889c6352ab4a842a30221bb412ff49954b2fb3", "tree": "1a8c6fbd0509c6dbed9702c9ab0314a8c911de22", "parents": [ "7214a8b14f63a1603401124bc150e17b145aa476" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 10:56:58 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:34:31 2011 +0100" }, "message": "dmaengine i.MX SDMA: reserve channel 0 by not registering it\n\nWe need channel 0 of the sdma engine for internal purposes. We\naccomplished this by calling dma_request_channel() in the probe\nfunction. This does not work when multiple dma engines are\npresent which is the case when IPU support for i.MX31/35 is\ncompiled in. So instead of registering channel 0 and reserving\nit afterwards simply do not register it in the first place.\nWith this the dmaengine channel counting does not match sdma\nchannel counting anymore, so we have to use sdma channel counting\nin the driver.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "7214a8b14f63a1603401124bc150e17b145aa476", "tree": "59c41a00966f3935edc235514a3780a7313d3437", "parents": [ "7a0e9b2557902bdca563a5eb1bbac87560bd7d20" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 10:21:35 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:34:24 2011 +0100" }, "message": "dmaengine i.MX SDMA: initialize dma capabilities outside channel loop\n\nThe capabilities are device specific fields, not channel specific fields.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "7a0e9b2557902bdca563a5eb1bbac87560bd7d20", "tree": "194f1735c5c25357cd4991081231525441b749a8", "parents": [ "1fa81c270da4d8dffa84fcca448654a10ed0a5dc" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 10:19:53 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:33:18 2011 +0100" }, "message": "dmaengine i.MX SDMA: do not initialize chan_id field\n\nThis is bogus as the dmaengine core will overwrite this field.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "1fa81c270da4d8dffa84fcca448654a10ed0a5dc", "tree": "2582ad91ea12c462745b2ef11d0fccfee73acee5", "parents": [ "b9b3f82f94b52ebb0bbdf6cd77ccc5e8ee3f53b5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 13:02:28 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:33:08 2011 +0100" }, "message": "dmaengine i.MX sdma: check sg entries for valid addresses and lengths\n\nThis patch lets sdma_prep_slave_sg fail if the entries of an\nsg list do not start on multiples of the word size or if the\nlengths are not multiple of the word size.\nAlso, catch the previously unhandled DMA_SLAVE_BUSWIDTH_8_BYTES\nand DMA_SLAVE_BUSWIDTH_UNDEFINED cases.\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "b9b3f82f94b52ebb0bbdf6cd77ccc5e8ee3f53b5", "tree": "6ea87b15f9f74327c202fc5aa72e6199897c176d", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 12:12:31 2011 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jan 31 12:32:52 2011 +0100" }, "message": "dmaengine i.MX sdma: set maximum segment size for our device\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "0c842b551063c5f7382ac9b457992f3b34972801", "tree": "da606f382493e6cf3540b4245b86a784a78e46b4", "parents": [ "86eb5fb61125e4646c9447a1f2ce130817dab34e" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:35 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: cyclic xfer support\n\nSupport cyclic transfers, which are useful for ALSA drivers.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "86eb5fb61125e4646c9447a1f2ce130817dab34e", "tree": "98722f05c9a3eaab60608f665755b331306325f4", "parents": [ "7ad74a7cf6f6355fd3f4c15afe63460fc4ec3f57" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:34 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: stop ongoing transfers in DMA_TERMINATE_ALL\n\nThe current implementation of DMA_TERMINATE_ALL leaves ongoing transfers\nrunning. Fix it.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7ad74a7cf6f6355fd3f4c15afe63460fc4ec3f57", "tree": "788adafd7e00d0ed23fac0e00416d973e2caab52", "parents": [ "6045f0bb2818393a44e835454db96709cb5b3d80" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:33 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: fix DMA_SG capability and channels\n\nThe DMA_SG cap is enabled on the wrong channel, and the pointers are repeatedly\nset incorrectly. Fix it and combine the ops settings to a common function.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6045f0bb2818393a44e835454db96709cb5b3d80", "tree": "fc6c06e7d302100979b0e4a81913b878b83cb5d6", "parents": [ "e65889c75ccb5b64dfb60f32e2d9448446cabcc7" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:32 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:21 2011 -0800" }, "message": "dma40: handle failure to allocate first LCLA\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e65889c75ccb5b64dfb60f32e2d9448446cabcc7", "tree": "2e9d336969b1e24c965b725aeac8f6223dcee3d8", "parents": [ "7f933bed96e9872131014ea2bdd5b012e43fc316" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:31 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: extract lcla code into separate function\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7f933bed96e9872131014ea2bdd5b012e43fc316", "tree": "32e54ca912ab509ba5b66f45e0d276bad51a9ae5", "parents": [ "1f7622ca55b1f5875e32140b4781759f800aded3" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:30 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: use flags to reduce parameter count\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1f7622ca55b1f5875e32140b4781759f800aded3", "tree": "497cec7fa885514f24ff19c10b21a2fb6e27b7df", "parents": [ "822c567639971628ceba2c53531670d595e3164d" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:29 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: make d40_log_buf_to_lli static\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "822c567639971628ceba2c53531670d595e3164d", "tree": "5a292828c12cb2cb1ee787345159f3a244fc826f", "parents": [ "cc31b6f7949efd46c5f13d0758cf7b0bcb71fae2" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:28 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: unify src/dst addr check\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cc31b6f7949efd46c5f13d0758cf7b0bcb71fae2", "tree": "baa26092f94a3240ed12f4fc43b994618a1202b1", "parents": [ "5ed04b8575cb22920b1333aeb55121339449048f" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:27 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:20 2011 -0800" }, "message": "dma40: pass the info pointer all the way to reduce argument count\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5ed04b8575cb22920b1333aeb55121339449048f", "tree": "4931e3f65f92da16a1967263b4c0f3623cce144d", "parents": [ "e24b36bdf873b4a64545fd66da13877214d235cf" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:26 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: unify d40_log_sg_to_lli funcs for mem and slave\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e24b36bdf873b4a64545fd66da13877214d235cf", "tree": "0490a45fe1cae96aa9a6c092172dcbba07aa6aa9", "parents": [ "1c4b0927feab41346b0be971e0287aaf46eba8e0" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:25 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: combine duplicated code in log_sg_to_dev\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1c4b0927feab41346b0be971e0287aaf46eba8e0", "tree": "cae12aed8e600fa0fe70b54f34f31b3c8a0b9496", "parents": [ "cade1d30b2e071a687011c2a38c03ed7187ec501" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:24 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: move lli_load to main source file\n\nThese register writes are better placed in the main source file rather than\nll.c.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cade1d30b2e071a687011c2a38c03ed7187ec501", "tree": "3ce0a1178095e3c4d54d60b596f52ce41f814f36", "parents": [ "10a946b3a4e1ad665a81981cbe33c3d3903cd7da" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:23 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:19 2011 -0800" }, "message": "dma40: combine mem and slave prep_sg functions\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "10a946b3a4e1ad665a81981cbe33c3d3903cd7da", "tree": "fdc55a90bb2633b9d4034d37a272ce2dcc5710e3", "parents": [ "3e3a0763e78b520dac5fde569c42664863336d94" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:22 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: remove export of stedma40_memcpy_sg\n\nThe dmaengine framework has the API for this now.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3e3a0763e78b520dac5fde569c42664863336d94", "tree": "919f08d64db68449868aec2e0bc26f8a37196cdf", "parents": [ "00ac0341486ffe212f45ff1fe0780d12a36fffde" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:21 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: combine mem and slave sg-to-lli functions\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "00ac0341486ffe212f45ff1fe0780d12a36fffde", "tree": "5fd79c471c46e2496e1998a20f9d87649171d5e6", "parents": [ "dbd887880320b6a56811bb38ff4ad888728c3a91" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:20 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: remove duplicated dev addr code\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "dbd887880320b6a56811bb38ff4ad888728c3a91", "tree": "0825398570e258b43dbdb731ed9df20d32d2f039", "parents": [ "5f81158f90db4bc8a79e91736aa3afce8e590e46" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:19 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: combine duplicated d40_pool_lli_alloc() calls\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5f81158f90db4bc8a79e91736aa3afce8e590e46", "tree": "dcf4ac40513e7ccb73032a8b8ace7a42e5444523", "parents": [ "95944c6ef5b5214508273992416adb836b63c73f" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:18 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:18 2011 -0800" }, "message": "dma40: combine desc init functions\n\nThe desc init code can be shared between the mem and slave prep routines.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "95944c6ef5b5214508273992416adb836b63c73f", "tree": "82de42e488516b4338fcd5e9908545c611573a0b", "parents": [ "d924abad7fa9a78d70b20552bf27fe4f7a19a2fb" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:17 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: implement prep_memcpy as a wrapper around memcpy_sg\n\nTo simplify the code.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d924abad7fa9a78d70b20552bf27fe4f7a19a2fb", "tree": "140a0fa51e50699f3e46b18c28c7cad2cf9f0c68", "parents": [ "b00f938c8cf5ba8e7a692519548a256aa3ea1203" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:16 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: remove unnecessary casts\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b00f938c8cf5ba8e7a692519548a256aa3ea1203", "tree": "a4e9845783f335fed5fc394040dafe1330b98e78", "parents": [ "026cbc424a162e495ad29e91d354fb8fc2da2657" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:15 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: fix DMA API usage for LLIs\n\nMap and unmap the LLIs and use dma_sync_single_for_device() appropriately\ninstead of mapping and never unmapping them.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "026cbc424a162e495ad29e91d354fb8fc2da2657", "tree": "f524b1af7e039a5b87be3eefe5140f5dda326d70", "parents": [ "7fe8be5a74eb058b0b48970caef83e0215f55944" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:14 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: fix DMA API usage for LCLA\n\nMap the buffer once and use dma_sync*() appropriately instead of mapping the\nbuffer over and over without unmapping it.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7fe8be5a74eb058b0b48970caef83e0215f55944", "tree": "adfd90a8aa8b1abb5adfc0a3ccf27255c07e1020", "parents": [ "594ece4dc0e8ac222945ef2048430600ad3c7644" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:13 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: use sg_dma_address() instead of sg_phys()\n\nThe address to use for DMA should be taken from sg_dma_address() and not\nsg_phys().\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "594ece4dc0e8ac222945ef2048430600ad3c7644", "tree": "ef7351b3603af93e5a6695d092eefbc59aedf5ab", "parents": [ "ac2c0a387194f45c759572b3462d1bf92ec92f00" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:12 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:17 2011 -0800" }, "message": "dma40: remove unnecessary ALIGN()s\n\nALIGN(x * y, y) \u003d\u003d x * y\nALIGN(aligned + x * y, y) \u003d\u003d aligned + x * y\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ac2c0a387194f45c759572b3462d1bf92ec92f00", "tree": "81f5e1e9132d56a2e4ba5063c0ecaf722e04b970", "parents": [ "4d5949009e585b2bcf09dc4de625351f987a1e6d" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:11 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: allow realtime and priority for event lines\n\nDB8500v2\u0027s DMA40 (revision 3) allows setting event lines as high priority and\nreal time.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4d5949009e585b2bcf09dc4de625351f987a1e6d", "tree": "e94a51dad6f8750d3ad0539e0a54918b4144a64e", "parents": [ "6db5a8ba11bf23d1618e392518f1684cbf2fe031" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:10 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: fix comment to refer to SOCs rather than boards\n\nAnd add DB8500v2 information.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6db5a8ba11bf23d1618e392518f1684cbf2fe031", "tree": "65f8bf63a01b3e716cd1dc72a39cf5c5d78eda36", "parents": [ "724a8577d80c6f8e9ac680be1cf419eddbd6f2a1" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:09 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: use helpers for error functions\n\nAlmost every use of dev_err in this driver prints the function name. Abstract\nout wrappers to help with this and reduce code duplication.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "724a8577d80c6f8e9ac680be1cf419eddbd6f2a1", "tree": "9e6dd06f0ef4e5775d3f1000c0d8c943facfb519", "parents": [ "8ca84687b91322b9eafeaf4da43a21684cd0316e" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:08 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: use helpers for channel type check\n\nThe somewhat confusing check\n\n\td40c-\u003elog_num \u003d\u003d D40_PHY_CHAN\n\nand its variants are used in several places to check if a channel is logical or\nphysical. Use appropriately named helpers to do this to make the code more\nreadable.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8ca84687b91322b9eafeaf4da43a21684cd0316e", "tree": "bae0ececa3a7975c4b2a0bd5a7611abdd86131ad", "parents": [ "7d83a854a1a44a8f6a699503441403a36c42f66c" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:07 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:16 2011 -0800" }, "message": "dma40: use helper for channel registers base\n\nThe register offset computation for accessing channel registers is copy/pasted\nin several places. Create a helper function to do it.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7d83a854a1a44a8f6a699503441403a36c42f66c", "tree": "7c83ad7793154f469ccbdd0f9045c748960623b2", "parents": [ "262d2915d4f11e5e78e432ab68f0ee034ef3f75f" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:06 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:15 2011 -0800" }, "message": "dma40: remove \"hardware link with previous jobs\" code\n\nThis link in hardware with previous jobs code is:\n\n - unused, no clients using or requiring this feature\n - incomplete, being implemented only for physical channels\n - broken, only working to perform one link\n\nRemove it. This also allows us to get rid of the channel pause in the\nsubmit_tx() routine.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "262d2915d4f11e5e78e432ab68f0ee034ef3f75f", "tree": "9c14e8b8518fbd377ba96826bcb03bb02f89ed34", "parents": [ "cb9ab2d8e4661c811d5e9a8e687b6f736690c90e" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:05 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:15 2011 -0800" }, "message": "dma40: ensure event lines get enabled\n\nThe controller sometimes fails to register the enable of the event line when\nboth src and dst event lines are used on the same logical channel. Implement\nthe recommended software workaround, which is to retry the write until it\nworks.\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cb9ab2d8e4661c811d5e9a8e687b6f736690c90e", "tree": "43136d79f341b4799ae5568a9652483addd61796", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Rabin Vincent", "email": "rabin.vincent@stericsson.com", "time": "Tue Jan 25 11:18:04 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:27:15 2011 -0800" }, "message": "dma40: make init function static\n\nAcked-by: Per Forlin \u003cper.forlin@stericsson.com\u003e\nAcked-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8179661694595eb3a4f2ff9bb0b73acbb7d2f4a9", "tree": "5251a404b7b58f0486f422d3db333b2449e33e5c", "parents": [ "fb526210b2b961b5d590b89fd8f45c0ca5769688" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Thu Jan 27 12:37:44 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:03:47 2011 -0800" }, "message": "DMA: PL08x: fix channel pausing to timeout rather than lockup\n\nIf a transfer is initiated from memory to a peripheral, then data is\nfetched and the channel is marked busy. This busy status persists until\nthe HALT bit is set and the queued data has been transfered to the\nperipheral. Waiting indefinitely after setting the HALT bit results in\nsystem lockups. Timeout this operation, and print an error when this\nhappens.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "fb526210b2b961b5d590b89fd8f45c0ca5769688", "tree": "4998a89c11eed597b3197d013ff7b558c9566f2d", "parents": [ "d718f4ebddcb0bebdbf771a6672756b666e5c31b" ], "author": { "name": "Russell King - ARM Linux", "email": "linux@arm.linux.org.uk", "time": "Thu Jan 27 12:32:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jan 30 22:00:48 2011 -0800" }, "message": "DMA: PL08x: fix infinite wait when terminating transfers\n\nIf we try to pause a channel when terminating a transfer, we could end\nup spinning for it to become inactive indefinitely, and can result in\nan uninterruptible wait requiring a reset to recover from.\n\nTerminating a transfer is supposed to take effect immediately, but may\nresult in data loss.\n\nTo make this clear, rename the function to pl08x_terminate_phy_chan().\nAlso, make sure it is always consistently called - with the spinlock\nheld and IRQs disabled, and ensure that the TC and ERR interrupt status\nis always cleared.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4aa5f366431fef0afca0df348ca9782c63ac9911", "tree": "ed7dc549c5d7274a0bbfb3f0e172e916cb830e9b", "parents": [ "95ea759e9e116dade3e7386be2a3db76c90f4675" ], "author": { "name": "Jamie Iles", "email": "jamie@jamieiles.com", "time": "Fri Jan 21 14:11:55 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 23:10:55 2011 -0800" }, "message": "avr32: at32ap700x: specify DMA src and dst masters\n\nNow that the dw_dmac DMA driver supports configurable source and\ndestination masters we need to specify which ones to use. This was\npreviously hardcoded to 0 and 1 respectively in the driver.\n\nAcked-by: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nSigned-off-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "95ea759e9e116dade3e7386be2a3db76c90f4675", "tree": "a69b3fbb02f1d8305357524e67159e69e6ffa002", "parents": [ "f301c062dcdd113bc977ae1ebc8c12232f8531a9" ], "author": { "name": "Jamie Iles", "email": "jamie@jamieiles.com", "time": "Fri Jan 21 14:11:54 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 23:10:55 2011 -0800" }, "message": "dmaengine/dw_dmac: provide a mechanism to indicate private devices\n\nSome platforms (e.g. Picochip PC3XX) have multiple DMA controllers\nwhere some may be used for slave transfers and others for general\npurpose memcpy type transfers. Add a .is_private boolean to the\nplatform data structure so that controllers can be marked as private\nso that the DMA_PRIVATE capability will be set for that controller.\n\nSigned-off-by: Jamie Iles \u003cjamie.iles@picochip.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "f301c062dcdd113bc977ae1ebc8c12232f8531a9", "tree": "d4e4e7a79d7121e9d4e49b87146e10641888a203", "parents": [ "087809fce28f50098d9c3ef1a6865c722f23afd2" ], "author": { "name": "Jamie Iles", "email": "jamie@jamieiles.com", "time": "Fri Jan 21 14:11:53 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 23:10:55 2011 -0800" }, "message": "dmaengine/dw_dmac: allow src/dst masters to be configured at runtime\n\nSome platforms have flexible mastering capabilities and this needs\nto be selected at runtime. If the platform has specified private\ndata in the form of the dw_dma_slave then fetch the source and\ndestination masters from here. If this isn\u0027t present, default to\nthe previous of 0 and 1.\n\nv2: cleanup whitespace\n\nAcked-by: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nSigned-off-by: Jamie Iles \u003cjamie.iles@picochip.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "087809fce28f50098d9c3ef1a6865c722f23afd2", "tree": "6b5b36ccfd54c72395803717aac7e8471a17b48e", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Jamie Iles", "email": "jamie@jamieiles.com", "time": "Fri Jan 21 14:11:52 2011 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 23:06:28 2011 -0800" }, "message": "dmaengine/dw_dmac: don\u0027t scan descriptors if no xfers in progress\n\nSome hardware (picoChip picoXCell in particular) sometimes has\nthe block transfer complete bit being set for a channel after the\nwhole transfer has completed. If we don\u0027t have any transfers in the\nactive list then don\u0027t bother to scan the descriptors. This often\nhappens in normal operation and doesn\u0027t require the channel to be\nreset.\n\nv2: cleanup whitespace\n\nSigned-off-by: Jamie Iles \u003cjamie.iles@picochip.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d718f4ebddcb0bebdbf771a6672756b666e5c31b", "tree": "b1e7e6470f16b799d41d1e942cf0ff7ac38eec63", "parents": [ "939fd4f077269dd863cd630a3b3195a20acf7d02" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Mon Jan 17 22:39:24 2011 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 22:35:10 2011 -0800" }, "message": "dmaengine: imx-sdma: fix inconsistent naming in sdma_assign_cookie()\n\nVariable name sdma and sdmac are consistently used as the pointer to\nsdma_engine and sdma_channel respectively throughout the file. The\npatch fixes the inconsistency seen in function sdma_assign_cookie().\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "939fd4f077269dd863cd630a3b3195a20acf7d02", "tree": "f889d81f417645d3e3a903d0fb9422e84dfea5b9", "parents": [ "6866fd3b7289a283741752b73e0e09f410b7639d" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@freescale.com", "time": "Wed Jan 19 19:13:06 2011 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 19:34:10 2011 -0800" }, "message": "dmaengine: imx-sdma: propagate error in sdma_probe() instead of returning 0\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@freescale.com\u003e\nAcked-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6866fd3b7289a283741752b73e0e09f410b7639d", "tree": "aa8bec586fb4cae492ae63931523ba560f722b1a", "parents": [ "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jan 12 11:18:14 2011 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Jan 29 16:14:49 2011 -0800" }, "message": "dmaengine i.MX SDMA: Fix firmware loading\n\nWhen loading the microcode to the SDMA engine we have to use\nthe ram_code_start_addr found in the firmware image. The copy\nin the sdma engine is not initialized correctly. This is broken\nsince:\n5b28aa3 dmaengine i.MX SDMA: Allow to run without firmware\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1bae4ce27c9c90344f23c65ea6966c50ffeae2f5", "tree": "d13f1778985d53e20322ffdd2c8e90daaa03aabc", "parents": [ "13a3cec8443290b082af2a5254562aca247fe591" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 19:01:34 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 19:01:34 2011 -0800" }, "message": "Linux 2.6.38-rc2\n" }, { "commit": "13a3cec8443290b082af2a5254562aca247fe591", "tree": "5c873a2c9333be348266234ac5d7101caa1b6d7d", "parents": [ "973c9f4f49ca96a53bcf6384c4c59ccd26c33906", "88914bdf8c677ebd7e797adac05e47303fd6ac77" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 16:50:31 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 16:50:31 2011 -0800" }, "message": "Merge branch \u0027media_fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6\n\n* \u0027media_fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (101 commits)\n [media] staging/lirc: fix mem leaks and ptr err usage\n [media] hdpvr: reduce latency of i2c read/write w/recycled buffer\n [media] hdpvr: enable IR part\n [media] rc/mceusb: timeout should be in ns, not us\n [media] v4l2-device: fix \u0027use-after-freed\u0027 oops\n [media] v4l2-dev: don\u0027t memset video_device.dev\n [media] zoran: use video_device_alloc instead of kmalloc\n [media] w9966: zero device state after a detach\n [media] v4l: Fix a use-before-set in the control framework\n [media] v4l: Include linux/videodev2.h in media/v4l2-ctrls.h\n [media] DocBook/v4l: update V4L2 revision and update copyright years\n [media] DocBook/v4l: fix validation error in dev-rds.xml\n [media] v4l2-ctrls: queryctrl shouldn\u0027t attempt to replace V4L2_CID_PRIVATE_BASE IDs\n [media] v4l2-ctrls: fix missing \u0027read-only\u0027 check\n [media] pvrusb2: Provide more information about IR units to lirc_zilog and ir-kbd-i2c\n [media] ir-kbd-i2c: Add back defaults setting for Zilog Z8\u0027s at addr 0x71\n [media] lirc_zilog: Update TODO.lirc_zilog\n [media] lirc_zilog: Add Andy Walls to copyright notice and authors list\n [media] lirc_zilog: Remove useless struct i2c_driver.command function\n [media] lirc_zilog: Remove unneeded tests for existence of the IR Tx function\n ...\n" }, { "commit": "973c9f4f49ca96a53bcf6384c4c59ccd26c33906", "tree": "e3535a43c1e5cb5f0c06c040f58bc25c9b869fd1", "parents": [ "a8b17ed019bd40d3bfa20439d9c36a99f9be9180" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Jan 20 16:38:33 2011 +0000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 14:59:30 2011 -0800" }, "message": "KEYS: Fix up comments in key management code\n\nFix up comments in the key management code. No functional changes.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "a8b17ed019bd40d3bfa20439d9c36a99f9be9180", "tree": "beb3b08575aa01c7ebb24939b678d533b1f59adf", "parents": [ "9093ba53b7f26dbb5210de1157769e59e34bbe23" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Jan 20 16:38:27 2011 +0000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 14:59:29 2011 -0800" }, "message": "KEYS: Do some style cleanup in the key management code.\n\nDo a bit of a style clean up in the key management code. No functional\nchanges.\n\nDone using:\n\n perl -p -i -e \u0027s!^/[*]*/\\n!!\u0027 security/keys/*.c\n perl -p -i -e \u0027s!} /[*] end [a-z0-9_]*[(][)] [*]/\\n!}\\n!\u0027 security/keys/*.c\n sed -i -s -e \": next\" -e N -e \u0027s/^\\n[}]$/}/\u0027 -e t -e P -e \u0027s/^.*\\n//\u0027 -e \"b next\" security/keys/*.c\n\nTo remove /*****/ lines, remove comments on the closing brace of a\nfunction to name the function and remove blank lines before the closing\nbrace of a function.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "9093ba53b7f26dbb5210de1157769e59e34bbe23", "tree": "98b6fac2f483740828a58b8bbacaf9016d8e9278", "parents": [ "ebe0d805071c318ebbc3b5857f8f4f94214c1a52", "99d86c8f1b7101d7c55dbf644b32bb1f0d7eb303" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:44:07 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:44:07 2011 -0800" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6:\n cifs: fix up CIFSSMBEcho for unaligned access\n cifs: fix unaligned accesses in cifsConvertToUCS\n cifs: clean up unaligned accesses in cifs_unicode.c\n cifs: fix unaligned access in check2ndT2 and coalesce_t2\n cifs: clean up unaligned accesses in validate_t2\n cifs: use get/put_unaligned functions to access ByteCount\n cifs: move time field in cifsInodeInfo\n cifs: TCP_Server_Info diet\n CIFS: Implement cifs_strict_readv (try #4)\n CIFS: Implement cifs_file_strict_mmap (try #2)\n CIFS: Implement cifs_strict_fsync\n CIFS: Make cifsFileInfo_put work with strict cache mode\n" }, { "commit": "ebe0d805071c318ebbc3b5857f8f4f94214c1a52", "tree": "43716c1e57dede71b29547eb96f231efe9d063e7", "parents": [ "5bf7a6503ff416214b9a53569677dbf07657e6fd", "2485b6464cf86a5bc361666838f2439c99c00567" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:43:21 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:43:21 2011 -0800" }, "message": "Merge branch \u0027fixes-2.6.38\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu\n\n* \u0027fixes-2.6.38\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:\n x86,percpu: Move out of place 64 bit ops into X86_64 section\n" }, { "commit": "5bf7a6503ff416214b9a53569677dbf07657e6fd", "tree": "0dc8e8dbc30a23d466a327bef05e78c571f2b8a3", "parents": [ "0f5c2ac58f22fd41deaeeb45ee752d4ae55f0d01", "42c025f3de9042d9c9abd9a6f6205d1a0f4bcadf" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:38:57 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:38:57 2011 -0800" }, "message": "Merge branch \u0027fixes-2.6.38\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq\n\n* \u0027fixes-2.6.38\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq:\n workqueue: note the nested NOT_RUNNING test in worker_clr_flags() isn\u0027t a noop\n workqueue: relax lockdep annotation on flush_work()\n" }, { "commit": "0f5c2ac58f22fd41deaeeb45ee752d4ae55f0d01", "tree": "6e13ef4d7247e53d7a0f18e04549a8847cc80214", "parents": [ "cfd74486eace27a0899b30529d01bc1a09a5b973", "dfff95c394b0dd977a6b65bd52b99703fae94d9b" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:38:26 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:38:26 2011 -0800" }, "message": "Merge branch \u0027irq-cleanup-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027irq-cleanup-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (37 commits)\n um: Use generic irq Kconfig\n tile: Use generic irq Kconfig\n sparc: Use generic irq Kconfig\n score: Use generic irq Kconfig\n powerpc: Use generic irq Kconfig\n parisc: Use generic irq Kconfig\n mn10300: Use generic irq Kconfig\n microblaze: Use generic irq Kconfig\n m68knommu: Use generic irq Kconfig\n ia64: Use generic irq Kconfig\n frv: Use generic irq Kconfig\n blackfin: Use generic irq Kconfig\n alpha: Use generic irq Kconfig\n genirq: Remove __do_IRQ\n m32r: Convert to generic irq Kconfig\n m32r: Convert usrv platform irq handling\n m32r: Convert opsput_lcdpld irq chip\n m32r: Convert opsput lanpld irq chip\n m32r: Convert opsput pld irq chip\n m32r: Convert opsput irq chip\n ...\n" }, { "commit": "cfd74486eace27a0899b30529d01bc1a09a5b973", "tree": "b4bb52cf16203b78f1a102567915911f0d1c4b85", "parents": [ "a1d3f5b70d13b7035f925de1f2ba0003a04b9ac5", "8e1b4cf2108488ccfb9a3e7ed7cd85a435e01d4b" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:35:10 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:35:10 2011 -0800" }, "message": "Merge branch \u0027stable/bug-fixes-rc1\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen\n\n* \u0027stable/bug-fixes-rc1\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:\n xen: p2m: correctly initialize partial p2m leaf\n xen: fix non-ANSI function warning in irq.c\n" }, { "commit": "a1d3f5b70d13b7035f925de1f2ba0003a04b9ac5", "tree": "9c4252d29637f1ccf393259b0709e65e5678f16d", "parents": [ "7971b96d922ccaaa2b732462c8f927af4259db60", "6044565af458e7fa6e748bff437ecc49dea88d79", "324719978dbb3ffad5a2e3d85af6c5dbbb766b99" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:34:39 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:34:39 2011 -0800" }, "message": "Merge branches \u0027fixes\u0027 and \u0027fwnet\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6\n\n* \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6:\n firewire: core: fix unstable I/O with Canon camcorder\n\n* \u0027fwnet\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6:\n firewire: net: is not experimental anymore\n firewire: net: invalidate ARP entries of removed nodes\n" }, { "commit": "7971b96d922ccaaa2b732462c8f927af4259db60", "tree": "192d1e47a78fffe98bdaaa59185886fd23162922", "parents": [ "c745552a82cbf3a82adea5210212ed31ec03388d", "842a2097007b8a01a71a701300e970502a54bbb2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:24:33 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:24:33 2011 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:\n ALSA: hda - Fix EAPD to low on CZC P10T tablet computer with ALC662\n ALSA: HDA: Add SKU ignore for another Thinkpad Edge 14\n ALSA: hda - Fix \"unused variable\" compile warning\n ALSA: hda - Add quirk for HP Z-series workstation\n Revert \"ALSA: HDA: Create mixers on ALC887\"\n ASoC: PXA: Fix codec address on Zipit Z2\n ASoC: PXA: Fix jack detection on Zipit Z2\n ASoC: Blackfin: fix DAI/SPORT config dependency issues\n ASoC: Blackfin TDM: use external frame syncs\n ASoC: Blackfin AC97: fix build error after multi-component update\n ASoC: Blackfin TDM: fix missed snd_soc_dai_get_drvdata update\n ASoC: documentation updates\n ALSA: ice1712 delta - initialize SPI clock\n" }, { "commit": "c745552a82cbf3a82adea5210212ed31ec03388d", "tree": "e9ca2570ad93965fd590e1c9717415709a836ad9", "parents": [ "d41ad6df44fbd01837211cee3273ce2f9445be6e", "5d1034f01b3616d6636ab7851ad9e63d42abbbd6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:24:16 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:24:16 2011 -0800" }, "message": "Merge branch \u0027devicetree/merge\u0027 of git://git.secretlab.ca/git/linux-2.6\n\n* \u0027devicetree/merge\u0027 of git://git.secretlab.ca/git/linux-2.6:\n powerpc/83xx: fix build failures on dt compatible list.\n" }, { "commit": "d41ad6df44fbd01837211cee3273ce2f9445be6e", "tree": "2c67f9202b0db775a9b38fc121f4190433e1aef0", "parents": [ "3dece370ecc7c6152b3fdd21c6de28179f6e643d", "8bfc5e36619e8464bf529137f834f55bd75de381" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:23:52 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 13:23:52 2011 -0800" }, "message": "Merge branch \u0027merge\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\n* \u0027merge\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (34 commits)\n powerpc/mpic: Fix mask/unmask timeout message\n powerpc/pseries: Add BNX2\u003dm to defconfig\n powerpc: Enable 64kB pages and 1024 threads in pseries config\n powerpc: Disable mcount tracers in pseries defconfig\n powerpc/boot/dts: Install dts from the right directory\n powerpc: machine_check_generic is wrong on 64bit\n powerpc: Check RTAS extended log flag before checking length\n powerpc: Fix corruption when grabbing FWNMI data\n powerpc: Rework pseries machine check handler\n powerpc: Don\u0027t silently handle machine checks from userspace\n powerpc: Remove duplicate debugger hook in machine_check_exception\n powerpc: Never halt RTAS error logging after receiving an unrecoverable machine check\n powerpc: Don\u0027t force MSR_RI in machine_check_exception\n powerpc: Print 32 bits of DSISR in show_regs\n powerpc/kdump: Disable ftrace during kexec\n powerpc/kdump: Move crash_kexec_stop_spus to kdump crash handler\n powerpc/kexec: Remove empty ppc_md.machine_kexec_prepare\n powerpc/kexec: Don\u0027t initialise kexec hooks to default handlers\n powerpc/kdump: Remove ppc_md.machine_crash_shutdown\n powerpc/kexec: Remove ppc_md.machine_kexec\n ...\n" }, { "commit": "3dece370ecc7c6152b3fdd21c6de28179f6e643d", "tree": "e63f721412c1ef469108ae7e688cebcf39d83cad", "parents": [ "db9fd8486bfe895b00b3603685c086a3c8210ffe" ], "author": { "name": "Michal Simek", "email": "monstr@monstr.eu", "time": "Fri Jan 21 08:49:56 2011 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 08:40:30 2011 -0800" }, "message": "mm: System without MMU do not need pte_mkwrite\n\nThe patch \"thp: export maybe_mkwrite\" (commit 14fd403f2146) breaks\nsystems without MMU.\n\nError log:\n\n CC arch/microblaze/mm/init.o\n In file included from include/linux/mman.h:14,\n from arch/microblaze/mm/consistent.c:24:\n include/linux/mm.h: In function \u0027maybe_mkwrite\u0027:\n include/linux/mm.h:482: error: implicit declaration of function \u0027pte_mkwrite\u0027\n include/linux/mm.h:482: error: incompatible types in assignment\n\nSigned-off-by: Michal Simek \u003cmonstr@monstr.eu\u003e\nCC: Andrea Arcangeli \u003caarcange@redhat.com\u003e\nReviewed-by: Rik van Riel \u003criel@redhat.com\u003e\nCC: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCC: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "db9fd8486bfe895b00b3603685c086a3c8210ffe", "tree": "9a2df243d7b81d829c895e798212a79e99af542a", "parents": [ "4843456c5c341eb57f80f9224362a22665d14107" ], "author": { "name": "Roland Dreier", "email": "rdreier@cisco.com", "time": "Thu Jan 20 16:23:08 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 08:40:30 2011 -0800" }, "message": "MAINTAINERS: Update Roland Dreier\u0027s email address\n\nThe cisco.com address will stop working soon, and besides no one can\nremember the second \"d\" in \"rolandd\" or how to spell \"rdreier.\"\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "8e1b4cf2108488ccfb9a3e7ed7cd85a435e01d4b", "tree": "2a01dd503d48e9496002349f80e27343037d18e6", "parents": [ "7d81c3b9e2e5057c52256e154205143ad4e6e919" ], "author": { "name": "Stefan Bader", "email": "stefan.bader@canonical.com", "time": "Thu Jan 20 15:38:23 2011 +0100" }, "committer": { "name": "Konrad Rzeszutek Wilk", "email": "konrad.wilk@oracle.com", "time": "Fri Jan 21 11:24:14 2011 -0500" }, "message": "xen: p2m: correctly initialize partial p2m leaf\n\nAfter changing the p2m mapping to a tree by\n\n commit 58e05027b530ff081ecea68e38de8d59db8f87e0\n xen: convert p2m to a 3 level tree\n\nand trying to boot a DomU with 615MB of memory, the following crash was\nobserved in the dump:\n\nkernel direct mapping tables up to 26f00000 @ 1ec4000-1fff000\nBUG: unable to handle kernel NULL pointer dereference at (null)\nIP: [\u003cc0107397\u003e] xen_set_pte+0x27/0x60\n*pdpt \u003d 0000000000000000 *pde \u003d 0000000000000000\n\nAdding further debug statements showed that when trying to set up\npfn\u003d0x26700 the returned mapping was invalid.\n\npfn\u003d0x266ff calling set_pte(0xc1fe77f8, 0x6b3003)\npfn\u003d0x26700 calling set_pte(0xc1fe7800, 0x3)\n\nAlthough the last_pfn obtained from the startup info is 0x26700, which\nshould in turn not be hit, the additional 8MB which are added as extra\nmemory normally seem to be ok. This lead to looking into the initial\np2m tree construction, which uses the smaller value and assuming that\nthere is other code handling the extra memory.\n\nWhen the p2m tree is set up, the leaves are directly pointed to the\narray which the domain builder set up. But if the mapping is not on a\nboundary that fits into one p2m page, this will result in the last leaf\nbeing only partially valid. And as the invalid entries are not\ninitialized in that case, things go badly wrong.\n\nI am trying to fix that by checking whether the current leaf is a\ncomplete map and if not, allocate a completely new page and copy only\nthe valid pointers there. This may not be the most efficient or elegant\nsolution, but at least it seems to allow me booting DomUs with memory\nassignments all over the range.\n\nBugLink: http://bugs.launchpad.net/bugs/686692\n[v2: Redid a bit of commit wording and fixed a compile warning]\n\nSigned-off-by: Stefan Bader \u003cstefan.bader@canonical.com\u003e\nSigned-off-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\n" }, { "commit": "4843456c5c341eb57f80f9224362a22665d14107", "tree": "5656b405a8b1d2596e8eb748b953ee677a261e3c", "parents": [ "2b1caf6ed7b888c95a1909d343799672731651a5", "f00c9e44ad1a9660fe8cd3ca15b6cd9497172eab" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 07:33:37 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 21 07:33:37 2011 -0800" }, "message": "Merge branch \u0027for_linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs-2.6\n\n* \u0027for_linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs-2.6:\n quota: Fix deadlock during path resolution\n" } ], "next": "dfff95c394b0dd977a6b65bd52b99703fae94d9b" }