)]}' { "log": [ { "commit": "24f11ec001920f1cfaeeed8e8b55725d900bbb56", "tree": "bb7a1007374c9ce9f60962c22f8bccb31bd6cb44", "parents": [ "fb22d72782b023cda5e9876d3381f30932a64f91" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Jan 25 17:36:34 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jan 25 17:36:34 2009 +0000" }, "message": "[ARM] fix section-based ioremap\n\nTomi Valkeinen reports:\n Running with latest linux-omap kernel on OMAP3 SDP board, I have\n problem with iounmap(). It looks like iounmap() does not properly\n free large areas. Below is a test which fails for me in 6-7 loops.\n\n\tfor (i \u003d 0; i \u003c 200; ++i) {\n\t\tvaddr \u003d ioremap(paddr, size);\n\t\tif (!vaddr) {\n\t\t\tprintk(\"couldn\u0027t ioremap\\n\");\n\t\t\tbreak;\n\t\t}\n\t\tiounmap(vaddr);\n\t}\n\nThe changes to vmalloc.c weren\u0027t reflected in the ARM ioremap\nimplementation. Turns out the fix is rather simple.\n\nTested-by: Tomi Valkeinen \u003ctomi.valkeinen@nokia.com\u003e\nTested-by: Matt Gerassimoff \u003cmgeras@gmail.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7dd8c4f3526b16edb1a3f4edb4665a8fa6e632d8", "tree": "12b54dbe73f40a701d52dd7f97ad2a11e86f032e", "parents": [ "953a7e8476bbd7367cebdb868c326ba42968bc13" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Jan 18 16:24:19 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jan 24 11:41:17 2009 +0000" }, "message": "[ARM] fix StrongARM-11x0 page copy implementation\n\nWhich had the \u0027from\u0027 and \u0027to\u0027 pages reversed.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "98007c230eb1e85ff5d49b4a697835680483dafd", "tree": "a5074e8b1330de2f8ff8b4a6a3ce3a31a5f0f702", "parents": [ "d672d2fc13242f9284345cb7e4c5a32cd5edefa3" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Fri Jan 09 15:28:55 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 12 13:51:03 2009 +0000" }, "message": "[ARM] 5364/1: allow flush_ioremap_region() to be used from modules\n\nWithout this, the pxa2xx-flash driver cannot be used as a module.\n\nReported-by: Chris Lawrence \u003cchrisdl@netspace.net.au\u003e\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9c93af1ede9418bb3f1b9dd442faf91ba796a0ff", "tree": "a5185e6af336e3c00343e7791517b70f00d0c2df", "parents": [ "0e8f989a253b1bf85ea1c8d7987d67c054f4af91" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Jan 08 12:04:47 2009 +0000" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Jan 08 12:04:47 2009 +0000" }, "message": "NOMMU: Rename ARM\u0027s struct vm_region\n\nRename ARM\u0027s struct vm_region so that I can introduce my own global version\nfor NOMMU. It\u0027s feasible that the ARM version may wish to use my global one\ninstead.\n\nThe NOMMU vm_region struct defines areas of the physical memory map that are\nunder mmap. This may include chunks of RAM or regions of memory mapped\ndevices, such as flash. It is also used to retain copies of file content so\nthat shareable private memory mappings of files can be made. As such, it may\nbe compatible with what is described in the banner comment for ARM\u0027s vm_region\nstruct.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\n" }, { "commit": "c613bbba6f39c8804f1f26e96fb68a117cc9e282", "tree": "85fbc24f26b61ce4e7a908d18952e3abc1f5cd10", "parents": [ "cd4348339c21f4a15c01f3f120e92b3224a0a7da", "80eee6bca4069c48247005aa07cb5e8e86042aa3" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Dec 17 20:04:45 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 17 20:04:45 2008 +0000" }, "message": "Merge branch \u0027mxc-pu-imxfb\u0027 of git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6 into devel\n" }, { "commit": "7e1548a597ef7e26d5d62f8be3be6da9e101b26c", "tree": "fe6cbf4d9a3c1afdba04fb276fef0f932403727c", "parents": [ "1f7f569c0ae6e619504095eabf796edd712d943d", "2619bc327417f549f1c89d5ef9b4a4aa768f41a2" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Dec 15 22:13:26 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 15 22:13:26 2008 +0000" }, "message": "Merge branch \u0027omap3-upstream\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel\n" }, { "commit": "67306da610a3e4824192e92888634d3d8700bfc1", "tree": "cd60e44ac249e4a4c3f131d4d179c39d40793ac5", "parents": [ "3909845e26439148a484d1ac30bb65e5e0ff63ec" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Dec 14 18:01:44 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 15 10:34:48 2008 +0000" }, "message": "[ARM] Ensure linux/hardirqs.h is included where required\n\n... for the removal of it from asm-generic/local.h\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6ce1b871db6a3ca69ed1e35956d89d3cacd7ba08", "tree": "fa3a1d73cc601de707ec21dad485319d42f7bfb5", "parents": [ "d517cab1c7fc92178e11c7ded2548b06b273d293" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Mon Dec 01 14:15:41 2008 -0800" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 14 12:05:03 2008 +0000" }, "message": "[ARM] eliminate NULL test and memset after alloc_bootmem\n\nAs noted by Akinobu Mita in patch b1fceac2b9e04d278316b2faddf276015fc06e3b,\nalloc_bootmem and related functions never return NULL and always return a\nzeroed region of memory. Thus a NULL test or memset after calls to these\nfunctions is unnecessary.\n\nThis was fixed using the following semantic patch.\n(http://www.emn.fr/x-info/coccinelle/)\n\n// \u003csmpl\u003e\n@@\nexpression E;\nstatement S;\n@@\n\nE \u003d \\(alloc_bootmem\\|alloc_bootmem_low\\|alloc_bootmem_pages\\|alloc_bootmem_low_pages\\|alloc_bootmem_node\\|alloc_bootmem_low_pages_node\\|alloc_bootmem_pages_node\\)(...)\n... when !\u003d E\n(\n- BUG_ON (E \u003d\u003d NULL);\n|\n- if (E \u003d\u003d NULL) S\n)\n\n@@\nexpression E,E1;\n@@\n\nE \u003d \\(alloc_bootmem\\|alloc_bootmem_low\\|alloc_bootmem_pages\\|alloc_bootmem_low_pages\\|alloc_bootmem_node\\|alloc_bootmem_low_pages_node\\|alloc_bootmem_pages_node\\)(...)\n... when !\u003d E\n- memset(E,0,E1);\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "baa745a3378046ca1c5477495df6ccbec7690428", "tree": "bc3a1339a45d70b6810f2ca88a7f46e89b33b2d2", "parents": [ "794baba637999b81aa40e60fae1fa91978e08808" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Dec 07 09:44:55 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 07 09:44:55 2008 +0000" }, "message": "[ARM] Fix alignment fault handling for ARMv6 and later CPUs\n\nOn ARMv6 and later CPUs, it is possible for userspace processes to\nget stuck on a misaligned load or store due to the \"ignore fault\"\nsetting; unlike previous CPUs, retrying the instruction without\nthe \u0027A\u0027 bit set does not always cause the load to succeed.\n\nWe have no real option but to default to fixing up alignment faults\non these CPUs, and having the CPU fix up those misaligned accesses\nwhich it can.\n\nReported-by: Wolfgang Grandegger \u003cwg@grandegger.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c5b84b3bb0c055d70dc9f1b5e900378bc9d059ea", "tree": "bd5b0b4efb552bacd812f9e6e08a29bae70c0da1", "parents": [ "d281bc9d8a22419abc254f86a7fc268bb99914e1", "bc2fd1c09c226ea47ab8301cde6dbcf9e5c78b73" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Dec 02 22:07:40 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 02 22:07:40 2008 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel\n\nConflicts:\n\n\tarch/arm/mach-pxa/pxa25x.c\n" }, { "commit": "59c7bcd4d60812ca10ec691376f43d6a5fbfb4f8", "tree": "74ebe42f17a16018dbbafb0ae7e7ad18f185e4fe", "parents": [ "f1c6cd62cc4f7e55a803c4b9b92a67488d765a8f" ], "author": { "name": "Eric Miao", "email": "eric.miao@marvell.com", "time": "Sat Nov 29 21:42:39 2008 +0800" }, "committer": { "name": "Eric Miao", "email": "eric.miao@marvell.com", "time": "Tue Dec 02 14:42:40 2008 +0800" }, "message": "[ARM] pxa: add base PXA935 support due to CPUID change\n\nPXA935 has changed its implementor ID from Intel to Marvell, this\npatch modifies arch/arm/boot/compressed/head.S and proc-xsc3.S to\nsupport a smooth bootup.\n\nSigned-off-by: Eric Miao \u003ceric.miao@marvell.com\u003e\n" }, { "commit": "657e1de8e742cf81153d2d15545948bd58294200", "tree": "0fa3df23305e3763027f819cde6016dde8b24223", "parents": [ "93982535a201399c0023c1166a7f16a335134d5a", "6f13d278836d7251168631faeb0cbf5e4cdd98e5" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Dec 01 17:53:45 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 01 17:53:45 2008 +0000" }, "message": "Merge branch \u0027for-rmk-realview\u0027 of git://linux-arm.org/linux-2.6 into devel\n" }, { "commit": "4c3ea3717103ffcccfaebedb98c2dadfb54e0482", "tree": "aeef9b14e999051c9b1e3cb01c0dae48428f16d8", "parents": [ "8aa2da872a492a2196397603ed756a4c48677122" ], "author": { "name": "Jon Callan", "email": "Jon.Callan@arm.com", "time": "Mon Dec 01 14:54:56 2008 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Dec 01 14:54:56 2008 +0000" }, "message": "RealView: Add Cortex-A9 support to the EB board\n\nThis patch adds the necessary definitions and Kconfig entries to enable\nCortex-A9 (ARMv7 SMP) tiles on the RealView/EB board.\n\nSigned-off-by: Jon Callan \u003cJon.Callan@arm.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n\n" }, { "commit": "37efe6427dd50e889473fb3c7fcec02dbbd098eb", "tree": "d5a6b3e6fbd5d60a1a145f5801002e96bcb9af9e", "parents": [ "112243034cec7c3ef0499fdebf39218714da453d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Dec 01 11:53:07 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 01 11:53:07 2008 +0000" }, "message": "[ARM] use asm/sections.h\n\nUpdate to use the asm/sections.h header rather than declaring these\nsymbols ourselves. Change __data_start to _data to conform with the\nnaming found within asm/sections.h.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "87c52578bd050ba395b0cae7079b1128abd2422d", "tree": "e3b5ddbcafc52eb50e60516b0bcf7f20a51a270d", "parents": [ "f40b121d983dfc53bde882aadec7f2f0bbcbd1c2" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Nov 29 17:35:51 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Nov 29 18:49:55 2008 +0000" }, "message": "[ARM] Remove linux/sched.h from asm/cacheflush.h and asm/uaccess.h\n\n... and fix those drivers that were incorrectly relying upon\nthat include.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5bed1fb3287dfb1f6cf717ec200b23d3e537c9ae", "tree": "59b6a3c32e8d02fb9022b598b5cf8fc306faf833", "parents": [ "0b3ce7fc3b9949a9867b810372226f5bc21dde1a" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Fri Nov 28 22:48:33 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 23:20:39 2008 +0000" }, "message": "[ARM] Remove unnecessary mach/hardware.h includes in arch/arm/mm\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7ef4de17cc55a3c3b8d093743b1e3b845d8eba47", "tree": "adf87c996affbb6c42850d55cb34c0e5a2f6d340", "parents": [ "f412b09f4ed7c57f5b8935ed7d6fc786f402a629", "b5ee9002583fc14e6d45a04c18f208987a8fbced" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Fri Nov 28 15:39:02 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:39:02 2008 +0000" }, "message": "Merge branch \u0027highmem\u0027 into devel\n\nConflicts:\n\n\tarch/arm/mach-clps7500/include/mach/memory.h\n" }, { "commit": "252d4c276dc0895834af48743579cf19d1fa150b", "tree": "ff0005eeff89ad8bcc5ebd197055ce01cadc96df", "parents": [ "9210807cb5a3f19a0e954dd401e3a2c3626d1b48" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Thu Sep 11 11:52:02 2008 -0400" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:36:47 2008 +0000" }, "message": "[ARM] remove bogus #ifdef CONFIG_HIGHMEM in show_pte()\n\nThe restriction on !CONFIG_HIGHMEM is unneeded since page tables are\ncurrently never allocated with highmem pages, and actually disable PTE\ndump whenever highmem is configured. Let\u0027s have a dynamic test to better\ndescribe the current limitation instead.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9210807cb5a3f19a0e954dd401e3a2c3626d1b48", "tree": "d73afb5a664ba8fcbbd0b5e5d48ac5533f7d4da0", "parents": [ "6db015e49c03d42247d2a985475b833635406a4f" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Fri Sep 19 10:43:06 2008 -0400" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:36:47 2008 +0000" }, "message": "[ARM] prevent the vmalloc cmdline argument from eating all memory\n\nCommit 8d5796d2ec6b5a4e7a52861144e63af438d6f8f7 allows for the vmalloc\narea to be resized from the kernel cmdline. Make sure it cannot overlap\nwith RAM entirely.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6db015e49c03d42247d2a985475b833635406a4f", "tree": "933168a174d2294fa5e89a4eb60be77e01194bcd", "parents": [ "a1bbaec0cd2a59d4bb09b72e4541a8a12e480d5d" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Wed Sep 17 14:50:42 2008 -0400" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:36:46 2008 +0000" }, "message": "[ARM] mem_init() cleanups\n\nMake free_area() arguments pfn based, and return number of freed pages.\nThis will simplify highmem initialization later.\n\nAlso, codepages, datapages and initpages are actually codesize, datasize\nand initsize.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a1bbaec0cd2a59d4bb09b72e4541a8a12e480d5d", "tree": "c574a8fb0078ea5931264bbac8ee6dfc5e3bc6e5", "parents": [ "4b5f32cee0cce7b9783ced5cbeabd17aa53c51fb" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Tue Sep 02 11:44:21 2008 -0400" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:36:45 2008 +0000" }, "message": "[ARM] split highmem into its own memory bank\n\nDoing so will greatly simplify the bootmem initialization code as each\nbank is therefore entirely lowmem or highmem with no crossing between\nthose zones.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4b5f32cee0cce7b9783ced5cbeabd17aa53c51fb", "tree": "95d3f2af07733cf70419ea5c3ae1100be2533197", "parents": [ "43ae286b7d4d8c4983bc263ef2e3cccc10dedb2b" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Mon Oct 06 13:24:40 2008 -0400" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:36:44 2008 +0000" }, "message": "[ARM] rationalize memory configuration code some more\n\nCurrently there are two instances of struct meminfo: one in\nkernel/setup.c marked __initdata, and another in mm/init.c with\npermanent storage. Let\u0027s keep only the later to directly populate\nthe permanent version from arm_add_memory().\n\nAlso move common validation tests between the MMU and non-MMU cases\ninto arm_add_memory() to remove some duplication. Protection against\noverflowing the membank array is also moved in there in order to cover\nthe kernel cmdline parsing path as well.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "43ae286b7d4d8c4983bc263ef2e3cccc10dedb2b", "tree": "be10faffb48904e5bb962fbd45f7cb2ff395caea", "parents": [ "303c6443659bc1dc911356f5de149f48ff1d97b8" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Tue Nov 04 02:42:27 2008 -0500" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 28 15:36:43 2008 +0000" }, "message": "[ARM] fix a couple clear_user_highpage assembly constraints\n\nIn all cases the kaddr is assigned an input register even though it is\nmodified in the assembly code. Let\u0027s assign a new variable to the\nmodified value and mark those inline asm with volatile otherwise they\nget optimized away because the output variable is otherwise not used.\n\nAlso fix a few conversion errors in copypage-feroceon.c and\ncopypage-v4mc.c.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "303c6443659bc1dc911356f5de149f48ff1d97b8", "tree": "75da0aef28ec8e843cdeb24c96349bdf812e2740", "parents": [ "063b0a4207e43acbeff3d4b09f43e750e0212b48" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Fri Oct 31 16:32:19 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 27 23:53:48 2008 +0000" }, "message": "[ARM] clearpage: provide our own clear_user_highpage()\n\nFor similar reasons as copy_user_page(), we want to avoid the\nadditional kmap_atomic if it\u0027s unnecessary.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "063b0a4207e43acbeff3d4b09f43e750e0212b48", "tree": "eb2a2c1faa732c763102040478830111fc13f2a5", "parents": [ "d73e60b7144a86baf0fdfcc9537a70bb4f72e11c" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Fri Oct 31 15:08:35 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 27 23:53:47 2008 +0000" }, "message": "[ARM] copypage: provide our own copy_user_highpage()\n\nWe used to override the copy_user_page() function. However, this\nis not only inefficient, it also causes additional complexity for\nhighmem support, since we convert from a struct page to a kernel\ndirect mapped address and back to a struct page again.\n\nMoreover, with highmem support, we end up pointlessly setting up\nkmap entries for pages which we\u0027re going to remap. So, push the\nkmapping down into the copypage implementation files where it\u0027s\nrequired.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d73e60b7144a86baf0fdfcc9537a70bb4f72e11c", "tree": "02155154caf6f1a5d6ce38f2a89ed67f875c7791", "parents": [ "487ff32082a9bd7489d8185cf7d7a2fdf18a22fa" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Fri Oct 31 13:08:02 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 27 23:53:46 2008 +0000" }, "message": "[ARM] copypage: convert assembly files to C\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f412b09f4ed7c57f5b8935ed7d6fc786f402a629", "tree": "34fe1b4b64db4993e9fb21a70812fafed0437870", "parents": [ "31bccbf39208133415000520c79ebe7b291786df", "7f1fd31db158c95418d9cc5690ab60ecc6fb632d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Nov 27 12:42:48 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 27 12:42:48 2008 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://linux-arm.org/linux-2.6 into devel\n" }, { "commit": "c750815e2d436f4379c7af8a8770ef2ae71c5607", "tree": "a63ddc8af77e0cd86aa837bc77f98a1c18fbc685", "parents": [ "59f0cb0fddc14ffc6676ae62e911f8115ebc8ccf" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Oct 26 10:55:14 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 27 12:38:00 2008 +0000" }, "message": "[ARM] Arrange for platforms to select appropriate CPU support\n\nRather than:\n\n\tconfig CPU_BLAH\n\t\tbool\n\t\tdepends on ARCH_FOO || MACH_BAR\n\t\tdefault y if ARCH_FOO || MACH_BAR\n\narrange for ARCH_FOO and MACH_BAR to select CPU_BLAH directly.\n\nAcked-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nAcked-by: Andrew Victor \u003clinux@maxim.org.za\u003e\nAcked-by: Brian Swetland \u003cswetland@google.com\u003e\nAcked-by: Eric Miao \u003ceric.miao@marvell.com\u003e\nAcked-by: Nicolas Bellido \u003cml@acolin.be\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "59f0cb0fddc14ffc6676ae62e911f8115ebc8ccf", "tree": "1e5fc347287c02e83dce967180c96906f6ed7455", "parents": [ "ed313489badef16d700f5a3be50e8fd8f8294bc8" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Oct 27 11:24:09 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 27 12:37:59 2008 +0000" }, "message": "[ARM] remove memzero()\n\nAs suggested by Andrew Morton, remove memzero() - it\u0027s not supported\non other architectures so use of it is a potential build breaking bug.\nSince the compiler optimizes memset(x,0,n) to __memzero() perfectly\nwell, we don\u0027t miss out on the underlying benefits of memzero().\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8553cb67d2318db327071018fc81084cbabccc46", "tree": "f2db64a188cbf2cce745720bf3d279daa2768609", "parents": [ "73b63efaac7352c9e2bf1570fac98fd44a99f8f9" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Nov 10 14:14:11 2008 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Nov 10 14:14:11 2008 +0000" }, "message": "Modern processors may need to drain the WB before WFI\n\nSince WFI may cause the processor to enter a low-power mode, data may\nstill be in the write buffer. This patch adds a DSB (or DWB) to the\ncpu_(v6|v7)_do_idle functions before the WFI.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n\n\n\n" }, { "commit": "ebb4c65869db7213280ad9c510637683939b5ff8", "tree": "e9aa372c806fad73a04ba2f9d16d1f17491a11cf", "parents": [ "7bfc0b2e266dd4cd3d3f27a3ad31bf79974190b1" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Nov 09 11:18:36 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 09 11:18:36 2008 +0000" }, "message": "[ARM] iop: iop3xx needs registers mapped uncached+unbuffered\n\nMikael Pettersson reported:\n\n The 2.6.28-rc kernels fail to detect PCI device 0000:00:01.0\n (the first ethernet port) on my Thecus n2100 XScale box.\n\n There is however still a strange \"ghost\" device that gets partially\n detected in 2.6.28-rc2 vanilla.\n\nThe IOP321 manual says:\n\n The user designates the memory region containing the OCCDR as\n non-cacheable and non-bufferable from the IntelR XScaleTM core.\n This guarantees that all load/stores to the OCCDR are only of\n DWORD quantities.\n\nEnsure that the OCCDR is so mapped.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "72bc2b1ad62f4d2f0a51b35829093d41f55accce", "tree": "56a6c8db69e4835259ba135c721a28b3a91ba4ed", "parents": [ "4bab0ea1d42dd1927af9df6fbf0003fc00617c50" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Sat Nov 08 21:15:53 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Nov 08 23:08:54 2008 +0000" }, "message": "[ARM] 5329/1: Feroceon: fix feroceon_l2_inv_range\n\nSame fix as commit c7cf72dcadb: when \u0027start\u0027 and \u0027end\u0027 are less than a\ncacheline apart and \u0027start\u0027 is unaligned we are done after cleaning and\ninvalidating the first cacheline.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "878708f290f6ed8b108d73fd6ab624cda6266a1e", "tree": "249f991f231ef8532c7f44b592bbfe78194f7e2e", "parents": [ "b1cce6b1b2785fd61454b47ceacb461815407662", "c7cf72dcadbe39c2077b32460f86c9f8167be3be" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Nov 06 18:04:23 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 06 18:04:23 2008 +0000" }, "message": "Merge branch \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop\n" }, { "commit": "c7cf72dcadbe39c2077b32460f86c9f8167be3be", "tree": "66984afe9b390596d1ae97e35aaeb4e6f52c412d", "parents": [ "45beca08dd8b6d6a65c5ffd730af2eac7a2c7a03" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Nov 06 17:43:55 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Nov 06 10:48:29 2008 -0700" }, "message": "[ARM] xsc3: fix xsc3_l2_inv_range\n\nWhen \u0027start\u0027 and \u0027end\u0027 are less than a cacheline apart and \u0027start\u0027 is\nunaligned we are done after cleaning and invalidating the first\ncacheline. So check for (start \u003c end) which will not walk off into\ninvalid address ranges when (start \u003e end).\n\nThis issue was caught by drivers/dma/dmatest.\n\n2.6.27 is susceptible.\n\nCc: \u003cstable@kernel.org\u003e\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nCc: Lothar WaÃ\u003c9f\u003emann \u003cLW@KARO-electronics.de\u003e\nCc: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nCc: Eric Miao \u003ceric.miao@marvell.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b1cce6b1b2785fd61454b47ceacb461815407662", "tree": "90a877fcab8defd4a6770aaab4dcb3de6e69ba04", "parents": [ "ab4f2ee130d5ffcf35616e1f5c6ab75af5b463b6" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Nov 04 10:52:28 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 06 17:45:32 2008 +0000" }, "message": "[ARM] mm: fix page table initialization\n\nAs a result of the ptebits changes, we ended up marking device mappings\nas normal memory on ARMv7 CPUs, resulting in undesirable behaviour with\nserial ports and the like. While reviewing the section mapping table\nentries, other errors in the memory type settings for devices were\ndetected and confirmed to prevent Xscale3 platforms booting.\n\nTested on:\n\tOMAP34xx (ARMv7),\n\tOMAP24xx (ARMv6),\n\tOMAP16xx (ARM926T, ARMv5),\n\tPXA311 (Xscale3),\n\tPXA272 (Xscale),\n\tPXA255 (Xscale),\n\tIXP42x (Xscale),\n\tS3C2410 (ARM920T, ARMv4T),\n\tARM720T (ARMv4T)\n\tStrongARM-110 (ARMv4)\n\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nTested-by: Robert Jarzmik \u003crobert.jarzmik@free.fr\u003e\nTested-by: Mike Rapoport \u003cmike@compulab.co.il\u003e\nTested-by: Ben Dooks \u003cben-linux@fluff.org\u003e\nTested-by: Anders Grafström \u003cgrfstrm@users.sourceforge.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ab4f2ee130d5ffcf35616e1f5c6ab75af5b463b6", "tree": "7532eb50e674402f8f658094acb71b8dfb1117bf", "parents": [ "d2ed5cb80a241518dd71f467c884bfabbe15f68c" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Nov 06 17:11:07 2008 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 06 17:13:47 2008 +0000" }, "message": "[ARM] fix naming of MODULE_START / MODULE_END\n\nAs of 73bdf0a60e607f4b8ecc5aec597105976565a84f, the kernel needs\nto know where modules are located in the virtual address space.\nOn ARM, we located this region between MODULE_START and MODULE_END.\nUnfortunately, everyone else calls it MODULES_VADDR and MODULES_END.\nUpdate ARM to use the same naming, so is_vmalloc_or_module_addr()\ncan work properly. Also update the comment on mm/vmalloc.c to\nreflect that ARM also places modules in a separate region from the\nvmalloc space.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "73b63efaac7352c9e2bf1570fac98fd44a99f8f9", "tree": "9bdb18703567d643f57bc7e068f1f47df487fd88", "parents": [ "6b07d7fea0496374ff7754dc3d1dca03b2911828" ], "author": { "name": "Jon Callan", "email": "Jon.Callan@arm.com", "time": "Thu Nov 06 13:23:09 2008 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Nov 06 13:23:09 2008 +0000" }, "message": "ARMv7: Add SMP initialisation to proc-v7.S\n\nThis patch adds the SMP/nAMP mode setting to __v7_setup and also sets\nTTBR to shared page table walks if SMP is enabled. The PTWs are also\nmarked inner cacheable for both SMP and UP modes (setting this is fine\neven if the CPU doesn\u0027t support the feature).\n\nSigned-off-by: Jon Callan \u003cJon.Callan@arm.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n\n\n" }, { "commit": "6b07d7fea0496374ff7754dc3d1dca03b2911828", "tree": "9a457c335982777e172fffad192c43b65d810b1e", "parents": [ "376e14218d3d791127e9b9bfbe2f99c44c2a19c2" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Nov 06 13:23:08 2008 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Nov 06 13:23:08 2008 +0000" }, "message": "ARMv7: Do not set TTBR0 in __v7_setup\n\nThis register is set in __enable_mmu in the head.S file.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n\n\n" }, { "commit": "c30c2f99e10b6a810dae9a25b35c6d48796d8ffb", "tree": "ba62c6796e789fc5dfcb16ec8cddb2f1c89203b8", "parents": [ "2bedbdf4148ebbe48c7a89449ab52e475a788f42" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Nov 06 13:23:07 2008 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Nov 06 13:23:07 2008 +0000" }, "message": "ARMv7: Add extra barriers for flush_cache_all compressed/head.S\n\nThe flush_cache_all function on ARMv7 is implemented as a series of\ncache operations by set/way. These are not guaranteed to be ordered with\nprevious memory accesses, requiring a DMB. This patch also adds barriers\nfor the TLB operations in compressed/head.S\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n\n\n" }, { "commit": "6bee00dbbcb1e9feb0510e9a7104b4af00adc574", "tree": "dd0b20bbbe353ece29a78a75b155e6d8bbd2c86e", "parents": [ "e013e13bf605b9e6b702adffbe2853cfc60e7806" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Oct 24 10:21:45 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Oct 24 10:21:45 2008 -0700" }, "message": "[ARM] xsc3: revert writethrough memory-type encoding change\n\nCommit 40df2d1d \"[ARM] Update Xscale and Xscale3 PTE mappings\" was\nfingered by git-bisect for a boot failure on iop13xx. The change made\nL_PTE_MT_WRITETHROUGH mappings L2-uncacheable. Russell points out that\nthis mapping is used for the vector page. Given the regression, and the\nfact this page is used often, restore the old behaviour.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "f80a3bb252cbb0959259328b9ab02b019123ed05", "tree": "bfc9cf861aa4ff025dbdf524c1b70700354ff7c1", "parents": [ "085eefb5948bb43020792f31406da2ee2ef4e924" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Wed Oct 22 13:04:30 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 22 19:40:21 2008 +0100" }, "message": "[ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.S\n\nA typo caused these values to be swapped leading to incorrect memory\ntype attributes.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f20e3b5fe7ead0615309433260b9784d8da0bbbd", "tree": "eabb2e47a0355ac4e8024b7087b4e7cb9f324358", "parents": [ "bcbfe664e7af019e698cef2feb85ac2b4f1ac11d", "f030d7b65e4e6399f23de2a41a58d1b607b6bd89" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Oct 22 19:34:09 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 22 19:34:09 2008 +0100" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.android.com/kernel into devel\n" }, { "commit": "1637de0c9b4dbac0f185e94b2b8cd2c2db78700d", "tree": "4b7f9662891e90036a5e03b3241641c5b27c2af5", "parents": [ "2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4" ], "author": { "name": "Brian Swetland", "email": "swetland@google.com", "time": "Tue Sep 09 07:13:33 2008 -0700" }, "committer": { "name": "Brian Swetland", "email": "swetland@google.com", "time": "Wed Oct 22 02:39:32 2008 -0700" }, "message": "[ARM] msm: rename ARCH_MSM7X00A to ARCH_MSM\n\nThe MSM architecture covers a wider family of chips than just the MSM7X00A.\nMove to a more generic name, in perparation for supporting the specific\nSoC variants as sub-architectures (ARCH_MSM7X01A, ARCH_MSM722X, etc). This\ngives us ARCH_MSM for the (many) common peripherals.\n\nThis also removes the unused/obsolete config item MSM7X00A_IDLE.\n\nSigned-off-by: Brian Swetland \u003cswetland@google.com\u003e\n" }, { "commit": "e4d2a5985af957d2c0da61fb978d0c414b92a562", "tree": "0f8adefd6c9d91e1da76c3e833d29e36a3a72623", "parents": [ "957cf333b5284943c4866e1d0339a105d2762c9c" ], "author": { "name": "Anders Grafström", "email": "grfstrm@users.sourceforge.net", "time": "Thu Oct 16 17:37:24 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Oct 17 13:44:27 2008 +0100" }, "message": "[ARM] 5310/1: Fix cache flush functions for ARMv4\n\nARMv4 (ARM720T) cache flush functions are broken in 2.6.19+ kernels.\nThe issue was introduced by commit f12d0d7c7786af39435ef6ae9defe47fb58f6091\nThis patch corrects the CPU_CP15 ifdef statements so that they actually\ndo something.\n\nSigned-off-by: Anders Grafström \u003cgrfstrm@users.sourceforge.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b6825d2df55aa7d7341c715b577b73a6a03dc944", "tree": "ae4f0f52f4c2ad4e501dd323318486ccdd7fcd93", "parents": [ "6defd90433729c2d795865165cb34d938d8ff07c", "aa59e19d05114f9fb7718d6bc8398255476fb4f5" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Oct 14 22:24:42 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Oct 14 22:24:42 2008 +0100" }, "message": "Merge branch \u0027omap-all\u0027 into devel\n\nConflicts:\n\n\tarch/arm/mach-omap2/gpmc.c\n\tarch/arm/mach-omap2/irq.c\n" }, { "commit": "6defd90433729c2d795865165cb34d938d8ff07c", "tree": "ebb963c6db463296b8f926d79d7ddc8c1251ca24", "parents": [ "c97f68145e8067b3ac4b126a6faebf90f9ffc302", "99c6bb390cf599b9e0aa6e69beacc4e5d875bf77" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Oct 09 21:33:07 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 09 21:33:07 2008 +0100" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion\n\nMerge branch \u0027orion-devel\u0027 into devel\n" }, { "commit": "6a4690c22f5da1eb1c898b61b6a80da52fbd976f", "tree": "a03891a32abe0da191fb765fe669a597e07423c6", "parents": [ "90bb28b0644f7324f8bd1feb27b35146e6785ba2", "8ec53663d2698076468b3e1edc4e1b418bd54de3" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Oct 09 21:31:56 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 09 21:31:56 2008 +0100" }, "message": "Merge branch \u0027ptebits\u0027 into devel\n\nConflicts:\n\n\tarch/arm/Kconfig\n" }, { "commit": "2885f00049f80287b14192145699774fa55c14f7", "tree": "be5eb9664479e80828c1b4b8fc40e382ea668ef4", "parents": [ "cc26b3b01bc96a8b8c36671b0dc4898b2a152ea8" ], "author": { "name": "Syed Mohammed, Khasim", "email": "khasim@ti.com", "time": "Thu Oct 09 17:51:42 2008 +0300" }, "committer": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Thu Oct 09 17:51:42 2008 +0300" }, "message": "ARM: OMAP3: Add minimal Beagle board support\n\nAdd minimal Beagle board support. Based on earlier patches\nby Syed Mohammed Khasim with some fixes from linux-omap tree.\n\nSigned-off-by: Syed Mohammed Khasim \u003ckhasim@ti.com\u003e\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\n\n\n" }, { "commit": "000b50259271c9c14f6e175795f5164e1d51d35b", "tree": "d6c5cde5c74cb84e8ad4d3dc5beefdd131c0c010", "parents": [ "3319f5e51a20f3e3c59ed7dac9fc2d5c89aa2d9f" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Oct 03 11:09:10 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Oct 03 11:32:09 2008 +0100" }, "message": "[ARM] 5229/3: Replace some ARMv7 opcodes with the instruction name\n\nThese instructions were placed in the code directly as opcodes because\nearly compilers didn\u0027t support them. Toolchains supporting ARMv7\nunderstand these instructions and the patch puts the mnemonics back.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b7a69ac303cbfc8d6fa8e91d10e8049244ba6847", "tree": "158deb4f96730bb7850ef50dc81dc1df7683439f", "parents": [ "d2a38ef9c1585b47462c7be5501228ac57fbd3b1" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Oct 01 16:58:32 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 17:24:04 2008 +0100" }, "message": "[ARM] mm: finish ARM sparsemem support\n\n... including some comments about the ordering required to bring\nsparsemem up. You have to repeatedly guess, test, reguess, try\nagain and again to work out what the right ordering is. Many\nhours later...\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d2a38ef9c1585b47462c7be5501228ac57fbd3b1", "tree": "81ae36059881fbee802ec45081a74a866d92819e", "parents": [ "6c5da7aced798c7781f054a76c769b85f0173561" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Oct 01 16:56:15 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 17:22:02 2008 +0100" }, "message": "[ARM] mm: provide helpers for accessing membanks\n\nProvide helpers for getting physical addresses or pfns from the\nmeminfo array, and use them. Move for_each_nodebank() to\nasm/setup.h alongside the meminfo structure definition.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5ec9407dd1196daaf12b427b351e2cd62d2a16a7", "tree": "023332e9fd67d7ce0897071058db87e679bce58b", "parents": [ "9b727abdff93b0039fba94e96216fc280af4cf01" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Sep 07 19:15:31 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:41:10 2008 +0100" }, "message": "[ARM] Don\u0027t include asm/elf.h in asm code\n\nasm code really wants asm/hwcap.h, so include that instead.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "db5b7169474882fabbd811a4cf5c1bae3157e677", "tree": "b4218f6251b6719638f716fcc5aac62375903fe4", "parents": [ "40df2d1d8538865341a4cb9d4b7a375296517ad2" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Sep 07 12:42:51 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:41:06 2008 +0100" }, "message": "[ARM] Remove MT_DEVICE_IXP2000 and associated definitions\n\nAs of the previous commit, MT_DEVICE_IXP2000 encodes to the same\nPTE bit encoding as MT_DEVICE, so it\u0027s now redundant. Convert\nMT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "40df2d1d8538865341a4cb9d4b7a375296517ad2", "tree": "2b97595b5d31917432af57e4d9a70f8a459d8f65", "parents": [ "40d192b63d079db1f76cec9ae8ccbf461fda23e4" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Sep 07 12:36:46 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:41:04 2008 +0100" }, "message": "[ARM] Update Xscale and Xscale3 PTE mappings\n\nUse \u0027shared device\u0027 mappings for devices, and use the standard\nbit combinations for Xscale3.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "40d192b63d079db1f76cec9ae8ccbf461fda23e4", "tree": "60ea8ec4390964e6f8d09b017f5c871c7ea85df0", "parents": [ "3f69c0c1af288d6b124d0a928a33b51061ebf850" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 21:15:56 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:41:02 2008 +0100" }, "message": "[ARM] remove \u0027prot_pte_ext\u0027 from memory type table\n\nThis member is now redundant; the memory type is encoded in the Linux\nPTE bits.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3f69c0c1af288d6b124d0a928a33b51061ebf850", "tree": "fb6b4b13c2423e98089489056d5a35cd7b0a0400", "parents": [ "639b0ae7f5bcd645862a9c3ea2d4321475c71d7a" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Sep 15 17:23:10 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:41:01 2008 +0100" }, "message": "[ARM] Convert ARMv7 to use TEX remapping\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "639b0ae7f5bcd645862a9c3ea2d4321475c71d7a", "tree": "34e26970f8c907c9027037fc9ae5a9ab7cd2d1a2", "parents": [ "9e8b5199a753a2583a8ef8360e6428304a242283" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 21:07:45 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:41:00 2008 +0100" }, "message": "[ARM] Convert ARMv6 and ARMv7 to use new memory types\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9e8b5199a753a2583a8ef8360e6428304a242283", "tree": "cfd065b410dd5fe5c14843b71368e0916a496739", "parents": [ "bb30f36f9b71c31dc8fe3483bba4c9884fc86080" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 20:47:54 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:40:58 2008 +0100" }, "message": "[ARM] Convert Xscale and Xscale3 to use new memory types\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bb30f36f9b71c31dc8fe3483bba4c9884fc86080", "tree": "c99b583586ebec2a29be2b0173d1eb9ad07a68f9", "parents": [ "9cff96e5bfc8e366166bfb07610604c7604ac48c" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 20:04:59 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:40:56 2008 +0100" }, "message": "[ARM] Introduce new PTE memory type bits\n\nProvide L_PTE_MT_xxx definitions to describe the memory types that we\nuse in Linux/ARM. These definitions are carefully picked such that:\n\n1. their LSBs match what is required for pre-ARMv6 CPUs.\n2. they all have a unique encoding, including after modification\n by build_mem_type_table() (the result being that some have more\n than one combination.)\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "da0916539d20f257dfa46784357300e49d6bfd00", "tree": "e581749819a4a7e5aea471c242a51773a360bd1d", "parents": [ "1ad77a876da48331451698cc4172c90ab9b6372f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 17:19:08 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 01 16:40:52 2008 +0100" }, "message": "[ARM] Convert set_pte_ext implementions to macros\n\nThere are actually only four separate implementations of set_pte_ext.\nUse assembler macros to insert code for these into the proc-*.S files.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6c5da7aced798c7781f054a76c769b85f0173561", "tree": "a4713f081e16183b6ed00368658ee77bcca83cf6", "parents": [ "eca73214c9c50e290b8dc823b41730b01788872d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Sep 30 19:31:44 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 30 21:34:16 2008 +0100" }, "message": "[ARM] mm: move vmalloc\u003d parsing to arch/arm/mm/mmu.c\n\nThere\u0027s no point scattering this around the tree, the parsing\nof the parameter might as well live beside the code which uses\nit. That also means we can make vmalloc_reserve a static\nvariable.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "eca73214c9c50e290b8dc823b41730b01788872d", "tree": "22df16b626afa6fb9755ce289c6efa254f1ae3d4", "parents": [ "da46c79a5418dd6ba006665c1535af0713bb77b9" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Sep 30 19:29:25 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 30 21:34:15 2008 +0100" }, "message": "[ARM] mm: move validation of membanks to one place\n\nThe newly introduced sanity_check_meminfo() function should be\nused to collect all validation of the meminfo array, which we\nhave in bootmem_init(). Move it there.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "99c6bb390cf599b9e0aa6e69beacc4e5d875bf77", "tree": "d30e32867cd161001e5ae6fecc51a52f469bbaff", "parents": [ "92a5de80e5c53c56d098ea3cb6266138efd892f6" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Thu Sep 11 15:14:59 2008 -0400" }, "committer": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Tue Sep 30 13:41:54 2008 -0400" }, "message": "[ARM] Feroceon: small cleanups to L2 cache code\n\n- Make sure that coprocessor instructions for range ops are contiguous\n and not reordered.\n\n- s/invalidate_and_disable_dcache/flush_and_disable_dcache/\n\n- Don\u0027t re-enable I/D caches if they were not enabled initially.\n\n- Change some masks to shifts for better generated code.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nAcked-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\n" }, { "commit": "da46c79a5418dd6ba006665c1535af0713bb77b9", "tree": "cd7c3530be58cb7dc9fbd1ddd891bddedefcba21", "parents": [ "dfcc64497cbbf942cdd5af4b7eb17542b62aa759" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Tue Sep 30 16:10:11 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 30 16:41:04 2008 +0100" }, "message": "[ARM] 5272/1: remove conditional compilation in show_pte()\n\nThe PTRS_PER_PMD !\u003d 1 condition can be evaluated with C code and\noptimized at compile time.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "309dbbabee7b19e003e1ba4b98f43d28f390a84e", "tree": "ba748b84c0573f5eb151a581e333b95010576521", "parents": [ "0e18b5d7c6339311f1e32e7b186ae3556c5b6d33" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Sep 29 19:50:59 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 30 11:01:36 2008 +0100" }, "message": "[ARM] dma: don\u0027t touch cache on dma_*_for_cpu()\n\nAs per the dma_unmap_* calls, we don\u0027t touch the cache when a DMA\nbuffer transitions from device to CPU ownership. Presently, no\nproblems have been identified with speculative cache prefetching\nwhich in itself is a new feature in later architectures. We may\nhave to revisit the DMA API later for these architectures anyway.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2638b4dbe768aba023a06acd8e7eba708bb76ee6", "tree": "41e464b337ec85444d8c551947de13bb8731af70", "parents": [ "01135d92c1a540cd3370f7cf3d1c762320b85034" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 25 21:38:41 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Sep 29 10:40:16 2008 +0100" }, "message": "[ARM] dma: Reduce to one dma_sync_sg_* implementation\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "01135d92c1a540cd3370f7cf3d1c762320b85034", "tree": "a6344d942a4f63cba85290a93008ce211996d27d", "parents": [ "56f55f8b58a02e95b401cb50df05086cabeaeeb5" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 25 21:05:02 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 25 23:39:24 2008 +0100" }, "message": "[ARM] dma: Reduce to one dma_map_sg()/dma_unmap_sg() implementation\n\nNo point having two of these; dma_map_page() can do all the work\nfor us.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4360bb41920ffacd4a935fa692768129ee5bef4e", "tree": "8d5bbe15ad4c39d089ac42ab0330d8c515584f65", "parents": [ "3d014b01e54ce08d15a598f0bfb3ce597f14ca03" ], "author": { "name": "Ronen Shitrit", "email": "rshitrit@marvell.com", "time": "Tue Sep 23 15:28:10 2008 +0300" }, "committer": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Thu Sep 25 16:29:21 2008 -0400" }, "message": "[ARM] Kirkwood: add support for L2 cache WB/WT selection\n\nFeroceon L2 cache can work in eighther write through or write back mode\non Kirkwood. Add the option to configure this mode according to Kconfig.\n\nSigned-off-by: Ronen Shitrit \u003crshitrit@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "afd1a321c49a250dab97cef6f2d3c3c9b9d0174a", "tree": "7468c0055b088df5456cb2fa40d27f6c4f2e1732", "parents": [ "0ddbccd1187e12bf77e1f19d8b9dec700e09e734" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 25 16:30:57 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 25 20:48:45 2008 +0100" }, "message": "[ARM] Update dma_map_sg()/dma_unmap_sg() API\n\nUpdate the ARM DMA scatter gather APIs for the scatterlist changes.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0ddbccd1187e12bf77e1f19d8b9dec700e09e734", "tree": "3fdffd5b7419e6fd5c9adb37c37be41ec8810ccd", "parents": [ "2b4ae1f1d2ae595ff2fc5597287881796e0e6bfc" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Sep 25 15:59:19 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 25 15:59:19 2008 +0100" }, "message": "[ARM] dma: rename consistent.c to dma-mapping.c\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1ad77a876da48331451698cc4172c90ab9b6372f", "tree": "e5bbb4a782e5d6c98ff140fb2bf9a05759383a68", "parents": [ "65846909d684d75906269df4f5f3474e1fef568b" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Fri Sep 05 13:17:11 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 06 13:13:44 2008 +0100" }, "message": "[ARM] 5241/1: provide ioremap_wc()\n\nThis patch provides an ARM implementation of ioremap_wc().\n\nWe use different page table attributes depending on which CPU we\nare running on:\n\n- Non-XScale ARMv5 and earlier systems: The ARMv5 ARM documents four\n possible mapping types (CB\u003d00/01/10/11). We can\u0027t use any of the\n cached memory types (CB\u003d10/11), since that breaks coherency with\n peripheral devices. Both CB\u003d00 and CB\u003d01 are suitable for _wc, and\n CB\u003d01 (Uncached/Buffered) allows the hardware more freedom than\n CB\u003d00, so we\u0027ll use that.\n\n (The ARMv5 ARM seems to suggest that CB\u003d01 is allowed to delay stores\n but isn\u0027t allowed to merge them, but there is no other mapping type\n we can use that allows the hardware to delay and merge stores, so\n we\u0027ll go with CB\u003d01.)\n\n- XScale v1/v2 (ARMv5): same as the ARMv5 case above, with the slight\n difference that on these platforms, CB\u003d01 actually _does_ allow\n merging stores. (If you want noncoalescing bufferable behavior\n on Xscale v1/v2, you need to use XCB\u003d101.)\n\n- Xscale v3 (ARMv5) and ARMv6+: on these systems, we use TEXCB\u003d00100\n mappings (Inner/Outer Uncacheable in xsc3 parlance, Uncached Normal\n in ARMv6 parlance).\n\n The ARMv6 ARM explicitly says that any accesses to Normal memory can\n be merged, which makes Normal memory more suitable for _wc mappings\n than Device or Strongly Ordered memory, as the latter two mapping\n types are guaranteed to maintain transaction number, size and order.\n We use the Uncached variety of Normal mappings for the same reason\n that we can\u0027t use C\u003d1 mappings on ARMv5.\n\n The xsc3 Architecture Specification documents TEXCB\u003d00100 as being\n Uncacheable and allowing coalescing of writes, which is also just\n what we need.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "fced80c735941fa518ac67c0b61bbe153fb8c050", "tree": "16f3abeb03e8c164108873bc5aab660a506577c5", "parents": [ "33fa9b13285e76fb95d940120964562e4c7081c2" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 12:10:45 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 06 12:10:45 2008 +0100" }, "message": "[ARM] Convert asm/io.h to linux/io.h\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "33fa9b13285e76fb95d940120964562e4c7081c2", "tree": "d75440cfe6d2403b14bec7d145c45829a3091407", "parents": [ "5ed5fdf50cbe8195522e2176d6356b357c0c963f" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 11:35:55 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 06 11:35:55 2008 +0100" }, "message": "[ARM] Convert asm/uaccess.h to linux/uaccess.h\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5ed5fdf50cbe8195522e2176d6356b357c0c963f", "tree": "eac14e5f58eb51f275ef51b93219f36b18501141", "parents": [ "012d1f4af1b07e5ccfcd23b7c1dcdcc30a068257" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 11:23:30 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 06 11:23:30 2008 +0100" }, "message": "[ARM] clean up a load of old declarations\n\n... some of which are now in linux/*.h headers.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "012d1f4af1b07e5ccfcd23b7c1dcdcc30a068257", "tree": "b054a3cc06cf026160a3e44b51b4ccc167baba4b", "parents": [ "446616dbb48c7dc039649f796c3fab55c44bd0bc" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 06 10:57:03 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 06 10:57:03 2008 +0100" }, "message": "[ARM] move initrd code from kernel/setup.c to mm/init.c\n\nThis quietens some sparse warnings about phys_initrd_start and\nphys_initrd_size.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "09d9bae064724635df3920bcca47e077cfb23e76", "tree": "a42fa183dbdbd69854866c0b1f0169f0286b45d4", "parents": [ "22acc4e65043d436bc286e6059960fa533e37356" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Fri Sep 05 14:08:44 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Sep 05 14:11:24 2008 +0100" }, "message": "[ARM] sparse: fix several warnings\n\narch/arm/kernel/process.c:270:6: warning: symbol \u0027show_fpregs\u0027 was not declared. Should it be static?\n\nThis function isn\u0027t used, so can be removed.\n\narch/arm/kernel/setup.c:532:9: warning: symbol \u0027len\u0027 shadows an earlier one\narch/arm/kernel/setup.c:524:6: originally declared here\n\nA function containing two \u0027len\u0027s.\n\narch/arm/mm/fault-armv.c:188:13: warning: symbol \u0027check_writebuffer_bugs\u0027 was not declared. Should it be static?\narch/arm/mm/mmap.c:122:5: warning: symbol \u0027valid_phys_addr_range\u0027 was not declared. Should it be static?\narch/arm/mm/mmap.c:137:5: warning: symbol \u0027valid_mmap_phys_addr_range\u0027 was not declared. Should it be static?\n\nMissing includes.\n\narch/arm/kernel/traps.c:71:77: warning: Using plain integer as NULL pointer\narch/arm/mm/ioremap.c:355:46: error: incompatible types in comparison expression (different address spaces)\n\nSillies.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "93ed3970114983543bbebd195bef65db84444ea2", "tree": "9df88b61a2a7b3cc493c6cfc5f4848448250f6b5", "parents": [ "8d5796d2ec6b5a4e7a52861144e63af438d6f8f7" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Aug 28 11:22:32 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Sep 01 12:06:34 2008 +0100" }, "message": "[ARM] 5227/1: Add the ENDPROC declarations to the .S files\n\nThis declaration specifies the \"function\" type and size for various\nassembly functions, mainly needed for generating the correct branch\ninstructions in Thumb-2.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "46097c7dd8bfaf9fb86565b6de45ab5a63afdd53", "tree": "bc9ba1ba3c8e6585704225863663b1b91d75632e", "parents": [ "0ba8b9b273c45dd23f60ff700e265a0069b33758" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Aug 10 18:10:19 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Sep 01 12:06:24 2008 +0100" }, "message": "[ARM] cachetype: move definitions to separate header\n\nRather than pollute asm/cacheflush.h with the cache type definitions,\nmove them to asm/cachetype.h, and include this new header where\nnecessary.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0ba8b9b273c45dd23f60ff700e265a0069b33758", "tree": "cb6aef90464889a27215cf9b7204c11b12e7c628", "parents": [ "b8e6c91c74e9f0279b7c51048779b3d62da60b88" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Aug 10 18:08:10 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Sep 01 12:06:23 2008 +0100" }, "message": "[ARM] cputype: separate definitions, use them\n\nAdd asm/cputype.h, moving functions and definitions from asm/system.h\nthere. Convert all users of \u0027processor_id\u0027 to the more efficient\nread_cpuid_id() function.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8a5544c887a8682e39c94061c58180e9c44b050b", "tree": "58963ef0c1081b89d3d04eeb16a8c2c6e22470ea", "parents": [ "61db7fb1c78c32b6abdc5c7965981de332aeaa5b" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Aug 12 14:02:23 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Aug 12 19:54:08 2008 +0100" }, "message": "[ARM] add proc-macros.S include to proc-arm940 and proc-arm946\n\n... otherwise these fail to build.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "60296c71f6c5063e3c1f1d2619ca0b60940162e7", "tree": "9b66e8716d83c3d350829376d75212798b2c72c6", "parents": [ "09c0ed2e6eb87613b2670c15ba771ac671db19d9" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Tue Aug 05 01:56:13 2008 +0200" }, "committer": { "name": "Lennert Buytenhek", "email": "buytenh@marvell.com", "time": "Sat Aug 09 15:38:15 2008 +0200" }, "message": "[ARM] prevent crashing when too much RAM installed\n\nThis patch will truncate and/or ignore memory banks if their kernel\ndirect mappings would (partially) overlap with the vmalloc area or\nthe mappings between the vmalloc area and the address space top, to\nprevent crashing during early boot if there happens to be more RAM\ninstalled than we are expecting.\n\nSince the start of the vmalloc area is not at a fixed address (but\nthe vmalloc end address is, via the per-platform VMALLOC_END define),\na default area of 128M is reserved for vmalloc mappings, which can\nbe shrunk or enlarged by passing an appropriate vmalloc\u003d command line\noption as it is done on x86.\n\nOn a board with a 3:1 user:kernel split, VMALLOC_END at 0xfe000000,\ntwo 512M RAM banks and vmalloc\u003d128M (the default), this patch gives:\n\n\tTruncating RAM at 20000000-3fffffff to -35ffffff (vmalloc region overlap).\n\tMemory: 512MB 352MB \u003d 864MB total\n\nOn a board with a 3:1 user:kernel split, VMALLOC_END at 0xfe800000,\ntwo 256M RAM banks and vmalloc\u003d768M, this patch gives:\n\n\tTruncating RAM at 00000000-0fffffff to -0e7fffff (vmalloc region overlap).\n\tIgnoring RAM at 10000000-1fffffff (vmalloc region overlap).\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Riku Voipio \u003criku.voipio@iki.fi\u003e\n" }, { "commit": "6f088f1d215be5250582b974f83f0e3aa6ad3a28", "tree": "f79585741cad29fa9fe9202bf830104815335758", "parents": [ "a09e64fbc0094e3073dbb09c3b4bfe4ab669244b" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Sat Aug 09 13:44:58 2008 +0200" }, "committer": { "name": "Lennert Buytenhek", "email": "buytenh@marvell.com", "time": "Sat Aug 09 13:44:58 2008 +0200" }, "message": "[ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/plat\n\nThis patch performs the equivalent include directory shuffle for\nplat-orion, and fixes up all users.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\n" }, { "commit": "a09e64fbc0094e3073dbb09c3b4bfe4ab669244b", "tree": "69689f467179891b498bd7423fcf61925173db31", "parents": [ "a1b81a84fff05dbfef45b7012c26e1fee9973e5d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Aug 05 16:14:15 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Aug 07 09:55:48 2008 +0100" }, "message": "[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach\n\nThis just leaves include/asm-arm/plat-* to deal with.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4fb8af10d0fd09372d52966b76922b9e82bbc950", "tree": "d240e4d40357583e3f3eb228dccf20122a5b31ed", "parents": [ "f44f82e8a20b98558486eb14497b2f71c78fa325", "64a99d2a8c3ed5c4e39f3ae1cc682aa8fd3977fc" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Aug 07 09:55:03 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Aug 07 09:55:03 2008 +0100" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes\n" }, { "commit": "be509729356b7433f73df2b9a966674a437fbbc1", "tree": "5a3e90513c106f9dcf08405e4ebd3599fd14413c", "parents": [ "0f8469a54f7bd65f2c740a5480c56260dc8a7ae0" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Aug 04 10:41:28 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Aug 07 09:40:08 2008 +0100" }, "message": "[ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead\n\nRemove includes of asm/hardware.h in addition to asm/arch/hardware.h.\nThen, since asm/hardware.h only exists to include asm/arch/hardware.h,\nupdate everything to directly include asm/arch/hardware.h and remove\nasm/hardware.h.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7e31aa11fc672bbe0dd0da59513c9efe3809ced7", "tree": "0aafe6a0045230950ce6b26579a053da12614a49", "parents": [ "071f4924844c435a3ae0cdbab7d7df2f1da85713", "9cb7117fa4858468014f76bd996076985111e955" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Aug 03 10:39:02 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Aug 03 10:39:02 2008 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n [ARM] 5182/1: pxa: Fix pcm990 compilation\n [ARM] Fix explicit asm(-arm)?/arch-foo references\n [ARM] move include/asm-arm to arch/arm/include/asm\n [ARM] Remove explicit dependency for misc.o from compressed/Makefile\n [ARM] initrd: claim initrd memory exclusively\n [ARM] pxa: add support for L2 outer cache on XScale3 (attempt 2)\n [ARM] 5180/1: at91: Fix at91_nand -\u003e atmel_nand rename fallout\n [ARM] add Sascha Hauer as Freescale i.MX Maintainer\n [ARM] i.MX: add missing clock functions exports\n [ARM] i.MX: remove set_imx_fb_info() export\n [ARM] mx1ads: make mmc platform data available for modules\n [ARM] mx2: add missing Kconfig dependency\n" }, { "commit": "4baa9922430662431231ac637adedddbb0cfb2d7", "tree": "e8fb765ce3e41c01f33de34a0bc9494f0ae19818", "parents": [ "ff4db0a043a5dee7180bdffd178e61cd02812c68" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 02 10:55:55 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 02 21:32:35 2008 +0100" }, "message": "[ARM] move include/asm-arm to arch/arm/include/asm\n\nMove platform independent header files to arch/arm/include/asm, leaving\nthose in asm/arch* and asm/plat* alone.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b962a286e500c6259af8ba133361f8528eed9172", "tree": "cdb19c3ac525cb025dbfb4612decab9e1b030f7b", "parents": [ "905a09d57afcc49511de18a95605c11ad9c88649" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Wed Jul 30 21:24:56 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jul 30 21:24:56 2008 +0100" }, "message": "[ARM] initrd: claim initrd memory exclusively\n\nClaim the initrd memory exclusively, and order other memory\nreservations beforehand. This allows us to determine whether\nthe initrd memory was overwritten, and disable the initrd in\nthat case.\n\nThis avoids a \u0027bad page state\u0027 bug.\n\nTested-by: Ralph Siemsen \u003cralphs@netwinder.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "905a09d57afcc49511de18a95605c11ad9c88649", "tree": "3e027f413846fb0b392068183dcc840b5aea64ef", "parents": [ "e76e3ac69e62d3f93e935526bc9afa371e7f38ba" ], "author": { "name": "Eric Miao", "email": "eric.miao@marvell.com", "time": "Fri Jun 06 16:34:03 2008 +0800" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jul 28 23:13:09 2008 +0100" }, "message": "[ARM] pxa: add support for L2 outer cache on XScale3 (attempt 2)\n\n(20072fd0c93349e19527dd2fa9588b4335960e62 lost most of its changes\nsomehow, came from a mbox archive applied with git-am. No idea\nwhat happened. This puts back the missing bits. --rmk)\n\nThe initial patch from Lothar, and Lennert make it into a cleaner\none, modified and tested on PXA320 by Eric Miao.\n\nThis patch moves the L2 cache operations out of proc-xsc3.S into\ndedicated outer cache support code.\n\nCACHE_XSC3L2 can be deselected so no L2 cache specific code will be\nlinked in, and that L2 enable bit will not be set, this applies to\nthe following cases:\n\n a. _only_ PXA300/PXA310 support included and no L2 cache wanted\n b. PXA320 support included, but want L2 be disabled\n\nSo the enabling of L2 depends on two things:\n\n - CACHE_XSC3L2 is selected\n - and L2 cache is present\n\nWhere the latter is only a safeguard (previous testing shows it works\nOK even when this bit is turned on).\n\nIXP series of processors with XScale3 cannot disable L2 cache for the\nmoment since they depend on the L2 cache for its coherent memory, so\nIXP may always select CACHE_XSC3L2.\n\nOther L2 relevant bits are always turned on (i.e. the original code\nenclosed by #if L2_CACHE_ENABLED .. #endif), as they showed no side\neffects. Specifically, these bits are:\n\n - OC bits in TTBASE register (table walk outer cache attributes)\n - LLR Outer Cache Attributes (OC) in Auxiliary Control Register\n\nSigned-off-by: Lothar WaÃ\u003c9f\u003emann \u003cLW@KARO-electronics.de\u003e\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Eric Miao \u003ceric.miao@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "cb28a1bbdb4790378e7366d6c9ee1d2340b84f92", "tree": "316436f77dac75335fd2c3ef5f109e71606c50d3", "parents": [ "b6d4f7e3ef25beb8c658c97867d98883e69dc544", "f934fb19ef34730263e6afc01e8ec27a8a71470f" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Jul 29 00:07:55 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Jul 29 00:07:55 2008 +0200" }, "message": "Merge branch \u0027linus\u0027 into core/generic-dma-coherent\n\nConflicts:\n\n\tarch/x86/Kconfig\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "221d62c1882d05fc20163347d7e6af279bdffb8e", "tree": "a22c9fe0b01a30aebddcb27bb14e6a1f5ebc3e7f", "parents": [ "c9272c4f9fbe2087beb3392f526dc5b19efaa56b" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Jul 16 08:46:08 2008 +0200" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Mon Jul 28 11:23:30 2008 +0200" }, "message": "[ARM] mx2: add missing Kconfig dependency\n\nIt seems this small label was lost in the last merge. Without it\nno CPU type is selected for the MX2 family of processors. And a build\nwill fail badly...\n\nSigned-off-by: Juergen Beisert \u003cj.beisert@pengutronix.de\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "53cdb27a933e4032934cbda0b447cfc9943c0eac", "tree": "bf19badff6f5d4353c7cbf7a5456407deedcbbff", "parents": [ "daf93dd55c48b65ab2f1907e0fc5ef994896c787" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Jul 27 10:35:54 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jul 27 10:35:54 2008 +0100" }, "message": "[ARM] Fix shared mmap when more than two maps of the same file exist\n\nThe shared mmap code works fine for the test case, which only checked\nfor two shared maps of the same file. However, three shared maps\nresult in one mapping remaining cached, resulting in stale data being\nvisible via that mapping. Fix this.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9109fb7b3520de187ebc3646c209d66a233f7169", "tree": "f1d64d2efafb8e1652836126523f1b36fb10acd1", "parents": [ "2185e69f680ae8c8496b6fc15e20c889d5b39b67" ], "author": { "name": "Johannes Weiner", "email": "hannes@saeurebad.de", "time": "Wed Jul 23 21:27:20 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jul 24 10:47:16 2008 -0700" }, "message": "mm: drop unneeded pgdat argument from free_area_init_node()\n\nfree_area_init_node() gets passed in the node id as well as the node\ndescriptor. This is redundant as the function can trivially get the node\ndescriptor itself by means of NODE_DATA() and the node\u0027s id.\n\nI checked all the users and NODE_DATA() seems to be usable everywhere\nfrom where this function is called.\n\nSigned-off-by: Johannes Weiner \u003channes@saeurebad.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "b61bfa3c462671c48a51fb5c31af337c5a996a04", "tree": "020363fd43a85ddde9998759150b428ee794dae6", "parents": [ "8b05c7e6e159d2f33c9275281b8b909a89eb7c5d" ], "author": { "name": "Johannes Weiner", "email": "hannes@saeurebad.de", "time": "Wed Jul 23 21:26:55 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jul 24 10:47:14 2008 -0700" }, "message": "mm: move bootmem descriptors definition to a single place\n\nThere are a lot of places that define either a single bootmem descriptor or an\narray of them. Use only one central array with MAX_NUMNODES items instead.\n\nSigned-off-by: Johannes Weiner \u003channes@saeurebad.de\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nCc: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: David S. Miller \u003cdavem@davemloft.net\u003e\nCc: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nCc: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Mel Gorman \u003cmel@csn.ul.ie\u003e\nCc: Andy Whitcroft \u003capw@shadowen.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "1fe532685a1984dc9f2603ed20bd5e630ba79709", "tree": "dfae117e13e895bc7cf46a09a969f226e59991f4", "parents": [ "538c29d43ebdac2edcef96ac07982d2296a63077" ], "author": { "name": "Dmitry Baryshkov", "email": "dbaryshkov@gmail.com", "time": "Fri Jul 18 13:30:14 2008 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 21:14:01 2008 +0200" }, "message": "ARM: support generic per-device coherent dma mem\n\nSigned-off-by: Dmitry Baryshkov \u003cdbaryshkov@gmail.com\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "044e5f45e4ad890d03bd1e8bb44c634397cac24d", "tree": "a6063f77bd719d933823915d2273eaadb6331611", "parents": [ "f0006314d37639714da9658cf4ff3f1f9f420764", "faf64ed4968e354624f330c6da6c1ce8b05a0713" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sun Jul 13 12:05:49 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jul 13 12:05:49 2008 +0100" }, "message": "Merge branch \u0027pxa\u0027 into devel\n\nConflicts:\n\n\tarch/arm/configs/em_x270_defconfig\n\tarch/arm/configs/xm_x270_defconfig\n" }, { "commit": "f0006314d37639714da9658cf4ff3f1f9f420764", "tree": "b8a18e014a40f2f8fd5148aab09c869dfaabd7a9", "parents": [ "a177ba3b7a08beef3f0fe74efa0f90701891945a", "1bd55a436f1f90de0e7f476e514e01bd67497b88" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Jul 10 16:41:50 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jul 10 16:41:50 2008 +0100" }, "message": "Merge branch \u0027imx\u0027 into devel\n\nConflicts:\n\n\tarch/arm/mm/Kconfig\n" }, { "commit": "a177ba3b7a08beef3f0fe74efa0f90701891945a", "tree": "ff57cc45ed39eced001d3cb61e93d3dcd2f79714", "parents": [ "66ee156078697cdc013d46aed3b2fee445c325a1", "3ef8191f43cfd936ea00b7483ea0acf2f0303a23", "150c9173031d43746d70582a17931350f3da8932", "0c5d5b70449eddb7e2c8a5fdaf71b6108c1a9afc", "63f385cd1f649b3f4f2d59fc609e051981215fd7", "7e36e2f5355ab87f8946041d044b34cda01e2077", "f7def13ed0775ee506c62a8612a124dce1776ac2", "188237e28d7fece0471640ba86f6d8cd164ed085", "88b8ba90570067178d32c654ad95786041e86e86", "341eb781019afbf279b42722b00f63c6db00bf09", "bedd78ca786c1d18c2a2785c7e40593dc9c9870f", "7ba06b17a1931b2c9e1bee525a8c36920f5be0e0" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Thu Jul 10 16:38:50 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jul 10 16:38:50 2008 +0100" }, "message": "Merge branches \u0027at91\u0027, \u0027dyntick\u0027, \u0027ep93xx\u0027, \u0027iop\u0027, \u0027ixp\u0027, \u0027misc\u0027, \u0027orion\u0027, \u0027omap-reviewed\u0027, \u0027rpc\u0027, \u0027rtc\u0027 and \u0027s3c\u0027 into devel\n" }, { "commit": "613526677a74c2b3d1b1696ea7334b2cf35155b3", "tree": "785ec10351bceedc278bba66a54c212f8e3d5f54", "parents": [ "16074b669ea97e2bef494ec7cceb475566f763e3" ], "author": { "name": "sedji gaouaou", "email": "sedji.gaouaou@atmel.com", "time": "Thu Jul 10 10:15:35 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jul 10 12:13:47 2008 +0100" }, "message": "[ARM] 5130/4: Support for the at91sam9g20\n\nSupport for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.\n\nAT91sam9g20 is an evolution of the at91sam9260 with a faster clock\nspeed.\nWe created a new board for this device but based the chip support\ndirectly on 9260 files with little updates.\nHere is the chip page on Atmel wabsite:\nhttp://atmel.com/dyn/products/product_card.asp?part_id\u003d4337\n\nSigned-off-by: Sedji Gaouaou \u003csedji.gaouaou@atmel.com\u003e\nSigned-off-by: Justin Waters \u003cjustin.waters@timesys.com\u003e\nAcked-by: Andrew Victor \u003clinux@maxim.org.za\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "20072fd0c93349e19527dd2fa9588b4335960e62", "tree": "8aa26b382c97b52d4596db1a05ee459ae334b548", "parents": [ "5c9f50e90e8056fb5a8bdd479ab0591d5dad79a0" ], "author": { "name": "Eric Miao", "email": "eric.miao@marvell.com", "time": "Fri Jun 06 16:34:03 2008 +0800" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jul 09 21:38:33 2008 +0100" }, "message": "[ARM] pxa: add support for L2 outer cache on XScale3\n\nThe initial patch from Lothar, and Lennert make it into a cleaner\none, modified and tested on PXA320 by Eric Miao.\n\nThis patch moves the L2 cache operations out of proc-xsc3.S into\ndedicated outer cache support code.\n\nCACHE_XSC3L2 can be deselected so no L2 cache specific code will be\nlinked in, and that L2 enable bit will not be set, this applies to\nthe following cases:\n\n a. _only_ PXA300/PXA310 support included and no L2 cache wanted\n b. PXA320 support included, but want L2 be disabled\n\nSo the enabling of L2 depends on two things:\n\n - CACHE_XSC3L2 is selected\n - and L2 cache is present\n\nWhere the latter is only a safeguard (previous testing shows it works\nOK even when this bit is turned on).\n\nIXP series of processors with XScale3 cannot disable L2 cache for the\nmoment since they depend on the L2 cache for its coherent memory, so\nIXP may always select CACHE_XSC3L2.\n\nOther L2 relevant bits are always turned on (i.e. the original code\nenclosed by #if L2_CACHE_ENABLED .. #endif), as they showed no side\neffects. Specifically, these bits are:\n\n - OC bits in TTBASE register (table walk outer cache attributes)\n - LLR Outer Cache Attributes (OC) in Auxiliary Control Register\n\nSigned-off-by: Lothar WaÃ\u003c9f\u003emann \u003cLW@KARO-electronics.de\u003e\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Eric Miao \u003ceric.miao@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" } ], "next": "188237e28d7fece0471640ba86f6d8cd164ed085" }