)]}' { "log": [ { "commit": "bbadf503d7c7e6efe0a4cd731f8855ba08276215", "tree": "1af228388f7f511525b7ef1d4b4777f4e258b2de", "parents": [ "d2d746f83b74022a50d28f7f0f496842c9cde330" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Apr 06 21:46:34 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Apr 09 22:25:46 2006 -0700" }, "message": "[TG3]: Speed up SRAM access (2nd version)\n\nSpeed up SRAM read and write functions if possible by using MMIO\ninstead of config. cycles. With this change, the post reset signature\ndone at the end of D3 power change must now be moved before the D3\npower change.\n\nIBM reported a problem on powerpc blades during ethtool self test that\nwas caused by the memory test taking excessively long. Config. cycles\nare very slow on powerpc and the memory test can take more than 10\nseconds to complete using config. cycles.\n\nDavid Miller informed me that an earlier version of the patch caused\nproblems on sparc64 systems with built-in tg3 chips. This version\nfixes the problem by excluding all SUN built-in tg3 chips from doing\nMMIO SRAM access.\n\nTG3_FLAG_EEPROM_WRITE_PROT is also set unconditionally when\nTG3_FLG2_SUN_570X is set. This should be sane as all SUN chips are\nbuilt-in and do not require Vaux switching.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d2d746f83b74022a50d28f7f0f496842c9cde330", "tree": "4298a55e428e09a2643a53125e34caa6797b5f1e", "parents": [ "7a43c9955178f1cc88374abe1186c0f2ef21e040" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Apr 06 21:45:39 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Apr 09 22:25:44 2006 -0700" }, "message": "[TG3]: Kill some less useful flags\n\nKill the TG3_FLAG_NO_{TX|RX}_PSEUDO_CSUM flags because they are not\nvery useful. This will free up some bits for new flags.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ad96b485b4224785bcca478cfba02d06c46ee575", "tree": "9f5ef069ffef7e02e37d771c23444b6b73d1a6f1", "parents": [ "e3a5cd9edff9a7a20de3c88c9d479704da98fb85" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Wed Apr 05 22:21:04 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Apr 09 22:25:27 2006 -0700" }, "message": "[TG3]: Fix a memory leak.\n\nThis patch fixes a memory leak (buf wasn\u0027t freed) spotted by the\nCoverity checker.\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "63589ed0785ffc715777a54ccb96cdfaea9edbc0", "tree": "8ef3e50b7f87a5a2f5b0d96d1e22a1277c2381c0", "parents": [ "24c7cd0630f76f0eb081d539c53893d9f15787e8", "a580290c3e64bb695158a090d02d1232d9609311" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Apr 02 12:58:45 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Apr 02 12:58:45 2006 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (48 commits)\n Documentation: fix minor kernel-doc warnings\n BUG_ON() Conversion in drivers/net/\n BUG_ON() Conversion in drivers/s390/net/lcs.c\n BUG_ON() Conversion in mm/slab.c\n BUG_ON() Conversion in mm/highmem.c\n BUG_ON() Conversion in kernel/signal.c\n BUG_ON() Conversion in kernel/signal.c\n BUG_ON() Conversion in kernel/ptrace.c\n BUG_ON() Conversion in ipc/shm.c\n BUG_ON() Conversion in fs/freevxfs/\n BUG_ON() Conversion in fs/udf/\n BUG_ON() Conversion in fs/sysv/\n BUG_ON() Conversion in fs/inode.c\n BUG_ON() Conversion in fs/fcntl.c\n BUG_ON() Conversion in fs/dquot.c\n BUG_ON() Conversion in md/raid10.c\n BUG_ON() Conversion in md/raid6main.c\n BUG_ON() Conversion in md/raid5.c\n Fix minor documentation typo\n BFP-\u003eBPF in Documentation/networking/tuntap.txt\n ...\n" }, { "commit": "5d9428de1a9785f10a4339f80b717be665ba51c7", "tree": "27eeed8a87ef248cec694032463f0d8f3b38fbcc", "parents": [ "7e99e9b66336565f0088ea59d848ab187f9689c3" ], "author": { "name": "Eric Sesterhenn", "email": "snakebyte@gmx.de", "time": "Sun Apr 02 13:52:48 2006 +0200" }, "committer": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Sun Apr 02 13:52:48 2006 +0200" }, "message": "BUG_ON() Conversion in drivers/net/\n\nthis changes if() BUG(); constructs to BUG_ON() which is\ncleaner, contains unlikely() and can better optimized away.\n\nSigned-off-by: Eric Sesterhenn \u003csnakebyte@gmx.de\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\n" }, { "commit": "5c516c10198a8258c0c40f200a5a01a3fa0a0de4", "tree": "9dd0fe9961ffc6b000e7ab4409a8872fe18f6296", "parents": [ "758a613936223699f99081fc75eff7cf67b208f6" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Apr 01 00:33:31 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Apr 01 00:33:31 2006 -0800" }, "message": "[TG3]: Update driver version and reldate.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "758a613936223699f99081fc75eff7cf67b208f6", "tree": "68473c66054f072979c8d28ff8a157f62cbc7f96", "parents": [ "683aa4012f53b2ada0f430487e05d37b0d94e90a" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Apr 01 00:32:56 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Apr 01 00:32:56 2006 -0800" }, "message": "[TG3]: Revert \"Speed up SRAM access\"\n\nUndo commit 100c4673307f5806788791b9b886877c806afd96\n\nMMIOs timeout more quickly that PCI config cycles and some\nof these SRAM accesses can take a very long time, triggering\nthe MMIO limits on some sparc64 PCI controllers and thus\nresulting in bus timeouts and bus errors.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e3a05978f18a38ae13bb3f1184abf3c999e06da9", "tree": "5a08154d7047986dabfe453c63a95dba2f53e779", "parents": [ "f475f163f128a0d9c92dfa90bcb5953fd8f9766f" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 27 23:21:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 17:02:41 2006 -0800" }, "message": "[TG3]: Update version and reldate\n\nUpdate version to 3.55.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f475f163f128a0d9c92dfa90bcb5953fd8f9766f", "tree": "877ee6c922e8596a185339599acb0efb6e615ac6", "parents": [ "100c4673307f5806788791b9b886877c806afd96" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 27 23:20:14 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 17:02:39 2006 -0800" }, "message": "[TG3]: Skip timer code during full lock\n\nSkip the main timer code if interrupts are disabled in the full lock\nstate.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "100c4673307f5806788791b9b886877c806afd96", "tree": "0269abfbf85bfa2e149d027393c8c27d1e00bec6", "parents": [ "ff18ff023495a4f1ce7c65e7c376c4720eccf4da" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 27 23:19:00 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 17:02:38 2006 -0800" }, "message": "[TG3]: Speed up SRAM access\n\nSpeed up SRAM read and write functions if possible by using MMIO\ninstead of config. cycles. With this change, the post reset signature\ndone at the end of D3 power change must now be moved before the D3\npower change.\n\nIBM reported a problem on powerpc blades during ethtool self test\nthat was caused by the memory test taking excessively long. Config.\ncycles are very slow on powerpc and the memory test can take more\nthan 10 seconds to complete using config. cycles. As a result, NETDEV\nWATCHDOG can be triggered during self test and the chip can end up in\na funny state.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ff18ff023495a4f1ce7c65e7c376c4720eccf4da", "tree": "ef08dc52d54d7b50770be1497e4c3aed5a957dc1", "parents": [ "6728a8e2e180b96ac7940dd4d766c52f8e177717" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 27 23:17:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 17:02:37 2006 -0800" }, "message": "[TG3]: Fix PHY loopback on 5700\n\nFix PHY loopback failure on some 5700 devices.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6728a8e2e180b96ac7940dd4d766c52f8e177717", "tree": "d29f63bb0b6ee3560d12f21dc7431207508704ab", "parents": [ "008652b337364ee994a0cd71d88a0fe9f00fc7ca" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 27 23:16:49 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 17:02:36 2006 -0800" }, "message": "[TG3]: Fix bug in 40-bit DMA workaround code\n\nNeed to check the TG3_FLAG_40BIT_DMA_BUG flag in the workaround code\npath instead of device flags.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "008652b337364ee994a0cd71d88a0fe9f00fc7ca", "tree": "1a92b594cf22327ac92484e37129d86bac6f663c", "parents": [ "ca9ba4471c1203bb6e759b76e83167fec54fe590" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 27 23:14:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 17:02:35 2006 -0800" }, "message": "[TG3]: Fix probe failure due to invalid MAC address\n\nSome older bootcode in some devices may report 0 MAC address in\nSRAM when booting up from low power state. This patch fixes the\nproblem by checking for a valid MAC address in SRAM and falling back\nto NVRAM if necessary.\n\nThanks to walt \u003cwa1ter@myrealbox.com\u003e for reporting the problem\nand helping to debug it.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "95381c893dd71a534ab56f09b12a4e2118aa0f32", "tree": "91b0a89441fe0dcda04922723cd7aaa7d1985714", "parents": [ "d3c7b886978bef42f5ea487dec376c482d3cd7e3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Mar 23 01:29:06 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Mar 23 01:29:06 2006 -0800" }, "message": "[TG3]: Update driver version and reldate.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d3c7b886978bef42f5ea487dec376c482d3cd7e3", "tree": "0776fcc78eb223beccc5af0a88b991a7d0284677", "parents": [ "af36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Mar 23 01:28:25 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Mar 23 01:28:25 2006 -0800" }, "message": "[TG3]: Add 5755 nvram support\n\nAdd 5755 nvram support.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "af36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d", "tree": "879c0f2f8be1e6bcd9d64fa4ee952ee959d35357", "parents": [ "b30bd282cbf5c46247a279a2e8d2aae027d9f1bf" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Mar 23 01:28:06 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Mar 23 01:28:06 2006 -0800" }, "message": "[TG3]: Add 5755 support\n\nAdd support for new chip 5755 which is very similar to 5787.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "056755f4d73d49b4adcbb8ecdaf75138cf166bd3", "tree": "d019a2812320c0fcdb25069eaef45224ff654ec2", "parents": [ "15c3b696101992c4d69962325f0e91647164427f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 22 01:07:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 22 01:07:53 2006 -0800" }, "message": "[TG3]: Bump driver version and reldate.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "15c3b696101992c4d69962325f0e91647164427f", "tree": "da26359a3cd8899f284cb320b9918b418e0784df", "parents": [ "caf636c760b33c72ebf018ff03c1b0d79ea6656a" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Wed Mar 22 01:06:52 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Mar 22 01:06:52 2006 -0800" }, "message": "[TG3]: Skip phy power down on some devices\n\nSome PHYs should not be powered down in tg3_set_power_state() because\nof bugs or other hardware limitations.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "caf636c760b33c72ebf018ff03c1b0d79ea6656a", "tree": "d8ac1d485a820abcb7a17b73d309bb752e3c6223", "parents": [ "9a6b9f2e763a1d1492e164f13c13b995a9b98d78" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Wed Mar 22 01:05:31 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Mar 22 01:05:31 2006 -0800" }, "message": "[TG3]: Fix SRAM access during tg3_init_one()\n\n5700 and 5701 will not return correct SRAM data when the chip is in\nD3hot power state. tg3_get_eeprom_hw_cfg() must first put the device\nin D0 before reading SRAM.\n\nThanks to Thomas Chenault at Dell for noticing this problem.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "30ca3e376e82cc44488b1d377adfb10b5818548e", "tree": "c1f14cf8e3514c10640ec288535d1fcd45ae48f8", "parents": [ "322f74a432f976328e834a8663f2e75eb5933ecc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 23:02:36 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 23:02:36 2006 -0800" }, "message": "[TG3]: Don\u0027t mark tg3_test_registers() as returning const.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "81789ef5c9a435fbf94224987efe6fbb97ffab09", "tree": "bdabc8f8c5ffaa68febd0a84c48052c59723b4c5", "parents": [ "12ac84c4a9c505e3e30529563b04cc8f6d5ebbf3" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Mon Mar 20 23:00:14 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 23:00:14 2006 -0800" }, "message": "[TG3]: make drivers/net/tg3.c:tg3_request_irq() static\n\nThis patch makes the needlessly global function tg3_request_irq()\nstatic.\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "59f1741e541bf4f6139599389610a70de49c3ad2", "tree": "55892d15e9122a83dc0c4fa6496dfcf52bd4346d", "parents": [ "87546b1c25daa2c72ba6741c777f76c1eac6e2d9" ], "author": { "name": "Jeff Mahoney", "email": "jeffm@suse.com", "time": "Mon Mar 20 22:39:21 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:39:21 2006 -0800" }, "message": "[TG3]: netif_carrier_off runs too early; could still be queued when init fails\n\nMove the netif_carrier_off() call from tg3_init_one()-\u003e\ntg3_init_link_config() to tg3_open() as is the convention for most other\nnetwork drivers.\n\nI was getting a panic after a tg3 device failed to initialize due to DMA\nfailure. The oops pointed to the link watch queue with spinlock debugging\nenabled. Without spinlock debugging, the Oops didn\u0027t occur.\n\nI suspect that the link event was getting queued but not executed until\nafter the DMA test had failed and the device was freed. The link event was\nthen operating on freed memory, which could contain anything. With this\npatch applied, the Oops no longer occurs.\n\n[ Based upon feedback from Michael Chan, we move netif_carrier_off()\n to the end of tg3_init_one() instead of moving it to tg3_open() -DaveM ]\n\nSigned-off-by: Jeff Mahoney \u003cjeffm@suse.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e9e678006ee865b0f7e53069b0e519141a710a6e", "tree": "046576088184442a654c026a032b57df139eb9d6", "parents": [ "c4e6575c78b83928c470d81b271909084a2efd37" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:29:52 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:29:52 2006 -0800" }, "message": "[TG3]: update version and reldate\n\nUpdate version to 3.52.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c4e6575c78b83928c470d81b271909084a2efd37", "tree": "387a32bbd915bfb6d72d297bd86597c9e543e201", "parents": [ "1820180b0e59cc48019414018b180518059f50d3" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:29:32 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:29:32 2006 -0800" }, "message": "[TG3]: Add firmware version info\n\nAdd fw_version information to ethtool -i.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1820180b0e59cc48019414018b180518059f50d3", "tree": "6f79d249a19a5094e6da5e7cc8fc7afd27e4e961", "parents": [ "79f4d13a15774c2d442b619bad95a4c612eed4f3" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:29:15 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:29:15 2006 -0800" }, "message": "[TG3]: nvram cleanup\n\nSome nvram related cleanup:\n\n1. Add a tg3_nvram_read_swab() since swabing the data is frequently\ndone.\n\n2. Add a function to convert nvram address to physical address\ninstead of doing it in 2 separate places.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "79f4d13a15774c2d442b619bad95a4c612eed4f3", "tree": "22996b2b33bc68d24ec8091954d8d6f57a552eb4", "parents": [ "fcfa0a32c767219c1bdad621ef4a3aff1904cbbd" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:28:57 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:28:57 2006 -0800" }, "message": "[TG3]: Fixup memory test for 5787\n\nEthtool memory test on 5787 requires a new memory table.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "fcfa0a32c767219c1bdad621ef4a3aff1904cbbd", "tree": "0b40b3432cc90af0e2b22da056baab173d163d65", "parents": [ "9c27dbdf64cba05d0cacc343118a7fd01d4b82f7" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:28:41 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:28:41 2006 -0800" }, "message": "[TG3]: Add new one-shot MSI handler\n\nSupport one-shot MSI on 5787.\n\nThis one-shot MSI idea is credited to David Miller. In this mode, MSI\ndisables itself automatically after it is generated, saving the driver\na register access to disable it for NAPI.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "9c27dbdf64cba05d0cacc343118a7fd01d4b82f7", "tree": "f579329eab7d30f6016d52ab50bfcb2a540dd750", "parents": [ "5a6f3074c2ea5a7b4ff5b18f0e1fd9b1257e1a29" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:28:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:28:27 2006 -0800" }, "message": "[TG3]: Add ipv6 checksum support\n\nSupport ipv6 tx csum on 5787 by setting NETIF_F_HW_CSUM.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5a6f3074c2ea5a7b4ff5b18f0e1fd9b1257e1a29", "tree": "4bc683f620e3176ae70932f5f865fe47423eb083", "parents": [ "1b27777a9b9b2b6d1c06000b7a31262d198b4238" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:28:05 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:28:05 2006 -0800" }, "message": "[TG3]: Add new hard_start_xmit\n\nSupport 5787 hardware TSO using a new flag TG3_FLG2_HW_TSO_2.\n\nSince the TSO interface is slightly different and these chips have\nfinally fixed the 4GB DMA problem and do not have the 40-bit DMA\nproblem, a new hard_start_xmit is used for these chips. All previous\nchips will use the old hard_start_xmit that is now renamed\ntg3_start_xmit_dma_bug().\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1b27777a9b9b2b6d1c06000b7a31262d198b4238", "tree": "4690a8fe70231e4b09171957a5d3e8a7b4ccb00c", "parents": [ "d9ab5ad12b0d865bdb1b750d81192d34465541e9" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:27:48 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:27:48 2006 -0800" }, "message": "[TG3]: Add 5787 nvram support\n\nSupport additional nvrams and new nvram format for 5787 and 5754.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d9ab5ad12b0d865bdb1b750d81192d34465541e9", "tree": "0bc4b3e9139836b39e5cab3affe9090bae4b11c7", "parents": [ "6cb153cab92a6dc8771d496b10a50cd066fa7f71" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 22:27:35 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 22:27:35 2006 -0800" }, "message": "[TG3]: Add 5787 and 5754 basic support\n\nAdd basic support for 2 new chips 5787 and 5754.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4f81c32b028aecd818634b1ef36aae3b2b3e66ce", "tree": "e0c9f0945c1d72cd981aa49ad58792d25499bb6f", "parents": [ "e75f7c900944aa90831f6d343ca40090a68b56dd" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 21:33:42 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 21:33:42 2006 -0800" }, "message": "[TG3]: Fix tg3_get_ringparam()\n\nFix-up tg3_get_ringparam() to return the correct parameters.\n\nSet the jumbo rx ring parameter only if it is supported by the chip\nand currently in use.\n\nAdd missing value for tx_max_pending, noticed by Rick Jones.\n\nUpdate version to 3.51.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e75f7c900944aa90831f6d343ca40090a68b56dd", "tree": "d5192f5c230a2e84a6a0b23eed7e802ebf6ab555", "parents": [ "0e7b13685f9a06949ea3070c97c0f0085a08cd37" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 21:33:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 21:33:26 2006 -0800" }, "message": "[TG3]: Add some missing netif_running() checks\n\nAdd missing netif_running() checks in tg3\u0027s dev-\u003eset_multicast_list()\nand dev-\u003eset_mac_address(). If not netif_running(), these 2 calls can\nsimply return 0 after storing the new settings if required.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2e2e4f5c996d577383c5cb584b153b39f4961155", "tree": "110fb5c1ffc2866dffc682a587174ffd25d0e193", "parents": [ "bc1c756741b065cfebf850e4164c0e2aae9d527f" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 17:48:18 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 17:48:18 2006 -0800" }, "message": "[TG3]: Update version and reldate\n\nUpdate version to 3.50.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bc1c756741b065cfebf850e4164c0e2aae9d527f", "tree": "e462b85564a66b0c4f41e0d9f1ccde7c98ba00a9", "parents": [ "4e3a7aaa28db952392814f889dfbd25672266d29" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 17:48:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 17:48:03 2006 -0800" }, "message": "[TG3]: Support shutdown WoL.\n\nSupport WoL during shutdown by calling\ntg3_set_power_state(tp, PCI_D3hot) during tg3_close().\n\nChange the power state parameter to pci_power_t type and use\nconstants defined in pci.h.\n\nCertain ethtool operations cannot be performed after tg3_close()\nbecause the device will go to low power state. Add return -EAGAIN\nin such cases where appropriate.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4e3a7aaa28db952392814f889dfbd25672266d29", "tree": "a82c9151a64951e8812b269dbb00b00b2f759ea3", "parents": [ "d4d2c558fd3e1f5e386b153f194aa8f0be496c77" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 17:47:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 17:47:44 2006 -0800" }, "message": "[TG3]: Enable TSO by default\n\nEnable TSO by default on newer chips that support TSO in hardware.\nLeave TSO off by default on older chips that do firmware TSO because\nperformance is slightly lower.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d4d2c558fd3e1f5e386b153f194aa8f0be496c77", "tree": "2cdabdb87525b94a5e80a993563538a64bec6d11", "parents": [ "d15150f755bb468afe003d1afee0f45a2fc5eeeb" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 20 17:47:20 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 17:47:20 2006 -0800" }, "message": "[TG3]: Add support for 5714S and 5715S\n\nAdd support for 5714S and 5715S.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c4a1745aa09fc110afdefea0e5d025043e348bae", "tree": "6d28dc3a0c1bf18437b3d49f28e5c81b850cdb2f", "parents": [ "88dcb91177cfa5b26143a29074389a2aa259c7cf", "ac0eb3eb7e54b700386068be025a43d2a3958ee5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 11:57:50 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 20 11:57:50 2006 -0800" }, "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6\n\n* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (230 commits)\n [SPARC64]: Update defconfig.\n [SPARC64]: Fix 2 bugs in huge page support.\n [SPARC64]: CONFIG_BLK_DEV_RAM fix\n [SPARC64]: Optimized TSB table initialization.\n [SPARC64]: Allow CONFIG_MEMORY_HOTPLUG to build.\n [SPARC64]: Use SLAB caches for TSB tables.\n [SPARC64]: Don\u0027t kill the page allocator when growing a TSB.\n [SPARC64]: Randomize mm-\u003emmap_base when PF_RANDOMIZE is set.\n [SPARC64]: Increase top of 32-bit process stack.\n [SPARC64]: Top-down address space allocation for 32-bit tasks.\n [SPARC64] bbc_i2c: Fix cpu check and add missing module license.\n [SPARC64]: Fix and re-enable dynamic TSB sizing.\n [SUNSU]: Fix missing spinlock initialization.\n [TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.\n [SPARC64]: First cut at VIS simulator for Niagara.\n [SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.\n [SPARC64]: Add SMT scheduling support for Niagara.\n [SPARC64]: Fix 32-bit truncation which broke sparsemem.\n [SPARC64]: Move over to sparsemem.\n [SPARC64]: Fix new context version SMP handling.\n ...\n" }, { "commit": "d378aca6ec708bfb24df5c47801b1f2399efc481", "tree": "7535f96bf34314df071698d2e06054b8d5223ebb", "parents": [ "abc71c46dc0a12ab7fddc18cfe4f4aa26808c79b", "7705a8792b0fc82fd7d4dd923724606bbfd9fb20" ], "author": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Mon Mar 20 04:38:03 2006 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Mon Mar 20 04:38:03 2006 -0500" }, "message": "Merge branch \u0027master\u0027\n" }, { "commit": "72b845e04e99298e5179b31e8de16afed52a2627", "tree": "c0e832b4fcb404b7624fec700ba5f12981de9d7d", "parents": [ "0c51ed93ca0ecbf44ec096f4bd04c12a3e761e6b" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 14 14:11:48 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:27 2006 -0800" }, "message": "[TG3]: Do not try to access NIC_SRAM_DATA_SIG on Sun parts.\n\nSun does\u0027t put an SEEPROM behind the tigon3 chip, among other things,\nso accesses to these areas just give bus timeouts.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4a29cc2e503b33a1e96db4c3f9a94165f153f259", "tree": "74645b5ef3a92ad9857ed63d6446e2be0535060c", "parents": [ "c7c694d196a39af6e644e24279953d04f30362db" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Sun Mar 19 13:21:12 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Mar 19 13:21:12 2006 -0800" }, "message": "[TG3]: 40-bit DMA workaround part 2\n\nThe 40-bit DMA workaround recently implemented for 5714, 5715, and\n5780 needs to be expanded because there may be other tg3 devices\nbehind the EPB Express to PCIX bridge in the 5780 class device.\n\nFor example, some 4-port card or mother board designs have 5704 behind\nthe 5714.\n\nAll devices behind the EPB require the 40-bit DMA workaround.\n\nThanks to Chris Elmquist again for reporting the problem and testing\nthe patch.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "abc71c46dc0a12ab7fddc18cfe4f4aa26808c79b", "tree": "b0c846052b994d57d58713a0cc8da30a22baaf1c", "parents": [ "30dcbf29cc6d92d70fa262e79e84011fe6913bed", "232a347a444e687b5f8cf0f6485704db1c6024d3" ], "author": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Thu Mar 16 19:27:08 2006 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Thu Mar 16 19:27:08 2006 -0500" }, "message": "Merge branch \u0027upstream-fixes\u0027\n" }, { "commit": "0ade309be739eceedc4812798da09d698a59867d", "tree": "3d16e848a4f7202fbd8999117571706caccef8b7", "parents": [ "8f22757ee84da64d4f662f1dd03dae95358a1efe" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Sat Mar 11 18:49:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Mar 11 18:49:38 2006 -0800" }, "message": "[TG3] tg3_bus_string(): remove dead code\n\nThe Coverity checker spotted this dead code (note that (clock_ctrl \u003d\u003d 7) \nis already handled above).\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "749dfc70554f2c9e6624ac843d66571265ed9338", "tree": "bf591255b3f158222f90852d53c4279e6e7e9ced", "parents": [ "74f5ec29ae93aa42c49f4285c20c457afe937881", "0992a5d029181421877a716eaf99145828ff7eae" ], "author": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Sat Mar 11 13:35:31 2006 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Sat Mar 11 13:35:31 2006 -0500" }, "message": "Merge branch \u0027upstream-fixes\u0027\n" }, { "commit": "72f2afb8a6858edd9335cd158eb21053a0c2c39a", "tree": "1cc6884bf4e48822423d23d68d7b2699cd2e68fd", "parents": [ "d11d9b2dd2c43dd99a491df8a83ae28401db0044" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Mar 06 19:28:35 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 06 19:28:35 2006 -0800" }, "message": "[TG3]: Add DMA address workaround\n\nAdd DMA workaround for chips that do not support full 64-bit DMA\naddresses.\n\n5714, 5715, and 5780 chips only support DMA addresses less than 40\nbits. On 64-bit systems with IOMMU, set the dma_mask to 40-bit so\nthat pci_map_xxx() calls will map the DMA address below 40 bits if\nnecessary. On 64-bit systems without IOMMU, set the dma_mask to\n64-bit and check for DMA addresses exceeding the limit in\ntg3_start_xmit().\n\n5788 only supports 32-bit DMA so need to set the mask appropriately\nalso.\n\nThanks to Chris Elmquist at SGI for reporting and helping to debug\nthe problem on 5714.\n\nThanks to David Miller for explaining the HIGHMEM and DMA stuff.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f71e130966ba429dbd24be08ddbcdf263df9a5ad", "tree": "523f10c926012f520c47894811b94944a7793fd5", "parents": [ "c499ec24c31edf270e777a868ffd0daddcfe7ebd" ], "author": { "name": "Arjan van de Ven", "email": "arjan@infradead.org", "time": "Fri Mar 03 21:33:57 2006 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Fri Mar 03 21:33:57 2006 -0500" }, "message": "Massive net driver const-ification.\n" }, { "commit": "051d3cbd96909b2fe6b5038e7bbe77f41356db05", "tree": "6decc4a2a4f1c3df66df5d78602ab8b4f971375d", "parents": [ "de5f503cfbe4f942492269c6bd97a16a4d61e488" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Feb 27 12:51:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Feb 27 12:51:27 2006 -0800" }, "message": "[TG3]: Fix Sun tg3 variant detection.\n\nSome Sun parts don\u0027t have PCI_VENDOR_ID_SUN in the subsystem\nvendor ID. So add another fallback test, which is the name\nof the OBP firmware device tree node. If it\u0027s a Sun part we\u0027ll\nget \"network\", else it will be named \"ethernet\".\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6e2be3ea4fab4d1c02e369719311e8d7ae6cc7c1", "tree": "e8f036af13821f9e5ee5062fa50f3c30a5c4ebee", "parents": [ "7faa006f94fda56a587242b2a22fa19abf840222" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 02 17:29:59 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 02 17:29:59 2006 -0800" }, "message": "[TG3]: Update driver version and release date.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7faa006f94fda56a587242b2a22fa19abf840222", "tree": "b1354b391829bc3f1d83fd3121167318f8472147", "parents": [ "3f330317ab4973178423aba750d6d0ca5ce0024a" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Feb 02 17:29:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Feb 02 17:29:28 2006 -0800" }, "message": "[TG3]: Flush tg3_reset_task()\n\nMake sure tg3_reset_task() is flushed in the close and suspend paths\nas noted by Jeff Garzik.\n\nIn the close path, calling flush_scheduled_work() may cause deadlock\nif linkwatch_event() is on the workqueue. linkwatch_event() will try\nto get the rtnl_lock() which is already held by tg3_close(). So\ninstead, we set a flag in tg3_reset_task() and tg3_close() polls\nthe flag until it is cleared.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ec41c7dfd525468decb9da9281dbc9ed82d98c98", "tree": "02ac7f0b1318c69d53a2405972f8a6880dc8b7c6", "parents": [ "f0daaa654af68c1651add9d21188d81c19672551" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Jan 17 02:40:55 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 17 02:40:55 2006 -0800" }, "message": "[TG3]: Refine nvram locking\n\nAdd nvram lock count so that calls to tg3_nvram_lock()/unlock() can\nbe nested. Add error checking to all callers of tg3_nvram_lock()\nwhere appropriate. To prevent nvram lock failures after halting the\nfirmware, it is also necessary to release firmware\u0027s nvram lock in\ntg3_halt_cpu().\n\nUpdate version to 3.48.\n\nBased on David Miller\u0027s initial patch.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "fd30333d0fab9e870af89e112454996c188655e9", "tree": "881b51d7039d5c513729a6179110f31091b2c99a", "parents": [ "b5e5fa5e093e42cab4ee3d6dcbc4f450ad29a723" ], "author": { "name": "Alexey Dobriyan", "email": "adobriyan@gmail.com", "time": "Tue Jan 03 14:19:25 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Jan 03 14:19:25 2006 -0800" }, "message": "[TG3]: fixup tot_len calculation\n\nTurning struct iphdr::tot_len into __be16 added sparse warning.\n\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "14c850212ed8f8cbb5972ad6b8812e08a0bc901c", "tree": "53c88f03e7bbac4064f6e80d462ad484ee038326", "parents": [ "25995ff577675b58dbd848b7758e7bad87411947" ], "author": { "name": "Arnaldo Carvalho de Melo", "email": "acme@mandriva.com", "time": "Tue Dec 27 02:43:12 2005 -0200" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Jan 03 13:11:21 2006 -0800" }, "message": "[INET_SOCK]: Move struct inet_sock \u0026 helper functions to net/inet_sock.h\n\nTo help in reducing the number of include dependencies, several files were\ntouched as they were getting needed headers indirectly for stuff they use.\n\nThanks also to Alan Menegotto for pointing out that net/dccp/proto.c had\nlinux/dccp.h include twice.\n\nSigned-off-by: Arnaldo Carvalho de Melo \u003cacme@mandriva.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a8b554e75b0c14d5e12a11eaea604e536f49da29", "tree": "53392403940c6d28c1be4b75e7b79e8c50938faa", "parents": [ "091465d7514893a55dcf63e420698b21159c39a7" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Dec 28 13:05:41 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Dec 28 13:05:41 2005 -0800" }, "message": "[TG3]: Update driver version and reldate.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "091465d7514893a55dcf63e420698b21159c39a7", "tree": "cbfaedb45164d21d0d2f4af5efad2fc78dd37f92", "parents": [ "67dbb4ea33731415fe09c62149a34f472719ac1d" ], "author": { "name": "Chris Elmquist", "email": "chrise@sgi.com", "time": "Tue Dec 20 13:25:19 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Dec 28 13:04:52 2005 -0800" }, "message": "[TG3]: ethtool -d hangs PCIe systems\n\nResubmitting after recommendation to use GET_REG32_1() instead of\nGET_REG32_LOOP(..., 1). Retested. Problem remains fixed.\n\nPrevent tg3_get_regs() from reading reserved and undocumented registers\nat RX_CPU_BASE and TX_CPU_BASE offsets which caused hostile behavior\non PCIe platforms.\n\nAcked-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "38690194bc897dd60a61a71b15e861e13b5d8bdd", "tree": "e22bcf8fa17bb374beff14a8fb693334e6e99f19", "parents": [ "b401e9e2ec44a5fc1d8053546276bff584b7118e" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Dec 19 16:27:28 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Dec 19 16:27:28 2005 -0800" }, "message": "[TG3]: Fix ethtool memory test\n\nSkip the memory 0xb50 to 0x1000 during \"ethtool -t\" memory test.\nOverwriting memory in this region can cause ASF problems.\n\nUpdate version and release date.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b401e9e2ec44a5fc1d8053546276bff584b7118e", "tree": "3f554445d377269c941688d2ce23479bd198d8a3", "parents": [ "dc56b7d46dd2b303a844166ef931270b882bf08c" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Dec 19 16:27:04 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Dec 19 16:27:04 2005 -0800" }, "message": "[TG3]: Add tw32_wait_f() for some sensitive registers\n\nThe tw32_f() function (register write with immediate read flush) can\nhang when used on some registers to switch clock frequencies and\npower. A new tw32_wait_f() is added for such registers with the\ndelay before the read and after the read.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "dc56b7d46dd2b303a844166ef931270b882bf08c", "tree": "80b4270d0addf4cf335b9dd47e5c4507c8f8a7b6", "parents": [ "8c2dc7e1e7213c55f1b97eba09de6c0cee9ad12f" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Dec 19 16:26:28 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Dec 19 16:26:28 2005 -0800" }, "message": "[TG3]: Some low power fixes\n\nAdd some missing workarounds in tg3_set_power_state():\n\n1. Workaround to prevent overdrawing current on 5714.\n\n2. Do not power down 5700\u0027s PHY because of hw limitation.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8c2dc7e1e7213c55f1b97eba09de6c0cee9ad12f", "tree": "47bc9b91cc44c68701004494bb9dc9d777ba27a4", "parents": [ "df7addbb45874f0f992266003155de5a22e1872f" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Dec 19 16:26:02 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Dec 19 16:26:02 2005 -0800" }, "message": "[TG3]: Fix peer device handling\n\nLocate the pdev_peer for dual port 5714 NIC devices in addition to\n5704 devices. The name is also changed to tg3_find_peer() from\ntg3_find_5704_peer(). It is also necessary to call netdev_priv() to\nget to the peer\u0027s private tg3 structure.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6921d201f77e14848df2eaa597e26525f468abea", "tree": "cef66b131fd1cb980d209c5ecb590a0783fdf985", "parents": [ "16fe9d74f14ed74af778c5db7f9129e29916f4a7" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Dec 13 21:15:53 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Dec 13 21:15:53 2005 -0800" }, "message": "[TG3]: Fix low power state\n\nFix the following bugs in tg3_set_power_state():\n\n1. Both WOL and ASF flags require switching to aux power.\n\n2. Add a missing handshake with firmware to enable WOL.\n\n3. Turn off the PHY if both WOL and ASF are disabled.\n\n4. Add nvram arbitration before halting the firmware.\n\n5. Fix tg3_setup_copper_phy() to switch to 100Mbps when\n changing to low power state.\n\nUpdate revision and date.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "16fe9d74f14ed74af778c5db7f9129e29916f4a7", "tree": "909a2b173d5140b22df9f35a252dc204dba56bdd", "parents": [ "6a9eba15f51c56da637e45ea1316eaa2a848986a" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Dec 13 21:09:54 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Dec 13 21:09:54 2005 -0800" }, "message": "[TG3]: Fix 5704 single-port mode\n\nIf the dual-port 5704 is configured as a single-port device with\nonly one PCI function, it would trigger a BUG() condition in\ntg3_find_5704_peer(). This fixes the problem by returning its\nown pdev if the peer cannot be found.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6a9eba15f51c56da637e45ea1316eaa2a848986a", "tree": "fb18f2580e6aaa2c14c042b51e80bc8eb6b9806b", "parents": [ "381291b7d3e17ac966498312dc571dcca1b93efc" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Dec 13 21:08:58 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Dec 13 21:08:58 2005 -0800" }, "message": "[TG3]: Fix suspend and resume\n\nFix tg3_suspend() and tg3_resume() by clearing and setting the\nTG3_FLAG_INIT_COMPLETE flag when appropriate. tg3_set_power_state()\nlooks at TG3_FLAG_INIT_COMPLETE on the peer device to determine\nwhen to appropriately switch to aux power. \n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "381291b7d3e17ac966498312dc571dcca1b93efc", "tree": "619ab88cbec0112674f72b3a8c6b3aae1bacd69a", "parents": [ "65ab592dc5b34caebabfe1340e7c18f52a785079" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Dec 13 21:08:21 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Dec 13 21:08:21 2005 -0800" }, "message": "[TG3]: Fix nvram arbitration bugs.\n\nThe nvram arbitration rules were not strictly followed in a few places\nand this could lead to reading corrupted values from the nvram.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n\n\n" }, { "commit": "1f064a87c80c86bd3878e6633de61e8b71aa6788", "tree": "b5e5eefaa380590f118176c4c1855b9f98b5e85b", "parents": [ "4ebf0ae2618fbbb0d365e5d295a30ccfcb91fe0b" ], "author": { "name": "Stephen Hemminger", "email": "shemminger@osdl.org", "time": "Tue Dec 06 17:36:44 2005 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Dec 06 17:36:44 2005 -0800" }, "message": "[TG3]: remove warning on race\n\n[ Move assosciated code comment to the correct spot, and\n update driver version and release date -DaveM ]\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@osdl.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f9a5f7d3f3319aac02a7a36a2fea10bd33c3d16a", "tree": "d44abb7a38b2f4e65e58e3fc72772701adffb844", "parents": [ "977e74b5f60de3df9831897b726c16870878eee4" ], "author": { "name": "Tobias Klauser", "email": "tklauser@nuerscht.ch", "time": "Sat Oct 29 15:09:26 2005 +0200" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@pobox.com", "time": "Sat Oct 29 14:15:37 2005 -0400" }, "message": "[PATCH] drivers/net/tg3: Use the DMA_{32,64}BIT_MASK constants\n\nThis one from my DMA_{32,64}BIT_MASK series did not seem to make it\nthrough to upstream.\n\nUse the DMA_{32,64}BIT_MASK constants from dma-mapping.h when calling\npci_set_dma_mask() or pci_set_consistent_dma_mask()\nThis patch includes dma-mapping.h explicitly because it caused errors\non some architectures otherwise.\nSee http://marc.theaimsgroup.com/?t\u003d108001993000001\u0026r\u003d1\u0026w\u003d2 for details\n\nSigned-off-by: Tobias Klauser \u003ctklauser@nuerscht.ch\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\n" }, { "commit": "b4558ea93d66a43f7990d26f145fd4c54a01c9bf", "tree": "70aa8ba4864f8ee994b7f5278f5045af6a646d34", "parents": [ "7380a78a973a8109c13cb0e47617c456b6f6e1f5" ], "author": { "name": "Jesper Juhl", "email": "jesper.juhl@gmail.com", "time": "Fri Oct 28 16:53:13 2005 -0400" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@pobox.com", "time": "Fri Oct 28 16:53:13 2005 -0400" }, "message": "drivers/net: Remove pointless checks for NULL prior to calling kfree()\n" }, { "commit": "37ff238d68683d42e7363eee3303773906c336d9", "tree": "45a016abbed939ee11427941b7036f6cfeca20d3", "parents": [ "28fbef78a420acdea20570d31f3bdcbfa0cac0d2" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Wed Oct 26 15:49:51 2005 -0700" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@pobox.com", "time": "Fri Oct 28 16:07:30 2005 -0400" }, "message": "[PATCH] tg3: update version and minor fixes\n\nUpdate version and reldate and add more sanity checking to\ntg3_set_settings().\n\nSigned-off-by: Gary Zambrano \u003czambrano@broadcom.com\u003e\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\n" }, { "commit": "28fbef78a420acdea20570d31f3bdcbfa0cac0d2", "tree": "ef68381a6e776a802038e39529e89a0d1390fae0", "parents": [ "a4e2b347848bf626b822599329933887dc90e50f" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Wed Oct 26 15:48:35 2005 -0700" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@pobox.com", "time": "Fri Oct 28 16:07:30 2005 -0400" }, "message": "[PATCH] tg3: fix ASF heartbeat\n\nChange the ASF heart beat to 5 seconds for faster detection of system\ncrash. The driver sends the heartbeat every 2 seconds and the ASF\nfirmware will timeout and reset the device if no heartbeat is received\nafter 5 seconds. The old scheme of 2 minutes is ineffective.\n\ntg3_write_mem_fast() is added to speed up the IO to send the heartbeat.\nWhen no workaround is needed, it will use direct MMIO to memory space\nto write to memory.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\n" }, { "commit": "a4e2b347848bf626b822599329933887dc90e50f", "tree": "414564393157868b8c6d708bfb2c750cf49b1f6b", "parents": [ "5fadd053d9bb4345ec6f405d24db4e7eb49cf81e" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Wed Oct 26 15:46:52 2005 -0700" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@pobox.com", "time": "Fri Oct 28 16:07:29 2005 -0400" }, "message": "[PATCH] tg3: add 5714/5715 support\n\nAdd complete support for 5714/5715. These chips are very similar to\n5780 so the changes are very trivial. A TG3_FLG2_5780_CLASS flag is\nadded to identify these chips.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\n" }, { "commit": "ed39f731ab2e77e58122232f6e27333331d7793d", "tree": "9bd673c02644ec5f22107dd95e251a0f9abd4d29", "parents": [ "7ce312467edc270fcbd8a699efabb37ce1802b98" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Oct 03 16:25:23 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Oct 03 16:25:23 2005 -0700" }, "message": "[TG3]: Update driver version and release date.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "399de50bbbb2501a6db43daaa8a2dafbc9bcfe0c", "tree": "1c4e6034b0d5485c4ed3d010acc2d60d52ec2ed8", "parents": [ "a232f76732e11c91c2215d3a43cf9ebc7f939939" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Oct 03 14:02:39 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Oct 03 14:02:39 2005 -0700" }, "message": "[TG3]: Refine AMD K8 write-reorder chipset test.\n\nTest for VIA K8T800 north bridge instead of AMD K8 HyperTransport\nbridge based on new information from Andi Kleen. The AMD\nHyperTransport interface is not responsible for PCI transactions\nand so the re-ordering is more likely done by the VIA north bridge.\nThis code is subject to change if we get more information from AMD\nor VIA.\n\nPCI Express devices are excluded from doing the read flush since all\nchipsets in the write_reorder list are PCI chipsets.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c8a6c2963982c68475f409aeee21aa80b923cb9c", "tree": "781fe0d6bfcf836c898f99ab8a50929247c614ca", "parents": [ "f9804ddbeec2ea709255830a8822bfb4e7584f6a" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Sep 27 12:13:38 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Sep 27 12:13:38 2005 -0700" }, "message": "[TG3]: Update driver version and release date.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f9804ddbeec2ea709255830a8822bfb4e7584f6a", "tree": "09aad8dd07b795540a718bb48f6f1c1a7f1c496d", "parents": [ "c94e39418ab6eccf863581f4e0d847da0080b2d3" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Sep 27 12:13:10 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Sep 27 12:13:10 2005 -0700" }, "message": "[TG3]: misc. fixes\n\nFix interrupt test handler by adding check for IRQ assertion in\nPCI_STATE register in addition to the status block updated bit.\n\nAdd test for valid ethernet address in tg3_set_mac_addr().\n\nAdd tg3_bus_string() to setup the PCI bus speed/width string for all\nPCI/PCIX/PCI Express devices. This is used to print the bus type\nduring init_one().\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c94e39418ab6eccf863581f4e0d847da0080b2d3", "tree": "d7b38279d14d93160ffaed214898973fb2062061", "parents": [ "667347f1ca7e099f6833551f194cf2bcc778871b" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Sep 27 12:12:42 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Sep 27 12:12:42 2005 -0700" }, "message": "[TG3]: 5780 PHY fixes\n\nFix 5780 PHY related problems:\n\n1. MAC_RX_MODE reset must be done before setting up the MAC_MODE\n register on 5705_PLUS chips or the chip will stop receiving after\n a while. The MAC_RX_MODE reset is needed to prevent intermittently\n losing the first receive packet on serdes chips.\n\n2. Skip MAC loopback test on 5780 because of hardware errata. Normal\n traffic including PHY loopback is not affected by the errata.\n\n3. PHY loopback fails intermittently on 5708S and this is fixed by\n putting the PHY in loopback mode first before programming the MAC\n mode register. A MAC_RX_MODE reset is also added.\n\n4. Return -EINVAL in tg3_nway_reset() if device is in TBI mode. Allow\n nway_reset if 5780S is in parallel detect mode.\n\n5. Add missing PHY IDs in KNOWN_PHY_ID() macro.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c58ec93245a1fb7354f9e331960380827b9f41db", "tree": "0118b0145dc991b2f703279e5712a591a0bad153", "parents": [ "eb8edb085716621605cc2e7131a6369d2223d992" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Sat Sep 17 00:46:27 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Sep 17 00:46:27 2005 -0700" }, "message": "[TG3]: Fix 4GB boundary tx handling\n\nFix and simplify the workaround code for the 4GB boundary tx buffer\nhardware bug.\n\n1. Need to unmap the original SKB\u0027s dma addresses if a new SKB cannot\n be allocated.\n\n2. Need to pass the base flag to tigon3_4gb_hwbug_workaround() or TSO\n won\u0027t work properly.\n\n3. The guilty entry and length parameters for\n tigon3_4gb_hwbug_workaround() are removed as they are not necessary.\n\n4. Remove assumption that only one fragment can hit the 4GB boundary.\n Another fragment can hit 8GB for example.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "22abe310bc4b0c684fd3716af6b6116ff1011707", "tree": "0b8c822da0fb5379174a95e596430deb6d033f31", "parents": [ "a8f39143ac67ffa2e26ce48aaac6bf5dc7dae95f" ], "author": { "name": "Peter Hagervall", "email": "hager@cs.umu.se", "time": "Fri Sep 16 17:01:03 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Sep 16 17:01:03 2005 -0700" }, "message": "[TG3]: Sparse fixes for tg3\n\nChange 0 to NULL where appropriate.\n\nSigned-off-by: Peter Hagervall \u003chager@cs.umu.se\u003e\nAcked-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1cbf07478bbf3e350a2025bc5ea23fedaa95855a", "tree": "1da3df4563187bae7eec7834d1fada04f8a9271b", "parents": [ "67e6b629212fa9ffb7420e8a88a41806af637e28" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Sep 16 16:59:20 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Sep 16 16:59:20 2005 -0700" }, "message": "[TG3]: Add AMD K8 to list of write-reorder chipsets.\n\nThanks to Andy Stewart for the report and testing\ndebug patches from Michael Chan.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2ff436977ed3eeca2d39ae40bbfdb1ce58da8453", "tree": "4ff8478ccafb4151378645e3002e700b42519c25", "parents": [ "4f63b877726135b19ae73108acf9e0ebb4323dda" ], "author": { "name": "John W. Linville", "email": "linville@tuxdriver.com", "time": "Mon Sep 12 14:44:20 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 12 14:44:20 2005 -0700" }, "message": "[TG3]: Add support for ETHTOOL_GPERMADDR.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4f63b877726135b19ae73108acf9e0ebb4323dda", "tree": "3b250d2896fa2aa0a47114c553f7910cc4b9d0ff", "parents": [ "b88a762b6062f06d431af0045de4854a758646c0" ], "author": { "name": "John W. Linville", "email": "linville@tuxdriver.com", "time": "Mon Sep 12 14:43:18 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 12 14:43:18 2005 -0700" }, "message": "[TG3]: Do not count non-error frames dropped by the hardware as rx_errors.\n\nInstead, count them as part of rx_missed_errors.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "74da1edf264c5982b465041a5706caff25d7e1ed", "tree": "ce99103b1c0729e68c8e86b6a06dce6d123c8bc8", "parents": [ "38f3843ed6bdbcff9465386c3539523466880320" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Sep 05 17:56:11 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Sep 05 17:56:11 2005 -0700" }, "message": "[TG3]: Update driver version and release date.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "38f3843ed6bdbcff9465386c3539523466880320", "tree": "b3e1a3a714db10d8d7f6f083659e67fe193487b7", "parents": [ "61487480dd79acc5e82b08cd29cbcbd3301645fa" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Sep 05 17:53:32 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 05 17:53:32 2005 -0700" }, "message": "[TG3]: Use status tag to check for new events\n\nUse the status tag to determine if there are new events in\ntg3_interrupt_tagged(). We discussed about this a while ago with Grant\nGrundler and DaveM. This scheme makes it unnecessary to clear the\nupdated bit in the status block when using tagged mode, and only\na simple comparison is needed to determine if there are new events.\n\nThe tp-\u003elock around netif_rx_complete() and tg3_restart_ints() is also\nremoved. It is unnecessary with DaveM\u0027s new locking scheme.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "61487480dd79acc5e82b08cd29cbcbd3301645fa", "tree": "79f40bebd2062bfad707eb5f49087c100843a20a", "parents": [ "9f40dead25957434937f2b1872e9f4b43605f0ad" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Sep 05 17:53:19 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 05 17:53:19 2005 -0700" }, "message": "[TG3]: Remove status block access in tg3_msi() and add prefetches\n\nRemove unnecessary status block accesses in tg3_msi(). Since MSI is\nnot shared, it is unnecessary to read the status block to determine if\nthere are any new events in the MSI handler. It is also unnecessary to\nclear the updated bit in the status block.\n\nSince the poll list is per-cpu, tg3_poll() will be scheduled to run on\nthe same CPU that received the MSI. Prefetches for the status block\nand the next rx descriptors are added in tg3_msi() to improve their\naccess times when tg3_poll() runs.\n\nIn the non-MSI irq handlers, we need to check the status block because\ninterrupts may be shared. Only prefetches for the next rx descriptors\nare added.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "9f40dead25957434937f2b1872e9f4b43605f0ad", "tree": "39f80cdabbe7775fddc37490f4ae3609963e31d4", "parents": [ "4009a93d8e85f685b02794aee28e3272be862e2b" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Sep 05 17:53:06 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 05 17:53:06 2005 -0700" }, "message": "[TG3]: Add PHY loopback test\n\nImprove ethtool loopback self test by adding PHY loopback to the\nexisting MAC loopback test.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4009a93d8e85f685b02794aee28e3272be862e2b", "tree": "1571d9399aa0ae6ba0472b59179d447ac8185a80", "parents": [ "4c98748763ce25c5394a7edd686d92c70b4fac38" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Sep 05 17:52:54 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 05 17:52:54 2005 -0700" }, "message": "[TG3]: Add ethtool -p support\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n\n" }, { "commit": "4c98748763ce25c5394a7edd686d92c70b4fac38", "tree": "c80f671c4a04683d9efd7a6763d82cadaa459203", "parents": [ "67d2c36e901403bb97cb79ddb44d702c3284d0ba" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Sep 05 17:52:38 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Sep 05 17:52:38 2005 -0700" }, "message": "[TG3]: Minor 5780 and 5752 fixes\n\nMinor SerDes bug fixes for 5780S and nvram bug fixes for 5780 and\n5752.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "75c80c382fbd08acf06fbef9d54c9844e806a8b4", "tree": "7f23d59358c647a1253fc92e75d3906a47878a63", "parents": [ "51b9146869ab9492da785c5c9321d85f01655ab6" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Sep 01 17:42:23 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Sep 01 17:42:23 2005 -0700" }, "message": "[TG3]: Update driver version and release date.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "51b9146869ab9492da785c5c9321d85f01655ab6", "tree": "d95f8fda63a7e4a2508f1fc440dcc5e162140334", "parents": [ "86d9f7f0c9cf06d7d3cfa2a9f0514cf21fa5fda1" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Sep 01 17:41:28 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Sep 01 17:41:28 2005 -0700" }, "message": "[TG3]: Minimize locking in TX path.\n\nThis is similar to Eric Dumazet\u0027s tx_lock patch for tg3 but takes it\none step further to eliminate the tx_lock in the tx_completion path\nwhen the tx queue is not stopped.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "087fe256f0aef8d16b19a30c6fb10b899bf1a701", "tree": "64e88bc4cb0984f225ef7830aef566f5ba0d203e", "parents": [ "15f5a585c6b8dac31ed0a55693aacf51934f0f5d" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Aug 09 20:17:41 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Aug 29 15:50:49 2005 -0700" }, "message": "[TG3]: Fix bug in setting a tg3_flag\n\nFound a bug while reviewing the patches the second time.\n\nThe TG3_FLAG_TXD_MBOX_HWBUG flag is set after the register access\nmethods have been determined. This patch fixes it by moving it up before\nthe various access methods are assigned.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "15f5a585c6b8dac31ed0a55693aacf51934f0f5d", "tree": "3c24f5536451b44d53e58373f9d4718ae25ca094", "parents": [ "6892914fb7980d844f2bac859f4095df9ebd18da" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Aug 09 20:17:28 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Aug 29 15:50:45 2005 -0700" }, "message": "[TG3]: Eliminate one register write in tg3_restart_ints()\n\nThe register write to register 0x68 to restart interrupts is unnecessary\nas the interrupt wasn\u0027t masked in that register by the irq handler. This\nwill save one register write in the fast path.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6892914fb7980d844f2bac859f4095df9ebd18da", "tree": "ddeb1904b798bb69ed248840f25477bf8891d250", "parents": [ "09ee929cccfd0b56ea3724b3c6299fbbe813df43" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Aug 09 20:17:14 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Aug 29 15:50:42 2005 -0700" }, "message": "[TG3]: Add indirect register method for 5703 behind ICH\n\nThis patch adds the new workaround for 5703 A1/A2 if it is behind\ncertain ICH bridges. The workaround disables memory and uses config.\ncycles only to access all registers. The 5702/03 chips can mistakenly\ndecode the special cycles from the ICH chipsets as memory write cycles,\ncausing corruption of register and memory space. Only certain ICH\nbridges will drive special cycles with non-zero data during the address\nphase which can fall within the 5703\u0027s address range. This is not an ICH\nbug as the PCI spec allows non-zero address during special cycles.\nHowever, only these ICH bridges are known to drive non-zero addresses\nduring special cycles.\n\nThe indirect_lock is also changed to spin_lock_irqsave from spin_lock_bh\nbecause it is used in irq handler when using the indirect method to\ndisable interrupts.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "09ee929cccfd0b56ea3724b3c6299fbbe813df43", "tree": "52d0002518d41a6eea12859f9134c17d2af6c473", "parents": [ "1ee582d8e49a1c9dd43b2599f1cd26507182a8d4" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Aug 09 20:17:00 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Aug 29 15:50:38 2005 -0700" }, "message": "[TG3]: Add mailbox read method\n\nThis patch adds the mailbox read method and also adds an inline function\ntw32_mailbox_f() for mailbox writes that require read flush.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1ee582d8e49a1c9dd43b2599f1cd26507182a8d4", "tree": "335928fc4470391ff894616e53a186200682c072", "parents": [ "2009493065e01b1fe27c1b98ffbcfab98e185f72" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Aug 09 20:16:46 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Aug 29 15:50:15 2005 -0700" }, "message": "[TG3]: Add various register methods\n\nThis patch adds various dedicated register read/write methods for the\nexisting workarounds, including PCIX target workaround, write with read\nflush, etc. The chips that require these workarounds will use these\ndedicated access functions.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2009493065e01b1fe27c1b98ffbcfab98e185f72", "tree": "8a8981461a4f84a007f4725a027f3185055737ea", "parents": [ "757f612e091e7d13707eedc3ff71f1a9b53f5537" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Tue Aug 09 20:16:32 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Aug 29 15:50:12 2005 -0700" }, "message": "[TG3]: Add basic register access function pointers\n\nThis patch adds the basic function pointers to do register accesses in\nthe fast path. This was suggested by David Miller. The idea is that\nvarious register access methods for different hardware errata can easily\nbe implemented with these function pointers and performance will not be\ndegraded on chips that use normal register access methods.\n\nThe various register read write macros (e.g. tw32, tr32, tw32_mailbox)\nare redefined to call the function pointers.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d4ef16088913002255eab9958fff4e98b3b507d6", "tree": "3984a1dc8378d7a976be60523021036c8265a167", "parents": [ "06c7427021f1cc83703f14659d8405ca773ba1ef" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Thu Aug 25 15:31:41 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Aug 25 15:31:41 2005 -0700" }, "message": "[TG3]: Fix ethtool loopback test lockup\n\nThe tg3_abort_hw() call in tg3_test_loopback() is causing lockups on\nsome devices. tg3_abort_hw() disables the memory arbiter, causing\ntg3_reset_hw() to hang when it tries to write the pre-reset signature.\ntg3_abort_hw() should only be called after the pre-reset signature has\nbeen written. This is all done in tg3_reset_hw() so the tg3_abort_hw()\ncall is unnecessary and can be removed.\n\n[ Also bump driver version and release date. -DaveM ]\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "034ea6388a51f571b45ef1f0fa4ed4298691768e", "tree": "eec3baca8d1c1f026474906a3db3fac311753b4a", "parents": [ "da6b2d01d6bd2e79fd4f7a08acd37dc4e8fcdce8" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Aug 19 12:57:31 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Aug 19 12:57:31 2005 -0700" }, "message": "[TG3]: Update driver version and reldate.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "da6b2d01d6bd2e79fd4f7a08acd37dc4e8fcdce8", "tree": "8cc7fcfa31f2d439545ff8d16ef188c1b1b7614c", "parents": [ "91aa9fb573fcc50bc74d5ee64c7e9b36131f1804" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Fri Aug 19 12:54:29 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Aug 19 12:54:29 2005 -0700" }, "message": "[TG3]: Fix SerDes detection\n\nA problem was reported by Grant Grundler on an HP rx8620 using IOX\nCore LAN partno(A7109-6) 5701 copper NIC. The tg3 driver mistakenly\ndetects this NIC as having a SerDes PHY and link does not come up as a\nresult.\n\nThe problem was caused by an incorrectly programmed eeprom that set the\nNIC_SRAM_DATA_CFG_PHY_TYPE_FIBER bit in the NIC_SRAM_DATA_CFG location.\n\nThis patch will override the NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER bit if a\nvalid PHY ID is read from the MII registers on older 570x chips where\nthe MII interface is not used on SerDes chips. On newer chips such as\nthe 5780 that use MII for both copper and SerDes, SerDes detection must\nrely on the eeprom.\n\nThis patch will make the SerDes detection identical to versions 3.25 and\nolder.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nAcked-by: Grant Grundler \u003ciod00d@hp.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7d3f4c97723c4ec4e5d85e6e70084b02e6be8788", "tree": "790200fcdef86e91224903394023b964a3a52e47", "parents": [ "6fc0b4a7a73a81e74d0004732df358f4f9975be2" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Aug 06 06:35:48 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Aug 06 06:35:48 2005 -0700" }, "message": "[TG3]: Save initial PCI state before registering the netdevice.\n\nElse on SMP systems it is possible for hotplug to execute,\ninvoke tg3_open(), and end up loading the uninitialized\nPCI register save area into the card.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "fc87670b6cd63abc6fc4e3a115741984750d1fbc", "tree": "dc8772eee51425ba80a99f14e262ce2633e5a043", "parents": [ "747e8f8bff56955374521fa4d488e702d4b0c04f" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 25 12:45:32 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 25 12:45:32 2005 -0700" }, "message": "[TG3]: Update driver version and reldate.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "747e8f8bff56955374521fa4d488e702d4b0c04f", "tree": "66ab6d67818338a0421ef1e374ff15666c85dfa6", "parents": [ "ef7f5ec0deb2bcdc005f30f6f75f79c65c577cf5" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Jul 25 12:33:22 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 25 12:33:22 2005 -0700" }, "message": "[TG3]: add 5780 fiber support\n\nAdd 5780S support by adding a new tg3_setup_fiber_mii_phy() function and\na timer function for parallel link detection. 5780S uses standard MII\nregisters for 1000BaseX and runs in GMII mode as opposed to TBI mode on\nolder serdes chips.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ef7f5ec0deb2bcdc005f30f6f75f79c65c577cf5", "tree": "6a908c087b4ae41b593296136bc35b99fb2a9231", "parents": [ "fdfec1726b14b4b2121adcfcbba98d4cc1a61751" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Jul 25 12:32:25 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 25 12:32:25 2005 -0700" }, "message": "[TG3]: disallow jumbo TSO on 5780\n\nDisallow jumbo TSO on 5780 due to hardware restrictions.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "fdfec1726b14b4b2121adcfcbba98d4cc1a61751", "tree": "7cb407d307526b41165f974ee318c36b92e04a9e", "parents": [ "7e72aad48c3790636bfa006f3b0027852ccad47e" ], "author": { "name": "Michael Chan", "email": "mchan@broadcom.com", "time": "Mon Jul 25 12:31:48 2005 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 25 12:31:48 2005 -0700" }, "message": "[TG3]: consolidate all DMA water mark settings\n\nConsolidate all DMA watermark settings for standard and jumbo frames on\nall chips in tg3_init_bufmgr_config() and add new settings for 5780.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" } ], "next": "7e72aad48c3790636bfa006f3b0027852ccad47e" }