)]}'
{
  "log": [
    {
      "commit": "bbadf503d7c7e6efe0a4cd731f8855ba08276215",
      "tree": "1af228388f7f511525b7ef1d4b4777f4e258b2de",
      "parents": [
        "d2d746f83b74022a50d28f7f0f496842c9cde330"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 06 21:46:34 2006 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Sun Apr 09 22:25:46 2006 -0700"
      },
      "message": "[TG3]: Speed up SRAM access (2nd version)\n\nSpeed up SRAM read and write functions if possible by using MMIO\ninstead of config. cycles. With this change, the post reset signature\ndone at the end of D3 power change must now be moved before the D3\npower change.\n\nIBM reported a problem on powerpc blades during ethtool self test that\nwas caused by the memory test taking excessively long. Config.  cycles\nare very slow on powerpc and the memory test can take more than 10\nseconds to complete using config. cycles.\n\nDavid Miller informed me that an earlier version of the patch caused\nproblems on sparc64 systems with built-in tg3 chips. This version\nfixes the problem by excluding all SUN built-in tg3 chips from doing\nMMIO SRAM access.\n\nTG3_FLAG_EEPROM_WRITE_PROT is also set unconditionally when\nTG3_FLG2_SUN_570X is set. This should be sane as all SUN chips are\nbuilt-in and do not require Vaux switching.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "d2d746f83b74022a50d28f7f0f496842c9cde330",
      "tree": "4298a55e428e09a2643a53125e34caa6797b5f1e",
      "parents": [
        "7a43c9955178f1cc88374abe1186c0f2ef21e040"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 06 21:45:39 2006 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Sun Apr 09 22:25:44 2006 -0700"
      },
      "message": "[TG3]: Kill some less useful flags\n\nKill the TG3_FLAG_NO_{TX|RX}_PSEUDO_CSUM flags because they are not\nvery useful. This will free up some bits for new flags.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "d3c7b886978bef42f5ea487dec376c482d3cd7e3",
      "tree": "0776fcc78eb223beccc5af0a88b991a7d0284677",
      "parents": [
        "af36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Mar 23 01:28:25 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Thu Mar 23 01:28:25 2006 -0800"
      },
      "message": "[TG3]: Add 5755 nvram support\n\nAdd 5755 nvram support.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "af36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d",
      "tree": "879c0f2f8be1e6bcd9d64fa4ee952ee959d35357",
      "parents": [
        "b30bd282cbf5c46247a279a2e8d2aae027d9f1bf"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Mar 23 01:28:06 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Thu Mar 23 01:28:06 2006 -0800"
      },
      "message": "[TG3]: Add 5755 support\n\nAdd support for new chip 5755 which is very similar to 5787.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "c4e6575c78b83928c470d81b271909084a2efd37",
      "tree": "387a32bbd915bfb6d72d297bd86597c9e543e201",
      "parents": [
        "1820180b0e59cc48019414018b180518059f50d3"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Mar 20 22:29:32 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Mar 20 22:29:32 2006 -0800"
      },
      "message": "[TG3]: Add firmware version info\n\nAdd fw_version information to ethtool -i.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "fcfa0a32c767219c1bdad621ef4a3aff1904cbbd",
      "tree": "0b40b3432cc90af0e2b22da056baab173d163d65",
      "parents": [
        "9c27dbdf64cba05d0cacc343118a7fd01d4b82f7"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Mar 20 22:28:41 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Mar 20 22:28:41 2006 -0800"
      },
      "message": "[TG3]: Add new one-shot MSI handler\n\nSupport one-shot MSI on 5787.\n\nThis one-shot MSI idea is credited to David Miller. In this mode, MSI\ndisables itself automatically after it is generated, saving the driver\na register access to disable it for NAPI.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "5a6f3074c2ea5a7b4ff5b18f0e1fd9b1257e1a29",
      "tree": "4bc683f620e3176ae70932f5f865fe47423eb083",
      "parents": [
        "1b27777a9b9b2b6d1c06000b7a31262d198b4238"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Mar 20 22:28:05 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Mar 20 22:28:05 2006 -0800"
      },
      "message": "[TG3]: Add new hard_start_xmit\n\nSupport 5787 hardware TSO using a new flag TG3_FLG2_HW_TSO_2.\n\nSince the TSO interface is slightly different and these chips have\nfinally fixed the 4GB DMA problem and do not have the 40-bit DMA\nproblem, a new hard_start_xmit is used for these chips. All previous\nchips will use the old hard_start_xmit that is now renamed\ntg3_start_xmit_dma_bug().\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "1b27777a9b9b2b6d1c06000b7a31262d198b4238",
      "tree": "4690a8fe70231e4b09171957a5d3e8a7b4ccb00c",
      "parents": [
        "d9ab5ad12b0d865bdb1b750d81192d34465541e9"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Mar 20 22:27:48 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Mar 20 22:27:48 2006 -0800"
      },
      "message": "[TG3]: Add 5787 nvram support\n\nSupport additional nvrams and new nvram format for 5787 and 5754.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "d9ab5ad12b0d865bdb1b750d81192d34465541e9",
      "tree": "0bc4b3e9139836b39e5cab3affe9090bae4b11c7",
      "parents": [
        "6cb153cab92a6dc8771d496b10a50cd066fa7f71"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Mar 20 22:27:35 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Mar 20 22:27:35 2006 -0800"
      },
      "message": "[TG3]: Add 5787 and 5754 basic support\n\nAdd basic support for 2 new chips 5787 and 5754.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "4a29cc2e503b33a1e96db4c3f9a94165f153f259",
      "tree": "74645b5ef3a92ad9857ed63d6446e2be0535060c",
      "parents": [
        "c7c694d196a39af6e644e24279953d04f30362db"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Sun Mar 19 13:21:12 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Sun Mar 19 13:21:12 2006 -0800"
      },
      "message": "[TG3]: 40-bit DMA workaround part 2\n\nThe 40-bit DMA workaround recently implemented for 5714, 5715, and\n5780 needs to be expanded because there may be other tg3 devices\nbehind the EPB Express to PCIX bridge in the 5780 class device.\n\nFor example, some 4-port card or mother board designs have 5704 behind\nthe 5714.\n\nAll devices behind the EPB require the 40-bit DMA workaround.\n\nThanks to Chris Elmquist again for reporting the problem and testing\nthe patch.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "7faa006f94fda56a587242b2a22fa19abf840222",
      "tree": "b1354b391829bc3f1d83fd3121167318f8472147",
      "parents": [
        "3f330317ab4973178423aba750d6d0ca5ce0024a"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Feb 02 17:29:28 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Thu Feb 02 17:29:28 2006 -0800"
      },
      "message": "[TG3]: Flush tg3_reset_task()\n\nMake sure tg3_reset_task() is flushed in the close and suspend paths\nas noted by Jeff Garzik.\n\nIn the close path, calling flush_scheduled_work() may cause deadlock\nif linkwatch_event() is on the workqueue. linkwatch_event() will try\nto get the rtnl_lock() which is already held by tg3_close(). So\ninstead, we set a flag in tg3_reset_task() and tg3_close() polls\nthe flag until it is cleared.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "ec41c7dfd525468decb9da9281dbc9ed82d98c98",
      "tree": "02ac7f0b1318c69d53a2405972f8a6880dc8b7c6",
      "parents": [
        "f0daaa654af68c1651add9d21188d81c19672551"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Jan 17 02:40:55 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Tue Jan 17 02:40:55 2006 -0800"
      },
      "message": "[TG3]: Refine nvram locking\n\nAdd nvram lock count so that calls to tg3_nvram_lock()/unlock() can\nbe nested. Add error checking to all callers of tg3_nvram_lock()\nwhere appropriate. To prevent nvram lock failures after halting the\nfirmware, it is also necessary to release firmware\u0027s nvram lock in\ntg3_halt_cpu().\n\nUpdate version to 3.48.\n\nBased on David Miller\u0027s initial patch.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "091465d7514893a55dcf63e420698b21159c39a7",
      "tree": "cbfaedb45164d21d0d2f4af5efad2fc78dd37f92",
      "parents": [
        "67dbb4ea33731415fe09c62149a34f472719ac1d"
      ],
      "author": {
        "name": "Chris Elmquist",
        "email": "chrise@sgi.com",
        "time": "Tue Dec 20 13:25:19 2005 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Wed Dec 28 13:04:52 2005 -0800"
      },
      "message": "[TG3]: ethtool -d hangs PCIe systems\n\nResubmitting after recommendation to use GET_REG32_1() instead of\nGET_REG32_LOOP(..., 1).  Retested.  Problem remains fixed.\n\nPrevent tg3_get_regs() from reading reserved and undocumented registers\nat RX_CPU_BASE and TX_CPU_BASE offsets which caused hostile behavior\non PCIe platforms.\n\nAcked-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "6921d201f77e14848df2eaa597e26525f468abea",
      "tree": "cef66b131fd1cb980d209c5ecb590a0783fdf985",
      "parents": [
        "16fe9d74f14ed74af778c5db7f9129e29916f4a7"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Dec 13 21:15:53 2005 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Tue Dec 13 21:15:53 2005 -0800"
      },
      "message": "[TG3]: Fix low power state\n\nFix the following bugs in tg3_set_power_state():\n\n1. Both WOL and ASF flags require switching to aux power.\n\n2. Add a missing handshake with firmware to enable WOL.\n\n3. Turn off the PHY if both WOL and ASF are disabled.\n\n4. Add nvram arbitration before halting the firmware.\n\n5. Fix tg3_setup_copper_phy() to switch to 100Mbps when\n   changing to low power state.\n\nUpdate revision and date.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "28fbef78a420acdea20570d31f3bdcbfa0cac0d2",
      "tree": "ef68381a6e776a802038e39529e89a0d1390fae0",
      "parents": [
        "a4e2b347848bf626b822599329933887dc90e50f"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Wed Oct 26 15:48:35 2005 -0700"
      },
      "committer": {
        "name": "Jeff Garzik",
        "email": "jgarzik@pobox.com",
        "time": "Fri Oct 28 16:07:30 2005 -0400"
      },
      "message": "[PATCH] tg3: fix ASF heartbeat\n\nChange the ASF heart beat to 5 seconds for faster detection of system\ncrash. The driver sends the heartbeat every 2 seconds and the ASF\nfirmware will timeout and reset the device if no heartbeat is received\nafter 5 seconds. The old scheme of 2 minutes is ineffective.\n\ntg3_write_mem_fast() is added to speed up the IO to send the heartbeat.\nWhen no workaround is needed, it will use direct MMIO to memory space\nto write to memory.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\n"
    },
    {
      "commit": "a4e2b347848bf626b822599329933887dc90e50f",
      "tree": "414564393157868b8c6d708bfb2c750cf49b1f6b",
      "parents": [
        "5fadd053d9bb4345ec6f405d24db4e7eb49cf81e"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Wed Oct 26 15:46:52 2005 -0700"
      },
      "committer": {
        "name": "Jeff Garzik",
        "email": "jgarzik@pobox.com",
        "time": "Fri Oct 28 16:07:29 2005 -0400"
      },
      "message": "[PATCH] tg3: add 5714/5715 support\n\nAdd complete support for 5714/5715. These chips are very similar to\n5780 so the changes are very trivial. A TG3_FLG2_5780_CLASS flag is\nadded to identify these chips.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@pobox.com\u003e\n"
    },
    {
      "commit": "c94e39418ab6eccf863581f4e0d847da0080b2d3",
      "tree": "d7b38279d14d93160ffaed214898973fb2062061",
      "parents": [
        "667347f1ca7e099f6833551f194cf2bcc778871b"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Sep 27 12:12:42 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Tue Sep 27 12:12:42 2005 -0700"
      },
      "message": "[TG3]: 5780 PHY fixes\n\nFix 5780 PHY related problems:\n\n1. MAC_RX_MODE reset must be done before setting up the MAC_MODE\n   register on 5705_PLUS chips or the chip will stop receiving after\n   a while. The MAC_RX_MODE reset is needed to prevent intermittently\n   losing the first receive packet on serdes chips.\n\n2. Skip MAC loopback test on 5780 because of hardware errata. Normal\n   traffic including PHY loopback is not affected by the errata.\n\n3. PHY loopback fails intermittently on 5708S and this is fixed by\n   putting the PHY in loopback mode first before programming the MAC\n   mode register. A MAC_RX_MODE reset is also added.\n\n4. Return -EINVAL in tg3_nway_reset() if device is in TBI mode. Allow\n   nway_reset if 5780S is in parallel detect mode.\n\n5. Add missing PHY IDs in KNOWN_PHY_ID() macro.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "6892914fb7980d844f2bac859f4095df9ebd18da",
      "tree": "ddeb1904b798bb69ed248840f25477bf8891d250",
      "parents": [
        "09ee929cccfd0b56ea3724b3c6299fbbe813df43"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Aug 09 20:17:14 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Mon Aug 29 15:50:42 2005 -0700"
      },
      "message": "[TG3]: Add indirect register method for 5703 behind ICH\n\nThis patch adds the new workaround for 5703 A1/A2 if it is behind\ncertain ICH bridges. The workaround disables memory and uses config.\ncycles only to access all registers. The 5702/03 chips can mistakenly\ndecode the special cycles from the ICH chipsets as memory write cycles,\ncausing corruption of register and memory space. Only certain ICH\nbridges will drive special cycles with non-zero data during the address\nphase which can fall within the 5703\u0027s address range. This is not an ICH\nbug as the PCI spec allows non-zero address during special cycles.\nHowever, only these ICH bridges are known to drive non-zero addresses\nduring special cycles.\n\nThe indirect_lock is also changed to spin_lock_irqsave from spin_lock_bh\nbecause it is used in irq handler when using the indirect method to\ndisable interrupts.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "09ee929cccfd0b56ea3724b3c6299fbbe813df43",
      "tree": "52d0002518d41a6eea12859f9134c17d2af6c473",
      "parents": [
        "1ee582d8e49a1c9dd43b2599f1cd26507182a8d4"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Aug 09 20:17:00 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Mon Aug 29 15:50:38 2005 -0700"
      },
      "message": "[TG3]: Add mailbox read method\n\nThis patch adds the mailbox read method and also adds an inline function\ntw32_mailbox_f() for mailbox writes that require read flush.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "2009493065e01b1fe27c1b98ffbcfab98e185f72",
      "tree": "8a8981461a4f84a007f4725a027f3185055737ea",
      "parents": [
        "757f612e091e7d13707eedc3ff71f1a9b53f5537"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Aug 09 20:16:32 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Mon Aug 29 15:50:12 2005 -0700"
      },
      "message": "[TG3]: Add basic register access function pointers\n\nThis patch adds the basic function pointers to do register accesses in\nthe fast path. This was suggested by David Miller. The idea is that\nvarious register access methods for different hardware errata can easily\nbe implemented with these function pointers and performance will not be\ndegraded on chips that use normal register access methods.\n\nThe various register read write macros (e.g. tw32, tr32, tw32_mailbox)\nare redefined to call the function pointers.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "747e8f8bff56955374521fa4d488e702d4b0c04f",
      "tree": "66ab6d67818338a0421ef1e374ff15666c85dfa6",
      "parents": [
        "ef7f5ec0deb2bcdc005f30f6f75f79c65c577cf5"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Jul 25 12:33:22 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Jul 25 12:33:22 2005 -0700"
      },
      "message": "[TG3]: add 5780 fiber support\n\nAdd 5780S support by adding a new tg3_setup_fiber_mii_phy() function and\na timer function for parallel link detection. 5780S uses standard MII\nregisters for 1000BaseX and runs in GMII mode as opposed to TBI mode on\nolder serdes chips.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "fdfec1726b14b4b2121adcfcbba98d4cc1a61751",
      "tree": "7cb407d307526b41165f974ee318c36b92e04a9e",
      "parents": [
        "7e72aad48c3790636bfa006f3b0027852ccad47e"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Jul 25 12:31:48 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Jul 25 12:31:48 2005 -0700"
      },
      "message": "[TG3]: consolidate all DMA water mark settings\n\nConsolidate all DMA watermark settings for standard and jumbo frames on\nall chips in tg3_init_bufmgr_config() and add new settings for 5780.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "7e72aad48c3790636bfa006f3b0027852ccad47e",
      "tree": "ba2f201b4554f95b3e432f75f6cc7a2cbb296f70",
      "parents": [
        "0f893dc6ec890058d926224c8aa254d8621e0ea3"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Jul 25 12:31:17 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Jul 25 12:31:17 2005 -0700"
      },
      "message": "[TG3]: add variable buffer size for standard ring\n\nAdd a new rx_pkt_buf_sz to the tg3 structure to support variable buffer\nsizes on the standard ring.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "0f893dc6ec890058d926224c8aa254d8621e0ea3",
      "tree": "9a9c42335bac0c05aed89ed7139a22d022f5d064",
      "parents": [
        "4cf78e4fb678807e3f8265c9e9031a84f5c601f0"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Jul 25 12:30:38 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Jul 25 12:30:38 2005 -0700"
      },
      "message": "[TG3]: add 5780 basic jumbo frame support\n\nAdd basic jumbo frames support for 5780. This chip supports jumbo frames\non the standard receive ring without the jumbo ring. The\nTG3_FLAG_JUMBO_ENABLE is changed to TG3_FLAG_JUMBO_RING_ENABLE to\nindicate using the jumbo ring on 5704 and older chips. A new\nTG3_FLG2_JUMBO_CAPABLE flag is added to indicate jumbo frames support\nwith or without the jumbo ring.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "4cf78e4fb678807e3f8265c9e9031a84f5c601f0",
      "tree": "e5acc4451c7e9f59125119174b05ca95c652c2df",
      "parents": [
        "6b6a93c6876ea1c530d5d3f68e3678093a27fab0"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Mon Jul 25 12:29:19 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Jul 25 12:29:19 2005 -0700"
      },
      "message": "[TG3]: add 5780 basic support\n\nAdd 5780 PCI IDs, chip IDs, and other basic support.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "d244c892c8e23d6baba88af88f78f7201a224d39",
      "tree": "03e79b06198f0e12bbf8d4bf25cfb93ee3c31eba",
      "parents": [
        "e2ed4052aa662e7cfb22a1793b9d8158603be6d7"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Tue Jul 05 14:42:33 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Tue Jul 05 14:42:33 2005 -0700"
      },
      "message": "[TG3]: support for ethtool -C\n\nAdd support for ethtool -C with verification of user parameters.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "f47c11eeccc8820010992eb32dbe7370a08f8bd3",
      "tree": "7cd6308a1796fae227c61208545593b79b12f21a",
      "parents": [
        "cd024c8baf9756759c57f0a19be639da8d3d4f8c"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Fri Jun 24 20:18:35 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Fri Jun 24 20:18:35 2005 -0700"
      },
      "message": "[TG3]: Eliminate all hw IRQ handler spinlocks.\n\nMove all driver spinlocks to be taken at sw IRQ\ncontext only.\n\nThis fixes the skb_copy() we were doing with hw\nIRQs disabled (which is illegal and triggers a\nBUG() with HIGHMEM enabled).  It also simplifies\nthe locking all over the driver tremendously.\n\nWe accomplish this feat by creating a special\nsequence to synchronize with the hw IRQ handler\nusing a binary state and synchronize_irq().\nThis idea is from Herbert Xu.\n\nThanks to Michael Chan for helping to track down\nall of the race conditions in initial versions\nof this code.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "15f9850d3c2d46f5851a424d2990a18b5bb5ebfd",
      "tree": "a96514f0f797e0a315e12450279d103a888d1083",
      "parents": [
        "fac9b83ea79aa3112ed245d9a4fc2a5c3ec2b7ec"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Wed May 18 22:49:26 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Wed May 18 22:49:26 2005 -0700"
      },
      "message": "[TG3]: Set minimal hw interrupt mitigation.\n\nEven though we do software interrupt mitigation\nvia NAPI, it still helps to have some minimal\nhw assisted mitigation.\n\nThis helps, particularly, on systems where register\nI/O overhead is much greater than the CPU horsepower.\n\nFor example, it helps on NUMA systems.  In such cases\nthe PIO overhead to disable interrupts for NAPI accounts\nfor the majority of the packet processing cost.  The\nCPU is fast enough such that only a single packet is\nprocessed by each NAPI poll call.\n\nThanks to Michael Chan for reviewing this patch.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "fac9b83ea79aa3112ed245d9a4fc2a5c3ec2b7ec",
      "tree": "14749e6e5e0abdfb707b41dad714e36246e6cff8",
      "parents": [
        "05d3794aa8bd3b2c9f7920a05003c331cdeb75c5"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Wed May 18 22:46:34 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Wed May 18 22:46:34 2005 -0700"
      },
      "message": "[TG3]: Add tagged status support.\n\nWhen supported, use the TAGGED interrupt processing support\nthe chip provides.  In this mode, instead of a \"on/off\" binary\nsemaphore, an incrementing tag scheme is used to ACK interrupts.\n\nAll MSI supporting chips support TAGGED mode, so the tg3_msi()\ninterrupt handler uses it unconditionally.  This invariant is\nverified when MSI support is tested.\n\nSince we can invoke tg3_poll() multiple times per interrupt under\nhigh packet load, we fetch a new copy of the tag value in the\nstatus block right before we actually do the work.\n\nAlso, because the tagged status tells the chip exactly which\nwork we have processed, we can make two optimizations:\n\n1) tg3_restart_ints() need not check tg3_has_work()\n2) the tg3_timer() need not poke the chip 10 times per\n   second to keep from losing interrupt events\n\nBased upon valuable feedback from Michael Chan \u003cmchan@broadcom.com\u003e\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "88b06bc26b87cf0490b0e3faea7fefc7549dd75d",
      "tree": "ffba7c235ad94e3c1e0074cb209504e6ea25afe3",
      "parents": [
        "1c8594b48b00a98d12477355e944e165a5f64cd5"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 21 17:13:25 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:13:25 2005 -0700"
      },
      "message": "[TG3]: Add msi support\n\nAdd MSI support for 5751 C0 and 5752.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "e6af301be3c129adbc8a7c8ffb76e62533ad9575",
      "tree": "02b2fd5de20468f5966cf3e73fbfa5e6f86baa63",
      "parents": [
        "361b4ac29bc651c7612d4bf21434ae6fe06b78e4"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 21 17:12:05 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:12:05 2005 -0700"
      },
      "message": "[TG3]: Add nvram lock-out support for 5752 TPM\n\nAdd support for the NVRAM lock-out feature for TPM in 5752. If lock-out\nis enabled, certain NVRAM registers cannot be written to.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "361b4ac29bc651c7612d4bf21434ae6fe06b78e4",
      "tree": "a0d1b0a7f89a7d45c63b269bef5eeacf6f8dc734",
      "parents": [
        "3e7d83bc96d59013792e5546e7832668d3adbce7"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 21 17:11:21 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:11:21 2005 -0700"
      },
      "message": "[TG3]: Add nvram detection for 5752\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "3e7d83bc96d59013792e5546e7832668d3adbce7",
      "tree": "e622228e8fd43e1461ea525afa453fbcddc39125",
      "parents": [
        "ff645bec523819fa4d28d7e0de7d998e3edb0c57"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 21 17:10:36 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:10:36 2005 -0700"
      },
      "message": "[TG3]: Add GPIO3 for 5752\n\nAdd bit definitions for the new GPIO3 in 5752. GPIO3 must be driven as\noutput when it is unused.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "ff645bec523819fa4d28d7e0de7d998e3edb0c57",
      "tree": "b1f7bff1f67465f53adf9906d73d87412edfa876",
      "parents": [
        "8c6bda1a89c148f3a28edc09a76dac9bff57d8ee"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 21 17:09:53 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:09:53 2005 -0700"
      },
      "message": "[TG3]: Workaround 5752 A0 chip ID\n\nThe 5752 A0 chip ID is wrong in hardware. The simplest way to workaround\nit is to change it to the correct value in tp-\u003epci_chip_rev_id. This\nway, it is easier to check for the ASIC_REV_5752 in the rest of the\ndriver.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "85e94cedc44d1c2c1663b5b18f703ca5e7316e59",
      "tree": "0e28e8b073f7ecefd2916dd40d248b914d1a6c0b",
      "parents": [
        "053d78000be4906fac6446ad517ca3897dc6cd84"
      ],
      "author": {
        "name": "Michael Chan",
        "email": "mchan@broadcom.com",
        "time": "Thu Apr 21 17:05:28 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:05:28 2005 -0700"
      },
      "message": "[TG3]: Minor 5752 fixes\n\nSome minor 5752 fixes mostly for correctness and add 5752 PHY ID.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "053d78000be4906fac6446ad517ca3897dc6cd84",
      "tree": "3ba4a5f488457ce6432d956b2363e3a3806396f6",
      "parents": [
        "1b440c568e28186956ef765c69ab124401088663"
      ],
      "author": {
        "name": "John W. Linville",
        "email": "linville@tuxdriver.com",
        "time": "Thu Apr 21 17:03:52 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:03:52 2005 -0700"
      },
      "message": "[TG3]: add support for bcm5752 rev a1\n\nReplace existing ASIC_REV_5752 definition with ASIC_REV_5752_A0,\nand add definition for ASIC_REV_5752_A1. Then, add ASIC_REV_5752_A1\nto check for setting TG3_FLG2_5750_PLUS in tg3_get_invariants.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "6708e5cc103ba045fca035b4d8df236ca31fb8bc",
      "tree": "5bce9bd2fd887fc5091e9bb234d2cd99c931413c",
      "parents": [
        "fcf026936c613fc6ca4685677a461100d87eec81"
      ],
      "author": {
        "name": "John W. Linville",
        "email": "linville@tuxdriver.com",
        "time": "Thu Apr 21 17:00:52 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 17:00:52 2005 -0700"
      },
      "message": "[TG3]: define TG3_FLG2_5750_PLUS flag\n\nDefine TG3_FLG2_5750_PLUS flag and set it in tg3_get_invariants for\nASIC_REV_5750 or ASIC_REV_5752.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "2052da946096590035438626afbc7f329d2549d8",
      "tree": "4cdb3bf407c8573f26a5a373016520b2ef44e8c7",
      "parents": [
        "ebc37b611616ad46dce7d590b15ad655aa50213a"
      ],
      "author": {
        "name": "John W. Linville",
        "email": "linville@tuxdriver.com",
        "time": "Thu Apr 21 16:56:08 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Thu Apr 21 16:56:08 2005 -0700"
      },
      "message": "[TG3]: add basic bcm5752 support\n\nAdd ASIC_REV_5752 definition.\n\nTrack-down all references to ASIC_REV_5750 and mirror them with\nreferences to the newly defined ASIC_REV_5752.\n\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}