)]}'
{
  "log": [
    {
      "commit": "0ecd702bcb924d5fb7f687e09986f688336ac896",
      "tree": "50b9caabc044fb9780cc2a794aabb9d3a7fbf029",
      "parents": [
        "655a0443470a73d5dc36e974a241e8db59bb1ccb"
      ],
      "author": {
        "name": "KAMEZAWA Hiroyuki",
        "email": "kamezawa.hiroyu@jp.fujitsu.com",
        "time": "Mon Mar 27 01:15:53 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Mar 27 08:44:47 2006 -0800"
      },
      "message": "[PATCH] unify pfn_to_page: ia64 pfn_to_page\n\nia64 has special config CONFIG_VIRTUAL_MEM_MAP.\nCONFIG_DISCONTIGMEM\u003dy \u0026\u0026 CONFIG_VIRTUAL_MEM_MAP!\u003dy is bug ?\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "2332c9ae7911618575241e0c843cd686968db8e3",
      "tree": "24363aeb963d00cb3aab67f9586eae78ac54dfd8",
      "parents": [
        "1c2e02750b992703a8a18634e08b04353face243"
      ],
      "author": {
        "name": "Chen, Kenneth W",
        "email": "kenneth.w.chen@intel.com",
        "time": "Wed Mar 22 10:49:00 2006 -0800"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Wed Mar 22 14:35:08 2006 -0800"
      },
      "message": "[IA64] fix ia64 is_hugepage_only_range\n\nfix is_hugepage_only_range() definition to be \"overlaps\"\ninstead of \"within architectural restricted hugetlb address\nrange\".  Simplify the ia64 specific code that used to use\nis_hugepage_only_range() to just check which region the\naddress is in.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "42b88befd6e0dae1a5fe04c03925037fa890e1f3",
      "tree": "c234584f797e65e1bcd0d4675d56d1eb004d6681",
      "parents": [
        "3915bcf38fe0b6d130b4bbde97804f29a0becf32"
      ],
      "author": {
        "name": "David Gibson",
        "email": "david@gibson.dropbear.id.au",
        "time": "Wed Mar 22 00:09:01 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Mar 22 07:54:04 2006 -0800"
      },
      "message": "[PATCH] hugepage: is_aligned_hugepage_range() cleanup\n\nQuite a long time back, prepare_hugepage_range() replaced\nis_aligned_hugepage_range() as the callback from mm/mmap.c to arch code to\nverify if an address range is suitable for a hugepage mapping.\nis_aligned_hugepage_range() stuck around, but only to implement\nprepare_hugepage_range() on archs which didn\u0027t implement their own.\n\nMost archs (everything except ia64 and powerpc) used the same\nimplementation of is_aligned_hugepage_range().  On powerpc, which\nimplements its own prepare_hugepage_range(), the custom version was never\nused.\n\nIn addition, \"is_aligned_hugepage_range()\" was a bad name, because it\nsuggests it returns true iff the given range is a good hugepage range,\nwhereas in fact it returns 0-or-error (so the sense is reversed).\n\nThis patch cleans up by abolishing is_aligned_hugepage_range().  Instead\nprepare_hugepage_range() is defined directly.  Most archs use the default\nversion, which simply checks the given region is aligned to the size of a\nhugepage.  ia64 and powerpc define custom versions.  The ia64 one simply\nchecks that the range is in the correct address space region in addition to\nbeing suitably aligned.  The powerpc version (just as previously) checks\nfor suitable addresses, and if necessary performs low-level MMU frobbing to\nset up new areas for use by hugepages.\n\nNo libhugetlbfs testsuite regressions on ppc64 (POWER5 LPAR).\n\nSigned-off-by: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "9da61aef0fd5b17dd4bf4baf33db12c470def774",
      "tree": "cb4bb0b63c36a0b303ceadc0cec0fae00c49ecf3",
      "parents": [
        "27a85ef1b81300cfff06b4c8037e9914dfb09acc"
      ],
      "author": {
        "name": "David Gibson",
        "email": "david@gibson.dropbear.id.au",
        "time": "Wed Mar 22 00:08:57 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Mar 22 07:54:03 2006 -0800"
      },
      "message": "[PATCH] hugepage: Fix hugepage logic in free_pgtables()\n\nfree_pgtables() has special logic to call hugetlb_free_pgd_range() instead\nof the normal free_pgd_range() on hugepage VMAs.  However, the test it uses\nto do so is incorrect: it calls is_hugepage_only_range on a hugepage sized\nrange at the start of the vma.  is_hugepage_only_range() will return true\nif the given range has any intersection with a hugepage address region, and\nin this case the given region need not be hugepage aligned.  So, for\nexample, this test can return true if called on, say, a 4k VMA immediately\npreceding a (nicely aligned) hugepage VMA.\n\nAt present we get away with this because the powerpc version of\nhugetlb_free_pgd_range() is just a call to free_pgd_range().  On ia64 (the\nonly other arch with a non-trivial is_hugepage_only_range()) we get away\nwith it for a different reason; the hugepage area is not contiguous with\nthe rest of the user address space, and VMAs are not permitted in between,\nso the test can\u0027t return a false positive there.\n\nNonetheless this should be fixed.  We do that in the patch below by\nreplacing the is_hugepage_only_range() test with an explicit test of the\nVMA using is_vm_hugetlb_page().\n\nThis in turn changes behaviour for platforms where is_hugepage_only_range()\nreturns false always (everything except powerpc and ia64).  We address this\nby ensuring that hugetlb_free_pgd_range() is defined to be identical to\nfree_pgd_range() (instead of a no-op) on everything except ia64.  Even so,\nit will prevent some otherwise possible coalescing of calls down to\nfree_pgd_range().  Since this only happens for hugepage VMAs, removing this\nsmall optimization seems unlikely to cause any trouble.\n\nThis patch causes no regressions on the libhugetlbfs testsuite - ppc64\nPOWER5 (8-way), ppc64 G5 (2-way) and i386 Pentium M (UP).\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nAcked-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "b77dae5293efba42ea1ff04d410ee68e66d5b0cf",
      "tree": "e7cff6570c32d55e4743f0e59c53ab9086c1efd6",
      "parents": [
        "624f54be206adf970cd8eece16446b027913e533"
      ],
      "author": {
        "name": "Dean Roe",
        "email": "roe@sgi.com",
        "time": "Wed Nov 09 14:25:06 2005 -0600"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Tue Nov 29 09:24:10 2005 -0800"
      },
      "message": "[IA64] - Make pfn_valid more precise for SGI Altix systems\n\nA single SGI Altix system can be divided into multiple partitions,\neach running their own instance of the Linux kernel.  pfn_valid()\nis currently not optimal for any but the first partition, since it\ndoes not compare the pfn with min_low_pfn before calling the more\ncostly ia64_pfn_valid().\n\nSigned-off-by: Dean Roe \u003croe@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "837cd0bdf54dd954cd6aa43d250f75ab5db79617",
      "tree": "ef28b91f1ac8c1c9f4244da9be1f994306ef4070",
      "parents": [
        "d12eb7e11cf30c30f639b2093735af2ac177830b"
      ],
      "author": {
        "name": "Robin Holt",
        "email": "holt@sgi.com",
        "time": "Fri Nov 11 09:35:43 2005 -0600"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Fri Nov 11 09:37:29 2005 -0800"
      },
      "message": "[IA64] 4-level page tables\n\nThis patch introduces 4-level page tables to ia64.  I have run\nsome benchmarks and found nothing interesting.  Performance has\nconsistently fallen within the noise range.\n\nIt also introduces a config option (setting the default to 3\nlevels).  The config option prevents having 4 level page\ntables with 64k base page size.\n\nSigned-off-by: Robin Holt \u003cholt@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "631bb0e74e811e0d9ad23e7462a02d4767b4dd9d",
      "tree": "b272e3afacf1f3dfb9b4dfa06cadbcf17956469a",
      "parents": [
        "581c1b14394aee60aff46ea67d05483261ed6527"
      ],
      "author": {
        "name": "Bob Picco",
        "email": "bob.picco@hp.com",
        "time": "Mon Oct 31 13:25:25 2005 -0500"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Mon Oct 31 11:33:53 2005 -0800"
      },
      "message": "[IA64] Recent SPARSEMEM and DISCONTIG changes break some builds\n\nMy only objection to pfn_to_kaddr, which was introduced for HotPlug memory,\nis that all arches have an identical implementation. I haven\u0027t had a chance\nto pursue why yet.  There is probably some arch issue I\u0027m unaware of.\n\nSigned-off-by: Bob Picco \u003cbob.picco@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "1be7d9935b9c7fb9bd5964bfaf3ac543381277db",
      "tree": "fe39c6d9e19fb890812318f5f3b318de6c3afc57",
      "parents": [
        "c678796cab4b5288ad578802a54cb1480ae20a08"
      ],
      "author": {
        "name": "Bob Picco",
        "email": "bob.picco@hp.com",
        "time": "Tue Oct 04 15:13:50 2005 -0400"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Tue Oct 04 13:21:13 2005 -0700"
      },
      "message": "[PATCH] V5 ia64 SPARSEMEM - conditional changes for SPARSEMEM\n\nThis patch introduces the conditional changes required for the three\nmemory models.  With [patch 1/4] there are three memory models; FLATMEM,\nDISCONTIG and SPARSEMEM.  Also a new arch include file sparemem.h is\nintroduced for defining SPARSEMEM parameters.\n\nSigned-off-by: Bob Picco \u003cbob.picco@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "1b66776da71e33dff5edcc0b096ec3b7c40c75ad",
      "tree": "138e13ac97b8af1f52f7fa798bc8f29851b9e176",
      "parents": [
        "0a41e2501160587eb8f66cef3bdf1c6f2cb86997"
      ],
      "author": {
        "name": "Greg Edwards",
        "email": "edwardsg@sgi.com",
        "time": "Mon Aug 22 09:57:00 2005 -0700"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Wed Aug 24 15:37:26 2005 -0700"
      },
      "message": "[IA64] clean up sn2 region definitions\n\nClean up some duplicate region definitions in sn2 code.\n\nSigned-off-by: Greg Edwards \u003cedwardsg@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "0a41e2501160587eb8f66cef3bdf1c6f2cb86997",
      "tree": "9f5b0288c3101344acd22f7e901fe909a8f98df6",
      "parents": [
        "0572e3da3ff5c3744b2f606ecf296d5f89a4bbdf"
      ],
      "author": {
        "name": "Peter Chubb",
        "email": "peterc@gelato.unsw.edu.au",
        "time": "Tue Aug 16 19:54:00 2005 -0700"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Wed Aug 24 15:35:41 2005 -0700"
      },
      "message": "[IA64] Rationalise Region Definitions\n\nCurrently, region numbers are defined in several files, with several \nnames.  For example, we have REGION_KERNEL in asm/page.h and \nRGN_KERNEL in pgtable.h \n \nWe also have address definitions that should depend on the \nRGN_XXX macros, but are currently just long constants. \n \nThe following patch reorganises all the definitions so that they have \nthe same form (RGN_XXX), are in one place, and that addresses that \ndepend on RGN_XXX are derived from them. \n\n(This is a necessary but not sufficient patch to allow UML-like \noperation on IA64). \n\nThanks to David Mosberger for catching the change I missed in mmu_context.h.\n \nSigned-off-by: Peter Chubb \u003cpeterc@gelato.unsw.edu.au\u003e \nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "3bf5ee95648c694bac4d13529563c230cd4fe5f2",
      "tree": "9430e6e4f4c3d586ecb7375cd780fd17694888c7",
      "parents": [
        "ee39b37b23da0b6ec53a8ebe90ff41c016f8ae27"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Tue Apr 19 13:29:16 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org.(none)",
        "time": "Tue Apr 19 13:29:16 2005 -0700"
      },
      "message": "[PATCH] freepgt: hugetlb_free_pgd_range\n\nia64 and ppc64 had hugetlb_free_pgtables functions which were no longer being\ncalled, and it wasn\u0027t obvious what to do about them.\n\nThe ppc64 case turns out to be easy: the associated tables are noted elsewhere\nand freed later, safe to either skip its hugetlb areas or go through the\nmotions of freeing nothing.  Since ia64 does need a special case, restore to\nppc64 the special case of skipping them.\n\nThe ia64 hugetlb case has been broken since pgd_addr_end went in, though it\nprobably appeared to work okay if you just had one such area; in fact it\u0027s\nbeen broken much longer if you consider a long munmap spanning from another\nregion into the hugetlb region.\n\nIn the ia64 hugetlb region, more virtual address bits are available than in\nthe other regions, yet the page tables are structured the same way: the page\nat the bottom is larger.  Here we need to scale down each addr before passing\nit to the standard free_pgd_range.  Was about to write a hugely_scaled_down\nmacro, but found htlbpage_to_page already exists for just this purpose.  Fixed\noff-by-one in ia64 is_hugepage_only_range.\n\nUninline free_pgd_range to make it available to ia64.  Make sure the\nvma-gathering loop in free_pgtables cannot join a hugepage_only_range to any\nother (safe to join huges?  probably but don\u0027t bother).\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}
