)]}'
{
  "log": [
    {
      "commit": "a8433137ea9143bb3a2bc18a3407b5a130fdb868",
      "tree": "ff40223bf542173015c070a988a4f3b0554f89ea",
      "parents": [
        "c1449c8fa40859eb269025a7db85b34115205f5b"
      ],
      "author": {
        "name": "Atsushi Nemoto",
        "email": "anemo@mba.ocn.ne.jp",
        "time": "Fri Feb 17 01:36:24 2006 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Tue Mar 21 13:27:45 2006 +0000"
      },
      "message": "[MIPS] Make I/O helpers more customizable\n    \n1. Move ioswab*() and __mem_ioswab*() to mangle-port.h.  This gets rid\n   of CONFIG_SGI_IP22 from include/asm-mips/io.h.\n    \n2. Pass a virtual address to *ioswab*().  Then we can provide\n   mach-specific *ioswab*() and can do every evil thing based on its\n   argument.  It could be useful on machines which have regions with\n   different endian conversion scheme.\n    \n3. Call __swizzle_addr*() _after_ adding mips_io_port_base.  This\n   unifies the meaning of the argument of __swizzle_addr*() (always\n   virtual address).  Then mach-specific __swizzle_addr*() can do every\n   evil thing based on the argument.\n    \nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "198e2f181163233b379dc7ce8a6d7516b84042e7",
      "tree": "cc4067ca1c81034ba8d214b7ff4c39f2f5be66ee",
      "parents": [
        "4dc7a0bbeb6882ad665e588e82fabe5bb4645f2f"
      ],
      "author": {
        "name": "akpm@osdl.org",
        "email": "akpm@osdl.org",
        "time": "Thu Jan 12 01:05:30 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Thu Jan 12 09:08:50 2006 -0800"
      },
      "message": "[PATCH] scheduler cache-hot-autodetect\n\n\r)\n\nFrom: Ingo Molnar \u003cmingo@elte.hu\u003e\n\nThis is the latest version of the scheduler cache-hot-auto-tune patch.\n\nThe first problem was that detection time scaled with O(N^2), which is\nunacceptable on larger SMP and NUMA systems. To solve this:\n\n- I\u0027ve added a \u0027domain distance\u0027 function, which is used to cache\n  measurement results. Each distance is only measured once. This means\n  that e.g. on NUMA distances of 0, 1 and 2 might be measured, on HT\n  distances 0 and 1, and on SMP distance 0 is measured. The code walks\n  the domain tree to determine the distance, so it automatically follows\n  whatever hierarchy an architecture sets up. This cuts down on the boot\n  time significantly and removes the O(N^2) limit. The only assumption\n  is that migration costs can be expressed as a function of domain\n  distance - this covers the overwhelming majority of existing systems,\n  and is a good guess even for more assymetric systems.\n\n  [ People hacking systems that have assymetries that break this\n    assumption (e.g. different CPU speeds) should experiment a bit with\n    the cpu_distance() function. Adding a -\u003emigration_distance factor to\n    the domain structure would be one possible solution - but lets first\n    see the problem systems, if they exist at all. Lets not overdesign. ]\n\nAnother problem was that only a single cache-size was used for measuring\nthe cost of migration, and most architectures didnt set that variable\nup. Furthermore, a single cache-size does not fit NUMA hierarchies with\nL3 caches and does not fit HT setups, where different CPUs will often\nhave different \u0027effective cache sizes\u0027. To solve this problem:\n\n- Instead of relying on a single cache-size provided by the platform and\n  sticking to it, the code now auto-detects the \u0027effective migration\n  cost\u0027 between two measured CPUs, via iterating through a wide range of\n  cachesizes. The code searches for the maximum migration cost, which\n  occurs when the working set of the test-workload falls just below the\n  \u0027effective cache size\u0027. I.e. real-life optimized search is done for\n  the maximum migration cost, between two real CPUs.\n\n  This, amongst other things, has the positive effect hat if e.g. two\n  CPUs share a L2/L3 cache, a different (and accurate) migration cost\n  will be found than between two CPUs on the same system that dont share\n  any caches.\n\n(The reliable measurement of migration costs is tricky - see the source\nfor details.)\n\nFurthermore i\u0027ve added various boot-time options to override/tune\nmigration behavior.\n\nFirstly, there\u0027s a blanket override for autodetection:\n\n\tmigration_cost\u003d1000,2000,3000\n\nwill override the depth 0/1/2 values with 1msec/2msec/3msec values.\n\nSecondly, there\u0027s a global factor that can be used to increase (or\ndecrease) the autodetected values:\n\n\tmigration_factor\u003d120\n\nwill increase the autodetected values by 20%. This option is useful to\ntune things in a workload-dependent way - e.g. if a workload is\ncache-insensitive then CPU utilization can be maximized by specifying\nmigration_factor\u003d0.\n\nI\u0027ve tested the autodetection code quite extensively on x86, on 3\nP3/Xeon/2MB, and the autodetected values look pretty good:\n\nDual Celeron (128K L2 cache):\n\n ---------------------\n migration cost matrix (max_cache_size: 131072, cpu: 467 MHz):\n ---------------------\n           [00]    [01]\n [00]:     -     1.7(1)\n [01]:   1.7(1)    -\n ---------------------\n cacheflush times [2]: 0.0 (0) 1.7 (1784008)\n ---------------------\n\nHere the slow memory subsystem dominates system performance, and even\nthough caches are small, the migration cost is 1.7 msecs.\n\nDual HT P4 (512K L2 cache):\n\n ---------------------\n migration cost matrix (max_cache_size: 524288, cpu: 2379 MHz):\n ---------------------\n           [00]    [01]    [02]    [03]\n [00]:     -     0.4(1)  0.0(0)  0.4(1)\n [01]:   0.4(1)    -     0.4(1)  0.0(0)\n [02]:   0.0(0)  0.4(1)    -     0.4(1)\n [03]:   0.4(1)  0.0(0)  0.4(1)    -\n ---------------------\n cacheflush times [2]: 0.0 (33900) 0.4 (448514)\n ---------------------\n\nHere it can be seen that there is no migration cost between two HT\nsiblings (CPU#0/2 and CPU#1/3 are separate physical CPUs). A fast memory\nsystem makes inter-physical-CPU migration pretty cheap: 0.4 msecs.\n\n8-way P3/Xeon [2MB L2 cache]:\n\n ---------------------\n migration cost matrix (max_cache_size: 2097152, cpu: 700 MHz):\n ---------------------\n           [00]    [01]    [02]    [03]    [04]    [05]    [06]    [07]\n [00]:     -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [01]:  19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [02]:  19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [03]:  19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1) 19.2(1)\n [04]:  19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1) 19.2(1)\n [05]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1) 19.2(1)\n [06]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -    19.2(1)\n [07]:  19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1)    -\n ---------------------\n cacheflush times [2]: 0.0 (0) 19.2 (19281756)\n ---------------------\n\nThis one has huge caches and a relatively slow memory subsystem - so the\nmigration cost is 19 msecs.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nCc: \u003cwilder@us.ibm.com\u003e\nSigned-off-by: John Hawkes \u003chawkes@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "b4672d37293cb045ec4d57e8b76a62810c96da71",
      "tree": "21ba827850d7bc7c36d7009575b979d12b35227c",
      "parents": [
        "e7958bb90d57f0da073cbd031a1808de51d1de15"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Dec 08 14:04:24 2005 +0000"
      },
      "committer": {
        "name": "",
        "email": "ralf@denk.linux-mips.net",
        "time": "Tue Jan 10 13:39:06 2006 +0000"
      },
      "message": "MIPS: Introduce machinery for testing for MIPSxxR1/2.\n    \nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "0015365cc68a5b6ad22dfdac19580aa9530731c3",
      "tree": "335f10463bf177ff114227b1ed010343f29f9699",
      "parents": [
        "c78cbf49c4edf2f9ca9e56d4b87a5d6ef08b7fed"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 01 00:00:00 2005 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 29 19:32:30 2005 +0100"
      },
      "message": "Fix ARCH_KMALLOC_MINALIGN values on MIPS\n    \nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "9dbdfce85c165faa45509ca3b18deaa5f9dfbc12",
      "tree": "9e000f50f4a7483210b4f0df48de6918e1511dc6",
      "parents": [
        "26a940e21752e0de8f068f77dad606a7d1986937"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 15 08:52:34 2005 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 29 19:32:21 2005 +0100"
      },
      "message": "Define pcibus_to_node() for IP27.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "7e35952baa9d7424dfb95ca8aff7239a1f6ec011",
      "tree": "6412561c7dddfcc903491be1d6bb784646e2e3a6",
      "parents": [
        "a0c3a5b5a84df11cf6a44fc04cb6f7c0525123a8"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Jul 14 09:42:32 2005 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 29 19:31:52 2005 +0100"
      },
      "message": "Move Origin crapola into a machine-specific header file.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f",
      "tree": "1928e8b0a4b7fb615e5a9f65dc934ba2e74cb9cd",
      "parents": [
        "10f650db1bcc193ea07d4f8c2f07315da38ea0c4"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Tue May 31 11:49:19 2005 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 29 19:31:17 2005 +0100"
      },
      "message": "Support the MIPS32 / MIPS64 DSP ASE.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "7c2740f1c1a7ff2767a92042f39edad7fad95c92",
      "tree": "3401fe3986258b7f5377f732ccac1b2f35e50583",
      "parents": [
        "4f12bfe5a498747a9a66f135a67aa8e1caa819dc"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 21 19:35:53 2005 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 29 19:30:59 2005 +0100"
      },
      "message": "HUB interrupts are allocated per node, not per slice.  Make\nmanipulation of the interrupt mask register atomic by disabling\ninterrupts.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "1f82bdb11ba141b3a1d37ac8c307686d56544cfe",
      "tree": "168051db3e2ae039644f8d564d017f175ba065ab",
      "parents": [
        "c4ed38a0c6e2e5c4906296758f816ee71373792f"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Feb 21 19:50:31 2005 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Oct 29 19:30:42 2005 +0100"
      },
      "message": "Define MAP_BASE for IP27\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}