)]}'
{
  "log": [
    {
      "commit": "314981ac7177a933319e3c071a5cf0a579205e6e",
      "tree": "11895da391ba91195d6d7a67debaa32a28c1215e",
      "parents": [
        "936f482af1743141d637483ec10eb881537c26dc"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Sun Feb 05 21:59:03 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Mon Mar 20 01:11:49 2006 -0800"
      },
      "message": "[SPARC64]: Kill all %pstate changes in context switch code.\n\nThey are totally unnecessary because:\n\n1) Interrupts are already disabled when switch_to()\n   runs.\n\n2) We don\u0027t use hard-coded alternate globals any longer.\n\nThis found a case in rtrap, which still assumed alternate\nglobal %g6 was current_thread_info(), and that is fixed\nby this changeset as well.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "56fb4df6da76c35dca22036174e2d1edef83ff1f",
      "tree": "b39f152ec9ed682edceca965a85680fd4bf736a7",
      "parents": [
        "3c936465249f863f322154ff1aaa628b84ee5750"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Sun Feb 26 23:24:22 2006 -0800"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@sunset.davemloft.net",
        "time": "Mon Mar 20 01:11:16 2006 -0800"
      },
      "message": "[SPARC64]: Elminate all usage of hard-coded trap globals.\n\nUltraSPARC has special sets of global registers which are switched to\nfor certain trap types.  There is one set for MMU related traps, one\nset of Interrupt Vector processing, and another set (called the\nAlternate globals) for all other trap types.\n\nFor what seems like forever we\u0027ve hard coded the values in some of\nthese trap registers.  Some examples include:\n\n1) Interrupt Vector global %g6 holds current processors interrupt\n   work struct where received interrupts are managed for IRQ handler\n   dispatch.\n\n2) MMU global %g7 holds the base of the page tables of the currently\n   active address space.\n\n3) Alternate global %g6 held the current_thread_info() value.\n\nSuch hardcoding has resulted in some serious issues in many areas.\nThere are some code sequences where having another register available\nwould help clean up the implementation.  Taking traps such as\ncross-calls from the OBP firmware requires some trick code sequences\nwherein we have to save away and restore all of the special sets of\nglobal registers when we enter/exit OBP.\n\nWe were also using the IMMU TSB register on SMP to hold the per-cpu\narea base address, which doesn\u0027t work any longer now that we actually\nuse the TSB facility of the cpu.\n\nThe implementation is pretty straight forward.  One tricky bit is\ngetting the current processor ID as that is different on different cpu\nvariants.  We use a stub with a fancy calling convention which we\npatch at boot time.  The calling convention is that the stub is\nbranched to and the (PC - 4) to return to is in register %g1.  The cpu\nnumber is left in %g6.  This stub can be invoked by using the\n__GET_CPUID macro.\n\nWe use an array of per-cpu trap state to store the current thread and\nphysical address of the current address space\u0027s page tables.  The\nTRAP_LOAD_THREAD_REG loads %g6 with the current thread from this\ntable, it uses __GET_CPUID and also clobbers %g1.\n\nTRAP_LOAD_IRQ_WORK is used by the interrupt vector processing to load\nthe current processor\u0027s IRQ software state into %g6.  It also uses\n__GET_CPUID and clobbers %g1.\n\nFinally, TRAP_LOAD_PGD_PHYS loads the physical address base of the\ncurrent address space\u0027s page tables into %g7, it clobbers %g1 and uses\n__GET_CPUID.\n\nMany refinements are possible, as well as some tuning, with this stuff\nin place.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "f3169641c12d2c5abdab863f5393a3f3534788dd",
      "tree": "a455f38f7ac748c3e334d1105d16a0f94a4c0e57",
      "parents": [
        "65e0fdffc977e69a8f1f26d4bf8ba30984db7e44"
      ],
      "author": {
        "name": "Al Viro",
        "email": "viro@ftp.linux.org.uk",
        "time": "Thu Jan 12 01:05:42 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Thu Jan 12 09:08:52 2006 -0800"
      },
      "message": "[PATCH] sparc64: task_thread_info()\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "4dc7a0bbeb6882ad665e588e82fabe5bb4645f2f",
      "tree": "8c034f802157d7f449e76f45086c0e13e0ea4711",
      "parents": [
        "c6b44d10f25e5a93eca5135b686a35775c63546e"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Jan 12 01:05:27 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Thu Jan 12 09:08:49 2006 -0800"
      },
      "message": "[PATCH] sched: add cacheflush() asm\n\nAdd per-arch sched_cacheflush() which is a write-back cacheflush used by\nthe migration-cost calibration code at bootup time.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "a1365647022eb05a5993f270a78e9bef3bf554eb",
      "tree": "6dbcab4db80b7d07fdaec88c003743d1f6e1a289",
      "parents": [
        "fd285bb54d8a3e99810090ae88cfe8ed77d1da25"
      ],
      "author": {
        "name": "Andrew Morton",
        "email": "akpm@osdl.org",
        "time": "Sun Jan 08 01:04:09 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sun Jan 08 20:14:02 2006 -0800"
      },
      "message": "[PATCH] remove gcc-2 checks\n\nRemove various things which were checking for gcc-1.x and gcc-2.x compilers.\n\nFrom: Adrian Bunk \u003cbunk@stusta.de\u003e\n\n    Some documentation updates and removes some code paths for gcc \u003c 3.2.\n\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "4d803fcdcd97dd346d4b39c3b76e5879cead8a31",
      "tree": "f30c8caa998261fc0983121021184f0f6cc555b4",
      "parents": [
        "1b11d78cf87a7014f96e5b7fa2e1233cc8081a00"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Thu Sep 08 14:37:53 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Thu Sep 08 14:37:53 2005 -0700"
      },
      "message": "[SPARC64]: Inline membar()\u0027s again.\n\nSince GCC has to emit a call and a delay slot to the\nout-of-line \"membar\" routines in arch/sparc64/lib/mb.S\nit is much better to just do the necessary predicted\nbranch inline instead as:\n\n\tba,pt\t%xcc, 1f\n\t membar\t#whatever\n1:\n\ninstead of the current:\n\n\tcall\tmembar_foo\n\t dslot\n\nbecause this way GCC is not required to allocate a stack\nframe if the function can be a leaf function.\n\nThis also makes this bug fix easier to backport to 2.4.x\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "4f07118f656c179740cad35b827032e2e29b1210",
      "tree": "7ddeb17346fe25ae75aa5373659c053afb9ef5f5",
      "parents": [
        "442464a50077ff00454ff8d7628cbe1b8eacc034"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Aug 29 12:46:22 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Mon Aug 29 12:46:22 2005 -0700"
      },
      "message": "[SPARC64]: More fully work around Spitfire Errata 51.\n\nIt appears that a memory barrier soon after a mispredicted\nbranch, not just in the delay slot, can cause the hang\ncondition of this cpu errata.\n\nSo move them out-of-line, and explicitly put them into\na \"branch always, predict taken\" delay slot which should\nfully kill this problem.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "db7d9a4eb700be766cc9f29241483dbb1e748832",
      "tree": "48848384df15d9404ceab05867d7f4ef6b1a4bbe",
      "parents": [
        "cdd5186f753b23ab51f86679bdc4cc698ab0b893"
      ],
      "author": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Sun Jul 24 19:36:26 2005 -0700"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Sun Jul 24 19:36:26 2005 -0700"
      },
      "message": "[SPARC64]: Move syscall success and newchild state out of thread flags.\n\nThese two bits were accesses non-atomically from assembler\ncode.  So, in order to eliminate any potential races resulting\nfrom that, move these pieces of state into two bytes elsewhere\nin struct thread_info.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    },
    {
      "commit": "4866cde064afbb6c2a488c265e696879de616daa",
      "tree": "6effad1ab6271129fc607b98273086409876563a",
      "parents": [
        "48c08d3f8ff94fa118187e4d8d4a5707bb85e59d"
      ],
      "author": {
        "name": "Nick Piggin",
        "email": "nickpiggin@yahoo.com.au",
        "time": "Sat Jun 25 14:57:23 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Jun 25 16:24:43 2005 -0700"
      },
      "message": "[PATCH] sched: cleanup context switch locking\n\nInstead of requiring architecture code to interact with the scheduler\u0027s\nlocking implementation, provide a couple of defines that can be used by the\narchitecture to request runqueue unlocked context switches, and ask for\ninterrupts to be enabled over the context switch.\n\nAlso replaces the \"switch_lock\" used by these architectures with an oncpu\nflag (note, not a potentially slow bitflag).  This eliminates one bus\nlocked memory operation when context switching, and simplifies the\ntask_running function.\n\nSigned-off-by: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}