)]}' { "log": [ { "commit": "d8fe3f19203b1f5070358aaa292d33295258b448", "tree": "17710efc27ea3392d63ea22e3519f34762583d20", "parents": [ "6b426e785cb81e53dc2fc4dcf997661472b470ef" ], "author": { "name": "OGAWA Hirofumi", "email": "hirofumi@mail.parknet.co.jp", "time": "Mon Apr 24 13:48:51 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Apr 24 13:48:51 2006 -0700" }, "message": "[SPARC]: __NR_sys removal\n\n__NR_sys_sync_file_range part was lost somewhere...\n[glibc is already checking __NR_sync_file_range]\n\nSigned-off-by: OGAWA Hirofumi \u003chirofumi@mail.parknet.co.jp\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2784f40e2774b61d68d232bcf92a9484e99f22b8", "tree": "de58cdd0ba836356584dd15179ffc1f1bb2bc874", "parents": [ "52824b6b5fa0533e2b2adc9df396d0e9ff6fb02a" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Apr 19 15:00:01 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Apr 19 15:00:01 2006 -0700" }, "message": "[SPARC]: __NR_sys_splice --\u003e __NR_splice\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5fdef394953d8660c70cc27b27db421582c42bf9", "tree": "06ceb455929f2cc112d5d7d0ffa08aa3aeb73a4e", "parents": [ "f043ca43c1ae354346f72dc5826d820d5619f0b2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Apr 14 15:29:32 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Apr 14 15:29:32 2006 -0700" }, "message": "[SPARC]: Hook up sys_tee() into syscall tables.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a283a52520569195c2d26d75455cddab758f530b", "tree": "3ea10360b06dad909dc5b9e48b7236bcf23f3fab", "parents": [ "fff8efe7b71efd88829782be64dc42c25c70ad53" ], "author": { "name": "KAMEZAWA Hiroyuki", "email": "kamezawa.hiroyu@jp.fujitsu.com", "time": "Mon Apr 10 22:52:52 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Apr 11 06:18:31 2006 -0700" }, "message": "[PATCH] for_each_possible_cpu: sparc64\n\nfor_each_cpu() actually iterates across all possible CPUs. We\u0027ve had mistakes\nin the past where people were using for_each_cpu() where they should have been\niterating across only online or present CPUs. This is inefficient and\npossibly buggy.\n\nWe\u0027re renaming for_each_cpu() to for_each_possible_cpu() to avoid this in the\nfuture.\n\nThis patch replaces for_each_cpu with for_each_possible_cpu.\nfor sparc64.\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nAcked-by: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "289eee6fa78e999208120c856ef3ae5a817fd59c", "tree": "eadce5571447bf91d3e274464c57605f73c3b3ee", "parents": [ "1339713a327d4538ca9173ab70afef9a1d57fd07" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 31 23:49:34 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 31 23:49:34 2006 -0800" }, "message": "[SPARC]: Wire up sys_sync_file_range() into syscall tables.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1339713a327d4538ca9173ab70afef9a1d57fd07", "tree": "dfa28366c6e2b5bcf044519947d530b7d97f8986", "parents": [ "3cc1cc444f4c058deae9d5113ebb80e798c3076e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 31 02:04:15 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 31 23:03:38 2006 -0800" }, "message": "[SPARC]: Wire up sys_splice() into the syscall tables.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "78cd9e04e0acea4f622e84ca0c760c7eae0c6854", "tree": "6df4f07bfa77f8115e4250a14be76c04a2b5dc3e", "parents": [ "ec7e15d6486e9d1da1c2f344b670b8388ba7019b", "6e57a3a89785692bd8d012d80f5ee210ab8e0b68" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Mar 28 09:25:22 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Mar 28 09:25:22 2006 -0800" }, "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6\n\n* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:\n [SPARC64]: Implement futex_atomic_cmpxchg_inatomic().\n" }, { "commit": "7f927fcc2fd1575d01efb4b76665975007945690", "tree": "fbb84689600ea512d7b52f9fc46db2d7d8d7c1fd", "parents": [ "ded23ac62776b4360d88e9b0330792d2c57fdfdf" ], "author": { "name": "Alexey Dobriyan", "email": "adobriyan@gmail.com", "time": "Tue Mar 28 01:56:53 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Mar 28 09:16:08 2006 -0800" }, "message": "[PATCH] Typo fixes\n\nFix a lot of typos. Eyeballed by jmc@ in OpenBSD.\n\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "6e57a3a89785692bd8d012d80f5ee210ab8e0b68", "tree": "d55008a8c891193b1858487e1177a44f6add06fd", "parents": [ "329b10bb0feacb7fb9a41389313ff0a51ae56f2a" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 01:00:08 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Mar 28 01:00:08 2006 -0800" }, "message": "[SPARC64]: Implement futex_atomic_cmpxchg_inatomic().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e041c683412d5bf44dc2b109053e3b837b71742d", "tree": "9d271066ef379da0c0fb3b8cb4137abd5d2ebba0", "parents": [ "76b81e2b0e2241accebcc68e126bc5ab958661b9" ], "author": { "name": "Alan Stern", "email": "stern@rowland.harvard.edu", "time": "Mon Mar 27 01:16:30 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 27 08:44:50 2006 -0800" }, "message": "[PATCH] Notifier chain update: API changes\n\nThe kernel\u0027s implementation of notifier chains is unsafe. There is no\nprotection against entries being added to or removed from a chain while the\nchain is in use. The issues were discussed in this thread:\n\n http://marc.theaimsgroup.com/?l\u003dlinux-kernel\u0026m\u003d113018709002036\u0026w\u003d2\n\nWe noticed that notifier chains in the kernel fall into two basic usage\nclasses:\n\n\t\"Blocking\" chains are always called from a process context\n\tand the callout routines are allowed to sleep;\n\n\t\"Atomic\" chains can be called from an atomic context and\n\tthe callout routines are not allowed to sleep.\n\nWe decided to codify this distinction and make it part of the API. Therefore\nthis set of patches introduces three new, parallel APIs: one for blocking\nnotifiers, one for atomic notifiers, and one for \"raw\" notifiers (which is\nreally just the old API under a new name). New kinds of data structures are\nused for the heads of the chains, and new routines are defined for\nregistration, unregistration, and calling a chain. The three APIs are\nexplained in include/linux/notifier.h and their implementation is in\nkernel/sys.c.\n\nWith atomic and blocking chains, the implementation guarantees that the chain\nlinks will not be corrupted and that chain callers will not get messed up by\nentries being added or removed. For raw chains the implementation provides no\nguarantees at all; users of this API must provide their own protections. (The\nidea was that situations may come up where the assumptions of the atomic and\nblocking APIs are not appropriate, so it should be possible for users to\nhandle these things in their own way.)\n\nThere are some limitations, which should not be too hard to live with. For\natomic/blocking chains, registration and unregistration must always be done in\na process context since the chain is protected by a mutex/rwsem. Also, a\ncallout routine for a non-raw chain must not try to register or unregister\nentries on its own chain. (This did happen in a couple of places and the code\nhad to be changed to avoid it.)\n\nSince atomic chains may be called from within an NMI handler, they cannot use\nspinlocks for synchronization. Instead we use RCU. The overhead falls almost\nentirely in the unregister routine, which is okay since unregistration is much\nless frequent that calling a chain.\n\nHere is the list of chains that we adjusted and their classifications. None\nof them use the raw API, so for the moment it is only a placeholder.\n\n ATOMIC CHAINS\n -------------\narch/i386/kernel/traps.c:\t\ti386die_chain\narch/ia64/kernel/traps.c:\t\tia64die_chain\narch/powerpc/kernel/traps.c:\t\tpowerpc_die_chain\narch/sparc64/kernel/traps.c:\t\tsparc64die_chain\narch/x86_64/kernel/traps.c:\t\tdie_chain\ndrivers/char/ipmi/ipmi_si_intf.c:\txaction_notifier_list\nkernel/panic.c:\t\t\t\tpanic_notifier_list\nkernel/profile.c:\t\t\ttask_free_notifier\nnet/bluetooth/hci_core.c:\t\thci_notifier\nnet/ipv4/netfilter/ip_conntrack_core.c:\tip_conntrack_chain\nnet/ipv4/netfilter/ip_conntrack_core.c:\tip_conntrack_expect_chain\nnet/ipv6/addrconf.c:\t\t\tinet6addr_chain\nnet/netfilter/nf_conntrack_core.c:\tnf_conntrack_chain\nnet/netfilter/nf_conntrack_core.c:\tnf_conntrack_expect_chain\nnet/netlink/af_netlink.c:\t\tnetlink_chain\n\n BLOCKING CHAINS\n ---------------\narch/powerpc/platforms/pseries/reconfig.c:\tpSeries_reconfig_chain\narch/s390/kernel/process.c:\t\tidle_chain\narch/x86_64/kernel/process.c\t\tidle_notifier\ndrivers/base/memory.c:\t\t\tmemory_chain\ndrivers/cpufreq/cpufreq.c\t\tcpufreq_policy_notifier_list\ndrivers/cpufreq/cpufreq.c\t\tcpufreq_transition_notifier_list\ndrivers/macintosh/adb.c:\t\tadb_client_list\ndrivers/macintosh/via-pmu.c\t\tsleep_notifier_list\ndrivers/macintosh/via-pmu68k.c\t\tsleep_notifier_list\ndrivers/macintosh/windfarm_core.c\twf_client_list\ndrivers/usb/core/notify.c\t\tusb_notifier_list\ndrivers/video/fbmem.c\t\t\tfb_notifier_list\nkernel/cpu.c\t\t\t\tcpu_chain\nkernel/module.c\t\t\t\tmodule_notify_list\nkernel/profile.c\t\t\tmunmap_notifier\nkernel/profile.c\t\t\ttask_exit_notifier\nkernel/sys.c\t\t\t\treboot_notifier_list\nnet/core/dev.c\t\t\t\tnetdev_chain\nnet/decnet/dn_dev.c:\t\t\tdnaddr_chain\nnet/ipv4/devinet.c:\t\t\tinetaddr_chain\n\nIt\u0027s possible that some of these classifications are wrong. If they are,\nplease let us know or submit a patch to fix them. Note that any chain that\ngets called very frequently should be atomic, because the rwsem read-locking\nused for blocking chains is very likely to incur cache misses on SMP systems.\n(However, if the chain\u0027s callout routines may sleep then the chain cannot be\natomic.)\n\nThe patch set was written by Alan Stern and Chandra Seetharaman, incorporating\nmaterial written by Keith Owens and suggestions from Paul McKenney and Andrew\nMorton.\n\n[jes@sgi.com: restructure the notifier chain initialization macros]\nSigned-off-by: Alan Stern \u003cstern@rowland.harvard.edu\u003e\nSigned-off-by: Chandra Seetharaman \u003csekharan@us.ibm.com\u003e\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "e9056f13bfcdd054a0c3d730e4e096748d8a363a", "tree": "876d70d99cb679f7c4cbf6609d6341cadfb5c57e", "parents": [ "62ac285f3c701f0457a15fe01baa64a965c4f5f1" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Mar 27 01:16:21 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 27 08:44:49 2006 -0800" }, "message": "[PATCH] lightweight robust futexes: arch defaults\n\nThis patchset provides a new (written from scratch) implementation of robust\nfutexes, called \"lightweight robust futexes\". We believe this new\nimplementation is faster and simpler than the vma-based robust futex solutions\npresented before, and we\u0027d like this patchset to be adopted in the upstream\nkernel. This is version 1 of the patchset.\n\n Background\n ----------\n\nWhat are robust futexes? To answer that, we first need to understand what\nfutexes are: normal futexes are special types of locks that in the\nnoncontended case can be acquired/released from userspace without having to\nenter the kernel.\n\nA futex is in essence a user-space address, e.g. a 32-bit lock variable\nfield. If userspace notices contention (the lock is already owned and someone\nelse wants to grab it too) then the lock is marked with a value that says\n\"there\u0027s a waiter pending\", and the sys_futex(FUTEX_WAIT) syscall is used to\nwait for the other guy to release it. The kernel creates a \u0027futex queue\u0027\ninternally, so that it can later on match up the waiter with the waker -\nwithout them having to know about each other. When the owner thread releases\nthe futex, it notices (via the variable value) that there were waiter(s)\npending, and does the sys_futex(FUTEX_WAKE) syscall to wake them up. Once all\nwaiters have taken and released the lock, the futex is again back to\n\u0027uncontended\u0027 state, and there\u0027s no in-kernel state associated with it. The\nkernel completely forgets that there ever was a futex at that address. This\nmethod makes futexes very lightweight and scalable.\n\n\"Robustness\" is about dealing with crashes while holding a lock: if a process\nexits prematurely while holding a pthread_mutex_t lock that is also shared\nwith some other process (e.g. yum segfaults while holding a pthread_mutex_t,\nor yum is kill -9-ed), then waiters for that lock need to be notified that the\nlast owner of the lock exited in some irregular way.\n\nTo solve such types of problems, \"robust mutex\" userspace APIs were created:\npthread_mutex_lock() returns an error value if the owner exits prematurely -\nand the new owner can decide whether the data protected by the lock can be\nrecovered safely.\n\nThere is a big conceptual problem with futex based mutexes though: it is the\nkernel that destroys the owner task (e.g. due to a SEGFAULT), but the kernel\ncannot help with the cleanup: if there is no \u0027futex queue\u0027 (and in most cases\nthere is none, futexes being fast lightweight locks) then the kernel has no\ninformation to clean up after the held lock! Userspace has no chance to clean\nup after the lock either - userspace is the one that crashes, so it has no\nopportunity to clean up. Catch-22.\n\nIn practice, when e.g. yum is kill -9-ed (or segfaults), a system reboot is\nneeded to release that futex based lock. This is one of the leading\nbugreports against yum.\n\nTo solve this problem, \u0027Robust Futex\u0027 patches were created and presented on\nlkml: the one written by Todd Kneisel and David Singleton is the most advanced\nat the moment. These patches all tried to extend the futex abstraction by\nregistering futex-based locks in the kernel - and thus give the kernel a\nchance to clean up.\n\nE.g. in David Singleton\u0027s robust-futex-6.patch, there are 3 new syscall\nvariants to sys_futex(): FUTEX_REGISTER, FUTEX_DEREGISTER and FUTEX_RECOVER.\nThe kernel attaches such robust futexes to vmas (via\nvma-\u003evm_file-\u003ef_mapping-\u003erobust_head), and at do_exit() time, all vmas are\nsearched to see whether they have a robust_head set.\n\nLots of work went into the vma-based robust-futex patch, and recently it has\nimproved significantly, but unfortunately it still has two fundamental\nproblems left:\n\n - they have quite complex locking and race scenarios. The vma-based\n patches had been pending for years, but they are still not completely\n reliable.\n\n - they have to scan _every_ vma at sys_exit() time, per thread!\n\nThe second disadvantage is a real killer: pthread_exit() takes around 1\nmicrosecond on Linux, but with thousands (or tens of thousands) of vmas every\npthread_exit() takes a millisecond or more, also totally destroying the CPU\u0027s\nL1 and L2 caches!\n\nThis is very much noticeable even for normal process sys_exit_group() calls:\nthe kernel has to do the vma scanning unconditionally! (this is because the\nkernel has no knowledge about how many robust futexes there are to be cleaned\nup, because a robust futex might have been registered in another task, and the\nfutex variable might have been simply mmap()-ed into this process\u0027s address\nspace).\n\nThis huge overhead forced the creation of CONFIG_FUTEX_ROBUST, but worse than\nthat: the overhead makes robust futexes impractical for any type of generic\nLinux distribution.\n\nSo it became clear to us, something had to be done. Last week, when Thomas\nGleixner tried to fix up the vma-based robust futex patch in the -rt tree, he\nfound a handful of new races and we were talking about it and were analyzing\nthe situation. At that point a fundamentally different solution occured to\nme. This patchset (written in the past couple of days) implements that new\nsolution. Be warned though - the patchset does things we normally dont do in\nLinux, so some might find the approach disturbing. Parental advice\nrecommended ;-)\n\n New approach to robust futexes\n ------------------------------\n\nAt the heart of this new approach there is a per-thread private list of robust\nlocks that userspace is holding (maintained by glibc) - which userspace list\nis registered with the kernel via a new syscall [this registration happens at\nmost once per thread lifetime]. At do_exit() time, the kernel checks this\nuser-space list: are there any robust futex locks to be cleaned up?\n\nIn the common case, at do_exit() time, there is no list registered, so the\ncost of robust futexes is just a simple current-\u003erobust_list !\u003d NULL\ncomparison. If the thread has registered a list, then normally the list is\nempty. If the thread/process crashed or terminated in some incorrect way then\nthe list might be non-empty: in this case the kernel carefully walks the list\n[not trusting it], and marks all locks that are owned by this thread with the\nFUTEX_OWNER_DEAD bit, and wakes up one waiter (if any).\n\nThe list is guaranteed to be private and per-thread, so it\u0027s lockless. There\nis one race possible though: since adding to and removing from the list is\ndone after the futex is acquired by glibc, there is a few instructions window\nfor the thread (or process) to die there, leaving the futex hung. To protect\nagainst this possibility, userspace (glibc) also maintains a simple per-thread\n\u0027list_op_pending\u0027 field, to allow the kernel to clean up if the thread dies\nafter acquiring the lock, but just before it could have added itself to the\nlist. Glibc sets this list_op_pending field before it tries to acquire the\nfutex, and clears it after the list-add (or list-remove) has finished.\n\nThat\u0027s all that is needed - all the rest of robust-futex cleanup is done in\nuserspace [just like with the previous patches].\n\nUlrich Drepper has implemented the necessary glibc support for this new\nmechanism, which fully enables robust mutexes. (Ulrich plans to commit these\nchanges to glibc-HEAD later today.)\n\nKey differences of this userspace-list based approach, compared to the vma\nbased method:\n\n - it\u0027s much, much faster: at thread exit time, there\u0027s no need to loop\n over every vma (!), which the VM-based method has to do. Only a very\n simple \u0027is the list empty\u0027 op is done.\n\n - no VM changes are needed - \u0027struct address_space\u0027 is left alone.\n\n - no registration of individual locks is needed: robust mutexes dont need\n any extra per-lock syscalls. Robust mutexes thus become a very lightweight\n primitive - so they dont force the application designer to do a hard choice\n between performance and robustness - robust mutexes are just as fast.\n\n - no per-lock kernel allocation happens.\n\n - no resource limits are needed.\n\n - no kernel-space recovery call (FUTEX_RECOVER) is needed.\n\n - the implementation and the locking is \"obvious\", and there are no\n interactions with the VM.\n\n Performance\n -----------\n\nI have benchmarked the time needed for the kernel to process a list of 1\nmillion (!) held locks, using the new method [on a 2GHz CPU]:\n\n - with FUTEX_WAIT set [contended mutex]: 130 msecs\n - without FUTEX_WAIT set [uncontended mutex]: 30 msecs\n\nI have also measured an approach where glibc does the lock notification [which\nit currently does for !pshared robust mutexes], and that took 256 msecs -\nclearly slower, due to the 1 million FUTEX_WAKE syscalls userspace had to do.\n\n(1 million held locks are unheard of - we expect at most a handful of locks to\nbe held at a time. Nevertheless it\u0027s nice to know that this approach scales\nnicely.)\n\n Implementation details\n ----------------------\n\nThe patch adds two new syscalls: one to register the userspace list, and one\nto query the registered list pointer:\n\n asmlinkage long\n sys_set_robust_list(struct robust_list_head __user *head,\n size_t len);\n\n asmlinkage long\n sys_get_robust_list(int pid, struct robust_list_head __user **head_ptr,\n size_t __user *len_ptr);\n\nList registration is very fast: the pointer is simply stored in\ncurrent-\u003erobust_list. [Note that in the future, if robust futexes become\nwidespread, we could extend sys_clone() to register a robust-list head for new\nthreads, without the need of another syscall.]\n\nSo there is virtually zero overhead for tasks not using robust futexes, and\neven for robust futex users, there is only one extra syscall per thread\nlifetime, and the cleanup operation, if it happens, is fast and\nstraightforward. The kernel doesnt have any internal distinction between\nrobust and normal futexes.\n\nIf a futex is found to be held at exit time, the kernel sets the highest bit\nof the futex word:\n\n\t#define FUTEX_OWNER_DIED 0x40000000\n\nand wakes up the next futex waiter (if any). User-space does the rest of\nthe cleanup.\n\nOtherwise, robust futexes are acquired by glibc by putting the TID into the\nfutex field atomically. Waiters set the FUTEX_WAITERS bit:\n\n\t#define FUTEX_WAITERS 0x80000000\n\nand the remaining bits are for the TID.\n\n Testing, architecture support\n -----------------------------\n\nI\u0027ve tested the new syscalls on x86 and x86_64, and have made sure the parsing\nof the userspace list is robust [ ;-) ] even if the list is deliberately\ncorrupted.\n\ni386 and x86_64 syscalls are wired up at the moment, and Ulrich has tested the\nnew glibc code (on x86_64 and i386), and it works for his robust-mutex\ntestcases.\n\nAll other architectures should build just fine too - but they wont have the\nnew syscalls yet.\n\nArchitectures need to implement the new futex_atomic_cmpxchg_inuser() inline\nfunction before writing up the syscalls (that function returns -ENOSYS right\nnow).\n\nThis patch:\n\nAdd placeholder futex_atomic_cmpxchg_inuser() implementations to every\narchitecture that supports futexes. It returns -ENOSYS.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Arjan van de Ven \u003carjan@infradead.org\u003e\nAcked-by: Ulrich Drepper \u003cdrepper@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a117e66ed45ac0569c039ea60bd7a9a61e031858", "tree": "292367ab930f83c418c34d4c46f95717e5e6394e", "parents": [ "b06be912a3ad68c69dba0ed6e92723140020e392" ], "author": { "name": "KAMEZAWA Hiroyuki", "email": "kamezawa.hiroyu@jp.fujitsu.com", "time": "Mon Mar 27 01:15:25 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 27 08:44:44 2006 -0800" }, "message": "[PATCH] unify pfn_to_page: generic functions\n\nThere are 3 memory models, FLATMEM, DISCONTIGMEM, SPARSEMEM.\nEach arch has its own page_to_pfn(), pfn_to_page() for each models.\nBut most of them can use the same arithmetic.\n\nThis patch adds asm-generic/memory_model.h, which includes generic\npage_to_pfn(), pfn_to_page() definitions for each memory model.\n\nWhen CONFIG_OUT_OF_LINE_PFN_TO_PAGE\u003dy, out-of-line functions are\nused instead of macro. This is enabled by some archs and reduces\ntext size.\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: Hugh Dickins \u003chugh@veritas.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Ian Molton \u003cspyro@f2s.com\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Yoshinori Sato \u003cysato@users.sourceforge.jp\u003e\nCc: Hirokazu Takata \u003ctakata.hirokazu@renesas.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Kazumoto Kojima \u003ckkojima@rr.iij4u.or.jp\u003e\nCc: Richard Curnow \u003crc@rc0.org.uk\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nCc: Miles Bader \u003cuclinux-v850@lsi.nec.co.jp\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "2d78d4beb64eb07d50665432867971c481192ebf", "tree": "d007f5721ba96abff820f76db77f11ae578722f8", "parents": [ "d59288b75797fd982546aee7ba24a495dee128dd" ], "author": { "name": "Akinobu Mita", "email": "mita@miraclelinux.com", "time": "Sun Mar 26 01:39:40 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:57:14 2006 -0800" }, "message": "[PATCH] bitops: sparc64: use generic bitops\n\n- remove __{,test_and_}{set,clear,change}_bit() and test_bit()\n- remove ffz()\n- remove __ffs()\n- remove generic_fls()\n- remove generic_fls64()\n- remove sched_find_first_bit()\n- remove ffs()\n\n- unless defined(ULTRA_HAS_POPULATION_COUNT)\n\n - remove generic_hweight{64,32,16,8}()\n\n- remove find_{next,first}{,_zero}_bit()\n- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()\n- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()\n\nSigned-off-by: Akinobu Mita \u003cmita@miraclelinux.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "67b0ad574b5ee90f8ea58196ff8a7f3780b75365", "tree": "ca9bc212f6efa8f5170185ef1fa21f75de0684fd", "parents": [ "72b61a3cfd80d1321eb898be8ceae2064f0fbea1" ], "author": { "name": "Akinobu Mita", "email": "mita@miraclelinux.com", "time": "Sun Mar 26 01:39:05 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:57:10 2006 -0800" }, "message": "[PATCH] bitops: use non atomic operations for minix_*_bit() and ext2_*_bit()\n\nBitmap functions for the minix filesystem and the ext2 filesystem except\next2_set_bit_atomic() and ext2_clear_bit_atomic() do not require the atomic\nguarantees.\n\nBut these are defined by using atomic bit operations on several architectures.\n (cris, frv, h8300, ia64, m32r, m68k, m68knommu, mips, s390, sh, sh64, sparc,\nsparc64, v850, and xtensa)\n\nThis patch switches to non atomic bit operation.\n\nSigned-off-by: Akinobu Mita \u003cmita@miraclelinux.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f348d70a324e15afc701a494f32ec468abb7d1eb", "tree": "a4cb43429f7f08a6621c581bd99e4a03198e8c67", "parents": [ "501f2499b897ca4be68b1acc7a4bc8cf66f5fd24" ], "author": { "name": "Davide Libenzi", "email": "davidel@xmailserver.org", "time": "Sat Mar 25 03:07:39 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Mar 25 08:22:56 2006 -0800" }, "message": "[PATCH] POLLRDHUP/EPOLLRDHUP handling for half-closed devices notifications\n\nImplement the half-closed devices notifiation, by adding a new POLLRDHUP\n(and its alias EPOLLRDHUP) bit to the existing poll/select sets. Since the\nexisting POLLHUP handling, that does not report correctly half-closed\ndevices, was feared to be changed, this implementation leaves the current\nPOLLHUP reporting unchanged and simply add a new bit that is set in the few\nplaces where it makes sense. The same thing was discussed and conceptually\nagreed quite some time ago:\n\nhttp://lkml.org/lkml/2003/7/12/116\n\nSince this new event bit is added to the existing Linux poll infrastruture,\neven the existing poll/select system calls will be able to use it. As far\nas the existing POLLHUP handling, the patch leaves it as is. The\npollrdhup-2.6.16.rc5-0.10.diff defines the POLLRDHUP for all the existing\narchs and sets the bit in the six relevant files. The other attached diff\nis the simple change required to sys/epoll.h to add the EPOLLRDHUP\ndefinition.\n\nThere is \"a stupid program\" to test POLLRDHUP delivery here:\n\n http://www.xmailserver.org/pollrdhup-test.c\n\nIt tests poll(2), but since the delivery is same epoll(2) will work equally.\n\nSigned-off-by: Davide Libenzi \u003cdavidel@xmailserver.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Michael Kerrisk \u003cmtk-manpages@gmx.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "394e3902c55e667945f6f1c2bdbc59842cce70f7", "tree": "f4bca0bdc0c291fda6f6949265aacec0669b9084", "parents": [ "63872f87a151413100678f110d1556026002809e" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Thu Mar 23 03:01:05 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:17 2006 -0800" }, "message": "[PATCH] more for_each_cpu() conversions\n\nWhen we stop allocating percpu memory for not-possible CPUs we must not touch\nthe percpu data for not-possible CPUs at all. The correct way of doing this\nis to test cpu_possible() or to use for_each_cpu().\n\nThis patch is a kernel-wide sweep of all instances of NR_CPUS. I found very\nfew instances of this bug, if any. But the patch converts lots of open-coded\ntest to use the preferred helper macros.\n\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nCc: Anton Blanchard \u003canton@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Christian Zankel \u003cchris@zankel.net\u003e\nCc: Philippe Elie \u003cphil.el@wanadoo.fr\u003e\nCc: Nathan Scott \u003cnathans@sgi.com\u003e\nCc: Jens Axboe \u003caxboe@suse.de\u003e\nCc: Eric Dumazet \u003cdada1@cosmosbay.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0b2fcfdb8b4e7e379192f24ea2203163ddf5df1d", "tree": "1f3995e41ab12ff76e737389e0b59a40c0c73668", "parents": [ "713729e8b993cb880225e2ced50a3f5ac05c2b3f" ], "author": { "name": "Nick Piggin", "email": "npiggin@suse.de", "time": "Thu Mar 23 03:01:02 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:17 2006 -0800" }, "message": "[PATCH] atomic: add_unless cmpxchg optimise\n\nWithout branch hints, the very unlikely chance of the loop repeating due to\ncmpxchg failure is unrolled with gcc-4 that I have tested.\n\nImprove this for architectures with a native cas/cmpxchg. llsc archs\nshould try to implement this natively.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Roman Zippel \u003czippel@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "804f1594cc3deb161e531a43d90c501f0db2635a", "tree": "81f7a7cea8dbf671c733df379c6582e36459e8da", "parents": [ "6a2900b67652421b51fe25e4b86ecfec742b1f30" ], "author": { "name": "Kyle McMartin", "email": "kyle@parisc-linux.org", "time": "Thu Mar 23 03:00:16 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:10 2006 -0800" }, "message": "[PATCH] Move read_mostly definition to asm/cache.h\n\nSeems like needless clutter having a bunch of #if defined(CONFIG_$ARCH) in\ninclude/linux/cache.h. Move the per architecture section definition to\nasm/cache.h, and keep the if-not-defined dummy case in linux/cache.h to\ncatch architectures which don\u0027t implement the section.\n\nVerified that symbols still go in .data.read_mostly on parisc,\nand the compile doesn\u0027t break.\n\nSigned-off-by: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "dcc1e8dd88d4bc55e32a26dad7633d20ffe606d2", "tree": "a47592213d94f918867d3dd81bb91dac3e727dea", "parents": [ "14778d9072e53d2171f66ffd9657daff41acfaed" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Mar 22 00:49:59 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 22 01:15:14 2006 -0800" }, "message": "[SPARC64]: Add a secondary TSB for hugepage mappings.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f6b83f070e9b7ad9075f7cc5646260e56c7d0219", "tree": "48586ca4f4c75ee3862f63be332351e78f2d5476", "parents": [ "467418f3508b426adbc7df795ebf3baaed4fbefc" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 01:17:17 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Mar 20 01:17:17 2006 -0800" }, "message": "[SPARC64]: Fix 2 bugs in huge page support.\n\n1) huge_pte_offset() did not check the page table hierarchy\n elements as being empty correctly, resulting in an OOPS\n\n2) Need platform specific hugetlb_get_unmapped_area() to handle\n the top-down vs. bottom-up address space allocation strategies.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bb8646d8340fa7c1b66a037428e39f85f8738f0a", "tree": "931d4505a0ba65124b662f0f8b5935e0b154bd66", "parents": [ "88d7079458f87d6f2d2261b2f87b7b9416019f5e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Mar 18 23:55:11 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:41 2006 -0800" }, "message": "[SPARC64]: Optimized TSB table initialization.\n\nWe only need to write an invalid tag every 16 bytes,\nso taking advantage of this can save many instructions\ncompared to the simple memset() call we make now.\n\nA prefetching implementation is implemented for sun4u\nand a block-init store version if implemented for Niagara.\n\nThe next trick is to be able to perform an init and\na copy_tsb() in parallel when growing a TSB table.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d61e16df940e02e25679bdc1aee8c25786f6de90", "tree": "de76f4007d526835b8564203341ebf66ca29b12d", "parents": [ "a91690ddd05ab0b7fbdd37733875525ac75c20f2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 17 17:33:56 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:36 2006 -0800" }, "message": "[SPARC64]: Increase top of 32-bit process stack.\n\nPut it one page below the top of the 32-bit address space.\nThis gives us ~16MB more address space to work with.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a91690ddd05ab0b7fbdd37733875525ac75c20f2", "tree": "f6937c0ce29c79078d6df8346a374a7b9947f360", "parents": [ "b5e7ae5dd034c2c0ed75c31fca04a805097817bc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Mar 17 14:41:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:35 2006 -0800" }, "message": "[SPARC64]: Top-down address space allocation for 32-bit tasks.\n\nCurrently allocations are very constrained for 32-bit processes.\nIt grows down-up from 0x70000000 to 0xf0000000 which gives about\n2GB of stack + dynamic mmap() space.\n\nSo support the top-down method, and we need to override the\ngeneric helper function in order to deal with D-cache coloring.\n\nWith these changes I was able to squeeze out a mmap() just over\n3.6GB in size in a 32-bit process.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7a1ac5264108fc3ed22d17a3cdd76212ed1666d1", "tree": "75378a1b470afa54900f1f15a5b41966d301520d", "parents": [ "a858f1ca726edc5eb7ed39722f7966d005f1c9ca" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Mar 16 02:02:32 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:16:33 2006 -0800" }, "message": "[SPARC64]: Fix and re-enable dynamic TSB sizing.\n\nThis is good for up to %50 performance improvement of some test cases.\nThe problem has been the race conditions, and hopefully I\u0027ve plugged\nthem all up here.\n\n1) There was a serious race in switch_mm() wrt. lazy TLB\n switching to and from kernel threads.\n\n We could erroneously skip a tsb_context_switch() and thus\n use a stale TSB across a TSB grow event.\n\n There is a big comment now in that function describing\n exactly how it can happen.\n\n2) All code paths that do something with the TSB need to be\n guarded with the mm-\u003econtext.lock spinlock. This makes\n page table flushing paths properly synchronize with both\n TSB growing and TLB context changes.\n\n3) TSB growing events are moved to the end of successful fault\n processing. Previously it was in update_mmu_cache() but\n that is deadlock prone. At the end of do_sparc64_fault()\n we hold no spinlocks that could deadlock the TSB grow\n sequence. We also have dropped the address space semaphore.\n\nWhile we\u0027re here, add prefetching to the copy_tsb() routine\nand put it in assembler into the tsb.S file. This piece of\ncode is quite time critical.\n\nThere are some small negative side effects to this code which\ncan be improved upon. In particular we grab the mm-\u003econtext.lock\neven for the tsb insert done by update_mmu_cache() now and that\u0027s\na bit excessive. We can get rid of that locking, and the same\nlock taking in flush_tsb_user(), by disabling PSTATE_IE around\nthe whole operation including the capturing of the tsb pointer\nand tsb_nentries value. That would work because anyone growing\nthe TSB won\u0027t free up the old TSB until all cpus respond to the\nTSB change cross call.\n\nI\u0027m not quite so confident in that optimization to put it in\nright now, but eventually we might be able to and the description\nis here for reference.\n\nThis code seems very solid now. It passes several parallel GCC\nbootstrap builds, and our favorite \"nut cruncher\" stress test which is\na full \"make -j8192\" build of a \"make allmodconfig\" kernel. That puts\nabout 256 processes on each cpu\u0027s run queue, makes lots of process cpu\nmigrations occur, causes lots of page table and TLB flushing activity,\nincurs many context version number changes, and it swaps the machine\nreal far out to disk even though there is 16GB of ram on this test\nsystem. :-)\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "90a6646bf6a1ca821f32d5510e935855612904df", "tree": "035420e4ab615cb837b1246fc26c55e0b8d233b4", "parents": [ "8935dced547afbf37d0fcfcac9a3556494e53104" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 08 17:18:19 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:25 2006 -0800" }, "message": "[SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.\n\nReport \u0027sun4v\u0027 when appropriate in /proc/cpuinfo\n\nRemove all the verifications of the OBP version string. Just\nmake sure it\u0027s there, and report it raw in the bootup logs and\nvia /proc/cpuinfo.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8935dced547afbf37d0fcfcac9a3556494e53104", "tree": "0ae802875c73e99b86e4f90be6e953ec0c528dea", "parents": [ "17b0e199a10184d8c5bbbd79a4cee993bb1fb257" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 08 16:09:19 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:24 2006 -0800" }, "message": "[SPARC64]: Add SMT scheduling support for Niagara.\n\nThe mapping is a simple \"(cpuid \u003e\u003e 2) \u003d\u003d core\" for now.\nLater we\u0027ll add more sophisticated code that will walk\nthe sun4v machine description and figure this out from\nthere.\n\nWe should also add core mappings for jaguar and panther\nprocessors.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d1112018b4bc82adf5c8a9c15a08954328f023ae", "tree": "4d94ef6c153f028cfaaff711cf7d4f07aa90e9b4", "parents": [ "ee29074d3bd23848905f52c515974e0cd0219faa" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 08 02:16:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:22 2006 -0800" }, "message": "[SPARC64]: Move over to sparsemem.\n\nThis has been pending for a long time, and the fact\nthat we waste a ton of ram on some configurations\nkind of pushed things over the edge.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ee29074d3bd23848905f52c515974e0cd0219faa", "tree": "d5306446b2e26d9e45f65467b4f3b3f3b0c8494c", "parents": [ "a77754b4d0731321db266c6c60ffcd7c62757da5" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 06 22:50:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:21 2006 -0800" }, "message": "[SPARC64]: Fix new context version SMP handling.\n\nDon\u0027t piggy back the SMP receive signal code to do the\ncontext version change handling.\n\nInstead allocate another fixed PIL number for this\nasynchronous cross-call. We can\u0027t use smp_call_function()\nbecause this thing is invoked with interrupts disabled\nand a few spinlocks held.\n\nAlso, fix smp_call_function_mask() to count \"cpus\" correctly.\nThere is no guarentee that the local cpu is in the mask\nyet that is exactly what this code was assuming.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a77754b4d0731321db266c6c60ffcd7c62757da5", "tree": "37cc4c6793e2b616791d42ee840e5a007a13eccb", "parents": [ "9132983ae140a8ca81e95e081d5a4c0dd7a7f670" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 06 19:59:50 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:20 2006 -0800" }, "message": "[SPARC64]: Bulletproof MMU context locking.\n\n1) Always spin_lock_init() in init_context(). The caller essentially\n clears it out, or copies the mm info from the parent. In both\n cases we need to explicitly initialize the spinlock.\n\n2) Always do explicit IRQ disabling while taking mm-\u003econtext.lock\n and ctx_alloc_lock.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8bcd17411643beb9a601e032d0cf1016909a81d3", "tree": "fc71e788df4fada768247fa7c12e983d2f6f1a32", "parents": [ "45f791eb0f03e760183d30d3f1f18dc2b8e902fe" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Mar 02 18:12:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:14 2006 -0800" }, "message": "[SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole.\n\nThe UltraSPARC T1 manual recommends this because the chip\ncould instruction prefetch into the VA hole, and this would\nalso make decoding certain kinds of memory access traps\nmore difficult (because the chip sign extends certain pieces\nof trap state).\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e22990451a6a6263250cdd267708548dfa08a8f2", "tree": "5d280a9aa0d2b49824d917be85afaa37bb93aede", "parents": [ "8ba706a95bb92c3b14b812f6d507890336d19136" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Mar 01 22:25:43 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:11 2006 -0800" }, "message": "[SPARC64]: Kill bogus function externs in asm/pgtable.h\n\nThese are all implemented inline earlier in the file.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b830ab665ad96c6b20d51a89b35cbc09ab5a2c29", "tree": "57c2c75b3e069f9f244259ae02f6f2fe3de68612", "parents": [ "aac0aadf09b98ba36eab0bb02a560ebcb82ac39f" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Feb 28 15:10:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:09 2006 -0800" }, "message": "[SPARC64]: Fix bugs in SUN4V cpu mondo dispatch.\n\nThere were several bugs in the SUN4V cpu mondo dispatch code.\n\nIn fact, if we ever got a EWOULDBLOCK or other error from\nthe hypervisor call, we\u0027d potentially send a cpu mondo multiple\ntimes to the same cpu and even worse we could loop until the\ntimeout resending the same mondo over and over to such cpus.\n\nSo let\u0027s bulletproof this thing as follows:\n\n1) Implement cpu_mondo_send() and cpu_state() hypervisor calls\n in arch/sparc64/kernel/entry.S, add prototypes to asm/hypervisor.h\n\n2) Don\u0027t build and update the cpulist using inline functions, this\n was causing the cpu mask to not get updated in the caller.\n\n3) Disable interrupts during the entire mondo send, otherwise our\n cpu list and/or mondo block could get overwritten if we take\n an interrupt and do a cpu mondo send on the current cpu.\n\n4) Check for all possible error return types from the cpu_mondo_send()\n hypervisor call. In particular:\n\n HV_EOK) Our work is done, all cpus have received the mondo.\n HV_CPUERROR) One or more of the cpus in the cpu list we passed\n to the hypervisor are in error state. Use cpu_state()\n calls over the entries in the cpu list to see which\n\t\tones. Record them in \"error_mask\" and report this\n\t\tafter we are done sending the mondo to cpus which are\n\t\tnot in error state.\n HV_EWOULDBLOCK) We need to keep trying.\n\n Any other error we consider fatal, we report the event and exit\n immediately.\n\n5) We only timeout if forward progress is not made. Forward progress\n is defined as having at least one cpu get the mondo successfully\n in a given cpu_mondo_send() call. Otherwise we bump a counter\n and delay a little. If the counter hits a limit, we signal an\n error and report the event.\n\nAlso, smp_call_function_mask() error handling reports the number\nof cpus incorrectly.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "97c4b6f95afadea5846b78ce589d25de2a245c56", "tree": "11110547d3c92657ae8199f039e35c3a74d32107", "parents": [ "7a591cfe4efef8a232e4938d44ae6693b319f6d7" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 26 20:37:41 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:06 2006 -0800" }, "message": "[SPARC64]: Use 13-bit context size always.\n\nWe no longer have the problems that require using the smaller\nsizes.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "36344762396ca868d6076c41a84bda25f1ed9d3c", "tree": "7471ce9b78736e538417267f1bc27687a1b09542", "parents": [ "c4e9249b1924118693f298ee8d38f7fe43587af3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 25 17:16:29 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:03 2006 -0800" }, "message": "[SPARC64]: Niagara optimized XOR functions for RAID.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a0663a79ad4faebe1db4a56e2e767b120b12333a", "tree": "612a53e387a6aea6116f8a1637050fa13c6d9f80", "parents": [ "074d82cf688fe2dfa7ba4a2317c56f62d13fb522" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Feb 23 14:19:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:14:00 2006 -0800" }, "message": "[SPARC64]: Fix TLB context allocation with SMT style shared TLBs.\n\nThe context allocation scheme we use depends upon there being a 1\u003c--\u003e1\nmapping from cpu to physical TLB for correctness. Chips like Niagara\nbreak this assumption.\n\nSo what we do is notify all cpus with a cross call when the context\nversion number changes, and if necessary this makes them allocate\na valid context for the address space they are running at the time.\n\nStress tested with make -j1024, make -j2048, and make -j4096 kernel\nbuilds on a 32-strand, 8 core, T2000 with 16GB of ram.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "0f05da6d577b80eb00f15994c86e4812ae60f1b9", "tree": "39d981c896ab6b90aa30f124fb25cbdf4f242c83", "parents": [ "fc504928677049f0ad3f1fd4e0bb3908172df8f3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 22 16:20:11 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:57 2006 -0800" }, "message": "[SPARC64]: Fix %tstate ASI handling in start_thread{,32}()\n\nNiagara helps us find a ancient bug in the sparc64 port :-)\n\nThe ASI_* values are plain constant defines, thus signed 32-bit\non sparc64. To put shift this into the regs-\u003etstate value we were\ndoing or\u0027ing \"(ASI_PNF \u003c\u003c 24)\" into there.\n\nASI_PNF is 0x82 and shifted left by 24 makes that topmost bit the\nsign bit in a 32-bit value. This would get sign extended to 64-bits\nand thus corrupt the top-half of the reg-\u003etstate value.\n\nThis never caused problems in pre-Niagara cpus because the only thing\nup there were the condition code values. But Niagara has the global\nregister level field, and this all 1\u0027s value is illegal there so\nNiagara gives an illegal instruction trap due to this bug.\n\nI\u0027m pretty sure this bug is about as old as the sparc64 port itself.\n\nThis also points out that we weren\u0027t setting ASI_PNF for 32-bit tasks.\nWe should, so fix that while we\u0027re here.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d7744a09504d5ae84edc8289a02254e1f2102410", "tree": "be0f245ee0725f2f066bf87d17d254ce1e7279bf", "parents": [ "9cc3a1ac9a819cadff05ca37bb7f208013a22035" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Feb 21 22:31:11 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:56 2006 -0800" }, "message": "[SPARC64]: Create a seperate kernel TSB for 4MB/256MB mappings.\n\nIt can map all of the linear kernel mappings with zero TSB hash\nconflicts for systems with 16GB or less ram. In such cases, on\nSUN4V, once we load up this TSB the first time with all the\nmappings, we never take a linear kernel mapping TLB miss ever\nagain, the hypervisor handles them all.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6f5374c91f0dd1d92408ed44c066c32bcce5ce69", "tree": "e5d2ade79d39f043af66030c42d2410d1cd6f483", "parents": [ "1bd0cd74d102a527b2a72907698d73fad4b82cbd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 21 15:42:09 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:52 2006 -0800" }, "message": "[SPARC64]: Add sun4v_cpu_yield().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1bd0cd74d102a527b2a72907698d73fad4b82cbd", "tree": "2df2dede361dd259b6cd4b91c3ab8d5c783401ac", "parents": [ "8ca2557c48000daa8183b07d83f582a597705ebe" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 21 15:41:01 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:51 2006 -0800" }, "message": "[SPARC64]: Kill cpudata-\u003eidle_volume.\n\nSet, but never used.\n\nWe used to use this for dynamic IRQ retargetting, but that\ncode died a long time ago.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "0f15952ac8641bde1045162ffd4a7b474cc318b0", "tree": "f1837150e0e1589dda97f1780e99962bf6c905af", "parents": [ "f6c1fe529217788f095f6953c2b66bec1196ad3d" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 18 12:43:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:36 2006 -0800" }, "message": "[SPARC64]: Export a PAGE_SHARED symbol.\n\nFor drivers/media/*, noticed by Fabbione.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f6c1fe529217788f095f6953c2b66bec1196ad3d", "tree": "609476e09d7778c55775e88879ba77dd4a23f1f2", "parents": [ "8b234274418d6d79527c4ac3a72da446ca4cb35f" ], "author": { "name": "Fabio M. Di Nitto", "email": "fabbione@ubuntu.com", "time": "Sat Feb 18 00:32:31 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:35 2006 -0800" }, "message": "[SPARC64] Fix build if CONFIG_HUGETLB_PAGE is not set\n\nSigned-off-by: Fabio M. Di Nitto \u003cfabbione@ubuntu.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8b234274418d6d79527c4ac3a72da446ca4cb35f", "tree": "ab4ab14fa7f1cab7889ecc2339f0261253a5d0e1", "parents": [ "7adb37fe80d06cbd40de9b225b12a3a9ec40b6bb" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 18:01:02 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:34 2006 -0800" }, "message": "[SPARC64]: More TLB/TSB handling fixes.\n\nThe SUN4V convention with non-shared TSBs is that the context\nbit of the TAG is clear. So we have to choose an \"invalid\"\nbit and initialize new TSBs appropriately. Otherwise a zero\nTAG looks \"valid\".\n\nMake sure, for the window fixup cases, that we use the right\nglobal registers and that we don\u0027t potentially trample on\nthe live global registers in etrap/rtrap handling (%g2 and\n%g6) and that we put the missing virtual address properly\nin %g5.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "3763be32d591cacf808c36390a8af3f2784cde5f", "tree": "124ae01bf91905a6d3af931caf28acf82900699b", "parents": [ "3f19a84e39619053f117bd5bb9183c5bfea7db45" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 12:33:13 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:29 2006 -0800" }, "message": "[SPARC64]: Define ARCH_HAS_READ_CURRENT_TIMER.\n\nThis gives more consistent bogomips and delay() semantics,\nespecially on sun4v. It gives weird looking values though...\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c857e3fdbc306e95fdcaad1d8f3ea6bc8e7eea99", "tree": "6fb1cfc9b8742b56db032fcdb4294e693bb75ffa", "parents": [ "46f860471483dce9ba5ce682a69c61cbceb54e52" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 10:35:23 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:28 2006 -0800" }, "message": "[SPARC64]: __bzero_noasi --\u003e __clear_user\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "97532f598273d03cab8bb5206669b6fdd654eb63", "tree": "a2d06b6f9861bad04d1378fef104a1c2d81777df", "parents": [ "3b3ab2eb9cf07ef1bc7a676c19aab994adb41a87" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 10:14:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:26 2006 -0800" }, "message": "[SPARC64]: Add HWCAP_SPARC_BLKINIT elf capability flag for Niagara.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ebd8c56c5ae154e2c6cfb7453a76a4e7265b2377", "tree": "155df85100a1316ac103dcaed140d20ddc72c855", "parents": [ "101d5c18a928ef82b6c7bf99a9eaa536b5ccf593" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 08:38:06 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:24 2006 -0800" }, "message": "[SPARC64]: Fix uniprocessor IRQ targetting on SUN4V.\n\nWe need to use the real hardware processor ID when\ntargetting interrupts, not the \"define to 0\" thing\nthe uniprocessor build gives us.\n\nAlso, fill in the Node-ID and Agent-ID fields properly\non sun4u/Safari.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "72aff53f1fe74153eccef303ab2f79de888d248c", "tree": "a229645be99274d36bed04bed355d74ec3c0baa2", "parents": [ "19a0d585e80e84b54bb9bf120bf0c826045dd3dd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 17 01:29:17 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:22 2006 -0800" }, "message": "[SPARC64]: Get SUN4V SMP working.\n\nThe sibling cpu bringup is extremely fragile. We can only\nperform the most basic calls until we take over the trap\ntable from the firmware/hypervisor on the new cpu.\n\nThis means no accesses to %g4, %g5, %g6 since those can\u0027t be\nTLB translated without our trap handlers.\n\nIn order to achieve this:\n\n1) Change sun4v_init_mondo_queues() so that it can operate in\n several modes.\n\n It can allocate the queues, or install them in the current\n processor, or both.\n\n The boot cpu does both in it\u0027s call early on.\n\n Later, the boot cpu allocates the sibling cpu queue, starts\n the sibling cpu, then the sibling cpu loads them in.\n\n2) init_cur_cpu_trap() is changed to take the current_thread_info()\n as an argument instead of reading %g6 directly on the current\n cpu.\n\n3) Create a trampoline stack for the sibling cpus. We do our basic\n kernel calls using this stack, which is locked into the kernel\n image, then go to our proper thread stack after taking over the\n trap table.\n\n4) While we are in this delicate startup state, we put 0xdeadbeef\n into %g4/%g5/%g6 in order to catch accidental accesses.\n\n5) On the final prom_set_trap_table*() call, we put \u0026init_thread_union\n into %g6. This is a hack to make prom_world(0) work. All that\n wants to do is restore the %asi register using\n get_thread_current_ds().\n\nLonger term we should just do the OBP calls to set the trap table by\nhand just like we do for everything else. This would avoid that silly\nprom_world(0) issue, then we can remove the init_thread_union hack.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "4ff7ac417d4b628c23df3ae8301d17e29e6e8f16", "tree": "8a0ad85722f0e927ac6c1388032481636424fb10", "parents": [ "22780e23c629303474797d17e7f09ad7721ef55b" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 16 16:22:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:18 2006 -0800" }, "message": "[SPARC64]: Add GET_GL_GLOBAL() macro for SUN4V.\n\nSo we can read the %gl register for debugging.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "94f8762db9a80ed34252e9fe5fa38be87bb7826b", "tree": "22279c62d2d4d583c64f1d2c6122f4eb98b429a6", "parents": [ "bc45e32e0fbf661d0c5c5b9c981bc0fe5da4901f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 16 14:26:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:16 2006 -0800" }, "message": "[SPARC64]: Add sun4v_cpu_qconf() hypervisor call.\n\nCall it from register_one_mondo().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bc45e32e0fbf661d0c5c5b9c981bc0fe5da4901f", "tree": "cf4a313304153b39bd155c062b934d607500f2ae", "parents": [ "8e42550c683b2ad4869fc4fa438204841fd9b7cc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Mar 05 16:46:58 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:15 2006 -0800" }, "message": "[SPARC]: Kill off these __put_user_ret things.\n\nThey are bogus and haven\u0027t been referenced in years.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "9d29a3fafd06534ad73427fee3c968c094d05b9b", "tree": "4afd7455d6249d9143acea6c4704f69aa98d311a", "parents": [ "7890f794e0e6f7dce2a5f4a03ba64b0b3fe306bd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 15 19:48:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:05 2006 -0800" }, "message": "[SPARC64]: Decode virtual-devices interrupts correctly.\n\nNeed to translate through the interrupt-map{,-mask] properties.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7890f794e0e6f7dce2a5f4a03ba64b0b3fe306bd", "tree": "a9cc7c67498616a47108c667a9c001f9fe468318", "parents": [ "63c2a0e598c2fa769a08a6e9ad124bf270b4436e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 15 02:26:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:04 2006 -0800" }, "message": "[SPARC64]: Add prom_{start,stop}cpu_cpuid().\n\nUse prom_startcpu_cpuid() on SUN4V instead of prom_startcpu().\n\nWe should really test for \"SUNW,start-cpu-by-cpuid\" presence\nand use it if present even on SUN4U.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7c3514e4501565d76f9e4dec43e1fc17389f4811", "tree": "e3f4766232189faaa98a59d53a44e424025e9561", "parents": [ "f03b8a546868fcf43feb455b69b152eb867606b2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 15 00:41:47 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:13:02 2006 -0800" }, "message": "[SPARC64]: Fixup TSTATE layout diagram in asm/pstate.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "50f4f23c3bd95afc82e931254a71e7b1b3699fd2", "tree": "5ed7cc71e1140a3a839c8d65ca95b755012d4bde", "parents": [ "3af6e01e9acfb786c5dd2862f57f206b0b3cb889" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 14 01:32:29 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:53 2006 -0800" }, "message": "[SPARC64]: Fix gcc-3.3.x warnings.\n\nIt doesn\u0027t like const variables being passed into\n\"i\" constraing asm operations. It\u0027s a bug, but\nthere is nothing we can really do but work around\nit.\n\nBased upon a report from Andrew Morton.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c4bea2883974a59ab7a0ac6c01d34f7ae0e8cd8e", "tree": "3d32f942cd0a62f6ca89fe7781f59708845d7a38", "parents": [ "4bf447d6f7c2357dec8bdc24ce0fcffd71cc29c0" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 22:56:27 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:51 2006 -0800" }, "message": "[SPARC64]: Make error codes available from sun4v_intr_get*().\n\nAnd check for errors at call sites.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5259d5bfaf5b2953b130e9a500277a905bd37823", "tree": "3768df7a92c63a2eeec0d29aadca60ce57f36de7", "parents": [ "f4266ab45a3f08bd76c2d414a2d7a1a9dc2501c0" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 21:15:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:46 2006 -0800" }, "message": "[SPARC64]: Fix comment typo in asm/hypervisor.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e77227eb4e17591a6a511b9c0ff6e8ad7350c575", "tree": "be8b7f13fd2ff0543879286b04045f6c3587dda3", "parents": [ "d5eb4004303b4dd04ec83b926b5fc2d9ceda4b2e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 20:42:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:44 2006 -0800" }, "message": "[SPARC64]: Probe virtual-devices root node on sun4v.\n\nThis is where we learn how to get the interrupts\nfor things like the hypervisor console device.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e3999574b48125c9bb0c95e3e9f1c696bf96c3e3", "tree": "a6651da06fa36c3dde33a7be5f0b7192b8442cd7", "parents": [ "10804828fd06a43ce964e9d9852332e7ff1507b1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 18:16:10 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:40 2006 -0800" }, "message": "[SPARC64]: Generic sun4v_build_irq().\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6c0f402f6cc62314ef83b975f3430350dcb6055f", "tree": "394a2e981ee8fff3e6eda7aec2d20be8542ecae1", "parents": [ "85dfa19ba92f88fa1c1482f655c7247119dfdcd5" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 00:23:32 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:37 2006 -0800" }, "message": "[SPARC64]: Implement rest of generic interrupt hypervisor calls.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "85dfa19ba92f88fa1c1482f655c7247119dfdcd5", "tree": "28038115f626e5c84bb50ad9ff5eed5dc943fcde", "parents": [ "059833eb817fec3a5a7f62fba9592749c4cebc73" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 13 00:02:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:36 2006 -0800" }, "message": "[SPARC64]: Move devino_to_sysino out of pci_sun4v_asm.S\n\nIt is not PCI specific, it is for all system interrupts.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "cf627156c450cd5a0741b31f55181db3400d4887", "tree": "e8f44d2509f5544ee5b5d583da3e10ac99ca3629", "parents": [ "ff02e0d26f139ad95ec3a7e94f88faccaa180dff" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 12 21:10:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:32 2006 -0800" }, "message": "[SPARC64]: Use inline patching for critical PTE operations.\n\nThis handles the SUN4U vs SUN4V PTE layout differences\nwith near zero performance cost.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ff02e0d26f139ad95ec3a7e94f88faccaa180dff", "tree": "7a872c9792561c77c672ba640b80134c592d93c7", "parents": [ "221b2fb818c307e1cb47e036a1671ca554d9cd0a" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 12 17:07:51 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:31 2006 -0800" }, "message": "[SPARC64]: Move PTE field definitions back into asm/pgtable.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1a7a242c898dd131f2df005c492e9b44fb8900e0", "tree": "5f00961b9c6539951adda7bfaafda030cea39c38", "parents": [ "02fead75055246d01af56a45a9d1b311d506da3e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 23:24:30 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:28 2006 -0800" }, "message": "[SPARC64]: Recognize \"virtual-console\" as input and output console device.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c4bce90ea2069e5a87beac806de3090ab32128d5", "tree": "3983a206c8060ef65ba17945d1c9f69e68d88b3d", "parents": [ "490384e752a43aa281ed533e9de2da36df25c337" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 21:57:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:25 2006 -0800" }, "message": "[SPARC64]: Deal with PTE layout differences in SUN4V.\n\nYes, you heard it right, they changed the PTE layout for\nSUN4V. Ho hum...\n\nThis is the simple and inefficient way to support this.\nIt\u0027ll get optimized, don\u0027t worry.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "490384e752a43aa281ed533e9de2da36df25c337", "tree": "ec087a27a481b9a63aeda6703971acf4adeab19b", "parents": [ "459b6e621e0e15315c25bac47fa7113e5818d45d" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 14:41:18 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:23 2006 -0800" }, "message": "[SPARC64]: Register kernel TSB with hypervisor.\n\nWe do this right after we take over the trap table from OBP.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "459b6e621e0e15315c25bac47fa7113e5818d45d", "tree": "4bbff0ec1dafb7fba8b247c84ad708f54cc687fe", "parents": [ "fd05068d7b22b64211f9202aa67ad44b51d44242" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 11 12:21:20 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:23 2006 -0800" }, "message": "[SPARC64]: Fix some SUN4V TLB miss bugs.\n\nCode patching did not sign extend negative branch\noffsets correctly.\n\nKernel TLB miss path needs patching and %g4 register\npreservation in order to handle SUN4V correctly.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "12eaa328f9fb2d3fcb5afb682c762690d05a3cd8", "tree": "cce4e68b971757010a3e0bbf035fc65a381a3cd4", "parents": [ "18397944642cbca7fcd4a109b43ed5b4652e95b9" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Fri Feb 10 15:39:51 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:15 2006 -0800" }, "message": "[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.\n\nThis is where the virtual address of the fault status\narea belongs.\n\nTo set it up we don\u0027t make a hypervisor call, instead\nwe call OBP\u0027s SUNW,set-trap-table with the real address\nof the fault status area as the second argument. And\nright before that call we write the virtual address into\nASI_SCRATCHPAD vaddr 0x0.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "dedacf623283cb24933ec9f7d5bf539f19173cd4", "tree": "e628dffa192236c89e3d646eb62c49ef1c98aab4", "parents": [ "7eae642f75e0f7fbce7c37b2dfe0641ff1e9ebfd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 22:26:34 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:13 2006 -0800" }, "message": "[SPARC64]: Add HV_PCI_TSBID() macro.\n\nFor constructing hypervisor PCI TSB IDs.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "bade5622167181844cd4e60087971c1f949e149f", "tree": "0bd0144e472786f8ba5b37a2bb90204ff6bf204b", "parents": [ "8f6a93a196ba6c569c3e8daa6e81cca7e3ba81b1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 22:05:54 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:11 2006 -0800" }, "message": "[SPARC64]: More SUN4V PCI controller work.\n\nAdd assembler file for PCI hypervisor calls.\nSetup basic skeleton of SUN4V PCI controller driver.\n\nAdd 32-bit devhandle to PBM struct, as this is needed for\nhypervisor calls.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8f6a93a196ba6c569c3e8daa6e81cca7e3ba81b1", "tree": "80d4747608148c56fd8c67baf016ad4fc58610ea", "parents": [ "4cce4b7cc56abc3d7b269d09224b8297aad15138" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 21:32:07 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:10 2006 -0800" }, "message": "[SPARC64]: Beginnings of SUN4V PCI controller support.\n\nAbstract out IOMMU operations so that we can have a different\nset of calls on sun4v, which needs to do things through\nhypervisor calls.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5fe91cf6254c8f23d90efb5fc11fff57dd5ab8dd", "tree": "3a5d3ec9a752a7996f8e9060710fee322f2d5214", "parents": [ "ed6b0b45437dcf7ef1c48b3be413bebcc84771d8" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 20:45:26 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:08 2006 -0800" }, "message": "[SPARC]: Clean up idprom header files.\n\nDelete unused macros, and use fixed sized types in\nsparc32 header.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "618e9ed98aed924a1fc664eb6522db4a5e927043", "tree": "08ace6185b8f9709cb22a23d329def1dae622666", "parents": [ "aa9143b9719c07fb6f1f6207790c9c5086ae07e7" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 17:21:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:06 2006 -0800" }, "message": "[SPARC64]: Hypervisor TSB context switching.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "aa9143b9719c07fb6f1f6207790c9c5086ae07e7", "tree": "74d56ecc53ed0542f200d6c6257c8f051095111c", "parents": [ "12816ab38adddc9d7e9b3315d1739655dedc7c9f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 16:12:22 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:05 2006 -0800" }, "message": "[SPARC64]: Implement sun4v TSB miss handlers.\n\nWhen we register a TSB with the hypervisor, so that it or hardware can\nhandle TLB misses and do the TSB walk for us, the hypervisor traps\ndown to these trap when it incurs a TSB miss.\n\nProcessing is simple, we load the missing virtual address and context,\nand do a full page table walk.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d82ace7dc4073b090a55b9740700e32b9a9ae302", "tree": "d5aa8e10664b05bbfe31eacf95e2066c03cab102", "parents": [ "1d2f1f90a1e004b0c1b8a73ed4394a93f09104b3" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 09 02:52:44 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:03 2006 -0800" }, "message": "[SPARC64]: Detect sun4v early in boot process.\n\nWe look for \"SUNW,sun4v\" in the \u0027compatible\u0027 property\nof the root OBP device tree node.\n\nProtect every %ver register access, to make sure it is\nnot touched on sun4v, as %ver is hyperprivileged there.\n\nLock kernel TLB entries using hypervisor calls instead of\ncalls into OBP.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1d2f1f90a1e004b0c1b8a73ed4394a93f09104b3", "tree": "2fcc0840b52218631020311d7b6d785e9a15db6a", "parents": [ "5b0c0572fcd6204675c5f7ddfa572b5017f817dd" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 08 16:41:20 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:02 2006 -0800" }, "message": "[SPARC64]: Sun4v cross-call sending support.\n\nTechnically the hypervisor call supports sending in a list\nof all cpus to get the cross-call, but I only pass in one\ncpu at a time for now.\n\nThe multi-cpu support is there, just ifdef\u0027d out so it\u0027s easy to\nenable or delete it later.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "5b0c0572fcd6204675c5f7ddfa572b5017f817dd", "tree": "1075a61338e887bd6d4ecd4517646ef95dc09fbc", "parents": [ "ac29c11d4cd4fa1fac968e99998a956405732f2f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 08 02:53:50 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:12:01 2006 -0800" }, "message": "[SPARC64]: Sun4v interrupt handling.\n\nSun4v has 4 interrupt queues: cpu, device, resumable errors,\nand non-resumable errors. A set of head/tail offset pointers\nhelp maintain a work queue in physical memory. The entries\nare 64-bytes in size.\n\nEach queue is allocated then registered with the hypervisor\nas we bring cpus up.\n\nThe two error queues each get a kernel side buffer that we\nuse to quickly empty the main interrupt queue before we\ncall up to C code to log the event and possibly take evasive\naction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7202c55c5c57d2ad4611a751544c9368d7fba93a", "tree": "282219004791550b35f7de50d449d96f396be8f6", "parents": [ "3bfd6f3e77f58479ec53aa91d0b078abbb4c0868" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 22:53:56 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:58 2006 -0800" }, "message": "[SPARC64]: Add sun4v mondo queue bases to struct trap_per_cpu.\n\nAlso, correct TRAP_PER_CPU_FAULT_INFO define, it should be\n0x40 not 0x20.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "3bfd6f3e77f58479ec53aa91d0b078abbb4c0868", "tree": "1ec49afc137feed4e70b1be7728920165e90b838", "parents": [ "8b11bd12aff76e02cdc2cbc9e439bba88d281223" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 22:49:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:57 2006 -0800" }, "message": "[SPARC64]: Fix some comment typos in asm/hypervisor.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8b11bd12aff76e02cdc2cbc9e439bba88d281223", "tree": "903ab8830616bfbe5a821e4359f642842c8060a4", "parents": [ "481295f982b21b1dbe71cbf41d3a93028fee30d1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 22:13:05 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:56 2006 -0800" }, "message": "[SPARC64]: Patch up mmu context register writes for sun4v.\n\nsun4v uses ASI_MMU instead of ASI_DMMU\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "481295f982b21b1dbe71cbf41d3a93028fee30d1", "tree": "5b1af84a7f83021698bcf138c8875d7290e65282", "parents": [ "89a5264f065672a882f555228000614a6b2182b7" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 21:51:08 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:55 2006 -0800" }, "message": "[SPARC64]: Register per-cpu fault status area with sun4v hypervisor.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "89a5264f065672a882f555228000614a6b2182b7", "tree": "4fa226fed4b8119096e50ff8c915d2c0f8d6cd6d", "parents": [ "8591e3027235d6d11b958e43379f2ee7b7114841" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 21:15:41 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:55 2006 -0800" }, "message": "[SPARC64]: asm/cpudata.h needs asm/asi.h\n\nFor the expansion of __GET_CPUID() on SMP.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "df7d6aec96ab98cb182dd5138a85bdc363a9bf0d", "tree": "d71808a328639a32b16c53b24ce8a6b641f43ad2", "parents": [ "d257d5da39a78b32721ca84b2ba7f461f2f7ed7f" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Feb 07 00:00:16 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:53 2006 -0800" }, "message": "[SPARC64]: Rename gl_{1,2}insn_patch --\u003e sun4v_{1,2}insn_patch\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d257d5da39a78b32721ca84b2ba7f461f2f7ed7f", "tree": "ac28d377688ebe13a4d38e05f4ff65ba73d8652a", "parents": [ "840aaef8db32572b6d11e0d5cb5e6efcbc812000" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Feb 06 23:44:37 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:52 2006 -0800" }, "message": "[SPARC64]: Initial sun4v TLB miss handling infrastructure.\n\nThings are a little tricky because, unlike sun4u, we have\nto:\n\n1) do a hypervisor trap to do the TLB load.\n2) do the TSB lookup calculations by hand\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "45fec05f805a113372c9a7ff4c653ac749f6921c", "tree": "36fc99d10656775acb8e9442719447d64ac30a03", "parents": [ "314981ac7177a933319e3c071a5cf0a579205e6e" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 05 22:27:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:50 2006 -0800" }, "message": "[SPARC64]: Sanitize %pstate writes for sun4v.\n\nIf we\u0027re just switching between different alternate global\nsets, nop it out on sun4v. Also, get rid of all of the\nalternate global save/restore in the OBP CIF trampoline code.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "314981ac7177a933319e3c071a5cf0a579205e6e", "tree": "11895da391ba91195d6d7a67debaa32a28c1215e", "parents": [ "936f482af1743141d637483ec10eb881537c26dc" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 05 21:59:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:49 2006 -0800" }, "message": "[SPARC64]: Kill all %pstate changes in context switch code.\n\nThey are totally unnecessary because:\n\n1) Interrupts are already disabled when switch_to()\n runs.\n\n2) We don\u0027t use hard-coded alternate globals any longer.\n\nThis found a case in rtrap, which still assumed alternate\nglobal %g6 was current_thread_info(), and that is fixed\nby this changeset as well.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "936f482af1743141d637483ec10eb881537c26dc", "tree": "913da89a4d9f4038c510c9ecf2f5957b0f6d167f", "parents": [ "6e02493a7f33ac89e698b980a657d77ab2749eaf" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Feb 05 21:29:28 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:48 2006 -0800" }, "message": "[SPARC64]: Add initial code to twiddle %gl on trap entry/exit.\n\nInstead of setting/clearing PSTATE_AG we have to change\nthe %gl register value on sun4v.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d619d7f11670f5b1cfca30e6645e44c8a6014820", "tree": "cad4f39ece5f59f2a16327a13e25863d2f466f14", "parents": [ "d96b81533ba3d5775e45aee6986b2aa33c10801c" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 04 23:59:38 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:46 2006 -0800" }, "message": "[SPARC64]: Add define for \"GL\" field of sun4v %tstate register.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d96b81533ba3d5775e45aee6986b2aa33c10801c", "tree": "334af39452d650cc14b389c58a30cc54e9e130dd", "parents": [ "e1c21c4f476f2270c98aad1fe55e5f33e25f77f5" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 04 15:40:53 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:45 2006 -0800" }, "message": "[SPARC64]: Add sun4v case to __GET_CPUID() patch tables.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "e1c21c4f476f2270c98aad1fe55e5f33e25f77f5", "tree": "830ae146cd0cf807d949b09641ec8e82c6ed8149", "parents": [ "277b6dd9600613b01f66cadef2f0065514fecf69" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:12:14 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:44 2006 -0800" }, "message": "[SPARC64]: Sun4v interrupt queue register definitions.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "277b6dd9600613b01f66cadef2f0065514fecf69", "tree": "f9e9f42f05b3204fe17778a999fecd9fa63b1e7e", "parents": [ "d398ee230f94a8ba386d8abb63f4fea129e4eaba" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:12:02 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:44 2006 -0800" }, "message": "[SPARC64]: Sun4v scratchpad register layout.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d398ee230f94a8ba386d8abb63f4fea129e4eaba", "tree": "bcad4a48333ddbdd04f890d7136c0e3efb829cec", "parents": [ "398d10830843bda7798f71052b54a5341a8ddd53" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:11:50 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:43 2006 -0800" }, "message": "[SPARC64]: Sun4v specific ASI defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "30ddbdb03339fc62480ddbff800a44066bb14455", "tree": "6d064ae396014418601acd8fc678463750f2bffa", "parents": [ "a43fe0e789f5445f5224511034f410adf11f153b" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:11:17 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:41 2006 -0800" }, "message": "[SPARC64]: Add Niagara init-store twin-load ASI defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1633a53c79498455b16d051451f4e3f83ab4e7dd", "tree": "3f28700c60a0464879833a6d76875f387388e20c", "parents": [ "52bf082f0a6e49e08ed99d4d9518c662dc735c7a" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:09:03 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:39 2006 -0800" }, "message": "[SPARC64]: Add \u0027hypervisor\u0027 to ultra_tlb_type enumeration.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "766f861fbbd968a1850295ed6dec4504b4500dcc", "tree": "76729285f448b58c812469b1bddf64f92e9f8d6e", "parents": [ "314ef6859750b6539eac48d78059bb7986f29cb1" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Feb 04 03:01:45 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:37 2006 -0800" }, "message": "[SPARC64]: SUN4V hypervisor interface defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "314ef6859750b6539eac48d78059bb7986f29cb1", "tree": "26c7da386349c1cf377225356e1012ae62da6f07", "parents": [ "ffe483d55229fadbaf4cc7316d47024a24ecd1a2" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Feb 04 00:10:01 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:36 2006 -0800" }, "message": "[SPARC64]: Refine register window trap handling.\n\nWhen saving and restoing trap state, do the window spill/fill\nhandling inline so that we never trap deeper than 2 trap levels.\nThis is important for chips like Niagara.\n\nThe window fixup code is massively simplified, and many more\nimprovements are now possible.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "ffe483d55229fadbaf4cc7316d47024a24ecd1a2", "tree": "70bdb6c94d5b3512a7b2a3ff06979ac2e4e869bf", "parents": [ "92704a1c63c3b481870d02636d0b5a70c7e21cd1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Thu Feb 02 21:55:10 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:35 2006 -0800" }, "message": "[SPARC64]: Add explicit register args to trap state loading macros.\n\nThis, as well as making the code cleaner, allows a simplification in\nthe TSB miss handling path.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "92704a1c63c3b481870d02636d0b5a70c7e21cd1", "tree": "098f96da6ab50a1d878425e2b91a9cf22f78ac80", "parents": [ "f4e841da30b4bcbb8f1cc20a01157a788ff58b21" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 26 23:27:19 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:35 2006 -0800" }, "message": "[SPARC64]: Refine code sequences to get the cpu id.\n\nOn uniprocessor, it\u0027s always zero for optimize that.\n\nOn SMP, the jmpl to the stub kills the return address stack in the cpu\nbranch prediction logic, so expand the code sequence inline and use a\ncode patching section to fix things up. This also always better and\nexplicit register selection, which will be taken advantage of in a\nfuture changeset.\n\nThe hard_smp_processor_id() function is big, so do not inline it.\n\nFix up tests for Jalapeno to also test for Serrano chips too. These\ntests want \"jbus Ultra-IIIi\" cases to match, so that is what we should\ntest for.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7bec08e38a7d0f088994f6eec9b6374652ea71fb", "tree": "df0c24e8417d08aff3d3de7d9dc7b13c4e05931b", "parents": [ "517af33237ecfc3c8a93b335365fa61e741ceca4" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Feb 02 01:20:18 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:33 2006 -0800" }, "message": "[SPARC64]: Correctable ECC errors cannot occur at trap level \u003e 0.\n\nThe are distrupting, which by the sparc v9 definition means they\ncan only occur when interrupts are enabled in the %pstate register.\nThis never occurs in any of the trap handling code running at\ntrap levels \u003e 0.\n\nSo just mark it as an unexpected trap.\n\nThis allows us to kill off the cee_stuff member of struct thread_info.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "517af33237ecfc3c8a93b335365fa61e741ceca4", "tree": "58eff40eb4c517c4fd49fd347d38273ee1e1ee4b", "parents": [ "b0fd4e49aea8a460afab7bc67cd618e2d19291d4" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Wed Feb 01 15:55:21 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:32 2006 -0800" }, "message": "[SPARC64]: Access TSB with physical addresses when possible.\n\nThis way we don\u0027t need to lock the TSB into the TLB.\nThe trick is that every TSB load/store is registered into\na special instruction patch section. The default uses\nvirtual addresses, and the patch instructions use physical\naddress load/stores.\n\nWe can\u0027t do this on all chips because only cheetah+ and later\nhave the physical variant of the atomic quad load.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b0fd4e49aea8a460afab7bc67cd618e2d19291d4", "tree": "a596c793cbc918bdcea462bcfe2f2f41fe8afeb2", "parents": [ "30a6ecad9670d97c9d0fbfa7d80970aeb339bdec" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Jan 31 23:13:29 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Mar 20 01:11:31 2006 -0800" }, "message": "[SPARC64]: Kill out-of-date commentary in asm-sparc64/tsb.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" } ], "next": "86b818687d4894063ecd1190e54717a0cce8c009" }