)]}'
{
  "log": [
    {
      "commit": "69575d388603365f2afbf4166df93152df59b165",
      "tree": "ca3d66668c8ec47befc0adbfa62cf135229bda59",
      "parents": [
        "62a3207b8cf3de35368cdc3822b30b82d59eea95"
      ],
      "author": {
        "name": "Shane Wang",
        "email": "shane.wang@intel.com",
        "time": "Tue Sep 01 18:25:07 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue Sep 01 18:25:07 2009 -0700"
      },
      "message": "x86, intel_txt: clean up the impact on generic code, unbreak non-x86\n\nMove tboot.h from asm to linux to fix the build errors of intel_txt\npatch on non-X86 platforms. Remove the tboot code from generic code\ninit/main.c and kernel/cpu.c.\n\nSigned-off-by: Shane Wang \u003cshane.wang@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "3162534069597e34dd0ac9eb711be8dc23835ae7",
      "tree": "a8cddd3899917784ebac2cdf6c75d2c8b50d04af",
      "parents": [
        "aea1f7964ae6cba5eb419a958956deb9016b3341"
      ],
      "author": {
        "name": "Joseph Cihula",
        "email": "joseph.cihula@intel.com",
        "time": "Tue Jun 30 19:30:59 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue Jul 21 11:49:06 2009 -0700"
      },
      "message": "x86, intel_txt: Intel TXT boot support\n\nThis patch adds kernel configuration and boot support for Intel Trusted\nExecution Technology (Intel TXT).\n\nIntel\u0027s technology for safer computing, Intel Trusted Execution\nTechnology (Intel TXT), defines platform-level enhancements that\nprovide the building blocks for creating trusted platforms.\n\nIntel TXT was formerly known by the code name LaGrande Technology (LT).\n\nIntel TXT in Brief:\no  Provides dynamic root of trust for measurement (DRTM)\no  Data protection in case of improper shutdown\no  Measurement and verification of launched environment\n\nIntel TXT is part of the vPro(TM) brand and is also available some\nnon-vPro systems.  It is currently available on desktop systems based on\nthe Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell Optiplex 755, HP\ndc7800, etc.) and mobile systems based on the GM45, PM45, and GS45\nExpress chipsets.\n\nFor more information, see http://www.intel.com/technology/security/.\nThis site also has a link to the Intel TXT MLE Developers Manual, which\nhas been updated for the new released platforms.\n\nA much more complete description of how these patches support TXT, how to\nconfigure a system for it, etc. is in the Documentation/intel_txt.txt file\nin this patch.\n\nThis patch provides the TXT support routines for complete functionality,\ndocumentation for TXT support and for the changes to the boot_params structure,\nand boot detection of a TXT launch.  Attempts to shutdown (reboot, Sx) the system\nwill result in platform resets; subsequent patches will support these shutdown modes\nproperly.\n\n Documentation/intel_txt.txt      |  210 +++++++++++++++++++++\n Documentation/x86/zero-page.txt  |    1\n arch/x86/include/asm/bootparam.h |    3\n arch/x86/include/asm/fixmap.h    |    3\n arch/x86/include/asm/tboot.h     |  197 ++++++++++++++++++++\n arch/x86/kernel/Makefile         |    1\n arch/x86/kernel/setup.c          |    4\n arch/x86/kernel/tboot.c          |  379 +++++++++++++++++++++++++++++++++++++++\n security/Kconfig                 |   30 +++\n 9 files changed, 827 insertions(+), 1 deletion(-)\n\nSigned-off-by: Joseph Cihula \u003cjoseph.cihula@intel.com\u003e\nSigned-off-by: Shane Wang \u003cshane.wang@intel.com\u003e\nSigned-off-by: Gang Wei \u003cgang.wei@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    }
  ]
}