)]}'
{
  "log": [
    {
      "commit": "e523b38e2f568af58baa13120a994cbf24e6dee0",
      "tree": "2601f9c24420cb7c7c381062965908287fdde9a8",
      "parents": [
        "31d3568dfeb1dfb2735f119efe5ece7c6d40969c"
      ],
      "author": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Fri Apr 10 22:27:48 2009 -0700"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Fri Apr 10 22:27:48 2009 -0700"
      },
      "message": "intel-iommu: Avoid panic() for DRHD at address zero.\n\nIf the BIOS does something obviously stupid, like claiming that the\nregisters for the IOMMU are at physical address zero, then print a nasty\nmessage and abort, rather than trying to set up the IOMMU and then later\npanicking.\n\nIt\u0027s becoming more and more obvious that trusting this stuff to the BIOS\nwas a mistake.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "276dbf997043cbf38f0087624e0f9c51742c8885",
      "tree": "eface2519a6ad4c25c2864ee1ee69361ea3f594c",
      "parents": [
        "924b6231edfaf1e764ffb4f97ea382bf4facff58"
      ],
      "author": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Sat Apr 04 01:45:37 2009 +0100"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Sat Apr 04 10:43:31 2009 +0100"
      },
      "message": "intel-iommu: Handle PCI domains appropriately.\n\nWe were comparing {bus,devfn} and assuming that a match meant it was the\nsame device. It doesn\u0027t -- the same {bus,devfn} can exist in\nmultiple PCI domains. Include domain number in device identification\n(and call it \u0027segment\u0027 in most places, because there\u0027s already a lot of\nreferences to \u0027domain\u0027 which means something else, and this code is\ninfected with ACPI thinking already).\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "eb4a52bc660ea835482c582eaaf4893742cbd160",
      "tree": "c405de01851eb0a2cdd9aa4f8c2b98d3b1eb7bba",
      "parents": [
        "f59c7b69bcba31cd355ababe067202b9895d6102"
      ],
      "author": {
        "name": "Fenghua Yu",
        "email": "fenghua.yu@intel.com",
        "time": "Fri Mar 27 14:22:43 2009 -0700"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Fri Apr 03 21:45:57 2009 +0100"
      },
      "message": "Intel IOMMU Suspend/Resume Support - Queued Invalidation\n\nThis patch supports queued invalidation suspend/resume.\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "fa4b57cc045d6134b9862b2873f9c8ba9ed53ffe",
      "tree": "7c31d15426e29d86314545be3cf9553ab91ef574",
      "parents": [
        "68a8ca593fac82e336a792226272455901fa83df"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Mon Mar 16 17:05:05 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Tue Mar 17 16:49:30 2009 -0700"
      },
      "message": "x86, dmar: use atomic allocations for QI and Intr-remapping init\n\nImpact: invalid use of GFP_KERNEL in interrupt context\n\nQueued invalidation and interrupt-remapping will get initialized with\ninterrupts disabled (while enabling interrupt-remapping). So use\nGFP_ATOMIC instead of GFP_KERNEL for memory alloacations.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n"
    },
    {
      "commit": "1531a6a6b81a4e6f9eec9a5608758a6ea14b96e0",
      "tree": "3b1523516192fdd19b286879376b4d3d7c827b0d",
      "parents": [
        "eba67e5da6e971993b2899d2cdf459ce77d3dbc5"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Mon Mar 16 17:04:57 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Tue Mar 17 15:39:58 2009 -0700"
      },
      "message": "x86, dmar: start with sane state while enabling dma and interrupt-remapping\n\nImpact: cleanup/sanitization\n\nStart from a sane state while enabling dma and interrupt-remapping, by\nclearing the previous recorded faults and disabling previously\nenabled queued invalidation and interrupt-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n"
    },
    {
      "commit": "eba67e5da6e971993b2899d2cdf459ce77d3dbc5",
      "tree": "1776415c0ed65e6ad309b6790110941fadef243f",
      "parents": [
        "9d783ba042771284fb4ee5013c3d94220755ae7f"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Mon Mar 16 17:04:56 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Tue Mar 17 15:39:20 2009 -0700"
      },
      "message": "x86, dmar: routines for disabling queued invalidation and intr remapping\n\nImpact: new interfaces (not yet used)\n\nRoutines for disabling queued invalidation and interrupt remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n"
    },
    {
      "commit": "9d783ba042771284fb4ee5013c3d94220755ae7f",
      "tree": "102ec9f89d363589108ae35e4b38c12fc6e2765c",
      "parents": [
        "0ac2491f57af5644f88383d28809760902d6f4d7"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Mon Mar 16 17:04:55 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Tue Mar 17 15:38:59 2009 -0700"
      },
      "message": "x86, x2apic: enable fault handling for intr-remapping\n\nImpact: interface augmentation (not yet used)\n\nEnable fault handling flow for intr-remapping aswell. Fault handling\ncode now shared by both dma-remapping and intr-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n"
    },
    {
      "commit": "0ac2491f57af5644f88383d28809760902d6f4d7",
      "tree": "0dcf5875ef83a5bd14cbe37f8b4671a4601cc797",
      "parents": [
        "4c5502b1c5744b2090414e1b80ca6388d5c46e06"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Mon Mar 16 17:04:54 2009 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Tue Mar 17 15:37:06 2009 -0700"
      },
      "message": "x86, dmar: move page fault handling code to dmar.c\n\nImpact: code movement\n\nMove page fault handling code to dmar.c\nThis will be shared both by DMA-remapping and Intr-remapping code.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n"
    },
    {
      "commit": "55f2b78995826d549401bdf20abeac1832636bb6",
      "tree": "931b31f3b6e0879df0f9a1d58ffd040d9a652f2e",
      "parents": [
        "f5c1aa1537be39d8b9bb5279b5881d81898fd3cd",
        "92b9af9e4f144535c65aee673cfad309f25fa465"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Mar 01 12:47:58 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Mar 01 12:47:58 2009 +0100"
      },
      "message": "Merge branch \u0027x86/urgent\u0027 into x86/pat\n"
    },
    {
      "commit": "084eb960e81505680a9963665722d1bfd94af6a7",
      "tree": "cfb6ed5b4449b4ae22b941529ece53ce0c705217",
      "parents": [
        "704126ad81b8cb7d3d70adb9ecb143f4d3fb38af"
      ],
      "author": {
        "name": "Tony Battersby",
        "email": "tonyb@cybernetics.com",
        "time": "Wed Feb 11 13:24:19 2009 -0800"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Sat Feb 14 08:33:34 2009 +0000"
      },
      "message": "intel-iommu: fix endless \"Unknown DMAR structure type\" loop\n\nI have a SuperMicro C2SBX motherboard with BIOS revision 1.0b.  With vt-d\nenabled in the BIOS, Linux gets into an endless loop printing\n\"DMAR:Unknown DMAR structure type\" when booting.  Here is the DMAR ACPI\ntable:\n\nDMAR @ 0x7fe86dec\n  0000: 44 4d 41 52 98 00 00 00 01 6f 49 6e 74 65 6c 20  DMAR.....oIntel\n  0010: 4f 45 4d 44 4d 41 52 20 00 00 04 06 4c 4f 48 52  OEMDMAR ....LOHR\n  0020: 01 00 00 00 23 00 00 00 00 00 00 00 00 00 00 00  ....#...........\n  0030: 01 00 58 00 00 00 00 00 00 a0 e8 7f 00 00 00 00  ..X.............\n  0040: ff ff ef 7f 00 00 00 00 01 08 00 00 00 00 1d 00  ................\n  0050: 01 08 00 00 00 00 1d 01 01 08 00 00 00 00 1d 02  ................\n  0060: 01 08 00 00 00 00 1d 07 01 08 00 00 00 00 1a 00  ................\n  0070: 01 08 00 00 00 00 1a 01 01 08 00 00 00 00 1a 02  ................\n  0080: 01 08 00 00 00 00 1a 07 01 08 00 00 00 00 1a 07  ................\n  0090: c0 00 68 00 04 10 66 60                          ..h...f`\n\nHere are the messages printed by the kernel:\n\nDMAR:Host address width 36\nDMAR:RMRR base: 0x000000007fe8a000 end: 0x000000007fefffff\nDMAR:Unknown DMAR structure type\nDMAR:Unknown DMAR structure type\nDMAR:Unknown DMAR structure type\n...\n\nAlthough I not very familiar with ACPI, to me it looks like struct\nacpi_dmar_header::length \u003d\u003d 0x0058 is incorrect, causing\nparse_dmar_table() to look at an invalid offset on the next loop.  This\noffset happens to have struct acpi_dmar_header::length \u003d\u003d 0x0000, which\nprevents the loop from ever terminating.  This patch checks for this\ncondition and bails out instead of looping forever.\n\nSigned-off-by: Tony Battersby \u003ctonyb@cybernetics.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "8e1568f3500287d0b36c9776132cb53a42d5651d",
      "tree": "82740294d41f0e6268b5c3b44f08ef4be5bed708",
      "parents": [
        "b825e6cc7b1401862531df497a4a4daff8102ed5"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yinghai@kernel.org",
        "time": "Wed Feb 11 01:06:59 2009 -0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Feb 11 14:20:10 2009 +0100"
      },
      "message": "pci, x86, acpi: fix early_ioremap() leak\n\nPawel reported:\n------------[ cut here ]------------\nWARNING: at arch/x86/mm/ioremap.c:616 check_early_ioremap_leak+0x52/0x67()\nHardware name:\nDebug warning: early ioremap leak of 1 areas detected.\nModules linked in:\nPid: 1, comm: swapper Not tainted 2.6.29-rc4-tip #2\n...\n\nReported-by: Pawel Dziekonski \u003cdzieko@gmail.com\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "704126ad81b8cb7d3d70adb9ecb143f4d3fb38af",
      "tree": "e73c4d595799661757b7505cd67833addef0635e",
      "parents": [
        "43f7392ba9e2585bf34f21399b1ed78692b5d437"
      ],
      "author": {
        "name": "Yu Zhao",
        "email": "yu.zhao@intel.com",
        "time": "Sun Jan 04 16:28:52 2009 +0800"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Mon Feb 09 11:03:17 2009 +0000"
      },
      "message": "VT-d: handle Invalidation Queue Error to avoid system hang\n\nWhen hardware detects any error with a descriptor from the invalidation\nqueue, it stops fetching new descriptors from the queue until software\nclears the Invalidation Queue Error bit in the Fault Status register.\nFollowing fix handles the IQE so the kernel won\u0027t be trapped in an\ninfinite loop.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "43f7392ba9e2585bf34f21399b1ed78692b5d437",
      "tree": "c39a18e7bd3185bdfae392b8074fff75a90f39eb",
      "parents": [
        "8e4921515c1a379539607eb443d51c30f4f7f338"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Sat Jan 03 23:56:27 2009 +0100"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Mon Feb 09 10:00:53 2009 +0000"
      },
      "message": "intel-iommu: fix build error with INTR_REMAP\u003dy and DMAR\u003dn\n\nThis fix should be safe since iommu-\u003eagaw is only used in intel-iommu.c.\nAnd this file is only compiled with DMAR\u003dy.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "1b5736839ae13dadc5947940144f95dd0f4a4a8c",
      "tree": "2b6ce6b68850d905e4ce5d38b6872b82f6328208",
      "parents": [
        "8c11e798eee2ce4475134eaf61302b28ea4f205d"
      ],
      "author": {
        "name": "Weidong Han",
        "email": "weidong.han@intel.com",
        "time": "Mon Dec 08 15:34:06 2008 +0800"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Sat Jan 03 14:02:18 2009 +0100"
      },
      "message": "calculate agaw for each iommu\n\n\"SAGAW\" capability may be different across iommus. Use a default agaw, but if default agaw is not supported in some iommus, choose a less supported agaw.\n\nSigned-off-by: Weidong Han \u003cweidong.han@intel.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n"
    },
    {
      "commit": "2e824f79240476d57a8589f46232cabf151efe90",
      "tree": "0e6011ff3237ba92ddae39029ea501358c7de6b7",
      "parents": [
        "19c239ce3d089fee339d1ab7e97b43d6f0557ce5"
      ],
      "author": {
        "name": "Yu Zhao",
        "email": "yu.zhao@intel.com",
        "time": "Mon Dec 22 16:54:58 2008 +0800"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Sat Jan 03 12:05:28 2009 +0100"
      },
      "message": "VT-d: fix segment number being ignored when searching DRHD\n\nOn platforms with multiple PCI segments, any of the segments can have a DRHD\nwith INCLUDE_PCI_ALL flag. So need to check the DRHD\u0027s segment number against\nthe PCI device\u0027s when searching its DRHD.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n"
    },
    {
      "commit": "b876d08f816527af257e13d89fb0d3b4b849223c",
      "tree": "40569f568230f918ca55f04b355e251747f913ed",
      "parents": [
        "b364776ad1208a71f0c53578c84619a395412a8d",
        "2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4"
      ],
      "author": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Tue Oct 21 19:42:20 2008 +0100"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Tue Oct 21 19:42:20 2008 +0100"
      },
      "message": "Merge branch \u0027master\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6\n\nConflicts:\n\n\tdrivers/pci/dmar.c\n"
    },
    {
      "commit": "9301975ec251bab1ad7cfcb84a688b26187e4e4a",
      "tree": "91e48be0bdc67cbcb75bc8a299a3dcf168e0a814",
      "parents": [
        "7110879cf2afbfb7af79675f5ff109e63d631c25",
        "dd3a1db900f2a215a7d7dd71b836e149a6cf5fed"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Mon Oct 20 13:22:50 2008 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Mon Oct 20 13:23:01 2008 -0700"
      },
      "message": "Merge branch \u0027genirq-v28-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\nThis merges branches irq/genirq, irq/sparseirq-v4, timers/hpet-percpu\nand x86/uv.\n\nThe sparseirq branch is just preliminary groundwork: no sparse IRQs are\nactually implemented by this tree anymore - just the new APIs are added\nwhile keeping the old way intact as well (the new APIs map 1:1 to\nirq_desc[]).  The \u0027real\u0027 sparse IRQ support will then be a relatively\nsmall patch ontop of this - with a v2.6.29 merge target.\n\n* \u0027genirq-v28-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (178 commits)\n  genirq: improve include files\n  intr_remapping: fix typo\n  io_apic: make irq_mis_count available on 64-bit too\n  genirq: fix name space collisions of nr_irqs in arch/*\n  genirq: fix name space collision of nr_irqs in autoprobe.c\n  genirq: use iterators for irq_desc loops\n  proc: fixup irq iterator\n  genirq: add reverse iterator for irq_desc\n  x86: move ack_bad_irq() to irq.c\n  x86: unify show_interrupts() and proc helpers\n  x86: cleanup show_interrupts\n  genirq: cleanup the sparseirq modifications\n  genirq: remove artifacts from sparseirq removal\n  genirq: revert dynarray\n  genirq: remove irq_to_desc_alloc\n  genirq: remove sparse irq code\n  genirq: use inline function for irq_to_desc\n  genirq: consolidate nr_irqs and for_each_irq_desc()\n  x86: remove sparse irq from Kconfig\n  genirq: define nr_irqs for architectures with GENERIC_HARDIRQS\u003dn\n  ...\n"
    },
    {
      "commit": "f82851a8a480a26611175f064f54e17f5f7b01ae",
      "tree": "6649d01d7adb0f1e3e5357f10082cb9823d2a40d",
      "parents": [
        "bb9e6d65078da2f38cfe1067cfd31a896ca867c0"
      ],
      "author": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Sat Oct 18 15:43:14 2008 +0100"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Sat Oct 18 15:45:48 2008 +0100"
      },
      "message": "dmar: fix uninitialised \u0027ret\u0027 variable in dmar_parse_dev()\n\nThis was introduced by commit 1886e8a90a580f3ad343f2065c84c1b9e1dac9ef\n(\"x64, x2apic/intr-remap: code re-structuring, to be used by both DMA\nand Interrupt remapping\"). It was causing bogus results to be returned\nfrom dmar_parse_dev() when the first unit with the INCLUDE_ALL flag was\nprocessed.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "5b6985ce8ec7127b4d60ad450b64ca8b82748a3b",
      "tree": "f1d5a27601df04a3481690a1a2f90fc688034aff",
      "parents": [
        "cacd4213d8ffed83676f38d5d8e93c673e0f1af7"
      ],
      "author": {
        "name": "Fenghua Yu",
        "email": "fenghua.yu@intel.com",
        "time": "Thu Oct 16 18:02:32 2008 -0700"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Sat Oct 18 14:29:15 2008 +0100"
      },
      "message": "intel-iommu: IA64 support\n\nThe current Intel IOMMU code assumes that both host page size and Intel\nIOMMU page size are 4KiB. The first patch supports variable page size.\nThis provides support for IA64 which has multiple page sizes.\n\nThis patch also adds some other code hooks for IA64 platform including\nDMAR_OPERATION_TIMEOUT definition.\n\n[dwmw2: some cleanup]\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "cacd4213d8ffed83676f38d5d8e93c673e0f1af7",
      "tree": "ffaba6f6b6597973ac7f605809446621dbc8fc6c",
      "parents": [
        "a77b67d4023770805141014b8fa9eb5467457817"
      ],
      "author": {
        "name": "Youquan Song",
        "email": "youquan.song@intel.com",
        "time": "Thu Oct 16 16:31:57 2008 -0700"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Fri Oct 17 08:05:30 2008 +0100"
      },
      "message": "dmar: remove the quirk which disables dma-remapping when intr-remapping enabled\n\nNow that we have DMA-remapping support for queued invalidation, we\ncan enable both DMA-remapping and interrupt-remapping at the same time.\n\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "3481f21097cb560392c411377893b5109fbde557",
      "tree": "5bc3165cb45a0d4bc04ce3d945b5ec8483939ed7",
      "parents": [
        "f05810c9962bba3e809f07619bda1bfdebbfbfb9"
      ],
      "author": {
        "name": "Youquan Song",
        "email": "youquan.song@intel.com",
        "time": "Thu Oct 16 16:31:55 2008 -0700"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Fri Oct 17 08:03:14 2008 +0100"
      },
      "message": "dmar: context cache and IOTLB invalidation using queued invalidation\n\nImplement context cache invalidate and IOTLB invalidation using\nqueued invalidation interface. This interface will be used by\nDMA remapping, when queued invalidation is supported.\n\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "f05810c9962bba3e809f07619bda1bfdebbfbfb9",
      "tree": "d226f13a0d93cda208f9aea85d2a9ac29086f3e1",
      "parents": [
        "2e532d68a2b3e2aa6b19731501222069735c741c"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Oct 16 16:31:54 2008 -0700"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "David.Woodhouse@intel.com",
        "time": "Fri Oct 17 08:03:05 2008 +0100"
      },
      "message": "dmar: use spin_lock_irqsave() in qi_submit_sync()\n\nNext patch in the series will use queued invalidation interface\nqi_submit_sync() for DMA-remapping aswell, which can be called from interrupt\ncontext.\n\nSo use spin_lock_irqsave() instead of spin_lock() in qi_submit_sync().\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n"
    },
    {
      "commit": "1c7d1bcad218808a4f67a4492a5e1d920e85c239",
      "tree": "c38074ceba9a32fd42a815b459205cc0ed715923",
      "parents": [
        "04e2ea67069e285404192a35c24dfe7c53b9c61f"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Wed Sep 03 16:58:35 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:05 2008 +0200"
      },
      "message": "dmar: fix dmar_parse_dev() devices_cnt error condition check\n\nIt is possible that,\ninstead of PCI endpoint/sub-hierarchy structures, only IO-APIC/HPET\ndevices may be reported under device scope structures. Fix the devices_cnt\nerror check, which cares about only PCI structures and removes the\ndma-remapping unit structure (dmaru) when the devices_cnt is zero\nand include_all flag is not set.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "04e2ea67069e285404192a35c24dfe7c53b9c61f",
      "tree": "38386a8889d61b64d595172b52de96d9f501cc89",
      "parents": [
        "74d04bd7dcb4c6130fd8a314d28bfecc9ae7c360"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Wed Sep 03 16:58:34 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:05 2008 +0200"
      },
      "message": "dmar: use list_for_each_entry_safe() in dmar_dev_scope_init()\n\nIn dmar_dev_scope_init(), functions called under for_each_drhd_unit()/\nfor_each_rmrr_units() can delete the list entry under some error conditions.\n\nSo we should use list_for_each_entry_safe() for safe traversal.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "74d04bd7dcb4c6130fd8a314d28bfecc9ae7c360",
      "tree": "90efec3fc887afb79ec86ea7b7a190244579d1b6",
      "parents": [
        "f6dd5c3106fb283e37d915eeb33019ef40510f85"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yhlu.kernel@gmail.com",
        "time": "Wed Sep 03 16:58:33 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:05 2008 +0200"
      },
      "message": "dmar: initialize the return value in dmar_parse_dev()\n\ninitialize the return value in dmar_parse_dev()\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "f6dd5c3106fb283e37d915eeb33019ef40510f85",
      "tree": "61d95e10b63847c8dfdc13e40e7e3291427d3123",
      "parents": [
        "a11b5abef50722e42a7d13f6b799c4f606fcb797"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yhlu.kernel@gmail.com",
        "time": "Wed Sep 03 16:58:32 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:04 2008 +0200"
      },
      "message": "dmar: fix using early fixmap mapping for DMAR table parsing\n\nVery early detection of the DMAR tables will setup fixmap mapping. For\nparsing these tables later (while enabling dma and/or interrupt remapping),\nearly fixmap mapping shouldn\u0027t be used. Fix it by calling table detection\nroutines again, which will call generic apci_get_table() for setting up\nthe correct mapping.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "387179464257921eb9aa3d15cc3ff194f6945a7c",
      "tree": "a7f06903688df8a1d3231faf1ab68bf80e032ea6",
      "parents": [
        "aa3a816b6d0bd59e1a9c548cc7d2dd829f26534f"
      ],
      "author": {
        "name": "Kay, Allen M",
        "email": "allen.m.kay@intel.com",
        "time": "Tue Sep 09 18:37:29 2008 +0300"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Wed Oct 15 14:24:08 2008 +0200"
      },
      "message": "VT-d: Changes to support KVM\n\nThis patch extends the VT-d driver to support KVM\n\n[Ben: fixed memory pinning]\n[avi: move dma_remapping.h as well]\n\nSigned-off-by: Kay, Allen M \u003callen.m.kay@intel.com\u003e\nSigned-off-by: Weidong Han \u003cweidong.han@intel.com\u003e\nSigned-off-by: Ben-Ami Yassour \u003cbenami@il.ibm.com\u003e\nSigned-off-by: Amit Shah \u003camit.shah@qumranet.com\u003e\nAcked-by: Mark Gross \u003cmgross@linux.intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n"
    },
    {
      "commit": "1cb11583a6c4ceda7426eb36f7bf0419da8dfbc2",
      "tree": "ee13b5125001f49fc162719cf5412f87707df54a",
      "parents": [
        "32e1d0a0651004f5fe47f85a2a5c725ad579a90c"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:51 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:45:00 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detected (temporary quirk)\n\nInterrupt-remapping enables queued invalidation. And once queued invalidation\nis enabled, IOTLB invalidation also needs to use the queued invalidation\nmechanism and the register based IOTLB invalidation doesn\u0027t work.\n\nFor now, Support for IOTLB invalidation using queued invalidation is\nmissing. Meanwhile, disable DMA-remapping, if Interrupt-remapping\nsupport is detected.\n\nFor the meanwhile, if someone wants to really enable DMA-remapping, they\ncan use nox2apic, which will disable interrupt-remapping and as such\ndoesn\u0027t enable queued invalidation.\n\nAnd given that none of the release platforms support intr-remapping yet,\nwe should be ok for this temporary hack.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "2ae21010694e56461a63bfc80e960090ce0a5ed9",
      "tree": "d4ecdb710c4361df473b063eda9e1426fcf5c309",
      "parents": [
        "fe962e90cb17a8426e144dee970e77ed789d98ee"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:43 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:53 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Interrupt remapping infrastructure\n\nInterrupt remapping (part of Intel Virtualization Tech for directed I/O)\ninfrastructure.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "fe962e90cb17a8426e144dee970e77ed789d98ee",
      "tree": "c7b3343df9bf58e047333758a89c78f6615fb97b",
      "parents": [
        "cf1337f0447e5be8e66daa944f0ea3bcac2b6179"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:42 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:52 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d)\n\nQueued invalidation (part of Intel Virtualization Technology for\nDirected I/O architecture) infrastructure.\n\nThis will be used for invalidating the interrupt entry cache in the\ncase of Interrupt-remapping and IOTLB invalidation in the case\nof DMA-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ad3ad3f6a2caebf56869b83b69e23eb9fa5e0ab6",
      "tree": "7bc99dde6a6313eb43783086a33f6eebc1da1907",
      "parents": [
        "2d6b5f85bb4ca919d8ab0f30311309b53fb93bc3"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:40 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:50 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: parse ioapic scope under vt-d structures\n\nParse the vt-d device scope structures to find the mapping between IO-APICs\nand the interrupt remapping hardware units.\n\nThis will be used later for enabling Interrupt-remapping for IOAPIC devices.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "2d6b5f85bb4ca919d8ab0f30311309b53fb93bc3",
      "tree": "518ea92478e5d39a41db9dc89d78976fec7254f2",
      "parents": [
        "aaa9d1dd63bf89b62f4ea9f46de376ab1a3fbc6c"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:39 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:50 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection\n\nPresence of RMRR structures is not compulsory for enabling DMA-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Yong Y Wang \u003cyong.y.wang@intel.com\u003e\nCc: Yong Y Wang \u003cyong.y.wang@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "aaa9d1dd63bf89b62f4ea9f46de376ab1a3fbc6c",
      "tree": "918c5fc937ea45f26660742a0a9a0d6c22df68f1",
      "parents": [
        "1886e8a90a580f3ad343f2065c84c1b9e1dac9ef"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:38 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:49 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code\n\nDMA remapping specific code covered with CONFIG_DMAR in\nthe generic code which will also be used later for enabling Interrupt-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "1886e8a90a580f3ad343f2065c84c1b9e1dac9ef",
      "tree": "1f0a6b536a1bb7b24585973e70ad8e1a9a076f09",
      "parents": [
        "c42d9f32443397aed2d37d37df161392e6a5862f"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:37 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:48 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Interrupt remapping\n\nAllocate the iommu during the parse of DMA remapping hardware\ndefinition structures. And also, introduce routines for device\nscope initialization which will be explicitly called during\ndma-remapping initialization.\n\nThese will be used for enabling interrupt remapping separately from the\nexisting DMA-remapping enabling sequence.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "c42d9f32443397aed2d37d37df161392e6a5862f",
      "tree": "564126849bb2e31d2cfb719c3b03457a597733d2",
      "parents": [
        "e61d98d8dad0048619bb138b0ff996422ffae53b"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:36 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:47 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus\n\nClean up the intel-iommu code related to deferred iommu flush logic. There is\nno need to allocate all the iommu\u0027s as a sequential array.\n\nThis will be used later in the interrupt-remapping patch series to\nallocate iommu much early and individually for each device remapping\nhardware unit.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "e61d98d8dad0048619bb138b0ff996422ffae53b",
      "tree": "f31fe1610a082e0e12605db879ff56546ad971e5",
      "parents": [
        "1ba89386db0a3f39590b90b5dd20d7149ae52de0"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:35 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:46 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization\n\ncode reorganization of the generic Intel vt-d parsing related routines and linux\niommu routines specific to Intel vt-d.\n\ndrivers/pci/dmar.c\tnow contains the generic vt-d parsing related routines\ndrivers/pci/intel_iommu.c contains the iommu routines specific to vt-d\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "98bcef56cadb4da138e2c1a2a0790f372382b236",
      "tree": "a33c72c26d6075e3bab1c27791ccbabac7ebd0af",
      "parents": [
        "eaeb16883bd6aa2d6b6b61b825c0d2b0dc793f60"
      ],
      "author": {
        "name": "mark gross",
        "email": "mgross@linux.intel.com",
        "time": "Sat Feb 23 15:23:35 2008 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Sat Feb 23 17:12:14 2008 -0800"
      },
      "message": "copyright owner and author clean up for intel iommu and related files\n\nThe following is a clean up and correction of the copyright holding\nentities for the files associated with the intel iommu code.\n\nSigned-off-by: \u003cmgross@linux.intel.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "f661197e0a95ec7305e1e790d95b72a74a1c4a0f",
      "tree": "a6916d877a3d9db9bc658758bd347d4f436f6d59",
      "parents": [
        "b1ed88b47f5e18c6efb8041275c16eeead5377df"
      ],
      "author": {
        "name": "David Miller",
        "email": "davem@davemloft.net",
        "time": "Wed Feb 06 01:36:23 2008 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Wed Feb 06 10:41:01 2008 -0800"
      },
      "message": "Genericizing iova.[ch]\n\nI would like to potentially move the sparc64 IOMMU code over to using\nthe nice new drivers/pci/iova.[ch] code for free area management..\n\nIn order to do that we have to detach the IOMMU page size assumptions\nwhich only really need to exist in the intel-iommu.[ch] code.\n\nThis patch attempts to implement that.\n\n[akpm@linux-foundation.org: build fix]\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "093f87d279669c74e84530e925e4735c9aae8898",
      "tree": "b388fed2eaedde4ad103d706666c84e5799dbe04",
      "parents": [
        "652c538eb5bc3fa04bc5f27db9014f0168aefe97"
      ],
      "author": {
        "name": "Fenghua Yu",
        "email": "fenghua.yu@intel.com",
        "time": "Wed Nov 21 15:07:14 2007 -0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Fri Feb 01 15:04:21 2008 -0800"
      },
      "message": "PCI: More Sanity checks for DMAR\n\nAdd and changes a few sanity checks in dmar.c.\n\n1.  The haw field in ACPI DMAR table in VT-d spec doesn\u0027t describe the\n   range of haw.  But since DMA page size is 4KB in DMA remapping, haw\n   should be at least 4KB.  The current VT-d code in dmar.c returns failure\n   when haw\u003d\u003d0.  This sanity check is not accurate and execution can pass\n   when haw is less than one page size 4KB.  This patch changes the haw\n   sanity check to validate if haw is less than 4KB.\n\n2. Add dmar_rmrr_units verification.\n\n3. Add parse_dmar_table() verification.\n\n[akpm@linux-foundation.org: coding-style fixes]\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nAcked-by: mark gross \u003cmgross@linux.intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    },
    {
      "commit": "10e5247f40f3bf7508a0ed2848c9cae37bddf4bc",
      "tree": "adca606f00ebcbdbdc5c474f012105d7e59152f6",
      "parents": [
        "89910cccb8fec0c1140d33a743e72a712efd4f05"
      ],
      "author": {
        "name": "Keshavamurthy, Anil S",
        "email": "anil.s.keshavamurthy@intel.com",
        "time": "Sun Oct 21 16:41:41 2007 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Mon Oct 22 08:13:18 2007 -0700"
      },
      "message": "Intel IOMMU: DMAR detection and parsing logic\n\nThis patch supports the upcomming Intel IOMMU hardware a.k.a.  Intel(R)\nVirtualization Technology for Directed I/O Architecture and the hardware spec\nfor the same can be found here\nhttp://www.intel.com/technology/virtualization/index.htm\n\nFAQ! (questions from akpm, answers from ak)\n\n\u003e So...  what\u0027s all this code for?\n\u003e\n\u003e I assume that the intent here is to speed things up under Xen, etc?\n\nYes in some cases, but not this code.  That would be the Xen version of this\ncode that could potentially assign whole devices to guests.  I expect this to\nbe only useful in some special cases though because most hardware is not\nvirtualizable and you typically want an own instance for each guest.\n\nOk at some point KVM might implement this too; i likely would use this code\nfor this.\n\n\u003e Do we\n\u003e have any benchmark results to help us to decide whether a merge would be\n\u003e justified?\n\nThe main advantage for doing it in the normal kernel is not performance, but\nmore safety.  Broken devices won\u0027t be able to corrupt memory by doing random\nDMA.\n\nUnfortunately that doesn\u0027t work for graphics yet, for that need user space\ninterfaces for the X server are needed.\n\nThere are some potential performance benefits too:\n\n- When you have a device that cannot address the complete address range an\n  IOMMU can remap its memory instead of bounce buffering.  Remapping is likely\n  cheaper than copying.\n\n- The IOMMU can merge sg lists into a single virtual block.  This could\n  potentially speed up SG IO when the device is slow walking SG lists.  [I\n  long ago benchmarked 5% on some block benchmark with an old MPT Fusion; but\n  it probably depends a lot on the HBA]\n\nAnd you get better driver debugging because unexpected memory accesses from\nthe devices will cause a trappable event.\n\n\u003e\n\u003e Does it slow anything down?\n\nIt adds more overhead to each IO so yes.\n\nThis patch:\n\nAdd support for early detection and parsing of DMAR\u0027s (DMA Remapping) reported\nto OS via ACPI tables.\n\nDMA remapping(DMAR) devices support enables independent address translations\nfor Direct Memory Access(DMA) from Devices.  These DMA remapping devices are\nreported via ACPI tables and includes pci device scope covered by these DMA\nremapping device.\n\nFor detailed info on the specification of \"Intel(R) Virtualization Technology\nfor Directed I/O Architecture\" please see\nhttp://www.intel.com/technology/virtualization/index.htm\n\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nCc: \"Siddha, Suresh B\" \u003csuresh.b.siddha@intel.com\u003e\nCc: Arjan van de Ven \u003carjan@infradead.org\u003e\nCc: Ashok Raj \u003cashok.raj@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Christoph Lameter \u003cclameter@sgi.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    }
  ]
}