)]}' { "log": [ { "commit": "c7769c01acffde8e63e1de558f941325b41818c0", "tree": "5f6b2f9d2f445af168e041e829018d2f0de5a5cd", "parents": [ "ad790d055e741577d3d931fbfdb1d74ed6fa0230" ], "author": { "name": "Wentao Xu", "email": "wentaox@codeaurora.org", "time": "Fri Aug 03 15:06:41 2012 -0400" }, "committer": { "name": "Wentao Xu", "email": "wentaox@codeaurora.org", "time": "Mon Aug 13 10:09:38 2012 -0400" }, "message": "input: mpu3050: make sample rate configurable, and use interrupt\n\nRequired by 8x30 platform\n\nChange-Id: I51b39e1ee5e367fd72151854e3d421538074d6d6\nSigned-off-by: Wentao Xu \u003cwentaox@codeaurora.org\u003e\n" }, { "commit": "ad790d055e741577d3d931fbfdb1d74ed6fa0230", "tree": "209a50ace4d42d5d39d27ed941375cf4ef329e85", "parents": [ "6336f942e8aad713e04cd16d61b50fd5806f6b81", "8c2246d10e2812200d54443c86a3a3cde962b2ba" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Aug 13 06:18:34 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Aug 13 06:18:34 2012 -0700" }, "message": "Merge changes Id877781f,I2fe0d874 into msm-3.4\n\n* changes:\n msm: pil-q6v5: Update clock calls to fix MSS PIL with full bootchain\n msm: clock-8974: Add clock to allow MSS to access memory\n" }, { "commit": "6336f942e8aad713e04cd16d61b50fd5806f6b81", "tree": "8cf49182700c7aa0876a70304763fdba4f33f931", "parents": [ "10dd631df74c738dc9dbad6a54c14b4c80772093", "f3af59dd82be29a7d8c815473a2faaf4b3adbbc9" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Aug 13 06:18:31 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Aug 13 06:18:31 2012 -0700" }, "message": "Merge \"usb: gadget: Fixed QMI packets error handling\" into msm-3.4" }, { "commit": "10dd631df74c738dc9dbad6a54c14b4c80772093", "tree": "2910db309dae31fd3dbafebb75614f34fce5182a", "parents": [ "e138be69307dca8763b284bd601aeb5f7e96eb4e", "077943c80dc82358d1d8a143f8f88613c9e925d5" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Aug 13 06:18:27 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Aug 13 06:18:27 2012 -0700" }, "message": "Merge \"msm: vidc: Reduce the priority of incorrect PAR value message\" into msm-3.4" }, { "commit": "e138be69307dca8763b284bd601aeb5f7e96eb4e", "tree": "5c896a63d7dd1d28ab8a302c305f2f3732923024", "parents": [ "2ebc5d3bb44a34facd6a67afd1d225c8817394b8", "c0d4ea40ee2de10190d2f857c840f80e877f444d" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Aug 13 06:18:24 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Aug 13 06:18:24 2012 -0700" }, "message": "Merge \"media: dvb: mpq: Fine-tune TSIF and TSPP buffers sizes\" into msm-3.4" }, { "commit": "c0d4ea40ee2de10190d2f857c840f80e877f444d", "tree": "5b6d309cc17bc03a1cb433596234a43abf9d8a4e", "parents": [ "94bc0abf3091832721a93a39bc3afa88a7d73368" ], "author": { "name": "Hamad Kadmany", "email": "hkadmany@codeaurora.org", "time": "Mon Aug 13 11:45:06 2012 +0300" }, "committer": { "name": "Hamad Kadmany", "email": "hkadmany@codeaurora.org", "time": "Mon Aug 13 11:45:06 2012 +0300" }, "message": "media: dvb: mpq: Fine-tune TSIF and TSPP buffers sizes\n\nMaximum allowed size of BAM descriptor is 32K-1, the size\nallocated by demux was changed accordingly. Notifications\nfrom TSPP driver is set based on number of descriptors and\nnot on number of bytes.\n\nTSIF buffer was enlarged to cope with 80Mbit/sec streams\n\nChange-Id: Ic9a9f0a5144293ac30e5548bbbb4d284d72c3a9e\nSigned-off-by: Hamad Kadmany \u003chkadmany@codeaurora.org\u003e\n" }, { "commit": "2ebc5d3bb44a34facd6a67afd1d225c8817394b8", "tree": "a271d24bf3ee888496aecd1d2faea5a689167ace", "parents": [ "b08cb46c81643d08212311e912693fef15a58c10", "ac297ca14edb2b4072b1489da2eec8fbc765c073" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 23:57:20 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 23:57:20 2012 -0700" }, "message": "Merge \"defconfig: 8974: Enable OCMEM power debug mode\" into msm-3.4" }, { "commit": "8c2246d10e2812200d54443c86a3a3cde962b2ba", "tree": "9207ffdc01449e000ccf92dbf26dc0258bedfd7e", "parents": [ "31926eb60675ab32da9bb2de5281481e3405b31b" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 17:08:04 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 20:26:09 2012 -0700" }, "message": "msm: pil-q6v5: Update clock calls to fix MSS PIL with full bootchain\n\nLPASS and MSS have different requirements related to the order that\ntheir clocks are enable/disabled and resets are asserted/de-asserted.\nCurrently, this causes \u0027clock stuck off\u0027 warnings in the kernel logs\nwhen MSS is booted multiple times.\n\nFix this by reordering the MSS clock calls so that the core_clk reset\nis de-asserted prior to enabling its iface_clk. Because doing this\nwould break LPASS (which requires iface_clk to be on for the core_clk\nreset de-assertion to work), we are forced to separate the MSS and\nLPASS clock sequences into separate functions and move them into their\nrespective PIL files.\n\nMSS PIL also requires an additional clock that is added as part of\nthis fixup. The gcc_mss_q6_bimc_axi_clk is needed for the MSS Q6\nto access memory.\n\nChange-Id: Id877781f201a7267f72b52045ed2b87ebf7b4e05\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "31926eb60675ab32da9bb2de5281481e3405b31b", "tree": "76da27403a0bc115e024072fe1cfa9115ab4df60", "parents": [ "b08cb46c81643d08212311e912693fef15a58c10" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Sun Aug 12 19:58:08 2012 -0700" }, "committer": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Sun Aug 12 20:04:32 2012 -0700" }, "message": "msm: clock-8974: Add clock to allow MSS to access memory\n\nThe MSS subsystem needs the gcc_mss_q6_bimc_axi_clk to be turned\non to allow the modem Q6 to access DDR. Add support for this\nclock.\n\nChange-Id: I2fe0d8740143d8f18eb5c8770bc4c4b07339c060\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "b08cb46c81643d08212311e912693fef15a58c10", "tree": "f28c9e6e8cbaf2403cb52fe5939b8f36007caf68", "parents": [ "5a62dd4a7aa4378d47a451b1b4216651657ee18b", "b2c78be5d4d055cebe5469404193f0a8dc0e0a08" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 19:15:47 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 19:15:47 2012 -0700" }, "message": "Merge changes I1bdd4d8f,I38ecf1ce,Ic978bfb4,Ie2a9f235,I32e5dbcc into msm-3.4\n\n* changes:\n msm: pil-q6v5-lpass: Enable lpass_q6_axi_clk\n msm: clock-8974: Add lpass_q6_axi_clk for PIL\n msm: clock-8974: Switch slimbus core clock frequency to 24.576 MHz.\n msm: platsmp: Support the full boot chain for 8974\n Revert \"msm: clock-8974: Set GCC_BOOT_CLOCK_* registers to not force-on clocks\"\n" }, { "commit": "5a62dd4a7aa4378d47a451b1b4216651657ee18b", "tree": "286448885f77b7b2668f67d54b06b609266b001a", "parents": [ "55e0edc14ac9b9a4fa3500c086e71824d767b18c", "c77e4a6b28173ce34f5fd95517589c9550d5428b" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 13:30:03 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 13:30:03 2012 -0700" }, "message": "Merge \"msm: watchdog: Get the base and irq from platform data\" into msm-3.4" }, { "commit": "55e0edc14ac9b9a4fa3500c086e71824d767b18c", "tree": "4b46feaa87d42806819d5a5b1ffc1e0da250677c", "parents": [ "c743a3995e3352ebef2c470996df2796aa5a7509", "97ad00dc3702615c66f58e691cf5ca63707a0db5" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 13:30:02 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 13:30:02 2012 -0700" }, "message": "Merge \"msm: Fix names used in the crypto driver.\" into msm-3.4" }, { "commit": "b2c78be5d4d055cebe5469404193f0a8dc0e0a08", "tree": "f12dd59d0710e2f5e417b953bc140edc8b28b4a7", "parents": [ "3454e9e81113d82be8addcf970cc4852e1062504" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sat Aug 11 18:55:45 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 12:49:00 2012 -0700" }, "message": "msm: pil-q6v5-lpass: Enable lpass_q6_axi_clk\n\nThis clock must be enabled for the LPASS Q6 to access the memory\nfrom which it will execute.\n\nChange-Id: I1bdd4d8fb32d85c28296de3827f70505be7ee70e\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "3454e9e81113d82be8addcf970cc4852e1062504", "tree": "7570c9e7b186ed6bc2ea11bc9540cfe38a9e898a", "parents": [ "94d531c27e6209c518523633952bc663f796ec6b" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Sat Aug 11 20:18:42 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 12:48:53 2012 -0700" }, "message": "msm: clock-8974: Add lpass_q6_axi_clk for PIL\n\nThe PIL driver needs to enable a clock required by the\nLPASS subsystem. Add support for this clock.\n\nChange-Id: I38ecf1ce84939967b633b0ef37b764893ec19252\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "94d531c27e6209c518523633952bc663f796ec6b", "tree": "fdcd4a420b0b60c5d6101040025337e7bdfa51fe", "parents": [ "2517372b6ca53cd2eb5e3c3e9830d96675ff8148" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Sat Aug 11 18:50:27 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 12:48:20 2012 -0700" }, "message": "msm: clock-8974: Switch slimbus core clock frequency to 24.576 MHz.\n\nThe slimbus driver needs a frequency of 24.576 MHz from their\ncore clock.\n\nChange-Id: Ic978bfb47f944778613954db12d7b373b7e8751f\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "2517372b6ca53cd2eb5e3c3e9830d96675ff8148", "tree": "bad1a4cb26f3e1c9b35dd9489d43ff27837a9d59", "parents": [ "faa45d7e267abc48fd9010fcf7bce4d2c0ade8d5" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Thu Aug 09 13:43:02 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 12:40:02 2012 -0700" }, "message": "msm: platsmp: Support the full boot chain for 8974\n\nWith the full boot chain, the secondary CPUs are held in\nreset until the primary CPU explicitly releases them from\nreset.\n\nChange-Id: Ie2a9f235386133d570dc826fe1cf5b44587a0706\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "faa45d7e267abc48fd9010fcf7bce4d2c0ade8d5", "tree": "7aed3475bdb9a574981f4ba003147ea52e7bb934", "parents": [ "c743a3995e3352ebef2c470996df2796aa5a7509" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Sat Aug 11 22:15:53 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Sun Aug 12 12:40:02 2012 -0700" }, "message": "Revert \"msm: clock-8974: Set GCC_BOOT_CLOCK_* registers to not force-on clocks\"\n\nThe GCC_BOOT_CLOCK_* register forces on certain USB and Krait\nclocks. Clearing these registers is causing unclocked accesses\nor possibly removing the clock from under the CPU. Temporarily\nleave these registers alone.\n\nThis reverts commit fc3c55c65927f977185969f9b01b4b6e391f78ac.\n\nChange-Id: I32e5dbcce94c931e1c56a42483e6cdeca479f055\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "c77e4a6b28173ce34f5fd95517589c9550d5428b", "tree": "2c4e7af27a1058e361e1ecedf982fce1611d0e74", "parents": [ "c743a3995e3352ebef2c470996df2796aa5a7509" ], "author": { "name": "Rohit Vaswani", "email": "rvaswani@codeaurora.org", "time": "Thu Aug 09 18:10:28 2012 -0700" }, "committer": { "name": "Rohit Vaswani", "email": "rvaswani@codeaurora.org", "time": "Sun Aug 12 11:40:18 2012 -0700" }, "message": "msm: watchdog: Get the base and irq from platform data\n\nThe FSM targets need to use the Watchdog1 timer instead of the\nWatchdog0 timer. Add support to get the base and the interrupt\ninformation from the platform data so that the watchdog driver\ncan support both WDT0 and WDT1.\n\nChange-Id: Ibce013c0287e34dbd702d75dab2c3f321132e9ed\nSigned-off-by: Rohit Vaswani \u003crvaswani@codeaurora.org\u003e\n" }, { "commit": "ac297ca14edb2b4072b1489da2eec8fbc765c073", "tree": "c15e1a17070072e12658246e8b54e4be59179746", "parents": [ "c743a3995e3352ebef2c470996df2796aa5a7509" ], "author": { "name": "Naveen Ramaraj", "email": "nramaraj@codeaurora.org", "time": "Sat Aug 11 23:39:26 2012 -0700" }, "committer": { "name": "Naveen Ramaraj", "email": "nramaraj@codeaurora.org", "time": "Sun Aug 12 08:59:23 2012 -0700" }, "message": "defconfig: 8974: Enable OCMEM power debug mode\n\nEnable OCMEM power debug and OCMEM power control\ndisable mode until all power operations are verified with RPM.\n\nChange-Id: I915ef53d1b84344f3cdef8f45f94eafa067b0172\nSigned-off-by: Naveen Ramaraj \u003cnramaraj@codeaurora.org\u003e\n" }, { "commit": "c743a3995e3352ebef2c470996df2796aa5a7509", "tree": "8d4ffd6f8662149d9b81f1ee93eea82462b10032", "parents": [ "91c0745974fe40d42262670798f07fb2dc7fa7d1", "9a9b6f071f3c35e8e2d3aa8d5dd52f49f841b4f6" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 05:54:07 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 05:54:07 2012 -0700" }, "message": "Merge \"msm: clock-8974: Route measured clocks to test pin\" into msm-3.4" }, { "commit": "f3af59dd82be29a7d8c815473a2faaf4b3adbbc9", "tree": "cb22d27c5651094f2206cb65b53fafe47942bee5", "parents": [ "91c0745974fe40d42262670798f07fb2dc7fa7d1" ], "author": { "name": "Anna Perel", "email": "aperel@codeaurora.org", "time": "Sun Aug 12 15:28:30 2012 +0300" }, "committer": { "name": "Anna Perel", "email": "aperel@codeaurora.org", "time": "Sun Aug 12 15:28:30 2012 +0300" }, "message": "usb: gadget: Fixed QMI packets error handling\n\nWhen notify packet transfer failed, notify_count and cpkt_resp_q\nwould go out of sync. After the fix the packets are also removed from\nthe queue.\n\nChange-Id: If33ea5070f460617179a77063a9e58c47ed93167\nCRs-Fixed: 383661\nSigned-off-by: Anna Perel \u003caperel@codeaurora.org\u003e\n" }, { "commit": "97ad00dc3702615c66f58e691cf5ca63707a0db5", "tree": "c186dc3db88de9a9d6b6d1b40bd443d826ccd082", "parents": [ "91c0745974fe40d42262670798f07fb2dc7fa7d1" ], "author": { "name": "Ramesh Masavarapu", "email": "rameshm@codeaurora.org", "time": "Mon Aug 06 16:47:26 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 05:10:35 2012 -0600" }, "message": "msm: Fix names used in the crypto driver.\n\nThe mentioned device data entries were defined earlier in a patch but\ndoes not match the relevant documentation. In due course of merging/\nauto-rebasing on the initial patch (that added these entries), the\nchanges in this file was replaced with the incorrect ones, which got\nmerged.\n\nThis patch corrects the entries as per the documentation by doing the\nfollowing:\n -Add reg-names to refer to the crypto register base and bam register\n base.\n -Rename \"bam-pipes\" to \"bame-pipe-pair\".\n\nChange-Id: I47974b3c12500ca70ea46fcd58841af741461004\nSigned-off-by: Ramesh Masavarapu \u003crameshm@codeaurora.org\u003e\n" }, { "commit": "91c0745974fe40d42262670798f07fb2dc7fa7d1", "tree": "3a8e78b48c67e19c887b303a0a12c61a98eb4df6", "parents": [ "321ed7b5ba75384e62d5a970440fc8bfb24135db", "ce52ef23447938c626f8f657a3b2f2106e1e73b4" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Aug 12 01:28:53 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 01:28:53 2012 -0700" }, "message": "Merge \"msm: Add support for thermal monitor on msm8974\" into msm-3.4" }, { "commit": "9a9b6f071f3c35e8e2d3aa8d5dd52f49f841b4f6", "tree": "b41b2aca5491e8d8b824aaf04a4d14950ecb44c0", "parents": [ "321ed7b5ba75384e62d5a970440fc8bfb24135db" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Tue Aug 07 23:12:26 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sun Aug 12 01:04:48 2012 -0700" }, "message": "msm: clock-8974: Route measured clocks to test pin\n\nThis allows the clock selected for measurement to be observed\nusing test equipment attached to the PLL_TEST pin on the MSM.\n\nChange-Id: I91384690e0979cbd51d5fe2ff417ceb711d01a11\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "ce52ef23447938c626f8f657a3b2f2106e1e73b4", "tree": "5f9fd9466b1b7007b7d3f1cfd02dfff7da3e508b", "parents": [ "8d8220635e008ca5615519d1532d251039320cce" ], "author": { "name": "Eugene Seah", "email": "eseah@codeaurora.org", "time": "Thu Jul 12 12:40:38 2012 -0600" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 21:41:21 2012 -0600" }, "message": "msm: Add support for thermal monitor on msm8974\n\nAdd thermal monitoring and mitigation to kernel boot on msm8974\nto prevent thermal conditions during boot time.\n\nChange-Id: I9db10a4a69772fdcb8f2a450044ce446da8b593c\nSigned-off-by: Eugene Seah \u003ceseah@codeaurora.org\u003e\n" }, { "commit": "321ed7b5ba75384e62d5a970440fc8bfb24135db", "tree": "4f7123b38d33c7aa758506768c9107d1c4f9f21e", "parents": [ "775c75ea3395c6802679dd5b55494165c17e7b46", "ab7aafae3aac08a724d94873bcd103952e464ac4" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 20:32:04 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 20:32:04 2012 -0700" }, "message": "Merge \"drivers: qpnp-pin: Update subtype values to match hardware\" into msm-3.4" }, { "commit": "775c75ea3395c6802679dd5b55494165c17e7b46", "tree": "82103f7bbee2b71886d672df344d915c24c2982f", "parents": [ "8d8220635e008ca5615519d1532d251039320cce", "085af6fbaf1413c1fc5e8c719a72d3b413b52721" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 20:32:02 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 20:32:02 2012 -0700" }, "message": "Merge \"Revert \"msm: copper: Switch on bus scaling for copper\"\" into msm-3.4" }, { "commit": "8d8220635e008ca5615519d1532d251039320cce", "tree": "4cf438678373d05178de679b8e6d29b04417f965", "parents": [ "71190299c53b853b9d86f313f58584073369849e", "0012058c4482404516320af43169016d3375b235" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 19:02:54 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 19:02:54 2012 -0700" }, "message": "Merge changes I32c23f62,Ieb0b8564,I34c528d9,I1ca40e1f,I33c4d3ad into msm-3.4\n\n* changes:\n coresight: implement stm hardware event and port enable sysfs nodes\n coresight: enable stm logging for ftrace events and printk\n coresight: implement coresight abort\n coresight: coresight tmc driver\n coresight: add coresight devices to msm8974 device tree\n" }, { "commit": "71190299c53b853b9d86f313f58584073369849e", "tree": "cbd2e949ebf088a91b8a424dec6e13bfac895c60", "parents": [ "b864465c1c9c73d61c184f509ca600e129543ff5", "e6440cf34f5ff205dc204cab5a2438a2053b5cda" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 19:02:52 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 19:02:52 2012 -0700" }, "message": "Merge \"arm/dt: pm8941: Add additional VADC channel nodes\" into msm-3.4" }, { "commit": "b864465c1c9c73d61c184f509ca600e129543ff5", "tree": "8f77bcd1bfc3695b72d2f45713e6d6452f069b84", "parents": [ "7f46f90e24ec88f96a5d0d708d2e4eb4456ce326", "5bbcb0c01df009ad7a857eed7539ed18918aae28" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 17:20:28 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 17:20:28 2012 -0700" }, "message": "Merge changes I469c366b,I3c2f68c8 into msm-3.4\n\n* changes:\n ASoC: wcd9310: fix TRRS override\n ASoC: wcd9310: make CFILT adjust time as a module parameter\n" }, { "commit": "085af6fbaf1413c1fc5e8c719a72d3b413b52721", "tree": "d8fdf6e4bef53a46a1e7e12bc5f3d960c4967935", "parents": [ "7f46f90e24ec88f96a5d0d708d2e4eb4456ce326" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Thu Aug 02 17:38:55 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 16:53:06 2012 -0700" }, "message": "Revert \"msm: copper: Switch on bus scaling for copper\"\n\nThis reverts commit a1cc890f04279b8e13b20cd3b3bceeb0d28a4e9b.\n\nBus scaling is known to break on Rumi.\n\nChange-Id: I7d66469aa8a32d8cd9594e4fad8b4da6039479ad\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "0012058c4482404516320af43169016d3375b235", "tree": "4fec3e8b435d73a76e77cc80fbe69cd46ecb3d50", "parents": [ "8e1e6b65fe92a0fa7bdb787fc7d9c5c0eae3d654" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Fri Jul 13 11:33:39 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Sat Aug 11 16:40:46 2012 -0700" }, "message": "coresight: implement stm hardware event and port enable sysfs nodes\n\nHave STM hardware event and port enable sysfs nodes to allow users to\nselectively enable and disable either hardware events or stimulus\nports while STM as a whole is enabled.\n\nChange-Id: I32c23f62a3782487e67eb5e6a9da5a5bf7e11df8\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "8e1e6b65fe92a0fa7bdb787fc7d9c5c0eae3d654", "tree": "6c33e4563cfedb58255520fe5b0142c861638a17", "parents": [ "cf7d045799f928ac338dbc9fea42538567a513e9" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Fri Jun 29 12:24:49 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Sat Aug 11 16:40:46 2012 -0700" }, "message": "coresight: enable stm logging for ftrace events and printk\n\nDup ftrace event traffic (including writes to trace_marker file from\nuserspace) to STM. Also dup printk traffic to STM. This allows Linux\ntracing and log data to be correlated with other data transported over\nSTM.\n\nChange-Id: Ieb0b856447f7667eb0005a6a884211dc46f50217\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "cf7d045799f928ac338dbc9fea42538567a513e9", "tree": "7ac2b9906d485fff75e77dc18c065b8ffb1881bc", "parents": [ "2291149f68875789ca515247a371542686f9799a" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Mon Jul 02 13:57:20 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Sat Aug 11 16:40:46 2012 -0700" }, "message": "coresight: implement coresight abort\n\nProvide CoreSight abort debug api to stop the active trace sink\nfrom any context. This is a best effort api that can be used to\nabruptly stop and disable the current trace sink from anywhere\nin the kernel to avoid tracing and hence polluting the trace data\nafter the point of interest has been executed.\n\nChange-Id: I34c528d9febec4265088a7267dbcf0e7a1f87fcf\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "2291149f68875789ca515247a371542686f9799a", "tree": "7f8d0df3983c81984dcfeee4ae5027a7538fa457", "parents": [ "f20bacb252da5de2aa5806cd384c2f60603ffc42" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Mon Jun 25 21:38:02 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Sat Aug 11 16:40:45 2012 -0700" }, "message": "coresight: coresight tmc driver\n\nThis driver manages CoreSight TMC (Trace Memory Controller) which\ncan be pre-configured as an ETF (Embedded Trace FIFO) or ETR\n(Embedded Trace Router). ETF when configured in circular buffer mode\nacts as an ETB (Embedded Trace Buffer).\n\nChange-Id: I1ca40e1fbd3049dc7addb834c064ab3a6c4c22e0\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "f20bacb252da5de2aa5806cd384c2f60603ffc42", "tree": "a222e92a9ba1bffd9151b804a925a221360fea7d", "parents": [ "7f46f90e24ec88f96a5d0d708d2e4eb4456ce326" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Sat Jul 21 14:46:36 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Sat Aug 11 16:40:45 2012 -0700" }, "message": "coresight: add coresight devices to msm8974 device tree\n\nAdd CoreSight component devices (sinks, links and sources) to the\nmsm8974 device tree. CoreSight devices provide tracing support for\nthe SoC.\n\nChange-Id: I33c4d3adff45c263b36141f1158434d9c83f0662\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "7f46f90e24ec88f96a5d0d708d2e4eb4456ce326", "tree": "fd9e545db66cd6a66633d2be883052334d88ec59", "parents": [ "8946766d3a9e35ca2a9f9114b52434de1f7d4c37", "7308114da9caf1e9c57b0d93abcefbd43b296551" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:10 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:10 2012 -0700" }, "message": "Merge \"msm: clock-8974: Allow set_rate on oxili_gfx3d_clk to go through to RPM\" into msm-3.4" }, { "commit": "8946766d3a9e35ca2a9f9114b52434de1f7d4c37", "tree": "ec262370dfab010ff15f9fa3aac26d8d7b0de390", "parents": [ "c0ed40cb908be7cc239c85539b62f7c77623a3e7", "e2300dedc827ce86f4470883505bedbcd452c755" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:08 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:08 2012 -0700" }, "message": "Merge changes I357430de,I29ab8a80 into msm-3.4\n\n* changes:\n msm: clock-rpm: Have RPM handoff account for the RPM-SMD driver\n msm: clock-8974: Enable the audio_core_ixfabric_clk in post_init\n" }, { "commit": "c0ed40cb908be7cc239c85539b62f7c77623a3e7", "tree": "72bb60c5c9a0649fe5ee11a98b31a4ff0a6bb9ab", "parents": [ "d7784bc0014e804f77699cd20fc26a8048bb79ef", "fc3c55c65927f977185969f9b01b4b6e391f78ac" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:08 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:08 2012 -0700" }, "message": "Merge changes I58671ac9,Iad40c91d into msm-3.4\n\n* changes:\n msm: clock-8974: Set GCC_BOOT_CLOCK_* registers to not force-on clocks\n msm: clock-8974: Correct LPASS measure mux settings\n" }, { "commit": "d7784bc0014e804f77699cd20fc26a8048bb79ef", "tree": "252c4c79ad6d33cae54024e8c495e4c65e10131a", "parents": [ "edd033551db6050e5146f384537a7f9242f541a3", "27da8de82fb76b00fc1be779b8027900b633612c" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:07 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:07 2012 -0700" }, "message": "Merge \"msm: clock-8974: Correct an N value in a freq table for PCM clocks\" into msm-3.4" }, { "commit": "edd033551db6050e5146f384537a7f9242f541a3", "tree": "c5ebb9fcf9a39e08d4288379fe5d05e31aebb69e", "parents": [ "393cced79a0956948d16490c6fcce80b590f7d2c", "1988726c4c9e034f25a9c4d7c6d6e08e8305bae0" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:05 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:05 2012 -0700" }, "message": "Merge \"msm: pil-mba: Print MBA error codes upon failures\" into msm-3.4" }, { "commit": "393cced79a0956948d16490c6fcce80b590f7d2c", "tree": "7ca066b9f475354d762f697dd1d4d7281d85c22c", "parents": [ "6132c03324ad99621d2466c0efa873f699e03d89", "652b34407506f8c95677fa68bc70df52954a96a7" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:03 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:03 2012 -0700" }, "message": "Merge \"msm: board-8930: Add control for PM8038 regulators LDO 13 and LDO 25\" into msm-3.4" }, { "commit": "6132c03324ad99621d2466c0efa873f699e03d89", "tree": "f7a7f8a6d3bcda2dd0b607299f72144e0dbe2e19", "parents": [ "703e84a785669dae5cc3ee8ae2b5b065fb629ca0", "18a5442be76b0b332082071235720415c0368572" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:03 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:03 2012 -0700" }, "message": "Merge \"msm: rpm-regulator: Add support for PM8038 LDO 13 and LDO 25\" into msm-3.4" }, { "commit": "703e84a785669dae5cc3ee8ae2b5b065fb629ca0", "tree": "0ee7f5446b8ce93742e1e4010565ab5461526fd0", "parents": [ "a77677b22849f608a60bfb7589d5bddfd5843bd4", "e8bf5d53d8c07645f8955516136d9f3b074ff7b8" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:58:01 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 15:58:01 2012 -0700" }, "message": "Merge \"msm: 8974: Add Taiko codec to device tree\" into msm-3.4" }, { "commit": "e6440cf34f5ff205dc204cab5a2438a2053b5cda", "tree": "d792fbc4b1de25fb0d4b508a804986d21f9d84a9", "parents": [ "a77677b22849f608a60bfb7589d5bddfd5843bd4" ], "author": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Wed Aug 08 17:08:18 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 15:39:48 2012 -0600" }, "message": "arm/dt: pm8941: Add additional VADC channel nodes\n\nAdd additional main-mux voltage channels to read ADC\nfrom VADC USRP peripheral. The new channels have different\npre-div scaling compared to previous channel voltage node.\nThe new channel nodes include support to read vbatt, vcharger\nthat can be used by the battery driver. In addition, the\n625mV and 1.125V channel nodes are added to verify the\nreference channels used for absolute calibration.\n\nChange-Id: I53265a00b95ba4f5fb726731532070b8b758d86a\nSigned-off-by: Siddartha Mohanadoss \u003csmohanad@codeaurora.org\u003e\n" }, { "commit": "a77677b22849f608a60bfb7589d5bddfd5843bd4", "tree": "02f94a6a3260625d6aa24fb36edc19c42d2a5598", "parents": [ "e46aca6f38aeb8e7a7c640f0e8a0a629fda7f9c7", "79626248a312760f700d94b1974bcd391f68b20f" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 14:29:45 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 14:29:45 2012 -0700" }, "message": "Merge \"msm: pil-venus: Fix iommu programming order in reset and shutdown\" into msm-3.4" }, { "commit": "e46aca6f38aeb8e7a7c640f0e8a0a629fda7f9c7", "tree": "c9d9e43fcb0b7ef5c163dcad7f246619b8762783", "parents": [ "14ee37df2a31a2fb56b02a45a30e550936d02a21", "5f6d1af0462b9072a2be6868ca73cfb4cb3524c1" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 14:29:43 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 14:29:43 2012 -0700" }, "message": "Merge \"coresight: device tree support for coresight drivers\" into msm-3.4" }, { "commit": "ab7aafae3aac08a724d94873bcd103952e464ac4", "tree": "e721aa616fe6b128ec4e9556352cad51bc911573", "parents": [ "14ee37df2a31a2fb56b02a45a30e550936d02a21" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Sat Aug 11 12:34:46 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Sat Aug 11 13:15:34 2012 -0700" }, "message": "drivers: qpnp-pin: Update subtype values to match hardware\n\nThe documentation followed to enumerate the subtype values was\nfound to differ from the actual implementation in hardware.\nUpdate to the values actually found in the hardware.\n\nChange-Id: I3a6d3027593bfb043b87d9c072c882981c649a6e\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "7308114da9caf1e9c57b0d93abcefbd43b296551", "tree": "ecbca9e80f2fcd617cf145a0bb4518d5b524f93b", "parents": [ "e2300dedc827ce86f4470883505bedbcd452c755" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Fri Aug 03 15:57:47 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 13:14:13 2012 -0700" }, "message": "msm: clock-8974: Allow set_rate on oxili_gfx3d_clk to go through to RPM\n\nThe graphics driver wishes to set the rate on the gfx3d_clk_src\nvia the oxili_gfx3d_clk. Add a voter clock for the ocmemgx_clk\nand set this new clock as the parent of oxili_gfx3d_clk.\n\nChange-Id: I8e469b93d88f0c71b51e95807db90a97240a9e06\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "e2300dedc827ce86f4470883505bedbcd452c755", "tree": "d5db8f5302b86565d0dc1b36c20100f47e9e442d", "parents": [ "6c0f1a7cd70ef760a10cb1a00e6c51ec3240cf3f" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Fri Aug 10 04:58:50 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 13:13:58 2012 -0700" }, "message": "msm: clock-rpm: Have RPM handoff account for the RPM-SMD driver\n\nThe RPM-SMD driver and the correponding communication protocol\nwith the RPM does not currently support querying of clock rates.\nAllow handoff to always succeed for RPM-SMD clocks. Previously,\nthe older RPM driver API stub would always return failure\ncausing RPM handoff to fail.\n\nChange-Id: I357430dec06a2305cdad2af4c213a3b98965e1e1\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "6c0f1a7cd70ef760a10cb1a00e6c51ec3240cf3f", "tree": "1b805d70e6ecc3ca7d90a8064ffd61a35aa11ecc", "parents": [ "fc3c55c65927f977185969f9b01b4b6e391f78ac" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Fri Aug 10 01:59:28 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 13:13:52 2012 -0700" }, "message": "msm: clock-8974: Enable the audio_core_ixfabric_clk in post_init\n\nTo be able to access certain audio core registers, the\naudio_core_ixfabric_clk needs to be on. Turn it on in\npost_init.\n\nChange-Id: I29ab8a80bb01696f362d97f98f53538c85f29a18\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "fc3c55c65927f977185969f9b01b4b6e391f78ac", "tree": "bd188e5ecc273c061ab1e4ba36c6ade30f921ffd", "parents": [ "93537014715d0bf57646f6000a778f57c4d9bf3c" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Wed Aug 08 16:25:22 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 13:13:44 2012 -0700" }, "message": "msm: clock-8974: Set GCC_BOOT_CLOCK_* registers to not force-on clocks\n\nThe GCC_BOOT_CLOCK_* registers allow the boot code to\nforcefully turn on certain USB and Krait clocks. Clear\na bit in these registers to be able to turn those clocks\noff.\n\nChange-Id: I58671ac9bd0af72fd13f8ee0171979bb2a954348\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "93537014715d0bf57646f6000a778f57c4d9bf3c", "tree": "62f6f04334cd1d8cd9a49e27dbf93ffa0eaf319f", "parents": [ "27da8de82fb76b00fc1be779b8027900b633612c" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Wed Aug 08 14:44:33 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 13:13:32 2012 -0700" }, "message": "msm: clock-8974: Correct LPASS measure mux settings\n\nThe LPASS debug mux index in the GCC top level mux\nand the bit to activate the debug mux output have\nbeen updated in documentation. Update the code to\nreflect this.\n\nChange-Id: Iad40c91ddba756a0fad455b93bf0f725ff27eae6\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "27da8de82fb76b00fc1be779b8027900b633612c", "tree": "03bff535453b21ccd297a8a242976c1375be9cd8", "parents": [ "14ee37df2a31a2fb56b02a45a30e550936d02a21" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Thu Aug 09 19:28:51 2012 -0700" }, "committer": { "name": "Sridhar Parasuram", "email": "sridhar@codeaurora.org", "time": "Sat Aug 11 13:13:26 2012 -0700" }, "message": "msm: clock-8974: Correct an N value in a freq table for PCM clocks\n\nThe 1536000 rate has an incorrect n value. Correct this.\n\nChange-Id: I018aa4677c05db0c25d994c150689a61296e9eeb\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "5bbcb0c01df009ad7a857eed7539ed18918aae28", "tree": "bd2fbc3472f2365ab7e7a4b8607e26cada1a7c8e", "parents": [ "c1c67a9e220374ab40b3185a0b8670cc8d753967" ], "author": { "name": "Joonwoo Park", "email": "joonwoop@codeaurora.org", "time": "Tue Aug 07 17:25:52 2012 -0700" }, "committer": { "name": "Joonwoo Park", "email": "joonwoop@codeaurora.org", "time": "Sat Aug 11 13:08:47 2012 -0700" }, "message": "ASoC: wcd9310: fix TRRS override\n\nThe debugfs TRRS entry is for overriding headset button polling.\nFix regression not to start button polling when this flag is set.\n\nCRs-fixed: 386038\nChange-Id: I469c366bc111f37ecbb46708d2800200dd3d7584\nSigned-off-by: Joonwoo Park \u003cjoonwoop@codeaurora.org\u003e\n" }, { "commit": "c1c67a9e220374ab40b3185a0b8670cc8d753967", "tree": "4682675d75fc63e99fc2db0ec72082f23d8fd9c7", "parents": [ "14ee37df2a31a2fb56b02a45a30e550936d02a21" ], "author": { "name": "Joonwoo Park", "email": "joonwoop@codeaurora.org", "time": "Tue Aug 07 16:05:36 2012 -0700" }, "committer": { "name": "Joonwoo Park", "email": "joonwoop@codeaurora.org", "time": "Sat Aug 11 13:08:35 2012 -0700" }, "message": "ASoC: wcd9310: make CFILT adjust time as a module parameter\n\nSome of accessories on the headset jack takes longer to settle down\nvoltage. Make adjust time to be configurable so those accessories can\nbe detected correctly.\n\nChange-Id: I3c2f68c8a4bb1a8f94669bd910728f014ee39874\nSigned-off-by: Joonwoo Park \u003cjoonwoop@codeaurora.org\u003e\n" }, { "commit": "14ee37df2a31a2fb56b02a45a30e550936d02a21", "tree": "62293224f358689b92de8dd0123c743fd79d50c5", "parents": [ "57b60f85527b539b6de7ab46a70dea671ac39824" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Wed Aug 08 15:18:09 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 07:36:05 2012 -0600" }, "message": "msm: clock-8974: Temporarily enable the LPASS Audio Core GDSC\n\nThe LPASS Audio Core GDSC needs to be on to unhalt various\naudio core CBCs in the LPASS CC. Temporarily enable it.\n\nChange-Id: Ie593e2b53a3eea89540d0feb308d23a8e5d2123f\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "e8bf5d53d8c07645f8955516136d9f3b074ff7b8", "tree": "62a597dc81339136ae4949b0ade37b5572bfffea", "parents": [ "82465b56b46ccf9c1e7864152305ab8b8c93ea05" ], "author": { "name": "Kiran Kandi", "email": "kkandi@codeaurora.org", "time": "Mon Aug 06 16:03:16 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 05:21:07 2012 -0600" }, "message": "msm: 8974: Add Taiko codec to device tree\n\nAdd Taiko codec to device tree so that platform specific data\ncan be read from device tree.\n\nChange-Id: I8b470bb7f40925baec95fff5fd08be5eb04b3a84\nSigned-off-by: Kiran Kandi \u003ckkandi@codeaurora.org\u003e\n" }, { "commit": "57b60f85527b539b6de7ab46a70dea671ac39824", "tree": "6dd78e42bb96b2391d8cff246fdc5c24d32335d3", "parents": [ "ef8b6e8d4f1999fbfbbf9723acf4de549378068d", "3c5ae1f883a8b6a7812d936c5f7e5bb4d0d3142b" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 04:14:59 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 04:14:59 2012 -0700" }, "message": "Merge \"msm_fb: display: Update mdp clock counter for unsuccessful probes\" into msm-3.4" }, { "commit": "ef8b6e8d4f1999fbfbbf9723acf4de549378068d", "tree": "a7e4d65946e57496fd1848a8b89f7dcb90f2e7c2", "parents": [ "c44c6239c0d5285ea2b7a43db53855258d6d8d95", "f15aa8bcd2f3b4333e8f010c8af6be3a16cfb882" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 04:14:58 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 04:14:58 2012 -0700" }, "message": "Merge \"msm_fb: Increase the pixel clock range for DSI panels\" into msm-3.4" }, { "commit": "c44c6239c0d5285ea2b7a43db53855258d6d8d95", "tree": "2fc19bc0501a7af65e2b0ec628369b42e3b0ff0f", "parents": [ "82465b56b46ccf9c1e7864152305ab8b8c93ea05", "2a811f2a333ca0507eb98c35831af463f43fb011" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 04:14:55 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 04:14:55 2012 -0700" }, "message": "Merge \"msm_fb: Display: Fix Dithering issue for rgb565 format\" into msm-3.4" }, { "commit": "2a811f2a333ca0507eb98c35831af463f43fb011", "tree": "9d2c760f7f23b022561ead88b0d6614d1cd895b9", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Chandan Uddaraju", "email": "chandanu@codeaurora.org", "time": "Tue Jul 17 16:54:28 2012 -0700" }, "committer": { "name": "Chandan Uddaraju", "email": "chandanu@codeaurora.org", "time": "Sat Aug 11 00:13:04 2012 -0700" }, "message": "msm_fb: Display: Fix Dithering issue for rgb565 format\n\nUsing RGB888 as source format and rgb565 as destination pixel format,\nwill cause image corruption on the display. Fix this issue by\nsetting the destination format as RGB888 in MDP and DSI controller\npixel format as RGB565 for DSI specific panels.\n\nCRs-Fixed: 377484\nChange-Id: If58976ee9cd4825efb39437170e54796fa2213e0\nSigned-off-by: Chandan Uddaraju \u003cchandanu@codeaurora.org\u003e\n" }, { "commit": "79626248a312760f700d94b1974bcd391f68b20f", "tree": "ecf4fd15f3dc9397ecf989895050a9ec3dddd399", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Tianyi Gou", "email": "tgou@codeaurora.org", "time": "Fri Aug 10 01:04:30 2012 -0700" }, "committer": { "name": "Tianyi Gou", "email": "tgou@codeaurora.org", "time": "Fri Aug 10 23:16:04 2012 -0700" }, "message": "msm: pil-venus: Fix iommu programming order in reset and shutdown\n\nIn reset function, venus internal clocks need to be on to access some of\nthe iommu registers. Fix the order to turn on the internal clocks and then\nprogram iommu.\n\nIn the shutdown function, iommu unmap and detach should be done before\nhalting AXI and AXI OCMEM VBIF access. Otherwise, the iommu TLB flush can\u0027t\ngo through. In addition, to avoid iommu page faults due to ARM9 accessing\nunmapped memory, reset to ARM9 must be asserted before unmapping and\ndetaching iommu.\n\nChange-Id: I6df152fd63b5d0583b9660370310e7a9b80ab6a8\nSigned-off-by: Tianyi Gou \u003ctgou@codeaurora.org\u003e\n" }, { "commit": "3c5ae1f883a8b6a7812d936c5f7e5bb4d0d3142b", "tree": "9eb52564ce6e7759734385086f523e45e8d54949", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Mayank Chopra", "email": "makchopra@codeaurora.org", "time": "Mon Aug 06 19:43:42 2012 +0530" }, "committer": { "name": "Pradeep Jilagam", "email": "pjilagam@codeaurora.org", "time": "Sat Aug 11 11:31:00 2012 +0530" }, "message": "msm_fb: display: Update mdp clock counter for unsuccessful probes\n\nIf a panel probe does not succeed, call mdp_clk_ctrl to maintain\nmdp_clk_cnt counter else mismatch in counter results in mdp clock\nto never go off in cases like suspend-resume.\n\nCRs-Fixed: 385560\nChange-Id: I4ca54b051af98e823dc7f3ff7b9bcb960532c7e8\nSigned-off-by: Mayank Chopra \u003cmakchopra@codeaurora.org\u003e\n" }, { "commit": "1988726c4c9e034f25a9c4d7c6d6e08e8305bae0", "tree": "b85591a36a9e47d54291f0afd195352d5428baa7", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Fri Aug 03 16:37:34 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 22:36:44 2012 -0700" }, "message": "msm: pil-mba: Print MBA error codes upon failures\n\nIf the MBA encounters an error, it puts a negative error code\nnumber in its status register. Rather than just detecting this\nand failing, print the error number to assist with debugging.\n\nChange-Id: I864b7eb19eb31dfd901a3e58dbcc0c8aba410c2e\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "5f6d1af0462b9072a2be6868ca73cfb4cb3524c1", "tree": "17319ced071c31baf3df5e1b123384e95dacddef", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Wed Jun 13 15:48:13 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Fri Aug 10 20:06:25 2012 -0700" }, "message": "coresight: device tree support for coresight drivers\n\nSupport for reading hardware data for CoreSight devices from device\ntree.\n\nChange-Id: I4d149991c89b458384465d163386084f500a4028\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "82465b56b46ccf9c1e7864152305ab8b8c93ea05", "tree": "95d82ed497f3aa83e6d240bd42462b04614d6f1f", "parents": [ "2465c68e08f4a1d49df1db6cd89aa0efa9800b6e" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 15:36:13 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:05 2012 -0700" }, "message": "arm/dt: 8974: Support additional CDP platform IDs\n\nAppend additional hardware IDs to the CDP device tree.\n\nChange-Id: I295b740464ff084050dbbbce2ec8e62fda7bc772\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "2465c68e08f4a1d49df1db6cd89aa0efa9800b6e", "tree": "39425ed360c6554d87395e9be74688dba49d974b", "parents": [ "424b6980679c7f0f5fe71f48a711a4c21b464146" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Wed Aug 08 09:06:11 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:05 2012 -0700" }, "message": "msm: 8974: Switch regulators from rpm to local control\n\nAdd devices for the PMIC that match against the qpnp-regulator\ndriver for all supported regulator devices from the apps side.\n\nRemove most devices from the rpm_bus with the exception of the\ndevices that acpuclock is currently using. These need to stay\nsince acpuclock is calling rpm_regulator_get() that is only\navailable on the rpm-regulator driver.\n\nFor regulators that are duplicates between rpm and local, rename\nthe local names to end if a suffix of \"_local\" to make them\nunique. With the absense of a RPM, these RPM devices will amount\nto NOPs at runtime.\n\nThis switch to local control is temporary and will be reverted\nonce the RPM regulator support has been validated on 8974 CDP.\n\nChange-Id: Ie50db44595e487dcad659e67d623d32f4883d987\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "424b6980679c7f0f5fe71f48a711a4c21b464146", "tree": "c5a6cf1f4349b7035a4e1f21915f8f24f6543e0f", "parents": [ "7960a76326036b096f8580c8b1d03b17fe8783e4" ], "author": { "name": "Manu Gautam", "email": "mgautam@codeaurora.org", "time": "Thu Aug 09 09:45:29 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:04 2012 -0700" }, "message": "usb: msm_otg: Disable LPM on targets using device tree\n\nLow power mode is not supported as of now on targets which are\nusing device tree. Revert this later when support is in place.\n\nChange-Id: I05d6089d037312a0e719f4263093bde730c3a8ad\nSigned-off-by: Manu Gautam \u003cmgautam@codeaurora.org\u003e\n" }, { "commit": "7960a76326036b096f8580c8b1d03b17fe8783e4", "tree": "992de4a6c79d0be6fdfe4fb81c86bfebe8bfe22f", "parents": [ "c15dac0504d465513bb3b8d82166766429e7b301" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Wed Aug 08 22:16:26 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:04 2012 -0700" }, "message": "defconfig: 8974: Enable DCC console\n\nThis is required to support console on\nJTAG debuggers.\n\nChange-Id: If9d1d26f1800ab40c57fcb79e249eea6936ab6fe\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "c15dac0504d465513bb3b8d82166766429e7b301", "tree": "1e66c94996b2d42f1788869cbbd3ee411f64844d", "parents": [ "5269b605853c8f7581bf1c552aa94ddcbd8eba34" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Thu Aug 09 13:31:08 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:04 2012 -0700" }, "message": "msm: clock-8974: Make mmss_s0_axi_clk depend on mmssnoc_axi_clk\n\nThe mmss_s0_axi clock needs to be turned on to allow MMSS NOC\nslaves to be able to access memory across the MMSS NOC and\nSystem NOC interconnect. However, this clock needs the\nmmssnoc_axi_clk to be on for the NOC handshake to work.\n\nTherefore, have the bus driver turn on the mmss_s0_axi_clk when\nthere are bandwidth requests for the MMSS NOC AXI clock and have\nmmss_s0_axi_clk depend on the mmssnoc_axi_clk.\n\nChange-Id: I81d0dc27ea7a7983ddbebbfff67c3426b3c6da94\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "5269b605853c8f7581bf1c552aa94ddcbd8eba34", "tree": "82a48b838a4931ada2da338758e213e8fda1e566", "parents": [ "f97dede7c35792c4b95e9b1e66d40c74e5b0859a" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Wed Aug 08 17:57:09 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:03 2012 -0700" }, "message": "msm: 8974: Add serial console support\n\nAdd the device tree entries and clock table entries to\nsupport the serial console on the MSM8974 CDP target.\n\nChange-Id: I55bb2cbf3f02b6f78738baec55840a041c823d99\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "f97dede7c35792c4b95e9b1e66d40c74e5b0859a", "tree": "c5ae0956cd2a7759bc174862ba7cf88dc27ac358", "parents": [ "e18bf883706473118aaf0680c71abb7226ab606a" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Wed Aug 08 17:40:44 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:03 2012 -0700" }, "message": "msm: 8974: Remove clock auxdata for serial devices\n\nClean up the clock table entries for msm_serial_hsl by\nremoving the auxdata and using the device names directly.\n\nChange-Id: I2390a4be9e15db449e07939e88ba738908ed724d\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "e18bf883706473118aaf0680c71abb7226ab606a", "tree": "24a149db7ede264d3effdfecc7c97332cf6eccde", "parents": [ "9328e4907972ff0b95dc9e2ccd4a47911940f4ae" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Aug 09 15:00:23 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:02 2012 -0700" }, "message": "arm/dt: msm8974: Force the proper types for some regulators\n\npm8841_s2, pm8841_s(4-8) all report the wrong type and subtype\nfor FTS2 CTRL peripherals. Also, pm8941_l5 and pm8941_l7 are\nnot reported as LDOs correctly. Specify them as the correct\ntype and subtype using the qcom,force-type binding.\n\nChange-Id: I282ef934e38da5ad3faba3ea34258630cf8b7366\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "9328e4907972ff0b95dc9e2ccd4a47911940f4ae", "tree": "d451a14720302a27a2c5aad83581f27dfa14c706", "parents": [ "16bc5cc386af0f9c6ff83f22381e8eb79b03ecd2" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Aug 09 11:37:36 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:02 2012 -0700" }, "message": "regulator: qpnp: Add property to override type registers\n\nOn some regulator hardware, the values read on SPMI offset 0x4 (type)\nand 0x5 (subtype) are incorrect. Add a new optional property called\nqcom,force-type that allows a user to override the hardware values\nwith values supplied in the Device Tree.\n\nChange-Id: Id73fe69873f5dc9d0f2623771872aa2eaddd66f1\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "16bc5cc386af0f9c6ff83f22381e8eb79b03ecd2", "tree": "08c96d563952a402cc0b1490497659fd890742a5", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Thu Aug 09 21:33:23 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:01 2012 -0700" }, "message": "msm: pil-q6v5-mss: Clear modem subsystem IO clamps prior to resetting Q6\n\nInterfacing with some modem subsystem peripherals is not possible\nunless the UNCLAMP_ALL bit is set in MSS_CLAMP_IO register. Set\nthis bit accordingly.\n\nChange-Id: I5685383c506b0bcb89d6b6f808021512079cc607\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "41f49afeb872b851e8b2f4e078d47903e65a47bf", "tree": "199f18762fd4c4cabad7da4a5efd3c16e598d90b", "parents": [ "ae20a9797cf84886f89022bdfa6de179e718fb26", "4c889b7cef5f85a58d9f4422dc033d30615b594b" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 16:44:11 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 16:44:11 2012 -0700" }, "message": "Merge \"msm: kgsl: Hold pm_qos vote for active rendering\" into msm-3.4" }, { "commit": "ae20a9797cf84886f89022bdfa6de179e718fb26", "tree": "ca82568068de53d1d0be4b8cf5a7c8209cabf1e4", "parents": [ "6f3449df335ac10f0728c6c52a193dd83d2f9ef9", "f799996e309cad545b3a7f84ef6f333a09c8b876" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 16:44:10 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 16:44:10 2012 -0700" }, "message": "Merge \"Bluetooth: Block SCO disconnect operation on BT_CLOSED state.\" into msm-3.4" }, { "commit": "6f3449df335ac10f0728c6c52a193dd83d2f9ef9", "tree": "0d10c065bbc248035335dfbb80183f607adef643", "parents": [ "f245aa91c9dfaac82bac4c2ce8edb152581c1ec5", "723b2b7b9bf4138f368f35049972622df9efac7e" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 16:44:07 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 16:44:07 2012 -0700" }, "message": "Merge \"msm: pil-q6v5: Enable subsystem\u0027s bus_clk before calling clk_reset()\" into msm-3.4" }, { "commit": "f245aa91c9dfaac82bac4c2ce8edb152581c1ec5", "tree": "90d4926fe9479b323d207d0a51ee4c0f086d20f4", "parents": [ "85c17a6f01c69bac066b03ef0ad67fd41a05a300", "27e77d2bda65c96815cb5f785df9ffd7bd733e6a" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 16:44:03 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 16:44:03 2012 -0700" }, "message": "Merge \"Bluetooth: hidp: use dest address from session info\" into msm-3.4" }, { "commit": "85c17a6f01c69bac066b03ef0ad67fd41a05a300", "tree": "d92dc1dc4b8a786b792d2ea8a4e7caaecb336d05", "parents": [ "c5c61a9b51f5c526d4603996f981227908b781f7", "56865f0d059ff173e911d1e4231459fa7bc74627" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:15:02 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:15:02 2012 -0700" }, "message": "Merge \"msm: pil-q6v5: Enable q6ss_ahbm_clk for LPASS Q6\" into msm-3.4" }, { "commit": "c5c61a9b51f5c526d4603996f981227908b781f7", "tree": "8d3d3bf92e43106691e93e8e69c2598b5e69b5bc", "parents": [ "e46d398de8a0c52d283c26929f8a6e450e23b874", "b5b311e95b848df8a6634ede7965bcdf27bfe90e" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:15:00 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:15:00 2012 -0700" }, "message": "Merge \"msm: clock-8974: Add the q6ss_ahbm_clk required by LPASS PIL\" into msm-3.4" }, { "commit": "e46d398de8a0c52d283c26929f8a6e450e23b874", "tree": "f4ccbe60584809fd685bc972aaf389011e5fe66a", "parents": [ "930a99d11cd74455fd8f06f9256bf0ac930c91ca", "3a2945ef2385ae934ab4df98f26651d132b7b4fc" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:53 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:53 2012 -0700" }, "message": "Merge \"msm: vidc: Correct calculation of yuv buffer size\" into msm-3.4" }, { "commit": "930a99d11cd74455fd8f06f9256bf0ac930c91ca", "tree": "0c6325b11d1c122fa698e3b06aad1eb7024ac5be", "parents": [ "ffeb87399ab0a7b3eb1219aec214aa57f1a217e1", "a28d1bb434e8505630fc5d03383a0ed6d4565885" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:50 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:50 2012 -0700" }, "message": "Merge \"msm_fb: display: Add BLT support to dsi command mode panel\" into msm-3.4" }, { "commit": "ffeb87399ab0a7b3eb1219aec214aa57f1a217e1", "tree": "7e3372731eda9c2330a53a8a36966fa7f579ce5f", "parents": [ "962ebc8ecad1eb59dfce3fa782edf47049a0390b", "336810bed12a3cd650e578189c6b54f34883e74d" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:48 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:48 2012 -0700" }, "message": "Merge \"defconfig: msm8974: Disable appended DT option\" into msm-3.4" }, { "commit": "962ebc8ecad1eb59dfce3fa782edf47049a0390b", "tree": "af97718d3cab1f9eb38a9b19caba5aacc8d7e894", "parents": [ "28148a5a8327a98d2726ede4e223a90dc23ab679", "725f849ff6e273e8bf5b818fdf53cee5290717af" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:46 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:46 2012 -0700" }, "message": "Merge \"msm: wcd9xxx: add device tree support for codec slimbus component\" into msm-3.4" }, { "commit": "28148a5a8327a98d2726ede4e223a90dc23ab679", "tree": "6eb218d61f133ece58d28f7a8474007de9b46b98", "parents": [ "d187bcdeda46fe957b93d04ef1ae2416b1869981", "16145bcbd6af8db0eebc0eedec1f01ee1b0b3635" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:42 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:42 2012 -0700" }, "message": "Merge \"vidc: 1080p: Reset meta data offset to zero\" into msm-3.4" }, { "commit": "d187bcdeda46fe957b93d04ef1ae2416b1869981", "tree": "fd442100a512966be07154522bdb601e2248584f", "parents": [ "0bdc894f7ddd3b106e121d385319486ec7d787c4", "c2a557ca7c83963156770f6e4212619969c29714" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:40 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:40 2012 -0700" }, "message": "Merge \"msm: vidc: Fix scratch buffer allocation.\" into msm-3.4" }, { "commit": "0bdc894f7ddd3b106e121d385319486ec7d787c4", "tree": "04d68484d0095bdc613bfcef625ede27d7d5c190", "parents": [ "40a845ab4be6564fe151d443074a9d21e3fcbae9", "4a1b2527a54820b2ece43ce55b41875354df70e2" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 13:48:18 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 13:48:18 2012 -0700" }, "message": "Merge changes I41aba112,Idf82149d into msm-3.4\n\n* changes:\n coresight: use devm apis in driver probe\n coresight: coresight replicator driver\n" }, { "commit": "40a845ab4be6564fe151d443074a9d21e3fcbae9", "tree": "2799c48cf8bb5071bcbe686717ecab6a4f333460", "parents": [ "55f93e5357f716ac7128a8f27ed3d85dccbb920e", "80515b5f77db3689fa821efb61092012bf0ba8c8" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 13:48:17 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 13:48:17 2012 -0700" }, "message": "Merge \"coresight: clock support for coresight drivers for 8974\" into msm-3.4" }, { "commit": "55f93e5357f716ac7128a8f27ed3d85dccbb920e", "tree": "65f7fad31e61aab1a29314b6e3b8680fffdb17a1", "parents": [ "8fce0a5aeef0b9c0435bff2b5f1507fb40734253", "d3253c7547737e2fc6ebc182aac81c03de0f8f9a" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 13:48:16 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 13:48:16 2012 -0700" }, "message": "Merge \"arm/dt: msm8974: Fix invalid address for PMIC regulator 8941_s3\" into msm-3.4" }, { "commit": "8fce0a5aeef0b9c0435bff2b5f1507fb40734253", "tree": "a160c1e71d0c0cd3fb0aef522dfd37bde742b44c", "parents": [ "7dc95baad1fa456e364285a6add5d7a380cfd11a", "b1cc493ae3745e18c025cddc51775c4ae8763751" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 13:48:15 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 13:48:15 2012 -0700" }, "message": "Merge \"gpio: msm: Make msmgpio a platform device\" into msm-3.4" }, { "commit": "723b2b7b9bf4138f368f35049972622df9efac7e", "tree": "a120f65bbba8864eb30042777ca501169e333089", "parents": [ "56865f0d059ff173e911d1e4231459fa7bc74627" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Fri Aug 10 00:48:13 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Fri Aug 10 12:30:45 2012 -0700" }, "message": "msm: pil-q6v5: Enable subsystem\u0027s bus_clk before calling clk_reset()\n\nFor MSS, the gcc_mss_cfg_ahb clock must be enabled for clk_reset(core_clk)\nto succeed, since the reset operations requires access to clock\ncontroller registers that are only accessible when that clock is on.\n\nChange the order of calls in pil_q6v5_enable_clks() and in\npil_q6v5_disable_clks() so that this constraint is obeyed.\n\nChange-Id: I43d19de36608601d8bd0b3d8f042023f9b2eb9ba\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "56865f0d059ff173e911d1e4231459fa7bc74627", "tree": "b88e1b37bc1373189acdd7b6e6908b9a4276c68b", "parents": [ "b5b311e95b848df8a6634ede7965bcdf27bfe90e" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Thu Aug 09 15:03:36 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Fri Aug 10 12:30:44 2012 -0700" }, "message": "msm: pil-q6v5: Enable q6ss_ahbm_clk for LPASS Q6\n\nThis clock must be enabled for the LPASS Q6 to reach its own clock\nregisters, so that it can turn on additional clocks on its own. Do\nthis.\n\nTo avoid adding another clock to struct q6v5_data, rename the mem_clk\nmember in it (used by MSS) to something more generic so it can also\nbe used by LPASS.\n\nChange-Id: I0b4ec626d249a48dd832a818f630f1f6aed1f98a\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "b5b311e95b848df8a6634ede7965bcdf27bfe90e", "tree": "04cae109df2d196366c78851bae7ca55ed0b2f71", "parents": [ "7dc95baad1fa456e364285a6add5d7a380cfd11a" ], "author": { "name": "Vikram Mulukutla", "email": "markivx@codeaurora.org", "time": "Thu Aug 09 14:58:48 2012 -0700" }, "committer": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Fri Aug 10 12:30:44 2012 -0700" }, "message": "msm: clock-8974: Add the q6ss_ahbm_clk required by LPASS PIL\n\nThe Q6 processor in the LPASS subsystem needs the q6ss_ahbm_clk\nregisters to be on to be able to access registers. Add support\nfor this clock.\n\nChange-Id: I0e2d5c677d1226648e8a06ae26cc86d9bc01a383\nSigned-off-by: Vikram Mulukutla \u003cmarkivx@codeaurora.org\u003e\n" }, { "commit": "336810bed12a3cd650e578189c6b54f34883e74d", "tree": "126f85a24e4fd1004c9d5fd1e480d85319caf2f7", "parents": [ "f1e82321db2e074e517a1192031a80060dddffc9" ], "author": { "name": "David Ng", "email": "dave@codeaurora.org", "time": "Fri Jul 27 19:09:41 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 13:10:17 2012 -0600" }, "message": "defconfig: msm8974: Disable appended DT option\n\nDisable the kernel option to append device tree blob\nto end of kernel image. This is no longer necessary\nas the Android boot/recovery images will have a\nseparate section to store the device tree blob.\n\nChange-Id: I6e9ed038d704ffb59a09a58466fc56d68ebe072a\nSigned-off-by: David Ng \u003cdave@codeaurora.org\u003e\n" }, { "commit": "7dc95baad1fa456e364285a6add5d7a380cfd11a", "tree": "8ac7c64ccf8b9000eb5582503ec44b75a165e183", "parents": [ "958533c044cd46fb737c548776aa497c21cc8623", "45b86ac1b93930cc0fa6c8bbbcd434b586f46a46" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 12:03:56 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 12:03:56 2012 -0700" }, "message": "Merge \"regulator: qpnp-regulator: Update FTSMPS voltage ranges to match hardware\" into msm-3.4" }, { "commit": "958533c044cd46fb737c548776aa497c21cc8623", "tree": "45e51fdc1bff6e0a9a69e1edcb018e1ac8b19434", "parents": [ "ea9ca88b7d4d291b309764729aa1018edfd3683b", "2e02b861173406a1287a53ca7b836a4ad5fd4255" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 12:03:56 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 12:03:56 2012 -0700" }, "message": "Merge \"Bluetooth: fix shutdown on SCO sockets\" into msm-3.4" }, { "commit": "ea9ca88b7d4d291b309764729aa1018edfd3683b", "tree": "cd9fc2167f9b4523fe41f3f7fe417f5ba88e2ba8", "parents": [ "f8791efb40ea49cf4cb98e52804e2a5de08c01fe", "a7c3d7e6d905bab198003f16316971ae872eec9f" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 12:03:54 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 12:03:54 2012 -0700" }, "message": "Merge \"Bluetooth: Disable sniff when the subrate values doesnt match.\" into msm-3.4" }, { "commit": "f8791efb40ea49cf4cb98e52804e2a5de08c01fe", "tree": "6a423dcf8de90596366680cec4aaade423c802d6", "parents": [ "eda2f95ad14e8e1fcbd3e96f706d61919aecb95d", "8b7d6a2159406ccf53387843b613e264e17f6939" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 12:03:45 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 12:03:45 2012 -0700" }, "message": "Merge \"arm/dt: msm8974: Remove PM8841 S5-S8 qpnp-regulator device nodes\" into msm-3.4" } ], "next": "eda2f95ad14e8e1fcbd3e96f706d61919aecb95d" }