)]}' { "log": [ { "commit": "4aba098c8d64329f0c4b24d12e1dc5398dd41a75", "tree": "ce2cebacd66325fc0795d7492ce3c49ee07f980a", "parents": [ "0b7d5170dc5a4aca144b27d40b67d73b245df066" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 03 15:48:03 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 03 15:48:03 2010 +0000" }, "message": "ARM: Fix wrong register in proc-arm6_7.S data abort handler\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2045124ffd1a5e46d157349016a2c50f19c8c91d", "tree": "e305146e3f9054baead6ccb6d8bddb22c845161a", "parents": [ "1f667c690be3ab71036c436d8391105eee23f65b" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 19 23:42:08 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 19 23:11:56 2010 +0000" }, "message": "ARM: 5888/1: arm: Update comments in cacheflush.h and remove unnecessary V6 and V7 comments\n\nThe comments in cacheflush.h should follow what\u0027s in\nstruct cpu_cache_fns. The comments for V6 and V7 are\nunnecessary.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1f667c690be3ab71036c436d8391105eee23f65b", "tree": "6ae1c21bc08853412c4c7b384a3485da9c21ec70", "parents": [ "ad3e6c0b1fad31282a8384903ed811671d840a9c" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 19 17:01:33 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 19 20:23:17 2010 +0000" }, "message": "ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec work\n\nThe comments in arm_machine_restart() suggest that cpu_proc_fin()\nwill clean and disable cache and turn off interrupts. This does\nnot seem to be implemented for proc-v7.S, implement it the same\nway as for proc-v6.S.\n\nThis also makes kexec work for v7. Note that a related TLB and\nbranch traget flush patch is also needed to avoid kexec\n\"crc error\".\n\nNote that there are still some issues that seem to be related\nto L2 cache being on and causing occasional uncompress \"crc error\"\nwith kexec. Anyways, this gets kexec mostly working on V7 for now.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ad3e6c0b1fad31282a8384903ed811671d840a9c", "tree": "cc2ea5a7f713c3b0684515ad24ab23aa8f491c71", "parents": [ "200b7a8dc09504bc0aedac567a307a6e533f39e5" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 19 16:42:12 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 19 20:23:17 2010 +0000" }, "message": "ARM: 5885/1: arm: Flush TLB entries in setup_mm_for_reboot()\n\nWe need to do that if we tinker with the MMU entries.\n\nThis fixes the occasional bug with kexec where the new\nfails to uncompress with \"crc error\". Most likely at\nleast kexec on v6 and v7 need this fix.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1f0e14bbc065c88ddb68fec42b317f487cc85410", "tree": "ed8d6206d3362e92db3f5dd981a2e865200bde9c", "parents": [ "f25bb39f8adfe980df223f415f3b845953ca1147", "aff7b4f86737f1ae364bf5ece9a9b8586ddb2db4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 12 20:56:01 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 12 20:56:01 2010 -0800" }, "message": "Merge master.kernel.org:/home/rmk/linux-2.6-arm\n\n* master.kernel.org:/home/rmk/linux-2.6-arm:\n ARM: Ensure ARMv6/7 mm files are built using appropriate assembler options\n ARM: Fix wrong dmb\n ARM: 5874/1: serial21285: fix disable_irq-from-interrupt-handler deadlock\n ARM: 5873/1: ARM: Fix the reset logic for ARM RealView boards\n ARM: 5872/1: ARM: include needed linux/cpu.h in asm/cpu.h\n ARM: 5871/1: arch/arm: Fix build failure for lpd7a404_defconfig caused by missing includes\n ARM: 5870/1: arch/arm: Fix build failure for defconfigs without CONFIG_ISA_DMA_API set\n ARM: 5868/1: ARM: fix \"BUG: using smp_processor_id() in preemptible code\"\n ARM: 5867/1: Update U300 defconfig\n ARM: 5866/1: arm ptrace: use unsigned types for kernel pt_regs\n [ARM] pxa: fix strange characters in zaurus gpio .desc\n ARM: add missing recvmmsg syscall number\n [ARM] pxa: fix compiler warnings of unused variable \u0027id\u0027 in cpu_is_pxa9*()\n [ARM] pxa: update pwm_backlight-\u003enotify() to include missed \u0027struct device *\u0027\n [ARM] pxa: enable L2 if present in XSC3\n [ARM] pxa: do not enable L2 after MMU is enabled\n" }, { "commit": "aff7b4f86737f1ae364bf5ece9a9b8586ddb2db4", "tree": "c083c9f20933c89a5d24882f69bcba410766b739", "parents": [ "7511bce4069de39ea04b14c1e1d55c249f9ce808" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 12 19:02:05 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 12 19:02:05 2010 +0000" }, "message": "ARM: Ensure ARMv6/7 mm files are built using appropriate assembler options\n\nA kernel with both ARMv6 and ARMv7 selected results in build errors.\nFix this by specifying the proper architectures for these assembly\nfiles.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4b529401c5089cf33f7165607cbc2fde43357bfb", "tree": "0e559e77e9a2c837cd7c25f3a48e83ee788d7d4b", "parents": [ "50f411e34d623efbf4e4b4b0c1a4a20e04c5cc9e" ], "author": { "name": "Andreas Fenkart", "email": "andreas.fenkart@streamunlimited.com", "time": "Fri Jan 08 14:42:31 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 11 09:34:03 2010 -0800" }, "message": "mm: make totalhigh_pages unsigned long\n\nMakes it consistent with the extern declaration, used when CONFIG_HIGHMEM\nis set Removes redundant casts in printout messages\n\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0de9a00fd6e0a137c63fbbfb6012bf34cc0ab7c4", "tree": "bda182d9407e32354620e9188258c86cad2e3813", "parents": [ "22325525d8bb1478daddefec1b762e7882bcd515", "d13fecd0293d55a4bcb8a31078216504192d8ce0" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 08 16:18:37 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 08 16:18:37 2010 +0000" }, "message": "Merge branch \u0027fix\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6\n" }, { "commit": "070f1f178c4377c09f72e414513aeacd8403f6d6", "tree": "9110445af309570a82bf06075bef3b802da99c9a", "parents": [ "3ac584317adcc4be4466db967f3355c3e42cbda3" ], "author": { "name": "Bahadir Balban", "email": "bahadir.balban@arm.com", "time": "Fri Dec 25 14:25:48 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 05 20:52:06 2010 +0000" }, "message": "ARM: 5858/1: Remove unused vma_vm_flags macro from v7wbi_flush_user_tlb_range\n\nSigned-off-by: Bahadir Balban \u003cbbalban@b-labs.co.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "548c6af4627f4dcb24512a381193206e09bd6d31", "tree": "c9431a3b9bd63292b79cf95bea44940946dc1632", "parents": [ "dc8601a224d546bb321b058fc5ecabdb688a3582" ], "author": { "name": "Haojian Zhuang", "email": "haojian.zhuang@marvell.com", "time": "Wed Dec 30 10:02:57 2009 -0500" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Fri Jan 01 15:51:53 2010 +0800" }, "message": "[ARM] pxa: enable L2 if present in XSC3\n\nCheck whether L2 is present or not in XSC3. If it\u0027s present, enable L2\nimmediately.\n\nDisabling L2 after L2 is enabled that would result in unpredicatable behavior\nof XSC3 processor.\n\nSigned-off-by: Haojian Zhuang \u003chaojian.zhuang@marvell.com\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "dc8601a224d546bb321b058fc5ecabdb688a3582", "tree": "9cdb8feef2c2734abf4a2511378c64af0cac1f6b", "parents": [ "91a86a964f0773fdf466fe02577c8494ca8e2083" ], "author": { "name": "Haojian Zhuang", "email": "haojian.zhuang@gmail.com", "time": "Wed Dec 30 02:27:24 2009 -0500" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Fri Jan 01 15:50:34 2010 +0800" }, "message": "[ARM] pxa: do not enable L2 after MMU is enabled\n\nOuter cache checked whether L2 is enabled or not. If L2 isn\u0027t enabled in XSC3,\nit would enable L2. This operation is evil that would make system hang.\n\nIn XSC3 core document, these words are mentioned in below.\n\n\"Following reset, the L2 Unified Cache Enable bit is cleared. To enable the L2\nCache, software may set the bit to a \u00271\u0027 before or at the same time as enabling\nthe MMU. Enabling the L2 Cache after the MMU has been enabled or disabling the\nL2 Cache after the L2 Cache has been enabled, may result in unpredictable\nbehavior of the processor.\"\n\nWhen outer cache is initialized, the MMU is already enabled. We couldn\u0027t enable\nL2 after MMU enabled.\n\nSigned-off-by: Haojian Zhuang \u003chaojian.zhuang@marvell.com\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "6dc995a3da9adfa83d61ccf06aa1afa5f6ab764f", "tree": "02ebf4534f9eaa964b8a840ca0d70323e6bb460a", "parents": [ "52e8bfd81af5492a14cc3a4641d4c80d05b66bdb" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 24 10:16:21 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 24 10:16:21 2009 +0000" }, "message": "ARM: fix PAGE_KERNEL\n\nPAGE_KERNEL should not be executable; any area marked executable can\nbe prefetched into the instruction cache. We don\u0027t want vmalloc areas\nto be read in this way.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "52e8bfd81af5492a14cc3a4641d4c80d05b66bdb", "tree": "1489eb5f4ecac93071fc9995afa298a5a3f10e92", "parents": [ "d9fd3ab89ff58ca70c8cc0eadc87cd4a96950f95" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 23 19:54:31 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 23 19:54:31 2009 +0000" }, "message": "ARM: Fix wrong shared bit for CPU write buffer bug test\n\nIt is unpredictable to have the same memory mapped using different\nshared bit settings for ARMv6 and ARMv7 CPUs. Fix this for the CPU\nwrite buffer bug test.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4da8b8208eded0ba21e3ed7cee79e7454b2b973d", "tree": "592ba5af65c6799fad17d26d0d642a7912fdf3e6", "parents": [ "797245f5da543074ee7db0e0516da744c89aa17f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:06:32 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:07:53 2009 +0000" }, "message": "ARM: Kill CONFIG_CPU_32\n\n26-bit ARM support was removed a long time ago, and this symbol has\nbeen defined to be \u0027y\u0027 ever since. As it\u0027s never disabled anymore,\nwe can kill it without any side effects.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2395d66d09ce10c25b6756575c4aeb219760d1fc", "tree": "10da4bf5978bf06a4014b9294837a31e7503e4f4", "parents": [ "55639353a0035052d9ea6cfe4dde0ac7fcbb2c9f" ], "author": { "name": "Anand Gadiyar", "email": "gadiyar@ti.com", "time": "Fri Dec 18 12:56:10 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 12:07:05 2009 +0000" }, "message": "ARM: 5853/1: ARM: Fix build break on ARM v6 and v7\n\nCommit 2c9b9c849 added an argument to __cpuc_flush_dcache_page\nand renamed it.\n\nUpdate a caller of the old function to fix this build error:\n\n CC arch/arm/mm/copypage-v6.o\narch/arm/mm/copypage-v6.c: In function \u0027v6_copy_user_highpage_nonaliasing\u0027:\narch/arm/mm/copypage-v6.c:51: error: implicit declaration of function \u0027__cpuc_flush_dcache_page\u0027\nmake[1]: *** [arch/arm/mm/copypage-v6.o] Error 1\nmake: *** [arch/arm/mm] Error 2\n\nReported-by: Jinsung Yang \u003cjsgood.yang@samsung.com\u003e\n\nSigned-off-by: Anand Gadiyar \u003cgadiyar@ti.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6665398afafcb1c75d933c1452a9010644aba3e6", "tree": "6a6dce2ac7835de25f422330ea224a01eef55635", "parents": [ "c0caac93f873cd3402b63246bf94d904afc4f5fd", "bf32eb85492af197ea5ff20e0be56f667a80584d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 17 23:22:23 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 17 23:22:23 2009 +0000" }, "message": "Merge branch \u0027cache\u0027 (early part)\n" }, { "commit": "1cc76b5ee02e4e884339ee3baf43cafd26dd4f1b", "tree": "480f1e88d9966a913a67f63f74d5486363903fff", "parents": [ "8bea8672edfca7ec5f661cafb218f1205863b343", "1cb9f9b086f818eb9543ed759382de7b95c67f87" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 16 20:06:20 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 16 20:06:20 2009 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion\n" }, { "commit": "bf32eb85492af197ea5ff20e0be56f667a80584d", "tree": "b43d056362e49831040a871040f39778f31abace", "parents": [ "f74f7e57ae9fa12b2951ae62ce3557799b318399", "3d1074349b22c9653e746282564136c87668c2b8" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:54:10 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:54:10 2009 +0000" }, "message": "Merge branch \u0027pending-l2x0\u0027 into cache\n" }, { "commit": "2c9b9c8490b60428fa2d1c64042f7c7caed93940", "tree": "c8af289af8c801193eea924db0cd81f09068ddb9", "parents": [ "ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 26 12:56:21 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:53:22 2009 +0000" }, "message": "ARM: add size argument to __cpuc_flush_dcache_page\n\n... and rename the function since it no longer operates on just\npages.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218", "tree": "f4de2fb21cc45716c2dbcb98acb176c4295a551c", "parents": [ "3067e02f8f3ae2f3f02ba76400d03b8bcb4942b0" ], "author": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Dec 11 02:21:57 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:53:21 2009 +0000" }, "message": "ARM: 5848/1: kill flush_ioremap_region()\n\nThere is not enough users to warrant its existence, and it is actually\nan obstacle to progress with the new DMA API which cannot cover this\ncase properly.\n\nTo keep backward compatibility, let\u0027s perform the necessary custom\ncache maintenance locally in the only driver affected.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3d1074349b22c9653e746282564136c87668c2b8", "tree": "b86a8b3cfa5b63e218df8da66417a4ec5f229b0e", "parents": [ "0eb948dd7f7c3cec37440c16a6c738c8e75efcda" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 11:41:09 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 13:35:13 2009 +0000" }, "message": "ARM: cache-l2x0: make better use of background cache handling\n\nThere\u0027s no point having the hardware support background operations\nif we issue a cache operation, and then wait for it to complete\nbefore calculating the address of the next operation. We gain no\nadvantage in the cache controller stalling the bus until completion.\n\nWhat we should be doing is using the \u0027wait\u0027 time productively by\ncalculating the address of the next operation, and only then waiting\nfor the previous operation to complete. This means that cache\noperations can occur in parallel with the CPU calculating the next\naddress.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "0eb948dd7f7c3cec37440c16a6c738c8e75efcda", "tree": "96ecc9b1a3b5326f7de82cd2055b448a7e43c9f8", "parents": [ "22763c5cf3690a681551162c15d34d935308c8d7" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 11:12:15 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 13:34:58 2009 +0000" }, "message": "ARM: cache-l2x0: avoid taking spinlock for every iteration\n\nTaking the spinlock for every iteration is very expensive; instead,\nbatch iterations up into 4K blocks, releasing and reacquiring the\nspinlock between each block.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "e77414e0aad6a1b063ba5e5750c582c75327ea6a", "tree": "9492b584ce6a3e4f99570ce4517d7efaaff4fb93", "parents": [ "bb52d6694002b9d632bb355f64daa045c6293a4e" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Sat Dec 05 15:10:44 2009 -0500" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Fri Dec 11 06:44:59 2009 -0500" }, "message": "fix broken aliasing checks for MAP_FIXED on sparc32, mips, arm and sh\n\nWe want addr - (pgoff \u003c\u003c PAGE_SHIFT) consistently coloured...\n\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nAcked-by: Hugh Dickins \u003chugh.dickins@tiscali.co.uk\u003e\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "f0e5d2c959d5f14dd3bc879c8f9390aa2c049423", "tree": "e8614fd870461ad908aed91bfb6ed2af0667997a", "parents": [ "da43243e765908d2ce6d22b2be995edf3218457d" ], "author": { "name": "Saeed Bishara", "email": "saeed@marvell.com", "time": "Sun Dec 06 18:06:43 2009 +0200" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Mon Dec 07 17:04:18 2009 -0500" }, "message": "ARM: dove: fix the mm mmu flags of the pj4 procinfo\n\n... to be the same as proc-v6\n\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "0719dc341389882cc834ed18fc9b7fc6006b2b85", "tree": "794480ac62c07ea8cc4e69c2cb3d2b83bb7f36b7", "parents": [ "e28edb723e64200554194da17617ee6e82de6690", "677f4f64e4b2336682f0e15c69b206ade6f6b131" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 05 10:35:33 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 05 10:35:33 2009 +0000" }, "message": "Merge branch \u0027devel-stable\u0027 into devel\n" }, { "commit": "4567c4a89693416ccca02d32109bce967e9c1ade", "tree": "9d77cf02ce269ed5fc4b6e2ebddb9ad7fd504ad1", "parents": [ "602fd7c36728a04e61a442c9755e7d454501266c", "19d6c13b56a78b3757e747f469285c2a546d634a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 17:34:16 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 17:34:16 2009 +0000" }, "message": "Merge branch \u0027devel\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable\n" }, { "commit": "c6baa1963c2a76ffdb157e8b9a5a55b30046b125", "tree": "9063398d2406042670759e207d9058ec5e7b770b", "parents": [ "5cb2faa6ede7ada9cb2bffc832c4ce60f53d6834", "26a26d329688ab018e068b412b03d43d7c299f0a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 15:00:00 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 15:00:00 2009 +0000" }, "message": "Merge branch \u0027pending-dma-coherent\u0027 into devel\n" }, { "commit": "5cb2faa6ede7ada9cb2bffc832c4ce60f53d6834", "tree": "7b72b66081d042a41dc822575503133364857ce2", "parents": [ "e0ee98513d1a2e24d2ddbdecf4216bcca29d1158", "6060e8df517847bf445ebc61de7d4d9c7faae990" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:59:47 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:59:47 2009 +0000" }, "message": "Merge branch \u0027pending-misc\u0027 (early part) into devel\n" }, { "commit": "6060e8df517847bf445ebc61de7d4d9c7faae990", "tree": "64a86fe9a921584e38b7ce24521248b8461171c6", "parents": [ "ea201dbb78651c71c56e440b8b3132906bc7456d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 14:12:27 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:51 2009 +0000" }, "message": "ARM: I-cache: flush executable mappings in flush_cache_range()\n\nDirk Behme reported instability on ARM11 SMP (VIPT non-aliasing cache)\ncaused by the dynamic linker changing protection on text pages to write\nGOT entries. The problem is due to an interaction between the write\nfaulting code providing new anonymous pages which are incoherent with\nthe I-cache due to write buffering, and the I-cache not having been\ninvalidated.\n\na4db94d plugs the hole with the data cache coherency. This patch\nprovides the other half of the fix by flushing the I-cache in\nflush_cache_range() for VM_EXEC VMAs (which is what we have when the\nregion is being made executable again.) This ensures that the I-cache\nwill be up to date with the newly COW\u0027d pages.\n\nNote: if users are writing instructions, then they still need to use\nthe ARM sys_cacheflush API to ensure that the caches are correctly\nsynchronized.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ea201dbb78651c71c56e440b8b3132906bc7456d", "tree": "53fa8679229960bb585766c5b49301dee834bcec", "parents": [ "9e95922b1016ac941db7edcf6b6088b3c2e916c8" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 14:31:40 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:51 2009 +0000" }, "message": "ARM: I-cache: avoid flushing in flush_cache_mm()\n\nflush_cache_mm() is called in two cases:\n1. when a process exits, just before the page tables are torn down.\n We can allow the stale lines to evict themselves over time without\n causing any harm.\n\n2. when a process forks, and we\u0027ve allocated a new ASID.\n The instruction cache issues are dealt with as pages are brought\n into the new process address space. Flushing the I-cache here is\n therefore unnecessary.\n\nHowever, we must keep the VIPT aliasing D-cache flush to ensure that\nany dirty cache lines are not written back after the pages have been\nreallocated for some other use - which would result in corruption.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9e95922b1016ac941db7edcf6b6088b3c2e916c8", "tree": "1b60b7231f9412e7c842c9a12804b3ab914ca5cd", "parents": [ "115b22474eb1905da2f606a057da3455833333d3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 13:35:13 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:51 2009 +0000" }, "message": "ARM: I-cache: Add invalidation for VIVT ASID tagged caches\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "115b22474eb1905da2f606a057da3455833333d3", "tree": "21633ac227c92fc6f646ccdb5a0b3d7f5f73aaba", "parents": [ "f91fb05d826a43063fa0aa2ec30c23d3993a208d" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 24 18:54:07 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: 5794/1: Flush the D-cache during copy_user_highpage()\n\nThe I and D caches for copy-on-write pages on processors with\nwrite-allocate caches become incoherent causing problems on application\nrelying on CoW for text pages (dynamic linker relocating symbols in a\ntext page). This patch flushes the D-cache for such pages.\n\nCc: Nicolas Pitre \u003cnico@fluxnic.net\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f91fb05d826a43063fa0aa2ec30c23d3993a208d", "tree": "9ada5aefa09d40b70ea3b8a5e89d7ce6aa2a5fd9", "parents": [ "2df341edf6b8a2db7f414d00faeadccbdd9844ab" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 23:05:34 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: Remove __flush_icache_all() from __flush_dcache_page()\n\nBoth call sites for __flush_dcache_page() end up calling\n__flush_icache_all() themselves, so having __flush_dcache_page() do\nthis as well is wasteful. Remove the duplicated icache flushing.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2df341edf6b8a2db7f414d00faeadccbdd9844ab", "tree": "e88bb4f549103a9fe25552ab136c9ce3daab61f1", "parents": [ "7b0a1003e780193e2a11c27f5059c26b65f60679" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 22:58:40 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: Move __flush_icache_all() out of flush_pfn_alias()\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7b0a1003e780193e2a11c27f5059c26b65f60679", "tree": "c3277aa1f6536530514dafd946770928b4bf4aff", "parents": [ "421fe93cc4b06b2f5e875cbe0f692800d4862ee5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 14:11:59 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: Reduce __flush_dcache_page() visibility\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "48371cd3f4226275c529bb8675a99572db19cc7c", "tree": "c76042ed297179c2c4823d11f2c9d7447049ae1a", "parents": [ "1f739d7643c4cf78b4f2d9d620c4305aafc7d3b9" ], "author": { "name": "Srinidhi Kasagar", "email": "srinidhi.kasagar@stericsson.com", "time": "Wed Dec 02 06:18:03 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 03 19:42:30 2009 +0000" }, "message": "ARM: 5845/1: l2x0: check whether l2x0 already enabled\n\nIf running in non-secure mode accessing\nsome registers of l2x0 will fault. So\ncheck if l2x0 is already enabled, if so\ndo not access those secure registers.\n\nSigned-off-by: srinidhi kasagar \u003csrinidhi.kasagar@stericsson.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d7931d9f7ab9de9158c6905caae979999134ad4d", "tree": "3903d96bfea61a4c66b11f95535928b4cb991327", "parents": [ "fb3704663058ebb8ec05236f9c984b702550bac5", "da43243e765908d2ce6d22b2be995edf3218457d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:22:54 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:22:54 2009 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion into devel-stable\n" }, { "commit": "421fe93cc4b06b2f5e875cbe0f692800d4862ee5", "tree": "88c5985799273a7c854159246d715e1ad85646f9", "parents": [ "b7dc0b2cfc6e9bc7270915c642a8a8e999b6095e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 10:23:04 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:20:07 2009 +0000" }, "message": "ARM: ZERO_PAGE: Avoid flush_dcache_page() for zero page\n\nThe zero page is read-only, and has its cache state cleared during\nboot. No further maintanence for this page is required.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b7dc0b2cfc6e9bc7270915c642a8a8e999b6095e", "tree": "68853dc2d48f9abcd5eadab0dc181ad8b0e8ac59", "parents": [ "2f0b192633f1fbf253b21c90938733491549edae" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 11:25:50 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:20:07 2009 +0000" }, "message": "ARM: Avoid evaluating page_address() multiple times\n\npage_address() is a function call rather than a macro, and so:\n\n\tif (page_address(page))\n\t\tdo_something(page_address(page));\n\nresults in two calls to this function. This is unnecessary; remove\nthe duplication.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2f0b192633f1fbf253b21c90938733491549edae", "tree": "a429eaf88e591ea9674075ac6389e9a751da9806", "parents": [ "29e553631b2a0d4eebd23db630572e1027a9967a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 10:40:02 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:20:07 2009 +0000" }, "message": "ARM: Avoid duplicated implementation for VIVT cache flushing\n\nWe had two copies of the wrapper code for VIVT cache flushing - one in\nasm/cacheflush.h and one in arch/arm/mm/flush.c. Reduce this down to\none common copy.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d0a92fd3b84bf707f6b32f31d0f09d2b7bb1ad67", "tree": "8a0100ac36371afab0725ca66325a46e677be77c", "parents": [ "bb2ae8f0325221a2dfd9eb31554f42e9c24abdf2" ], "author": { "name": "Tomáš Čech", "email": "sleep_walker@suse.cz", "time": "Fri Sep 11 13:57:02 2009 +0200" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Tue Dec 01 09:02:49 2009 +0800" }, "message": "[ARM] pxa/treo: add Palm Centro 685 support\n\nSigned-off-by: Tomáš Čech \u003csleep_walker@suse.cz\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "573a652fb0da50a1ff3fca2c67afd81138fd06d2", "tree": "e393e667f733db56447c266d45e58accf141894f", "parents": [ "edabd38e1a017e922e3e3b485ee3ddb4df433aa4" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@marvell.com", "time": "Tue Nov 24 19:33:52 2009 +0200" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Nov 27 15:43:21 2009 -0500" }, "message": "ARM: Add Tauros2 L2 cache controller support\n\nSupport for the Tauros2 L2 cache controller as used with the PJ1\nand PJ4 CPUs.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "edabd38e1a017e922e3e3b485ee3ddb4df433aa4", "tree": "c79cef3e59f62014c12ff1203e84b0bac5610a55", "parents": [ "8d27b2f7988b652dbabf79291a3e2550c06e1af5" ], "author": { "name": "Saeed Bishara", "email": "saeed@marvell.com", "time": "Thu Aug 06 15:12:43 2009 +0300" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Nov 27 15:43:06 2009 -0500" }, "message": "ARM: add base support for Marvell Dove SoC\n\nThe Marvell Dove (88AP510) is a high-performance, highly integrated,\nlow power SoC with high-end ARM-compatible processor (known as PJ4),\ngraphics processing unit, high-definition video decoding acceleration\nhardware, and a broad range of peripherals.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "26a26d329688ab018e068b412b03d43d7c299f0a", "tree": "f33ea6faa4f8d9409098654354548fa28c7b41ad", "parents": [ "acaac256b3a14a09ab278409a72d119f2d75b02b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 21:06:43 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:36 2009 +0000" }, "message": "ARM: dma-mapping: switch ARMv7 DMA mappings to retain \u0027memory\u0027 attribute\n\nOn ARMv7, it is invalid to map the same physical address multiple times\nwith different memory types. Since system RAM is already mapped as\n\u0027memory\u0027, subsequent remapping of it must retain this attribute.\n\nHowever, DMA memory maps it as \"strongly ordered\". Fix this by introducing\n\u0027pgprot_dmacoherent()\u0027 which provides the necessary page table bits for\nDMA mappings.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "acaac256b3a14a09ab278409a72d119f2d75b02b", "tree": "f9e3c66fddc3e40e86d4b03fec166101da1fdb04", "parents": [ "31ebf94435f74294523683867fe0b89000e61521" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 18:19:52 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:36 2009 +0000" }, "message": "ARM: dma-mapping: get rid of setting/clearing the reserved page bit\n\nIt\u0027s unnecessary; x86 doesn\u0027t do it, and ALSA doesn\u0027t require it\nanymore.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "31ebf94435f74294523683867fe0b89000e61521", "tree": "57f587da490f9c8bbf987d4165a5ede7f7ad5d63", "parents": [ "ebd7a845fa4332da3ebcbe8cf1b09bb43413420e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 21:12:17 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: Factor out noMMU dma buffer allocation code\n\nThis entirely separates the DMA coherent buffer remapping code from\nthe allocation code, and gets rid of the duplicate copy in the !MMU\nsection.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "ebd7a845fa4332da3ebcbe8cf1b09bb43413420e", "tree": "07bb3b78fd2bbe3705fb040f6ad1f5da6b5a625c", "parents": [ "88c58f3b92bc7c26439802c300d39b6377739d81" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 20:58:31 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: clean up coherent arch dma allocation\n\nIXP23xx added support for dma_alloc_coherent() for DMA arches with an\nexception in dma_alloc_coherent(). This is a subset of what goes on\nin __dma_alloc(), and there is no reason why dma_alloc_writecombine()\nshould not be given the same treatment (except, maybe, that IXP23xx\ndoesn\u0027t use it.)\n\nWe can better deal with this by moving the arch_is_coherent() test\ninside __dma_alloc() and killing the code duplication.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "88c58f3b92bc7c26439802c300d39b6377739d81", "tree": "ffcc5f555fb871a3a5e7d8b5a17757563b43a5df", "parents": [ "695ae0af5a52df09dffcc2ce2d625d56ef36ce14" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 16:46:02 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: move consistent_init into CONFIG_MMU section\n\nNo point wrapping the contents of this function with #ifdef CONFIG_MMU\nwhen we can place it and the core_initcall() entirely within the\nexisting conditional block.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "695ae0af5a52df09dffcc2ce2d625d56ef36ce14", "tree": "c2114e79fac53f9eb29e0ed74b5aa4fa5a39b607", "parents": [ "04da56943b416dd9fe7058abf8d5b9153164b3e9" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 16:31:39 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: factor dma_free_coherent() common code\n\nWe effectively have three implementations of dma_free_coherent() mixed up\nin the code; the incoherent MMU, coherent MMU and noMMU versions.\n\nThe coherent MMU and noMMU versions are actually functionally identical.\nThe incoherent MMU version is almost the same, but with the additional\nstep of unmapping the secondary mapping.\n\nSeparate out this additional step into __dma_free_remap() and simplify\nthe resulting dma_free_coherent() code.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "04da56943b416dd9fe7058abf8d5b9153164b3e9", "tree": "24541a1e46b9f660d3b33845d1e31b0d0c4918d0", "parents": [ "3e82d012e9281a0b6388ff2356e8396b9d781e1c" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:54:45 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: fix nommu dma_alloc_coherent()\n\nThe nommu version of dma_alloc_coherent was using kmalloc/kfree to manage\nthe memory. dma_alloc_coherent() is expected to work with a granularity\nof a page, so this is wrong. Fix it by using the helper functions now\nprovided.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "3e82d012e9281a0b6388ff2356e8396b9d781e1c", "tree": "c76320422bd3988e499680662b3bebbf9796589b", "parents": [ "7a9a32a9533fa01de911e1d056142ddd27360782" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:38:12 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: fix coherent arch dma_alloc_coherent()\n\nThe coherent architecture dma_alloc_coherent was using kmalloc/kfree to\nmanage the memory. dma_alloc_coherent() is expected to work with a\ngranularity of a page, so this is wrong. Fix it by using the helper\nfunctions now provided.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "7a9a32a9533fa01de911e1d056142ddd27360782", "tree": "2fcd22e74333d83a81586101ea622e9b197c13ea", "parents": [ "13ccf3ad99a45052664f2c1a6c64899f9d778152" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:31:07 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: functions to allocate/free a coherent buffer\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "13ccf3ad99a45052664f2c1a6c64899f9d778152", "tree": "6e8f43fcb8e7f1c266b8c13a670c206bbf34bc96", "parents": [ "ac50e950784cae1c26ad9e09ebd8f8c706131eb3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:07:04 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: split out vmregion code from dma coherent mapping code\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "394168389c5770accf1d255fdfe45846ec121585", "tree": "9f5493e46b94a1aed058d121091ea8e982a95d11", "parents": [ "b43149c168ce4069ce8828b1ceb8f7eb42bc4b82" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Nov 19 11:30:30 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 10:06:26 2009 +0000" }, "message": "ARM: 5791/1: ARM: MM: use 64bytes of L1 cache on plat S5PC1xx\n\nSamsung S5PC1xx SoCs are based on ARM Coretex8, which has 64 bytes of L1\ncache line size. Enable proper handling of L1 cache on these SoCs.\n\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "749f583f3405f93bf56ed5dd0be1d65c06db6f0f", "tree": "c65a5139a9122a140a8d46c08ea882a6a900f4be", "parents": [ "ef1a68848a968f7347cf7eea24072464059af8f1", "345a32296b1f9f6121379e0240915e0e2be2dbf5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 23:53:11 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 23:53:11 2009 +0000" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop into devel-stable\n" }, { "commit": "1b3a02eb452354fa9b36a7f33dc4c8307bbc40aa", "tree": "232eab4b30cda81c310864e0dc18b57c431f33dd", "parents": [ "b419148e567728f6af0c3b01965c1cc141e3e13a" ], "author": { "name": "Tony Thompson", "email": "Anthony.Thompson@arm.com", "time": "Wed Nov 04 12:16:38 2009 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Wed Nov 04 12:19:22 2009 +0000" }, "message": "ARMv7: Check whether the SMP/nAMP mode was already enabled\n\nIf running in non-secure mode, enabling this register will fault.\n\nSigned-off-by: Tony Thompson \u003cAnthony.Thompson@arm.com\u003e\nAcked-by: Srinidhi Kasagar \u003csrinidhikasagar@gmail.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "4b46d6416548fb6a0940dfd9911fd895eb6247b3", "tree": "c2a890342019c9df5e6187ad185a28208b786341", "parents": [ "6603a4fd5195a004dec5f9568e38ff76bae630c1" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 01 17:44:24 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 02 16:59:59 2009 +0000" }, "message": "ARM: ensure initial page tables are setup for SMP systems\n\nMapping the same memory using two different attributes (memory\ntype, shareability, cacheability) is unpredictable. During boot,\nwe encounter a situation when we\u0027re updating the kernel\u0027s page\ntables which can lead to dirty cache lines existing in the cache\nwhich are subsequently missed. This causes stack corruption,\nand therefore a crash.\n\nTherefore, ensure that the shared and cacheability settings\nmatches the configuration that will be used later; this together\nwith the restriction in early_cachepolicy() ensures that we won\u0027t\ncreate a mismatch during boot.\n\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "df71dfd4ca01130f98d9dbfab76c440d72a177c6", "tree": "5050d23a67be5fc5fabd4e6d96ac89786fb2a9c9", "parents": [ "657e12fd388899502d47f9f6f9d276ec9ced8add" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 22:36:36 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 29 19:13:09 2009 +0000" }, "message": "ARM: Fix errata 411920 workarounds\n\nErrata 411920 indicates that any \"invalidate entire instruction cache\"\noperation can fail if the right conditions are present. This is not\nlimited just to those operations in flush.c, but elsewhere. Place the\nworkaround in the already existing __flush_icache_all() function\ninstead.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "345a32296b1f9f6121379e0240915e0e2be2dbf5", "tree": "995ad5887af10b11b2cbc48e8936f7f7d9fbb109", "parents": [ "980f2296b5a8dfe589f023fd34229dcfdcf280fa" ], "author": { "name": "Mikael Pettersson", "email": "mikpe@it.uu.se", "time": "Thu Oct 29 11:46:56 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Oct 29 11:46:56 2009 -0700" }, "message": "iop: implement sched_clock()\n\nThis adds a better sched_clock() to the IOP platform,\nimplemented using its new clocksource support.\n\nTested on n2100, compile-tested for all plat-iop machines.\n\n[dan.j.williams@intel.com: allow early cp6 access]\nSigned-off-by: Mikael Pettersson \u003cmikpe@it.uu.se\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "657e12fd388899502d47f9f6f9d276ec9ced8add", "tree": "cce20de56800ea3b63159e8db69577e761f4e094", "parents": [ "c06e004c72aa0d1acbc239fb995aa3d823543a8a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 29 17:06:17 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 29 17:06:17 2009 +0000" }, "message": "ARM: Fix sparsemem with SPARSEMEM_EXTREME enabled\n\nWhen SPARSEMEM_EXTREME is enabled, memory_present() wants to use bootmem\nto allocate data structures. However, we call memory_present() after\ndeclaring memory to bootmem, but before we\u0027ve reserved areas.\n\nThis leads to sparsemem data structures being overwritten later in the\nkernel\u0027s initialization (when slab initializes.)\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c06e004c72aa0d1acbc239fb995aa3d823543a8a", "tree": "62d438159176d4f0090144073297fc093907ba81", "parents": [ "ce63e6bd0ac7eca242562ee07f518bacc8eaa5ce" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 22:36:10 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 22:44:30 2009 +0000" }, "message": "ARM: Use GFP_DMA only for masks _less_ than 32-bit\n\nWe were using GFP_DMA for masks other than 0xffffffff, which is\nwrong when some masks are initialized to 0xffffffffffffffff.\nThis caused such masks to obtain memory from the precious DMA\npool.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c768e67625688517c23f46b31a46e1f7d2de1c71", "tree": "5b3e970fed1fd5eea71a8254c210f967b816e669", "parents": [ "f248dc626e95a2b61fed3631df49aef23f1736b8" ], "author": { "name": "Hartley Sweeten", "email": "hartleys@visionengravers.com", "time": "Wed Oct 21 02:27:01 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 21 13:09:37 2009 +0100" }, "message": "ARM: 5769/1: CPU_ARM920T: remove dead Maverick EP9312 URL\n\nRemove the URL listed for Maverick EP9312 since it is not available\nand modify the help text appropriately.\n\nSigned-off-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Ryan Mallon \u003cryan@bluewatersys.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "787b2faadc4356b6c2c71feb42fb944fece9a12f", "tree": "e3acab624bb2de248a2e4f1e6293024200c8dc8c", "parents": [ "edc72786d208e77db94f84dcb0d166c0d23d82f7" ], "author": { "name": "Nitin Gupta", "email": "ngupta@vflare.org", "time": "Mon Oct 12 14:20:23 2009 +0530" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Oct 12 17:52:26 2009 +0100" }, "message": "ARM: force dcache flush if dcache_dirty bit set\n\nOn ARM, update_mmu_cache() does dcache flush for a page only if\nit has a kernel mapping (page_mapping(page) !\u003d NULL). The correct\nbehavior would be to force the flush based on dcache_dirty bit only.\n\nOne of the cases where present logic would be a problem is when\na RAM based block device[1] is used as a swap disk. In this case,\nwe would have in-memory data corruption as shown in steps below:\n\ndo_swap_page()\n{\n - Allocate a new page (if not already in swap cache)\n - Issue read from swap disk\n - Block driver issues flush_dcache_page()\n - flush_dcache_page() simply sets PG_dcache_dirty bit and does not\n actually issue a flush since this page has no user space mapping yet.\n - Now, if swap disk is almost full, this newly read page is removed\n from swap cache and corrsponding swap slot is freed.\n - Map this page anonymously in user space.\n - update_mmu_cache()\n - Since this page does not have kernel mapping (its not in page/swap\n cache and is mapped anonymously), it does not issue dcache flush\n even if dcache_dirty bit is set by flush_dcache_page() above.\n\n \u003cuser now gets stale data since dcache was never flushed\u003e\n}\n\nSame problem exists on mips too.\n\n[1] example:\n - brd (RAM based block device)\n - ramzswap (RAM based compressed swap device)\n\nSigned-off-by: Nitin Gupta \u003cngupta@vflare.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6a5e293f1b34920c69a932ce37b4a4714a428dc7", "tree": "d5d85081d906126cdd539d297fa2ef2eb07b1f61", "parents": [ "e9ac829185c5d17787d78c13c05a40c39d660239" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 11 16:29:48 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 11 16:29:48 2009 +0100" }, "message": "ARM: Add kmap_atomic type debugging\n\nSeemingly this support was missed when highmem was added, so\nDEBUG_HIGHMEM wouldn\u0027t have checked the kmap_atomic type.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3257f43d9296ed7adcc84e48f6ddf5313cf29266", "tree": "97cfb5a7bcd2d21452a7716c4daa8ea512fc1ab7", "parents": [ "32cfb1b16f2b68d2296536811cadfffe26a06c1b" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Oct 06 17:57:22 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 07 13:13:00 2009 +0100" }, "message": "ARM: 5747/1: Fix the start_pg value in free_memmap()\n\nIf sparsemem is enabled, the start_pfn passed to the free_memmap()\nfunction corresponds to an area of memory not known to the kernel and\npfn_to_page returns a wrong value. The (start_pfn - 1), however, is\nknown to the kernel.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "32cfb1b16f2b68d2296536811cadfffe26a06c1b", "tree": "6872f034656cc4ffb80ba51f9b29c35bb8da9f9e", "parents": [ "cc1ad4a69667be885ac6036a315066854ef8c871" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Oct 06 17:57:09 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 07 13:12:59 2009 +0100" }, "message": "ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range\n\nThis is needed because applications using the sys_cacheflush system call\ncan pass a memory range which isn\u0027t mapped yet even though the\ncorresponding vma is valid. The patch also adds unwinding annotations\nfor correct backtraces from the coherent_user_range() functions.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1d2127123db9b1821959c2b8b7473dd7ffcdf527", "tree": "17134cbb3a6d7a077e5f05877964b1258d1f30c8", "parents": [ "e89e04fcdce6146cab3a34d4073f8a1714b457ec" ], "author": { "name": "Imre Deak", "email": "imre.deak@nokia.com", "time": "Mon Oct 05 13:40:44 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Oct 05 17:55:55 2009 +0100" }, "message": "ARM: 5742/1: ARM: add debug check for invalid kernel page faults\n\nAccording to the following in arch/arm/mm/fault.c page faults from\nkernel mode are invalid if mmap_sem is already held and there is\nno exception handler defined for the faulting instruction:\n\n/*\n * As per x86, we may deadlock here. However, since the kernel only\n * validly references user space from well defined areas of the code,\n * we can bug out early if this is from code which shouldn\u0027t.\n */\nif (!down_read_trylock(\u0026mm-\u003emmap_sem)) {\n\tif (!user_mode(regs) \u0026\u0026 !search_exception_tables(regs-\u003eARM_pc))\n\t\tgoto no_context;\n\nSince mmap_sem can be held at arbitrary times by another thread this\nalso means that any page faults from kernel mode are invalid if no\nexception handler is defined for them, regardless whether mmap_sem is\nheld at the time of fault.\n\nTo easier detect code that can trigger the above error, add a check\nalso for the case where mmap_sem is acquired. As this has an overhead\nmake it a VM debug check.\n\nSigned-off-by: Imre Deak \u003cimre.deak@nokia.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d25ef8b86e6a58f5476bf6e4a8da730b335f68fa", "tree": "2d7773ed145ace0f93d7a11ee9f738a4df4be14f", "parents": [ "4fb2847437d871fe579f820ceb18031db3359901" ], "author": { "name": "Kirill A. Shutemov", "email": "kirill@shutemov.name", "time": "Fri Sep 25 13:40:49 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Oct 02 22:34:32 2009 +0100" }, "message": "ARM: 5728/1: Proper prefetch abort handling on ARMv6 and ARMv7\n\nCurrently, on ARMv6 and ARMv7, if an application tries to execute\ncode (or garbage) on non-executable page it hangs. It caused by\nincorrect prefetch abort handling. Now every prefetch abort\nprocesses as a translation fault.\n\nTo fix this we have to analyze instruction fault status register\nto figure out reason why we\u0027ve got the abort and process it\naccordingly.\n\nTo make IFSR different from DFSR we set bit 31 which is reserved in\nboth IFSR and DFSR.\n\nThis patch also tries to protect from future hangs on unexpected\nexceptions. An application will be killed if unexpected exception\ntype was received.\n\nSigned-off-by: Kirill A. Shutemov \u003ckirill@shutemov.name\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4fb2847437d871fe579f820ceb18031db3359901", "tree": "e2015dbc54178dd114eb0c41fa5a29d89dd15b41", "parents": [ "6806bfe18fca92e2001538b84cab5f63c5ea4bed" ], "author": { "name": "Kirill A. Shutemov", "email": "kirill@shutemov.name", "time": "Fri Sep 25 13:39:47 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Oct 02 22:34:32 2009 +0100" }, "message": "ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()\n\nInstruction fault status register, IFSR, was introduced on ARMv6 to\nprovide status information about the last insturction fault. It\nneeded for proper prefetch abort handling.\n\nNow we have three prefetch abort model:\n\n * legacy - for CPUs before ARMv6. They doesn\u0027t provide neither\n IFSR nor IFAR. We simulate IFSR with section translation fault\n status for them to generalize code;\n * ARMv6 - provides IFSR, but not IFAR;\n * ARMv7 - provides both IFSR and IFAR.\n\nSigned-off-by: Kirill A. Shutemov \u003ckirill@shutemov.name\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6806bfe18fca92e2001538b84cab5f63c5ea4bed", "tree": "5279f344e2da4fd87dadd5a2e39142175807f1e7", "parents": [ "31abdb744179159f8b605f56da5b197b188e1689" ], "author": { "name": "Greg Ungerer", "email": "gerg@snapgear.com", "time": "Fri Oct 02 00:45:28 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Oct 02 22:32:34 2009 +0100" }, "message": "ARM: 5740/1: fix valid_phys_addr_range() range check\n\nCommit 1522ac3ec95ff0230e7aa516f86b674fdf72866c\n(\"Fix virtual to physical translation macro corner cases\")\nbreaks the end of memory check in valid_phys_addr_range().\nThe modified expression results in the apparent /dev/mem size\nbeing 2 bytes smaller than what it actually is.\n\nThis patch reworks the expression to correctly check the address,\nwhile maintaining use of a valid address to __pa().\n\nSigned-off-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "e616c591405c168f6dc3dfd1221e105adfe49b8d", "tree": "e2e7642873628746aba95dd22d90da26935383ab", "parents": [ "9a0f6b4646a0acaf7f06fd2e02f10f303fe85d8f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 27 20:55:43 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Sep 28 18:06:20 2009 +0100" }, "message": "ARM: Don\u0027t allow highmem on SMP platforms without h/w TLB ops broadcast\n\nWe suffer an unfortunate combination of \"features\" which makes highmem\nsupport on platforms without hardware TLB maintainence broadcast difficult:\n\n- we need kmap_high_get() support for DMA cache coherence\n- this requires kmap_high() to take a spinlock with IRQs disabled\n- kmap_high() occasionally calls flush_all_zero_pkmaps() to clear\n out old mappings\n- flush_all_zero_pkmaps() calls flush_tlb_kernel_range(), which\n on s/w IPI\u0027d systems eventually calls smp_call_function_many()\n- smp_call_function_many() must not be called with IRQs disabled:\n\nWARNING: at kernel/smp.c:380 smp_call_function_many+0xc4/0x240()\nModules linked in:\nBacktrace:\n[\u003cc00306f0\u003e] (dump_backtrace+0x0/0x108) from [\u003cc0286e6c\u003e] (dump_stack+0x18/0x1c)\n r6:c007cd18 r5:c02ff228 r4:0000017c\n[\u003cc0286e54\u003e] (dump_stack+0x0/0x1c) from [\u003cc0053e08\u003e] (warn_slowpath_common+0x50/0x80)\n[\u003cc0053db8\u003e] (warn_slowpath_common+0x0/0x80) from [\u003cc0053e50\u003e] (warn_slowpath_null+0x18/0x1c)\n r7:00000003 r6:00000001 r5:c1ff4000 r4:c035fa34\n[\u003cc0053e38\u003e] (warn_slowpath_null+0x0/0x1c) from [\u003cc007cd18\u003e] (smp_call_function_many+0xc4/0x240)\n[\u003cc007cc54\u003e] (smp_call_function_many+0x0/0x240) from [\u003cc007cec0\u003e] (smp_call_function+0x2c/0x38)\n[\u003cc007ce94\u003e] (smp_call_function+0x0/0x38) from [\u003cc005980c\u003e] (on_each_cpu+0x1c/0x38)\n[\u003cc00597f0\u003e] (on_each_cpu+0x0/0x38) from [\u003cc0031788\u003e] (flush_tlb_kernel_range+0x50/0x58)\n r6:00000001 r5:00000800 r4:c05f3590\n[\u003cc0031738\u003e] (flush_tlb_kernel_range+0x0/0x58) from [\u003cc009c600\u003e] (flush_all_zero_pkmaps+0xc0/0xe8)\n[\u003cc009c540\u003e] (flush_all_zero_pkmaps+0x0/0xe8) from [\u003cc009c6b4\u003e] (kmap_high+0x8c/0x1e0)\n[\u003cc009c628\u003e] (kmap_high+0x0/0x1e0) from [\u003cc00364a8\u003e] (kmap+0x44/0x5c)\n[\u003cc0036464\u003e] (kmap+0x0/0x5c) from [\u003cc0109dfc\u003e] (cramfs_readpage+0x3c/0x194)\n[\u003cc0109dc0\u003e] (cramfs_readpage+0x0/0x194) from [\u003cc0090c14\u003e] (__do_page_cache_readahead+0x1f0/0x290)\n[\u003cc0090a24\u003e] (__do_page_cache_readahead+0x0/0x290) from [\u003cc0090ce4\u003e] (ra_submit+0x30/0x38)\n[\u003cc0090cb4\u003e] (ra_submit+0x0/0x38) from [\u003cc0089384\u003e] (filemap_fault+0x3dc/0x438)\n r4:c1819988\n[\u003cc0088fa8\u003e] (filemap_fault+0x0/0x438) from [\u003cc009d21c\u003e] (__do_fault+0x58/0x43c)\n[\u003cc009d1c4\u003e] (__do_fault+0x0/0x43c) from [\u003cc009e8cc\u003e] (handle_mm_fault+0x104/0x318)\n[\u003cc009e7c8\u003e] (handle_mm_fault+0x0/0x318) from [\u003cc0033c98\u003e] (do_page_fault+0x188/0x1e4)\n[\u003cc0033b10\u003e] (do_page_fault+0x0/0x1e4) from [\u003cc0033ddc\u003e] (do_translation_fault+0x7c/0x84)\n[\u003cc0033d60\u003e] (do_translation_fault+0x0/0x84) from [\u003cc002b474\u003e] (do_DataAbort+0x40/0xa4)\n r8:c1ff5e20 r7:c0340120 r6:00000805 r5:c1ff5e54 r4:c03400d0\n[\u003cc002b434\u003e] (do_DataAbort+0x0/0xa4) from [\u003cc002bcac\u003e] (__dabt_svc+0x4c/0x60)\n...\n\nSo we disable highmem support on these systems.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "041d785f807c8e92e11cc1bd2b3438f7823e63d2", "tree": "91364697e90a0a6af75c3313bf703e79f62f87c9", "parents": [ "d80ade7b323152672bf66e74ec11c324332f6d1e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 27 17:40:42 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Sep 28 18:06:20 2009 +0100" }, "message": "ARM: Fix warning: unused variable \u0027highmem\u0027\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "baea7b946f00a291b166ccae7fcfed6c01530cc6", "tree": "4aa275fbdbec9c7b9b4629e8bee2bbecd3c6a6af", "parents": [ "ae19ffbadc1b2100285a5b5b3d0a4e0a11390904", "94e0fb086fc5663c38bbc0fe86d698be8314f82f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 24 21:22:33 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Sep 24 21:22:33 2009 +0100" }, "message": "Merge branch \u0027origin\u0027 into for-linus\n\nConflicts:\n\tMAINTAINERS\n" }, { "commit": "56f8ba83a52b9f9e3711eff8e54168ac14aa288f", "tree": "e030f7f3a191384268d86863ca43237a137e8f51", "parents": [ "a6a01063de6298c60f2506dc7659403e02b4b224" ], "author": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Thu Sep 24 09:34:49 2009 -0600" }, "committer": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Thu Sep 24 09:34:49 2009 +0930" }, "message": "cpumask: use mm_cpumask() wrapper: arm\n\nMakes code futureproof against the impending change to mm-\u003ecpu_vm_mask.\n\nIt\u0027s also a chance to use the new cpumask_ ops which take a pointer\n(the older ones are deprecated, but there\u0027s no hurry for arch code).\n\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\n" }, { "commit": "ae19ffbadc1b2100285a5b5b3d0a4e0a11390904", "tree": "3c2086ab67398a019089a47ca3f362a4bc6db74f", "parents": [ "34e84f39a27d059a3e6ec6e8b94aafa702e6f220", "9173a8ef24a6b1b8031507b35b8ffe5f85a87692" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 22 20:54:53 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 22 21:01:40 2009 +0100" }, "message": "Merge branch \u0027master\u0027 into for-linus\n" }, { "commit": "cc013a88906bad9d2832d6316de1c7dbc1c2a794", "tree": "c47d1bc76cf9bbf94c328ca6e15ac99ddbab7603", "parents": [ "73d7c33e81aed92ac185950a20407c1a2ea65a83" ], "author": { "name": "Geert Uytterhoeven", "email": "Geert.Uytterhoeven@sonycom.com", "time": "Mon Sep 21 17:02:36 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Sep 22 07:17:34 2009 -0700" }, "message": "arches: drop superfluous casts in nr_free_pages() callers\n\nCommit 96177299416dbccb73b54e6b344260154a445375 (\"Drop free_pages()\")\nmodified nr_free_pages() to return \u0027unsigned long\u0027 instead of \u0027unsigned\nint\u0027. This made the casts to \u0027unsigned long\u0027 in most callers superfluous,\nso remove them.\n\n[akpm@linux-foundation.org: coding-style fixes]\nSigned-off-by: Geert Uytterhoeven \u003cGeert.Uytterhoeven@sonycom.com\u003e\nReviewed-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nAcked-by: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Chris Zankel \u003czankel@tensilica.com\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "df297bf6c7933e7b021cdc1bf3f9e319ea3a7e9c", "tree": "9ef6353c4100c83176c4e7b5ef3933dc342f91df", "parents": [ "d374bf14a5ff18133bd6a6cc00f189949f7ba8fb" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 13:18:47 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 16:53:40 2009 +0100" }, "message": "ARM: Add support for checking access permissions on prefetch aborts\n\nARMv6 introduces non-executable mappings, which can cause prefetch aborts\nwhen an attempt is made to execute from such a mapping. Currently, this\ncauses us to loop in the page fault handler since we don\u0027t correctly\ncheck for proper permissions.\n\nFix this by checking that VMAs have VM_EXEC set for prefetch aborts.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d374bf14a5ff18133bd6a6cc00f189949f7ba8fb", "tree": "d04f40327d5575f5f848695a97099527475a2634", "parents": [ "bf4569922b97824f33e5d08d0bbe4b34fe43e4cd" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:53:01 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 16:53:40 2009 +0100" }, "message": "ARM: Separate out access error checking\n\nSince we get notified separately about prefetch aborts, which may be\npermission faults, we need to check for appropriate access permissions\nwhen handling a fault. This patch prepares us for doing this by\nseparating out the access error checking.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bf4569922b97824f33e5d08d0bbe4b34fe43e4cd", "tree": "09d3bc1252c44c70a9f4090486daa1329189da0c", "parents": [ "b42c6344b091db680fd1ec7a0483e8b6796f802b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:52:19 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:55:50 2009 +0100" }, "message": "ARM: Ensure correct might_sleep() check in pagefault path\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b42c6344b091db680fd1ec7a0483e8b6796f802b", "tree": "37b25ae64b025dfbf041630e4d4b26b63b0a217f", "parents": [ "c88d6aa71bd2ad7b4da2f281bd64ada65d533d83" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:47:40 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:55:49 2009 +0100" }, "message": "ARM: Update page fault handling for new OOM techniques\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c88d6aa71bd2ad7b4da2f281bd64ada65d533d83", "tree": "dbc0f5ad6f48abddde2072300b0e4617d7d46cd4", "parents": [ "4275c13ca8859af8a1390856c82173bcdfc32938" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:41:58 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 20 12:55:49 2009 +0100" }, "message": "ARM: Provide definitions and helpers for decoding the FSR register\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "40d743b8c16a8cf6e30c1d941aa6147f9550ea75", "tree": "9fcdf9a06b18a275253048d1ea7c9803cec38845", "parents": [ "7da18afa423f167e7ef3c9728e584d8bf05bd55a", "83e686ea0291ee93b87dcdc00b96443b80de56c9" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 19 13:47:57 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 19 13:47:57 2009 +0100" }, "message": "Merge branch \u0027for-rmk\u0027 of git://linux-arm.org/linux-2.6\n" }, { "commit": "bc581770cfdd8c17ea17d324dc05e2f9c599e7ca", "tree": "c6d2c2eb82d8a6c6851de0ecc7d8c0e63e026266", "parents": [ "18240904960a39e582ced8ba8ececb10b8c22dd3" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Sep 15 17:30:37 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 15 22:11:05 2009 +0100" }, "message": "ARM: 5580/2: ARM TCM (Tightly-Coupled Memory) support v3\n\nThis adds the TCM interface to Linux, when active, it will\ndetect and report TCM memories and sizes early in boot if\npresent, introduce generic TCM memory handling, provide a\ngeneric TCM memory pool and select TCM memory for the U300\nplatform.\n\nSee the Documentation/arm/tcm.txt for documentation.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "910a17e57ab6cd22b300bde4ce5f633f175c7ccd", "tree": "2a1dea95ca2d50192216500d90d9b0358af1dc1d", "parents": [ "59fcf48fdebe65e4774d2c7ec76b7845d281749a" ], "author": { "name": "Kirill A. Shutemov", "email": "kirill@shutemov.name", "time": "Tue Sep 15 10:23:53 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Sep 15 22:06:38 2009 +0100" }, "message": "ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size\n\nCurrently kernel believes that all ARM CPUs have L1_CACHE_SHIFT \u003d\u003d 5.\nIt\u0027s not true at least for CPUs based on Cortex-A8.\n\nList of CPUs with cache line size !\u003d 32 should be expanded later.\n\nSigned-off-by: Kirill A. Shutemov \u003ckirill@shutemov.name\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2f82af08fcc7dc01a7e98a49a5995a77e32a2925", "tree": "d505fe5936881b137b82b59360646a6988e506ba", "parents": [ "f199fd990639f93d07d8e104b0a66aabaf01d67d" ], "author": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Mon Sep 14 03:25:28 2009 -0400" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Sep 15 09:37:12 2009 -0700" }, "message": "Nicolas Pitre has a new email address\n\nDue to problems at cam.org, my nico@cam.org email address is no longer\nvalid. FRom now on, nico@fluxnic.net should be used instead.\n\nSigned-off-by: Nicolas Pitre \u003cnico@fluxnic.net\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "87d721ad7a37b7650dd710c88dd5c6a5bf9fe996", "tree": "869d633803eb7c429624d3bd16a6117816849763", "parents": [ "ddd559b13f6d2fe3ad68c4b3f5235fd3c2eae4e3", "b7cfda9fc3d7aa60cffab5367f2a72a4a70060cd" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 12 12:04:37 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 12 12:04:37 2009 +0100" }, "message": "Merge branch \u0027master\u0027 into devel\n" }, { "commit": "ddd559b13f6d2fe3ad68c4b3f5235fd3c2eae4e3", "tree": "d827bca3fc825a0ac33efbcd493713be40fcc812", "parents": [ "cf7a2b4fb6a9b86779930a0a123b0df41aa9208f", "f17a1f06d2fa93f4825be572622eb02c4894db4e" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 12 12:02:26 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 12 12:02:26 2009 +0100" }, "message": "Merge branch \u0027devel-stable\u0027 into devel\n\nConflicts:\n\tMAINTAINERS\n\tarch/arm/mm/fault.c\n" }, { "commit": "701038144945ef98c5817f43079952fa38c35999", "tree": "88782f6ac8e4df1f7f8f738659adedd7108e8cae", "parents": [ "4abf27add86e5b7c37dca1fb4dd9a740b4332a84", "c2b455474e4c6bc8bab6506e2a08dbd5ad50d74d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Sep 12 11:50:52 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 12 11:50:52 2009 +0100" }, "message": "Merge branch \u0027nomadik\u0027 into devel-stable\n" }, { "commit": "b7cfda9fc3d7aa60cffab5367f2a72a4a70060cd", "tree": "a52c6cdbbc7973a4904ec499a607732832e4ca38", "parents": [ "5eb38f44839ec1aade167b125d86d265c886c195" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Sep 07 15:06:42 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Sep 12 11:48:09 2009 +0100" }, "message": "ARM: Fix pfn_valid() for sparse memory\n\nOn OMAP platforms, some people want to declare to segment up the memory\nbetween the kernel and a separate application such that there is a hole\nin the middle of the memory as far as Linux is concerned. However,\nthey want to be able to mmap() the hole.\n\nThis currently causes problems, because update_mmu_cache() thinks that\nthere are valid struct pages for the \"hole\". Fix this by making\npfn_valid() slightly more expensive, by checking whether the PFN is\ncontained within the meminfo array.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-by: Khasim Syed Mohammed \u003ckhasim@ti.com\u003e\n" }, { "commit": "7929eb9cf643ae416e5081b2a6fa558d37b9854c", "tree": "c4cbaa5ccdd1c929eba802374d80191b6f90e16c", "parents": [ "c47a830c08a26a7c210ae16a0ffe3f56ba86ea69" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Thu Sep 03 21:45:59 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Sep 04 19:20:07 2009 +0100" }, "message": "ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() with highmem\n\nLet\u0027s suppose a highmem page is kmap\u0027d with kmap(). A pkmap entry is\nused, the page mapped to it, and the virtual cache is dirtied. Then\nkunmap() is used which does virtually nothing except for decrementing a\nusage count.\n\nThen, let\u0027s suppose the _same_ page gets mapped using kmap_atomic().\nIt is therefore mapped onto a fixmap entry instead, which has a\ndifferent virtual address unaware of the dirty cache data for that page\nsitting in the pkmap mapping.\n\nFortunately it is easy to know if a pkmap mapping still exists for that\npage and use it directly with kmap_atomic(), thanks to kmap_high_get().\n\nAnd actual testing with a printk in the added code path shows that this\ncondition is actually met *extremely* frequently. Seems that we\u0027ve been\nquite lucky that things have worked so well with highmem so far.\n\nCc: stable@kernel.org\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "13f96d8f4c5a3f6a6b5e578d08869d79d690e0b2", "tree": "fe33eb0bce77b41d9e7a491b1241db6a70a93df2", "parents": [ "37d0892c5a94e208cf863e3b7bac014edee4346d" ], "author": { "name": "Nicolas Pitre", "email": "nico@cam.org", "time": "Tue Sep 01 22:01:27 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Sep 02 11:33:24 2009 +0100" }, "message": "ARM: 5687/1: fix an oops with highmem\n\nIn xdr_partial_copy_from_skb() there is that sequence:\n\n\t\tkaddr \u003d kmap_atomic(*ppage, KM_SKB_SUNRPC_DATA);\n\t\t[...]\n\t\tflush_dcache_page(*ppage);\n\t\tkunmap_atomic(kaddr, KM_SKB_SUNRPC_DATA);\n\nMixing flush_dcache_page() and kmap_atomic() is a bit odd,\nespecially since kunmap_atomic() must deal with cache issues\nalready. OTOH the non-highmem case must use flush_dcache_page()\nas kunmap_atomic() becomes a no op with no cache maintenance.\n\nProblem is that with highmem the implementation of kmap_atomic()\ndoesn\u0027t set page-\u003evirtual, and page_address(page) returns 0 in\nthat case. Here flush_dcache_page() calls __flush_dcache_page()\nwhich calls __cpuc_flush_dcache_page(page_address(page)) resulting\nin a kernel oops.\n\nNone of the kmap_atomic() implementations uses set_page_address().\nHence we can assume page_address() is always expected to return 0 in\nthat case. Let\u0027s conditionally call __cpuc_flush_dcache_page() only\nwhen the page address is non zero, and perform that test only when\nhighmem is configured.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "65cec8e3db606608fd1f8dfc4a1c7c37bfba9173", "tree": "b1e0ecd6380afa2286fffada08cddbd388640343", "parents": [ "369842658a36bcea28ecb643ba4bdb53919330dd" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Mon Aug 17 20:02:06 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Aug 17 20:02:06 2009 +0100" }, "message": "ARM: implement highpte\n\nAdd the ARM implementation of highpte, which allows PTE tables to be\nplaced in highmem. Unfortunately, we do not offer highpte support\nwhen support for L2 cache is enabled.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "dde5828f56cb2c1aa70365c476e6830482127258", "tree": "c5765e13e62d9356a0059d08dba7334202707948", "parents": [ "3b3119fc549c93df60316d28bdd77c2de3986588" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 15 12:36:00 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 15 12:36:00 2009 +0100" }, "message": "ARM: Fix broken highmem support\n\nCurrently, highmem is selectable, and you can request an increased\nvmalloc area. However, none of this has any effect on the memory\nlayout since a patch in the highmem series was accidentally dropped.\nMoreover, even if you did want highmem, all memory would still be\nregistered as lowmem, possibly resulting in overflow of the available\nvirtual mapping space.\n\nThe highmem boundary is determined by the highest allowed beginning\nof the vmalloc area, which depends on its configurable minimum size\n(see commit 60296c71f6c5063e3c1f1d2619ca0b60940162e7 for details on\nthis).\n\nWe should create mappings and initialize bootmem only for low memory,\nwhile the zone allocator must still be told about highmem.\n\nCurrently, memory nodes which are completely located in high memory\nare not supported. This is not a huge limitation since systems\nrelying on highmem support are unlikely to have discontiguous memory\nwith large holes.\n\n[ A similar patch was meant to be merged before commit 5f0fbf9ecaf3\n and be available in Linux v2.6.30, however some git rebase screw-up\n of mine dropped the first commit of the series, and that goofage\n escaped testing somehow as well. -- Nico ]\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nReviewed-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "412bb0a6224f96661c042a109c4978649c00ed52", "tree": "21cff4cf9f97c4cdbd293704ead2a422e4245c37", "parents": [ "bdaaaec39792ee0035d6c5a5ad2520991e090a3c" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:37:09 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:37:09 2009 +0100" }, "message": "Include linux/sched.h in arch/arm/mm/fault.c\n\nWhen building with !MMU, task_struct is not defined. Just include the\nrelevant file.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "bdaaaec39792ee0035d6c5a5ad2520991e090a3c", "tree": "8e7b5f10c1d7c7e85c6f62304f18c16948681dea", "parents": [ "8bdca0ac2b1ec35091941c57b4202f7096291c5b" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:06 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:06 2009 +0100" }, "message": "nommu: Do not set PRRR and NMRR in proc-v7.S if !MMU\n\nARMv7-R profile CPUs do not have these registers.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "8b79d5f217d7fc7d6b85ee5b10899f2bd20b64ed", "tree": "0419d82bb5c582425e94b45fdb4baec20c5ab8e4", "parents": [ "b32f3afe3c5c4ddd1c414d41845470a99c88475f" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:04 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:04 2009 +0100" }, "message": "nommu: Add #ifdef CONFIG_MMU around the PTE sanity checks\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "b32f3afe3c5c4ddd1c414d41845470a99c88475f", "tree": "bbf8cac97feba4c1f82e15f9a24d7119fd8131d8", "parents": [ "ab6494f0c96f8953c7ad3e35301b2de2db3add57" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:03 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:03 2009 +0100" }, "message": "nommu: Include asm/setup.h in arch/arm/mm/nommu.c\n\nThis is needed for the struct meminfo definition.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "ab6494f0c96f8953c7ad3e35301b2de2db3add57", "tree": "08ffb48cb7ce1ec66dc5deeddf7cf4b890882410", "parents": [ "2732f4b6f11689fa08e2db5689fc652d608936b5" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:02 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:35:02 2009 +0100" }, "message": "nommu: Add noMMU support to the DMA API\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "09529f7a1a010cc364267fc5895a71c3853eb82c", "tree": "67c02ab7314c48766812065a199c2277f7fe6688", "parents": [ "16c79651a5ee1ad7e4fca65a7c5309dfca89ed28" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:34:55 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:34:55 2009 +0100" }, "message": "nommu: Fix the fault processing for the MMU-less case\n\nThe patch adds the necessary ifdefs around functions that only make\nsense when the MMU is enabled.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n" }, { "commit": "347c8b70b1d5256e445e54e736f88d21877616cf", "tree": "513ae480cdb8eb46ec68aab77ab78c5d8b3a205b", "parents": [ "b86040a59feb255a8193173caa4d5199464433d5" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:32:56 2009 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Fri Jul 24 12:32:56 2009 +0100" }, "message": "Thumb-2: Implement the unified arch/arm/mm support\n\nThis patch adds the ARM/Thumb-2 unified support to the arch/arm/mm/*\nfiles.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" } ], "next": "f7a55fa6ecef8be6d15bd79a803e44a3187ce9d6" }