)]}'
{
  "log": [
    {
      "commit": "29c4dfd92edc26c2cd2c0c64c9201d5b91d6418e",
      "tree": "64b2884bb49a86f2895d9206b79bf9f64e384615",
      "parents": [
        "adba09f01577ea441a761a85aacb1e43b58d35c4"
      ],
      "author": {
        "name": "Chris Zankel",
        "email": "chris@zankel.net",
        "time": "Thu May 31 17:49:32 2007 -0700"
      },
      "committer": {
        "name": "Chris Zankel",
        "email": "chris@zankel.net",
        "time": "Thu May 31 17:49:32 2007 -0700"
      },
      "message": "[XTENSA] Remove non-rt signal handling\n\nThe non-rt signal handling was never really used, so we don\u0027t break\nanything. This patch also cleans up the signal stack-frame to make\nit independent from the processor configuration. It also improves\nthe method used for controlling single-stepping. We now save and\nrestore the \u0027icountlevel\u0027 register that controls single stepping\nand set or clear the saved state to enable or disable it.\n\nSigned-off-by: Chris Zankel \u003cchris@zankel.net\u003e\n"
    },
    {
      "commit": "9a8fd5589902153a134111ed7a40f9cca1f83254",
      "tree": "6f7a06de25bdf0b2d94623794c2cbbc66b5a77f6",
      "parents": [
        "3f65ce4d141e435e54c20ed2379d983d362a2cb5"
      ],
      "author": {
        "name": "Chris Zankel",
        "email": "czankel@tensilica.com",
        "time": "Thu Jun 23 22:01:26 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Fri Jun 24 00:05:22 2005 -0700"
      },
      "message": "[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6\n\nThe attached patches provides part 6 of an architecture implementation for the\nTensilica Xtensa CPU series.\n\nSigned-off-by: Chris Zankel \u003cchris@zankel.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    }
  ]
}