)]}' { "log": [ { "commit": "a0feb6db0fe03326d7d2c7a4615ce3289615c023", "tree": "5252086b8224c588148af6a48618030aa6e4827a", "parents": [ "3f31ae121348afd9ed39700ea2a63c17cd7eeed1" ], "author": { "name": "Lorenzo Pieralisi", "email": "Lorenzo.Pieralisi@arm.com", "time": "Tue Mar 06 17:37:45 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Mar 07 09:40:50 2012 +0000" }, "message": "ARM: 7358/1: perf: add PMU hotplug notifier\n\nWhen a CPU is taken out of reset, either cold booted or hotplugged in,\nsome of its PMU registers can contain UNKNOWN values.\n\nThis patch adds a hotplug notifier to ARM core perf code so that upon\nCPU restart the PMU unit is reset and becomes ready to use again.\n\nSigned-off-by: Lorenzo Pieralisi \u003clorenzo.pieralisi@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3f31ae121348afd9ed39700ea2a63c17cd7eeed1", "tree": "ac7b0386088adf865df514a4bef062bd7d072426", "parents": [ "f6f5a30c834135c9f2fa10400c59ebbdd9188567" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Mar 06 17:35:55 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Mar 07 09:40:49 2012 +0000" }, "message": "ARM: 7357/1: perf: fix overflow handling for xscale2 PMUs\n\nxscale2 PMUs indicate overflow not via the PMU control register, but by\na separate overflow FLAG register instead.\n\nThis patch fixes the xscale2 PMU code to use this register to detect\nto overflow and ensures that we clear any pending overflow when\ndisabling a counter.\n\nCc: \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f6f5a30c834135c9f2fa10400c59ebbdd9188567", "tree": "208358216772eedab5998070878db55df5d4e772", "parents": [ "99c1745b9c76910e195889044f914b4898b7c9a5" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Mar 06 17:34:50 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Mar 07 09:40:49 2012 +0000" }, "message": "ARM: 7356/1: perf: check that we have an event in the PMU IRQ handlers\n\nThe PMU IRQ handlers in perf assume that if a counter has overflowed\nthen perf must be responsible. In the paranoid world of crazy hardware,\nthis could be false, so check that we do have a valid event before\nattempting to dereference NULL in the interrupt path.\n\nCc: \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Ming Lei \u003ctom.leiming@gmail.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "99c1745b9c76910e195889044f914b4898b7c9a5", "tree": "f94661a5e2e6b663000c6f4fdf3a2311f2554f7d", "parents": [ "5727347180ebc6b4a866fcbe00dcb39cc03acb37" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Mar 06 17:34:22 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Mar 07 09:40:49 2012 +0000" }, "message": "ARM: 7355/1: perf: clear overflow flag when disabling counter on ARMv7 PMU\n\nWhen disabling a counter on an ARMv7 PMU, we should also clear the\noverflow flag in case an overflow occurred whilst stopping the counter.\nThis prevents a spurious overflow being picked up later and leading to\neither false accounting or a NULL dereference.\n\nCc: \u003cstable@vger.kernel.org\u003e\nReported-by: Ming Lei \u003ctom.leiming@gmail.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5727347180ebc6b4a866fcbe00dcb39cc03acb37", "tree": "ed27e4b37407917d2f9813a4684cceb64f0d6f93", "parents": [ "81caaf2503be8fbb738ea4f124063dcc24958397" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Mar 06 17:33:17 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Mar 07 09:40:48 2012 +0000" }, "message": "ARM: 7354/1: perf: limit sample_period to half max_period in non-sampling mode\n\nOn ARM, the PMU does not stop counting after an overflow and therefore\nIRQ latency affects the new counter value read by the kernel. This is\nsignificant for non-sampling runs where it is possible for the new value\nto overtake the previous one, causing the delta to be out by up to\nmax_period events.\n\nCommit a737823d (\"ARM: 6835/1: perf: ensure overflows aren\u0027t missed due\nto IRQ latency\") attempted to fix this problem by allowing interrupt\nhandlers to pass an overflow flag to the event update function, causing\nthe overflow calculation to assume that the counter passed through zero\nwhen going from prev to new. Unfortunately, this doesn\u0027t work when\noverflow occurs on the perf_task_tick path because we have the flag\ncleared and end up computing a large negative delta.\n\nThis patch removes the overflow flag from armpmu_event_update and\ninstead limits the sample_period to half of the max_period for\nnon-sampling profiling runs.\n\nCc: \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Ming Lei \u003cming.lei@canonical.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "81caaf2503be8fbb738ea4f124063dcc24958397", "tree": "9e14cfa2b1e5108de9236a320d430ef553cec94b", "parents": [ "43a6955fa8c3ac2e7c31959e8b77a1166dbd13f3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Mar 05 23:29:51 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Mar 05 23:29:51 2012 +0000" }, "message": "ARM: ecard: ensure fake vma vm_flags is setup\n\nOur TLB ops want to check the vma vm_flags to find out whether the\nmapping is executable. However, we leave this uninitialized in\necard.c. Initialize it with an appropriate value.\n\nReported-by: Al Viro \u003cviro@ftp.linux.org.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5180bb392a8aab5233e6db858ac1d8371533e20f", "tree": "8ce5c857bdca8abfefcaadc05843e3c0dbea87ec", "parents": [ "3ddd4d0c629f3d013aa1ab24bb0546dfe342ff94" ], "author": { "name": "Eric Paris", "email": "eparis@redhat.com", "time": "Tue Feb 21 11:26:55 2012 -0500" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Feb 21 16:50:14 2012 +0000" }, "message": "ARM/audit: include audit header and fix audit arch\n\nBoth bugs being fixed were introduced in:\n29ef73b7a823b77a7cd0bdd7d7cded3fb6c2587b\n\nInclude linux/audit.h to fix below build errors:\n\n CC arch/arm/kernel/ptrace.o\narch/arm/kernel/ptrace.c: In function \u0027syscall_trace\u0027:\narch/arm/kernel/ptrace.c:919: error: implicit declaration of function \u0027audit_syscall_exit\u0027\narch/arm/kernel/ptrace.c:921: error: implicit declaration of function \u0027audit_syscall_entry\u0027\narch/arm/kernel/ptrace.c:921: error: \u0027AUDIT_ARCH_ARMEB\u0027 undeclared (first use in this function)\narch/arm/kernel/ptrace.c:921: error: (Each undeclared identifier is reported only once\narch/arm/kernel/ptrace.c:921: error: for each function it appears in.)\nmake[1]: *** [arch/arm/kernel/ptrace.o] Error 1\nmake: *** [arch/arm/kernel] Error 2\n\nThis part of the patch is:\nReported-by: Axel Lin \u003caxel.lin@gmail.com\u003e\nReported-by: Peter Ujfalusi \u003cpeter.ujfalusi@ti.com\u003e\n(They both provided patches to fix it)\n\nThis patch also (at the request of the list) fixes the fact that\nARM has both LE and BE versions however the audit code was called as if\nit was always BE. If audit userspace were to try to interpret the bits\nit got from a LE system it would obviously do so incorrectly. Fix this\nby using the right arch flag on the right system.\n\nThis part of the patch is:\nReported-by: Russell King - ARM Linux \u003clinux@arm.linux.org.uk\u003e\n\nSigned-off-by: Eric Paris \u003ceparis@redhat.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "910ba598c818243cf3de2f97e03c49948bbb0511", "tree": "b8508a68eafcda631c2ce624b418e46c69a00282", "parents": [ "fee6a3c33a8f137f39cd9997b0476411f73576c7" ], "author": { "name": "Santosh Shilimkar", "email": "santosh.shilimkar@ti.com", "time": "Tue Feb 21 10:24:22 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Feb 21 09:26:46 2012 +0000" }, "message": "ARM: 7336/1: smp_twd: Don\u0027t register CPUFREQ notifiers if local timers are not initialised\n\nCurrent ARM local timer code registers CPUFREQ notifiers even in case\nthe twd_timer_setup() isn\u0027t called. That seems to be wrong and\nwould eventually lead to kernel crash on the CPU frequency transitions\non the SOCs where the local timer doesn\u0027t exist or broken because of\nhardware BUG. Fix it by testing twd_evt and *__this_cpu_ptr(twd_evt).\n\nThe issue was observed with v3.3-rc3 and building an OMAP2+ kernel\non OMAP3 SOC which doesn\u0027t have TWD.\n\nBelow is the dump for reference :\n\n Unable to handle kernel paging request at virtual address 007e900\n pgd \u003d cdc20000\n [007e9000] *pgd\u003d00000000\n Internal error: Oops: 5 [#1] SMP\n Modules linked in:\n CPU: 0 Not tainted (3.3.0-rc3-pm+debug+initramfs #9)\n PC is at twd_update_frequency+0x34/0x48\n LR is at twd_update_frequency+0x10/0x48\n pc : [\u003cc001382c\u003e] lr : [\u003cc0013808\u003e] psr: 60000093\n sp : ce311dd8 ip : 00000000 fp : 00000000\n r10: 00000000 r9 : 00000001 r8 : ce310000\n r7 : c0440458 r6 : c00137f8 r5 : 00000000 r4 : c0947a74\n r3 : 00000000 r2 : 007e9000 r1 : 00000000 r0 : 00000000\n Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment usr\n Control: 10c5387d Table: 8dc20019 DAC: 00000015\n Process sh (pid: 599, stack limit \u003d 0xce3102f8)\n Stack: (0xce311dd8 to 0xce312000)\n 1dc0: 6000c\n 1de0: 00000001 00000002 00000000 00000000 00000000 00000000 00000\n 1e00: ffffffff c093d8f0 00000000 ce311ebc 00000001 00000001 ce310\n 1e20: c001386c c0437c4c c0e95b60 c0e95ba8 00000001 c0e95bf8 ffff4\n 1e40: 00000000 00000000 c005ef74 ce310000 c0435cf0 ce311ebc 00000\n 1e60: ce352b40 0007a120 c08d5108 c08ba040 c08ba040 c005f030 00000\n 1e80: c08bc554 c032fe2c 0007a120 c08d4b64 ce352b40 c08d8618 ffff8\n 1ea0: c08ba040 c033364c ce311ecc c0433b50 00000002 ffffffea c0330\n 1ec0: 0007a120 0007a120 22222201 00000000 22222222 00000000 ce357\n 1ee0: ce3d6000 cdc2aed8 ce352ba0 c0470164 00000002 c032f47c 00034\n 1f00: c0331cac ce352b40 00000007 c032f6d0 ce352bbc 0003d090 c0930\n 1f20: c093d8bc c03306a4 00000007 ce311f80 00000007 cdc2aec0 ce358\n 1f40: ce8d20c0 00000007 b6fe5000 ce311f80 00000007 ce310000 0000c\n 1f60: c000de74 ce987400 ce8d20c0 b6fe5000 00000000 00000000 0000c\n 1f80: 00000000 00000000 001fbac8 00000000 00000007 001fbac8 00004\n 1fa0: c000df04 c000dd60 00000007 001fbac8 00000001 b6fe5000 00000\n 1fc0: 00000007 001fbac8 00000007 00000004 b6fe5000 00000000 00202\n 1fe0: 00000000 beb565f8 00101ffc 00008e8c 60000010 00000001 00000\n [\u003cc001382c\u003e] (twd_update_frequency+0x34/0x48) from [\u003cc008ac4c\u003e] )\n [\u003cc008ac4c\u003e] (smp_call_function_single+0x17c/0x1c8) from [\u003cc0013)\n [\u003cc0013890\u003e] (twd_cpufreq_transition+0x24/0x30) from [\u003cc0437c4c\u003e)\n [\u003cc0437c4c\u003e] (notifier_call_chain+0x44/0x84) from [\u003cc005efe4\u003e] ()\n [\u003cc005efe4\u003e] (__srcu_notifier_call_chain+0x70/0xa4) from [\u003cc005f)\n [\u003cc005f030\u003e] (srcu_notifier_call_chain+0x18/0x20) from [\u003cc032fe2)\n [\u003cc032fe2c\u003e] (cpufreq_notify_transition+0xc8/0x1b0) from [\u003cc0333)\n [\u003cc033364c\u003e] (omap_target+0x1b4/0x28c) from [\u003cc032f47c\u003e] (__cpuf)\n [\u003cc032f47c\u003e] (__cpufreq_driver_target+0x50/0x64) from [\u003cc0331d24)\n [\u003cc0331d24\u003e] (cpufreq_set+0x78/0x98) from [\u003cc032f6d0\u003e] (store_sc)\n [\u003cc032f6d0\u003e] (store_scaling_setspeed+0x5c/0x74) from [\u003cc03306a4\u003e)\n [\u003cc03306a4\u003e] (store+0x58/0x74) from [\u003cc014d868\u003e] (sysfs_write_fi)\n [\u003cc014d868\u003e] (sysfs_write_file+0x80/0xb4) from [\u003cc00f2c2c\u003e] (vfs)\n [\u003cc00f2c2c\u003e] (vfs_write+0xa8/0x138) from [\u003cc00f2e9c\u003e] (sys_write)\n [\u003cc00f2e9c\u003e] (sys_write+0x40/0x6c) from [\u003cc000dd60\u003e] (ret_fast_s)\n Code: e594300c e792210c e1a01000 e5840004 (e7930002)\n ---[ end trace 5da3b5167c1ecdda ]---\n\nReported-by: Kevin Hilman \u003ckhilman@ti.com\u003e\nAcked-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nTested-by: Kevin Hilman \u003ckhilman@ti.com\u003e\nSigned-off-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bdf800c4fceb6d8dbe65471d214eb44a61f5bfc9", "tree": "8ab19a3fe66c67f20174ecf8732e9c09607b46f1", "parents": [ "b46c0f74657d1fe1c1b0c1452631cc38a9e6987f" ], "author": { "name": "Stephen Boyd", "email": "sboyd@codeaurora.org", "time": "Tue Feb 07 19:42:33 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 09 16:25:37 2012 +0000" }, "message": "ARM: 7322/1: Print BUG instead of undefined instruction on BUG_ON()\n\nThe ARM kernel uses undefined instructions to implement\nBUG/BUG_ON(). This leads to problems where people don\u0027t read one\nline above the Oops message and see the \"kernel BUG at ...\"\nmessage and so they wrongly assume the kernel has hit an\nundefined instruction.\n\nInstead of printing:\n\n Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP\n\nprint\n\n Internal error: Oops - BUG: 0 [#1] PREEMPT SMP\n\nThis should prevent people from thinking the BUG_ON was an\nundefined instruction when it was actually intentional.\n\nSigned-off-by: Stephen Boyd \u003csboyd@codeaurora.org\u003e\nAcked-by: Simon Glass \u003csjg@chromium.org\u003e\nTested-by: Simon Glass \u003csjg@chromium.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b8b9987ffdc2ab9c5e2c1edad556b23ccb38249b", "tree": "2a09d6c72facf9288d173bd71b4fcca71ba689c6", "parents": [ "d65b4e98d7ea3038b767b70fe8be959b2913f16d" ], "author": { "name": "Marc Zyngier", "email": "Marc.Zyngier@arm.com", "time": "Tue Feb 07 02:46:38 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 09 16:25:37 2012 +0000" }, "message": "ARM: 7320/1: Fix proc_info table alignment\n\nWith an admittedly exotic choice of configuration options\n(CC_OPTIMIZE_FOR_SIZE, THUMB2, some other size-minimizing ones)\nand compiler, the proc_info table can end up being misaligned,\nand the kernel being unbootable (Error: unrecognized/unsupported\nprocessor variant).\n\nForcing the alignement to 4 bytes in the linker script fixes the\nissue.\n\nSigned-off-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5a97d0ae5b5d78727b87965cba84194a9f1e06ce", "tree": "db73153f836278d74882999ca2252bdc11a2a24d", "parents": [ "6d3ec1ae6cdcda185bd9452b2daed5145e2493a5" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Feb 03 11:08:05 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Feb 03 15:58:46 2012 +0000" }, "message": "ARM: 7314/1: kuser: consistently use usr_ret for returning from helpers\n\n__kuser_cmpxchg64 has a return path using bx lr to get back to the caller.\nThis is actually ok since the code in question is predicated on\nCONFIG_CPU_32v6K, but for the sake of consistency using the usr_ret\nmacro is probably better.\n\nAcked-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "91756acb58b17aee68d055fc15b1e2550ff00801", "tree": "6f81b4a5071441c876957a7afdff6a39a87a3a44", "parents": [ "8130b9d7b9d858aa04ce67805e8951e3cb6e9b2f" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Jan 25 19:36:28 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 02 17:37:42 2012 +0000" }, "message": "ARM: 7303/1: perf: add empty NODE event definitions for Cortex-A5 and Cortex-A15\n\nCommit 89d6c0b5 (\"perf, arch: Add generic NODE cache events\") added\nempty NODE event definitions for the ARM PMU implementations. This was\nmerged along with Cortex-A5 and Cortex-A15 PMU support, so they missed\nout on the original patch.\n\nThis patch adds the empty definitions to Cortex-A5 and Cortex-A15.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8130b9d7b9d858aa04ce67805e8951e3cb6e9b2f", "tree": "0b66f2eb287b5412ef7c3d8034a64d9182fb7999", "parents": [ "247f4993a5974e6759606c4d380748eecfd273ff" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Jan 30 20:23:29 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 02 17:37:42 2012 +0000" }, "message": "ARM: 7308/1: vfp: flush thread hwstate before copying ptrace registers\n\nIf we are context switched whilst copying into a thread\u0027s\nvfp_hard_struct then the partial copy may be corrupted by the VFP\ncontext switching code (see \"ARM: vfp: flush thread hwstate before\nrestoring context from sigframe\").\n\nThis patch updates the ptrace VFP set code so that the thread state is\nflushed before the copy, therefore disabling VFP and preventing\ncorruption from occurring.\n\nCc: stable \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "247f4993a5974e6759606c4d380748eecfd273ff", "tree": "79cf9e348c8274154e64d69d4373bec416cf4dee", "parents": [ "2af276dfb1722e97b190bd2e646b079a2aa674db" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Mon Jan 30 20:22:28 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 02 17:37:42 2012 +0000" }, "message": "ARM: 7307/1: vfp: fix ptrace regset modification race\n\nIn a preemptible kernel, vfp_set() can be preempted, causing the\nhardware VFP context to be switched while the thread vfp state is\nbeing read and modified. This leads to a race condition which can\ncause the thread vfp state to become corrupted if lazy VFP context\nsave occurs due to preemption in between the time thread-\u003evfpstate\nis read and the time the modified state is written back.\n\nThis may occur if preemption occurs during the execution of a\nptrace() call which modifies the VFP register state of a thread.\nSuch instances should be very rare in most realistic scenarios --\nnone has been reported, so far as I am aware. Only uniprocessor\nsystems should be affected, since VFP context save is not currently\nlazy in SMP kernels.\n\nThe problem was introduced by my earlier patch migrating to use\nregsets to implement ptrace.\n\nThis patch does a vfp_sync_hwstate() before reading\nthread-\u003evfpstate, to make sure that the thread\u0027s VFP state is not\nlive in the hardware registers while the registers are modified.\n\nThanks to Will Deacon for spotting this.\n\nCc: stable \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2af276dfb1722e97b190bd2e646b079a2aa674db", "tree": "8fee4bc70d769d2d6bea25c627ff63716c3d0b20", "parents": [ "97f1040982d7935716e9a45a26ccd5cc8fe92f8c" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Jan 30 20:21:42 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 02 17:37:41 2012 +0000" }, "message": "ARM: 7306/1: vfp: flush thread hwstate before restoring context from sigframe\n\nFollowing execution of a signal handler, we currently restore the VFP\ncontext from the ucontext in the signal frame. This involves copying\nfrom the user stack into the current thread\u0027s vfp_hard_struct and then\nflushing the new data out to the hardware registers.\n\nThis is problematic when using a preemptible kernel because we could be\ncontext switched whilst updating the vfp_hard_struct. If the current\nthread has made use of VFP since the last context switch, the VFP\nnotifier will copy from the hardware registers into the vfp_hard_struct,\noverwriting any data that had been partially copied by the signal code.\n\nDisabling preemption across copy_from_user calls is a terrible idea, so\ninstead we move the VFP thread flush *before* we update the\nvfp_hard_struct. Since the flushing is performed lazily, this has the\neffect of disabling VFP and clearing the CPU\u0027s VFP state pointer,\ntherefore preventing the thread from being updated with stale data on\nthe next context switch.\n\nCc: stable \u003cstable@vger.kernel.org\u003e\nTested-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d68133b5a81bd9c4b673c2a731ac1a33a9dc0cb8", "tree": "4cd5cee5bb4023fdc1f92c9fbdf733167f0a0b5a", "parents": [ "34ae6c96a6a7db4ed8ec0524bf7fa1086b9ab2ba" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Tue Jan 24 16:52:52 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 25 09:24:37 2012 +0000" }, "message": "ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2\n\nThe dynamic ftrace ops startup test currently fails on Thumb-2 kernels:\n\n Testing tracer function: PASSED\n Testing dynamic ftrace: PASSED\n Testing dynamic ftrace ops #1: (0 0 0 0 0) FAILED!\n\nThis is because while the addresses in the mcount records do not have\nthe zero bit set, the IP reported by the mcount call does have it set\n(because it is copied from the LR). This mismatch causes the ops\nfiltering in ftrace_ops_list_func() to not call the relevant tracers.\n\nFix this by clearing the zero bit before adjusting the LR for the mcount\ninstruction size. Also, combine the mov+sub into a single sub\ninstruction.\n\nAcked-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c214455f3205fa20819da6d67a8b20609ff786e7", "tree": "cd3a1f9557007ff899ecdd17d1a1f0cc3fd88483", "parents": [ "612539e81f655f6ac73c7af1da8701c1ee618aee" ], "author": { "name": "Marc Zyngier", "email": "Marc.Zyngier@arm.com", "time": "Fri Jan 20 12:24:47 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:07 2012 +0000" }, "message": "ARM: 7297/1: smp_twd: make sure timer is stopped before registering it\n\nOn secondary CPUs, the Timer Control Register is not reset\nto a sane value before the timer is registered, and the TRM\ndoesn\u0027t seem to indicate any reset value either. In some cases,\nthe kernel will take an interrupt too early, depending on what\njunk was present in the registers at reset time.\n\nThe fix is to set the Timer Control Register to 0 before\nregistering the clock_event_device and enabling the interrupt.\n\nProblem seen on VE (Cortex A5) and Tegra.\n\nSigned-off-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "eb50439b92b6298bf209a982f295ba9c0f7cb30b", "tree": "8678f4221e4a40907d9781753a8b95c96bbfded6", "parents": [ "a092f2b15399bb4d1aa4e83cffe775f0c946f323" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Jan 20 12:01:12 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:05 2012 +0000" }, "message": "ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP\n\nIt turns out that the logical CPU mapping is useful even when !CONFIG_SMP\nfor manipulation of devices like interrupt and power controllers when\nrunning a UP kernel on a CPU other than 0. This can happen when kexecing\na UP image from an SMP kernel.\n\nIn the future, multi-cluster systems running AMP configurations will\nrequire something similar for mapping cluster IDs, so it makes sense to\ndecouple this logic in preparation for this support.\n\nAcked-by: Yang Bai \u003chamo.by@gmail.com\u003e\nAcked-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nReported-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "972da06470519b6eaef9776a586e2353f089de9c", "tree": "346f0f57424c9e2e01b1fa00113557082028ef1b", "parents": [ "f0d5375e3c7b5d7f128af03c5271c328faeb3ae7" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Jan 20 12:01:09 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:04 2012 +0000" }, "message": "ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundary\n\nThe exception fixup table is currently aligned to a 32-byte boundary.\nWhilst this won\u0027t cause any problems, the exception_table_entry\nstructures contain only a pair of unsigned longs, so 4-byte alignment\nis all that is required. If the table was walked from start to end,\ncacheline alignment may bring some performance benefits, but since a\nbinary search is used, the access pattern is random and will not benefit\nfrom a stricter alignment.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f0d5375e3c7b5d7f128af03c5271c328faeb3ae7", "tree": "6d1a621761d37727a7c88415824fb9736d3f19d5", "parents": [ "06e9905152cd124c53f571296e9904ea89c1a39a" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Jan 20 11:55:54 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:04 2012 +0000" }, "message": "ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes\n\nThe linker script assumes a cacheline size of 32 bytes when aligning\nthe .data..cacheline_aligned and .data..percpu sections.\n\nThis patch updates the script to use L1_CACHE_BYTES, which should be set\nto 64 on platforms that require it.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "06e9905152cd124c53f571296e9904ea89c1a39a", "tree": "1b3bfedcb3df9b1ad4ff725e8c304f4848e62b3f", "parents": [ "a36d8e5bc27316163c9d753af5966ee92ecbec59" ], "author": { "name": "Fabio Estevam", "email": "festevam@gmail.com", "time": "Fri Jan 13 17:06:59 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 17:26:31 2012 +0000" }, "message": "ARM: 7277/1: setup.c: Fix build warning by removing unneeded header file\n\nFix the following build warning:\n\n CC arch/arm/kernel/setup.o\nIn file included from arch/arm/kernel/setup.c:39:\narch/arm/include/asm/elf.h:102:1: warning: \"vmcore_elf64_check_arch\" redefined\nIn file included from arch/arm/kernel/setup.c:24:\ninclude/linux/crash_dump.h:30:1: warning: this is the location of the previous definition\n\nSince commit 93a72052 (crash_dump: export is_kdump_kernel to modules, consolidate elfcorehdr_addr, setup_elfcorehdr and saved_max_pfn)\nthe inclusion of \u003clinux/crash_dump.h\u003e is no longer needed.\n\nRemove the inclusion of \u003clinux/crash_dump.h\u003e and the build warning is fixed.\n\nSigned-off-by: Fabio Estevam \u003cfabio.estevam@freescale.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a36d8e5bc27316163c9d753af5966ee92ecbec59", "tree": "78bd9ae58dd411e502cb32e8e0c8291a9f10ea73", "parents": [ "7deabca0acfe02b8e18f59a4c95676012f49a304" ], "author": { "name": "Kees Cook", "email": "keescook@chromium.org", "time": "Wed Jan 18 01:57:21 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 17:26:31 2012 +0000" }, "message": "ARM: 7279/1: standardize /proc/iomem \"Kernel code\" name\n\nAll other ports use \"Kernel code\" to identify the Kernel text segment\nin /proc/iomem. Change the ARM resources to do the same.\n\nSigned-off-by: Kees Cook \u003ckeescook@chromium.org\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7deabca0acfe02b8e18f59a4c95676012f49a304", "tree": "56d9d696cb26de9696cfe591cab9b80d54608cef", "parents": [ "94ae0275d7d6cae84b3af11f9e3d88f529528ac7" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 15:20:58 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 17:26:30 2012 +0000" }, "message": "ARM: fix rcu stalls on SMP platforms\n\nWe can stall RCU processing on SMP platforms if a CPU sits in its idle\nloop for a long time. This happens because we don\u0027t call irq_enter()\nand irq_exit() around generic_smp_call_function_interrupt() and\nfriends. Add the necessary calls, and remove the one from within\nipi_timer(), so that they\u0027re all in a common place.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f429ee3b808118591d1f3cdf3c0d0793911a5677", "tree": "96d848f5f677d96758ecd2aee5eb6931b75bf218", "parents": [ "22b4eb5e3174efb49791c62823d0cccc35394c36", "c158a35c8a681cf68d36f22f058f9f5466386c71" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 17 16:06:51 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 17 16:41:31 2012 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit: (29 commits)\n audit: no leading space in audit_log_d_path prefix\n audit: treat s_id as an untrusted string\n audit: fix signedness bug in audit_log_execve_info()\n audit: comparison on interprocess fields\n audit: implement all object interfield comparisons\n audit: allow interfield comparison between gid and ogid\n audit: complex interfield comparison helper\n audit: allow interfield comparison in audit rules\n Kernel: Audit Support For The ARM Platform\n audit: do not call audit_getname on error\n audit: only allow tasks to set their loginuid if it is -1\n audit: remove task argument to audit_set_loginuid\n audit: allow audit matching on inode gid\n audit: allow matching on obj_uid\n audit: remove audit_finish_fork as it can\u0027t be called\n audit: reject entry,always rules\n audit: inline audit_free to simplify the look of generic code\n audit: drop audit_set_macxattr as it doesn\u0027t do anything\n audit: inline checks for not needing to collect aux records\n audit: drop some potentially inadvisable likely notations\n ...\n\nUse evil merge to fix up grammar mistakes in Kconfig file.\n\nBad speling and horrible grammar (and copious swearing) is to be\nexpected, but let\u0027s keep it to commit messages and comments, rather than\nexpose it to users in config help texts or printouts.\n" }, { "commit": "29ef73b7a823b77a7cd0bdd7d7cded3fb6c2587b", "tree": "4edfccf0b4d2b24c8e6069113eb69bb8c7a9b037", "parents": [ "4043cde8ecf7f7d880eb1133c201a3d392fd68c3" ], "author": { "name": "Nathaniel Husted", "email": "nhusted@gmail.com", "time": "Tue Jan 03 14:23:09 2012 -0500" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Tue Jan 17 16:17:01 2012 -0500" }, "message": "Kernel: Audit Support For The ARM Platform\n\nThis patch provides functionality to audit system call events on the\nARM platform. The implementation was based off the structure of the\nMIPS platform and information in this\n(http://lists.fedoraproject.org/pipermail/arm/2009-October/000382.html)\nmailing list thread. The required audit_syscall_exit and\naudit_syscall_entry checks were added to ptrace using the standard\nregisters for system call values (r0 through r3). A thread information\nflag was added for auditing (TIF_SYSCALL_AUDIT) and a meta-flag was\nadded (_TIF_SYSCALL_WORK) to simplify modifications to the syscall\nentry/exit. Now, if either the TRACE flag is set or the AUDIT flag is\nset, the syscall_trace function will be executed. The prober changes\nwere made to Kconfig to allow CONFIG_AUDITSYSCALL to be enabled.\n\nDue to platform availability limitations, this patch was only tested\non the Android platform running the modified \"android-goldfish-2.6.29\"\nkernel. A test compile was performed using Code Sourcery\u0027s\ncross-compilation toolset and the current linux-3.0 stable kernel. The\nchanges compile without error. I\u0027m hoping, due to the simple modifications,\nthe patch is \"obviously correct\".\n\nSigned-off-by: Nathaniel Husted \u003cnhusted@gmail.com\u003e\nSigned-off-by: Eric Paris \u003ceparis@redhat.com\u003e\n" }, { "commit": "4de3a8e101150feaefa1139611a50ff37467f33e", "tree": "daada742542518b02d7db7c5d32e715eaa5f166d", "parents": [ "294064f58953f9964e5945424b09c51800330a83", "099469502f62fbe0d7e4f0b83a2f22538367f734" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 13 15:00:22 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 13 15:00:22 2012 +0000" }, "message": "Merge branch \u0027master\u0027 into fixes\n" }, { "commit": "294064f58953f9964e5945424b09c51800330a83", "tree": "b0593f1aaa41a96e23140934c1e54cc97020e9a2", "parents": [ "e37051dc7f35de5ce3f64c40852365ff24f2436c" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Jan 09 12:24:47 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 13 08:56:41 2012 +0000" }, "message": "ARM: 7275/1: LPAE: Check the CPU support for the long descriptor format\n\nThis patch adds a check for the presence of the LPAE feature during the\nCPU initialisation. If not present, it reports an error when\nCONFIG_DEBUG_LL is enabled.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7b67e751479d50b7f84d1a3cc5216eed5e534b66", "tree": "a1a6746857cf65f04dde739fe271bf4143d55eaf", "parents": [ "9f13a1fd452f11c18004ba2422a6384b424ec8a9", "76ccc297018d25d55b789bbd508861ef1e2cdb0c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jan 11 18:50:26 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jan 11 18:50:26 2012 -0800" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)\n x86/PCI: Expand the x86_msi_ops to have a restore MSIs.\n PCI: Increase resource array mask bit size in pcim_iomap_regions()\n PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES\n PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)\n PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB\n x86/PCI: amd: factor out MMCONFIG discovery\n PCI: Enable ATS at the device state restore\n PCI: msi: fix imbalanced refcount of msi irq sysfs objects\n PCI: kconfig: English typo in pci/pcie/Kconfig\n PCI/PM/Runtime: make PCI traces quieter\n PCI: remove pci_create_bus()\n xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources\n x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()\n x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()\n x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan\n sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources\n sparc/PCI: convert to pci_create_root_bus()\n sh/PCI: convert to pci_scan_root_bus() for correct root bus resources\n powerpc/PCI: convert to pci_create_root_bus()\n powerpc/PCI: split PHB part out of pcibios_map_io_space()\n ...\n\nFix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due\nto the same patches being applied in other branches.\n" }, { "commit": "7affca3537d74365128e477b40c529d6f2fe86c8", "tree": "20be92bd240029182fc89c2c4f25401b7715dcae", "parents": [ "356b95424cfb456e14a59eaa579422ce014c424b", "ff4b8a57f0aaa2882d444ca44b2b9b333d22a4df" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 07 12:03:30 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 07 12:03:30 2012 -0800" }, "message": "Merge branch \u0027driver-core-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core\n\n* \u0027driver-core-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (73 commits)\n arm: fix up some samsung merge sysdev conversion problems\n firmware: Fix an oops on reading fw_priv-\u003efw in sysfs loading file\n Drivers:hv: Fix a bug in vmbus_driver_unregister()\n driver core: remove __must_check from device_create_file\n debugfs: add missing #ifdef HAS_IOMEM\n arm: time.h: remove device.h #include\n driver-core: remove sysdev.h usage.\n clockevents: remove sysdev.h\n arm: convert sysdev_class to a regular subsystem\n arm: leds: convert sysdev_class to a regular subsystem\n kobject: remove kset_find_obj_hinted()\n m86k: gpio - convert sysdev_class to a regular subsystem\n mips: txx9_sram - convert sysdev_class to a regular subsystem\n mips: 7segled - convert sysdev_class to a regular subsystem\n sh: dma - convert sysdev_class to a regular subsystem\n sh: intc - convert sysdev_class to a regular subsystem\n power: suspend - convert sysdev_class to a regular subsystem\n power: qe_ic - convert sysdev_class to a regular subsystem\n power: cmm - convert sysdev_class to a regular subsystem\n s390: time - convert sysdev_class to a regular subsystem\n ...\n\nFix up conflicts with \u0027struct sysdev\u0027 removal from various platform\ndrivers that got changed:\n - arch/arm/mach-exynos/cpu.c\n - arch/arm/mach-exynos/irq-eint.c\n - arch/arm/mach-s3c64xx/common.c\n - arch/arm/mach-s3c64xx/cpu.c\n - arch/arm/mach-s5p64x0/cpu.c\n - arch/arm/mach-s5pv210/common.c\n - arch/arm/plat-samsung/include/plat/cpu.h\n - arch/powerpc/kernel/sysfs.c\nand fix up cpu_is_hotpluggable() as per Greg in include/linux/cpu.h\n" }, { "commit": "770e1b035dcb6ec3f8ee69dda0815dd1e220a683", "tree": "e6d36abfdb053fbc722aea8d7e946d6d1b93c7e1", "parents": [ "d3d0b024348c040f0d6851e2e59fc961677d5169", "7b9dd47136c07ffd883aff6926c7b281e4c1eea4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 18:15:25 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 18:15:25 2012 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm\n\n* \u0027for-linus\u0027 of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (207 commits)\n ARM: 7267/1: Remove BUILD_BUG_ON from asm/bug.h\n ARM: 7269/1: mach-sa1100: fix sched_clock breakage\n ARM: 7198/1: arm/imx6: add restart support for imx6q\n ARM: restart: remove the now empty arch_reset()\n ARM: restart: remove comments about adding code to arch_reset()\n ARM: restart: lpc32xx \u0026 u300: remove unnecessary printk\n ARM: restart: plat-samsung: remove plat/reset.h and s5p_reset_hook\n ARM: restart: w90x900: use new restart hook\n ARM: restart: Versatile Express: use new restart hook\n ARM: restart: versatile: use new restart hook\n ARM: restart: u300: use new restart hook\n ARM: restart: tegra: use new restart hook\n ARM: restart: spear: use new restart hook\n ARM: restart: shark: use new restart hook\n ARM: restart: sa1100: use new restart hook\n ARM: 7252/1: restart: S5PV210: use new restart hook\n ARM: 7251/1: restart: S5PC100: use new restart hook\n ARM: 7250/1: restart: S5P64X0: use new restart hook\n ARM: 7266/1: restart: S3C64XX: use new restart hook\n ARM: 7265/1: restart: S3C24XX: use new restart hook\n ...\n\nFix up trivial conflict in arch/arm/mm/init.c due to removal of\nmemblock_init() clashing with the movement of the sorting of the meminfo\narray.\n" }, { "commit": "37d15909ff6bf6e97e1d4447efa7f1a19e7a508e", "tree": "03d1be5fc753995295a6812e4bed485be73d2512", "parents": [ "a2f33da11ab9efba25d41e959de6338a9078fb36" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Fri Oct 28 16:26:16 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:56 2012 -0800" }, "message": "arm/PCI: convert to pci_scan_root_bus() for correct root bus resources\n\nConvert from pci_scan_bus() to pci_scan_root_bus() and remove root bus\nresource fixups. This fixes the problem of \"early\" and \"header\" quirks\nseeing incorrect root bus resources.\n\nCC: Russell King \u003clinux@arm.linux.org.uk\u003e\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "168c8619fd825d80d1753bf298d0b6aa8d739623", "tree": "4a222d7f6f4841365217b689ea3c20cea3f1e2f7", "parents": [ "cfce9fb808d7d25f6ea18a804eb71b08c7d777c1" ], "author": { "name": "Myron Stowe", "email": "mstowe@redhat.com", "time": "Fri Oct 28 15:47:42 2011 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jan 06 12:10:36 2012 -0800" }, "message": "PCI: ARM: convert pcibios_set_master() to a non-inlined function\n\nThis patch converts ARM\u0027s architecture-specific inlined\n\u0027pcibios_set_master()\u0027 routine to a non-inlined function. This will\nallow follow on patches to create a generic \u0027pcibios_set_master()\u0027\nfunction using the \u0027__weak\u0027 attribute which can be used by all\narchitectures as a default which, if necessary, can then be over-\nridden by architecture-specific code.\n\nConverting \u0027pci_bios_set_master()\u0027 to a non-inlined function will allow\nARM\u0027s \u0027pcibios_set_master()\u0027 implementation to remain architecture-\nspecific after the generic version is introduced and thus, not change\ncurrent behavior.\n\nNote that ARM also has a non-inlined \u0027pcibios_set_master()\u0027 that is\nused if CONFIG_PCI_HOST_ITE8152 is defined. This patch does not\nchange any behavior here either.\n\nNo functional change.\n\nSigned-off-by: Myron Stowe \u003cmyron.stowe@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ff4b8a57f0aaa2882d444ca44b2b9b333d22a4df", "tree": "d851c923f85566572112d4c0f884cff388a3cc05", "parents": [ "805a6af8dba5dfdd35ec35dc52ec0122400b2610", "ea04018e6bc5ddb2f0466c0e5b986bd4901b7e8e" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Jan 06 11:42:52 2012 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Jan 06 11:42:52 2012 -0800" }, "message": "Merge branch \u0027driver-core-next\u0027 into Linux 3.2\n\nThis resolves the conflict in the arch/arm/mach-s3c64xx/s3c6400.c file,\nand it fixes the build error in the arch/x86/kernel/microcode_core.c\nfile, that the merge did not catch.\n\nThe microcode_core.c patch was provided by Stephen Rothwell\n\u003csfr@canb.auug.org.au\u003e who was invaluable in the merge issues involved\nwith the large sysdev removal process in the driver-core tree.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "423d091dfe58d3109d84c408810a7cfa82f6f184", "tree": "43c4385d1dc7219582f924d42db1f3e203a577bd", "parents": [ "1483b3823542c9721eddf09a077af1e02ac96b50", "919b83452b2e7c1dbced0456015508b4b9585db3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 08:02:40 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 08:02:40 2012 -0800" }, "message": "Merge branch \u0027core-rcu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027core-rcu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (64 commits)\n cpu: Export cpu_up()\n rcu: Apply ACCESS_ONCE() to rcu_boost() return value\n Revert \"rcu: Permit rt_mutex_unlock() with irqs disabled\"\n docs: Additional LWN links to RCU API\n rcu: Augment rcu_batch_end tracing for idle and callback state\n rcu: Add rcutorture tests for srcu_read_lock_raw()\n rcu: Make rcutorture test for hotpluggability before offlining CPUs\n driver-core/cpu: Expose hotpluggability to the rest of the kernel\n rcu: Remove redundant rcu_cpu_stall_suppress declaration\n rcu: Adaptive dyntick-idle preparation\n rcu: Keep invoking callbacks if CPU otherwise idle\n rcu: Irq nesting is always 0 on rcu_enter_idle_common\n rcu: Don\u0027t check irq nesting from rcu idle entry/exit\n rcu: Permit dyntick-idle with callbacks pending\n rcu: Document same-context read-side constraints\n rcu: Identify dyntick-idle CPUs on first force_quiescent_state() pass\n rcu: Remove dynticks false positives and RCU failures\n rcu: Reduce latency of rcu_prepare_for_idle()\n rcu: Eliminate RCU_FAST_NO_HZ grace-period hang\n rcu: Avoid needlessly IPIing CPUs at GP end\n ...\n" }, { "commit": "7b9dd47136c07ffd883aff6926c7b281e4c1eea4", "tree": "b835312e76fe323de3e1cbbb0d15fca5a3f7ef9c", "parents": [ "2e0e943436912ffe0848ece58167edfe754edb96", "0575fb754dbfc32a01f297e778533340a533ec68" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:25:15 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:25:27 2012 +0000" }, "message": "Merge branch \u0027restart\u0027 into for-linus\n\nConflicts:\n\tarch/arm/mach-exynos/cpu.c\n\nThe changes to arch/arm/mach-exynos/cpu.c were moved to\nmach-exynos/common.c.\n" }, { "commit": "2e0e943436912ffe0848ece58167edfe754edb96", "tree": "b91919095c74742fa06e2105db6d859bee39b2b4", "parents": [ "a32737e1ca650504f172292dd344eb64c02311f3", "ef3a0bf5bfadbace156fa2a3b9c753df2de41df2" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:33 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:33 2012 +0000" }, "message": "Merge branch \u0027devel-stable\u0027 into for-linus\n\nConflicts:\n\tarch/arm/kernel/setup.c\n\tarch/arm/mach-shmobile/board-kota2.c\n" }, { "commit": "a32737e1ca650504f172292dd344eb64c02311f3", "tree": "7dd2004ece26081507af877d9dd40b1bd4eecc1a", "parents": [ "27edacac7d97d37ec77779c7da08345298a5d283", "a3c2b511a844641f6d0b60bd84cd6076143b3f2d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:16 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:16 2012 +0000" }, "message": "Merge branches \u0027fixes\u0027 and \u0027misc\u0027 into for-linus\n" }, { "commit": "f88b8979d26615ce68772cebc85c3b556571afca", "tree": "9af99a981ffc5b94faefcf05a4dba15a8554ca82", "parents": [ "5e3aa527c390377cdeea444f14ef5a28a0aab618" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Nov 05 21:30:00 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 12:57:22 2012 +0000" }, "message": "ARM: restart: remove the now empty arch_reset()\n\nRemove the now empty arch_reset() from all the mach/system.h includes,\nand remove its callsite. Remove arm_machine_restart() as this function\nno longer does anything useful.\n\nFor samsung platforms, remove the include of mach/system-reset.h and\nplat/system-reset.h from their respective mach/system.h headers as these\njust define their arch_reset functions. As a result, the s3c2410 and\nplat-samsung system-reset.h files are no longer referenced, so remove\nthese files entirely.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4045407fd7740642b18bc802e8bab064e79a61e5", "tree": "9412a38886bfad562bc5897c6e4c23bb88703204", "parents": [ "59136ef3c596606d3eef920dc3e0fdfa2ce52c6f", "4c5f830c4c9d4f19c1eef356c0cd322b46d695c9" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 12:56:44 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 12:56:44 2012 +0000" }, "message": "Merge branch \u0027restart-cleanup\u0027 into restart\n\nConflicts:\n\tarch/arm/kernel/setup.c\n" }, { "commit": "4fd7f9b128107034fa925b6877fae3c275f0da86", "tree": "ca8b092093913a637917d22afda214afaff52060", "parents": [ "5def51b0f827931bb559e6195060d774894fc9f9" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Dec 13 12:48:18 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 23 22:54:50 2011 +0000" }, "message": "ARM: 7212/1: smp_twd: reconfigure clockevents after cpufreq change\n\nThis break-out from Colin Cross\u0027 cpufreq-aware TWD patch\nwill handle the case when our localtimer\u0027s clock changes with\nthe cpu clock. A cpufreq transtion notifier will be registered\nonly if the platform has supplied a specified clock to the TWD.\n\nAfter a cpufreq transition, update the clockevent\u0027s frequency\nby fetching the new clock rate from the clock framework and\nreprogram the next clock event.\n\nThe necessary changes in the clockevents framework was done by\nThomas Gleixner in kernel v3.0.\n\nChangeLog v1-\u003ev2:\n- Replace IS_ERR_OR_NULL() with IS_ERR() in twd_clk check.\n- Update code to use the already existing per-cpu array of TWD\n clockevents instead of adding cruft.\n\n[Broke out, ifdef:ed CPUfreq stuff for non-cpufreq configs]\n[Rebased to newer TWD base with per-CPU clock array]\n\nSigned-off-by: Colin Cross \u003cccross@android.com\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nAcked-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5def51b0f827931bb559e6195060d774894fc9f9", "tree": "5be35f870a5e18f0a27eb9b35a61ea2b8b171574", "parents": [ "54d15b1d7ac550ecd8ab6b04309c2def614f8c80" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Dec 13 12:47:31 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 23 22:54:50 2011 +0000" }, "message": "ARM: 7211/1: smp_twd: get the rate from a clock\n\nThis break-out from Colin Cross\u0027 cpufreq-aware TWD patch will\noptionally retrieve the clock rate of the TWD from an external\nclock. A variant of this patch has been proposed by Rob Herring\nas well.\n\nThe basic idea is to avoid recalibrating the rate of the clock\nat boot if the platform already know what rate the clock to the\nTWD block has.\n\nChangeLog v1-\u003ev2: added clk_[prepare|unprepare] calls.\n\n[Broke out of larger SMP TWD patch]\n\nSigned-off-by: Colin Cross \u003cccross@android.com\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nAcked-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "54d15b1d7ac550ecd8ab6b04309c2def614f8c80", "tree": "845c2c307a94ffae18db9292591340a8a338c917", "parents": [ "c41584ddc1b9c7d06726057456d188d4eefec60b" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Dec 13 12:46:43 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 23 22:54:50 2011 +0000" }, "message": "ARM: 7210/1: smp_twd: modernize clock event registration\n\nThis break-out from Colin Cross\u0027 cpufreq-aware TWD patch will\njust modernize the clock event registration code to use\nclockevents_config_and_register().\n\n[Broke out of larger SMP TWD patch]\n\nSigned-off-by: Colin Cross \u003cccross@android.com\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nAcked-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8f1e938db9230d9f828420adea96f691c722e473", "tree": "e1d860df714cf9d40e5a4aabd09e364eba2250c0", "parents": [ "b3e8d7b2478401b2f25f4566a90faad54f7d6d07" ], "author": { "name": "Kay Sievers", "email": "kay.sievers@vrfy.org", "time": "Wed Dec 21 15:52:57 2011 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Dec 21 15:52:57 2011 -0800" }, "message": "arm: leds: convert sysdev_class to a regular subsystem\n\nAfter all sysdev classes are ported to regular driver core entities, the\nsysdev implementation will be entirely removed from the kernel.\n\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "45aa0663cc408617b79a2b53f0a5f50e94688a48", "tree": "0a53931c317c3c72a3555bd2fbb70a881ee870f2", "parents": [ "511585a28e5b5fd1cac61e601e42efc4c5dd64b5", "7bd0b0f0da3b1ec11cbcc798eb0ef747a1184077" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 20 12:14:26 2011 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 20 12:14:26 2011 +0100" }, "message": "Merge branch \u0027memblock-kill-early_node_map\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/misc into core/memblock\n" }, { "commit": "2f0778afac79bd8d226225556858a636931eeabc", "tree": "e00cea674f3d6cc8c5584aa5b75239f11f6d229d", "parents": [ "3bdc3484e8f2b1b219ad0397d81ce4601fbaf76d" ], "author": { "name": "Marc Zyngier", "email": "Marc.Zyngier@arm.com", "time": "Thu Dec 15 12:19:23 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 18 23:00:26 2011 +0000" }, "message": "ARM: 7205/2: sched_clock: allow sched_clock to be selected at runtime\n\nsched_clock() is yet another blocker on the road to the single\nimage. This patch implements an idea by Russell King:\n\nhttp://www.spinics.net/lists/linux-omap/msg49561.html\n\nInstead of asking the platform to implement both sched_clock()\nitself and the rollover callback, simply register a read()\nfunction, and let the ARM code care about sched_clock() itself,\nthe conversion to ns and the rollover. sched_clock() uses\nthis read() function as an indirection to the platform code.\nIf the platform doesn\u0027t provide a read(), the code falls back\nto the jiffy counter (just like the default sched_clock).\n\nThis allow some simplifications and possibly some footprint gain\nwhen multiple platforms are compiled in. Among the drawbacks,\nthe removal of the *_fixed_sched_clock optimization which could\nnegatively impact some platforms (sa1100, tegra, versatile\nand omap).\n\nTested on 11MPCore, OMAP4 and Tegra.\n\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: Eric Miao \u003ceric.y.miao@gmail.com\u003e\nCc: Colin Cross \u003cccross@android.com\u003e\nCc: Erik Gilling \u003ckonkers@android.com\u003e\nCc: Olof Johansson \u003colof@lixom.net\u003e\nCc: Sascha Hauer \u003ckernel@pengutronix.de\u003e\nCc: Alessandro Rubini \u003crubini@unipv.it\u003e\nCc: STEricsson \u003cSTEricsson_nomadik_linux@list.st.com\u003e\nCc: Lennert Buytenhek \u003ckernel@wantstofly.org\u003e\nCc: Ben Dooks \u003cben-linux@fluff.org\u003e\nTested-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nTested-by: Tony Lindgren \u003ctony@atomide.com\u003e\nTested-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Krzysztof Halasa \u003ckhc@pm.waw.pl\u003e\nAcked-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\nSigned-off-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ddf5a25c5fdd4cc276edf451871c38002eec0f95", "tree": "6262274a4299ace9b83bc14649049f405c348df0", "parents": [ "42ebfc61cfcb13af3e638db1c497dcbde7abfed8" ], "author": { "name": "Uwe Kleine-König", "email": "u.kleine-koenig@pengutronix.de", "time": "Thu Dec 15 21:47:56 2011 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 15 14:02:19 2011 -0800" }, "message": "ARM: unwinder: fix bisection to find origin in .idx section\n\nThe bisection implemented in unwind_find_origin() stopped to early. If\nthere is only a single entry left to check the original code just took\nthe end point as origin which might be wrong.\n\nThis was introduced in commit de66a979012d (\"ARM: 7187/1: fix unwinding\nfor XIP kernels\").\n\nReported-and-tested-by: Nick Bowler \u003cnbowler@elliptictech.com\u003e\nSigned-off-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "919b83452b2e7c1dbced0456015508b4b9585db3", "tree": "836d0c32b814f7bd5fed83e19b6a2ab77dcf6987", "parents": [ "373da0a2a33018d560afcb2c77f8842985d79594", "a513f6bab0939800dcf1e7c075e733420cf967c5" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Dec 14 08:16:43 2011 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Dec 14 08:16:43 2011 +0100" }, "message": "Merge branch \u0027rcu/next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu into core/rcu\n" }, { "commit": "c41584ddc1b9c7d06726057456d188d4eefec60b", "tree": "8e9d465a7e66124a9cd6847051af45d42dbf67d0", "parents": [ "c245dcd326fb9f8cca4b396796f0d2e54171b5c9" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@arm.com", "time": "Mon Dec 12 19:45:36 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 13 08:52:03 2011 +0000" }, "message": "ARM: 7209/1: Use generic ARM instruction set condition code checks for kprobes.\n\nThis patch changes the kprobes implementation to use the generic ARM\ninstruction set condition code checks, rather than a dedicated\nimplementation.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nAcked-by: Jon Medhurst \u003ctixy@yxit.co.uk\u003e\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c245dcd326fb9f8cca4b396796f0d2e54171b5c9", "tree": "4c7d4f696a6912a64d5acd4f01ca42d453722b86", "parents": [ "e7f626db83689f55089717a6d771c57afe1adc1a" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@arm.com", "time": "Mon Dec 12 19:45:24 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 13 08:52:03 2011 +0000" }, "message": "ARM: 7208/1: Add condition code checking to SWP emulation handler.\n\nThis patch fixes two separate issues with the SWP emulation handler:\n1: Certain processors implementing ARMv7-A can (legally) take an\n undef exception even when the condition code would have meant that\n the instruction should not have been executed.\n2: Opcodes with all flags set (condition code \u003d 0xf) have been reused\n in recent, and not-so-recent, versions of the ARM architecture to\n implement unconditional extensions to the instruction set. The\n existing code would still have processed any undefs triggered by\n executing an opcode with such a value.\n\nThis patch uses the new generic ARM instruction set condition code\nchecks to implement proper handling of these situations.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0c9030deaf59d444f9e757ee73d6d81bfe2d3376", "tree": "000b8008b69352cb46ecbd116ffa2d6bd343d4a4", "parents": [ "9904f7933bd3b6aef880f7a91ddd8b19420ffd11" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@arm.com", "time": "Mon Dec 12 19:31:55 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 13 08:52:02 2011 +0000" }, "message": "ARM: 7206/1: Add generic ARM instruction set condition code checks.\n\nThis patch breaks the ARM condition checking code out of nwfpe/fpopcode.{ch}\ninto a standalone file for opcode operations. It also modifies the code\nsomewhat for coding style adherence, and adds some temporary variables for\nincreased readability.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "90b9222ec632bc8b262981768c7b16f7e67dfe58", "tree": "1c40e0e0ffc12985f30e4631b377eb5bd8061dd7", "parents": [ "958cab0fbe13dc89b6f779d495fed283c0e7de5a" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Mon Dec 12 09:24:40 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 13 08:52:02 2011 +0000" }, "message": "ARM: 7199/2: only look for TCM on ARMv5 and later\n\nThe Integrator AP/CP can have a varying set of core modules, some\n(like ARM920T) are so old that trying to read the TCM status register\nwith CP15 will make them hang. So we need to make sure that we are\nrunning on v5 or later in order to be able to activate this for\nthe Integrator. (The Integrator with CM926EJ-S has 32+32 kb of TCM\nmemory.)\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3bdc3484e8f2b1b219ad0397d81ce4601fbaf76d", "tree": "c4a6acfa097a93ddf7698012375e5fbe7cd86c1d", "parents": [ "02b73e2e9c288cbbb6ec96bef628cf08e29824c4" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Jun 06 12:35:46 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 12 16:07:36 2011 +0000" }, "message": "ARM: kexec: use soft_restart for branching to the reboot buffer\n\nNow that there is a common way to reset the machine, let\u0027s use it\ninstead of reinventing the wheel in the kexec backend.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "02b73e2e9c288cbbb6ec96bef628cf08e29824c4", "tree": "0cf7662397eee9f2f2059c5bef8fedbdacad360a", "parents": [ "290130a17718c1451bb8a77a5e2510e0279bd5f3" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Jun 06 15:49:23 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 12 16:07:35 2011 +0000" }, "message": "ARM: stop: execute platform callback from cpu_stop code\n\nSending IPI_CPU_STOP to a CPU causes it to execute a busy cpu_relax\nloop forever. This makes it impossible to kexec successfully on an SMP\nsystem since the secondary CPUs do not reset.\n\nThis patch adds a callback to platform_cpu_kill, defined when\nCONFIG_HOTPLUG_CPU\u003dy, from the ipi_cpu_stop handling code. This function\ncurrently just returns 1 on all platforms that define it but allows them\nto do something more sophisticated in the future.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "290130a17718c1451bb8a77a5e2510e0279bd5f3", "tree": "c5373065a8809c02092891e1494e1c6fb904ad7f", "parents": [ "2d81f1fe81b753a5744fd2deceafab3e62ba02d5" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Jun 06 12:28:54 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 12 16:07:35 2011 +0000" }, "message": "ARM: reset: implement soft_restart for jumping to a physical address\n\nTools such as kexec and CPU hotplug require a way to reset the processor\nand branch to some code in physical space. This requires various bits of\njiggery pokery with the caches and MMU which, when it goes wrong, tends\nto lock up the system.\n\nThis patch fleshes out the soft_restart implementation so that it\nbranches to the reset code using the identity mapping. This requires us\nto change to a temporary stack, held within the kernel image as a static\narray, to avoid conflicting with the new view of memory.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "9811ccdfa94b4773c8030569bd8ec75eafa485ac", "tree": "8eaa29c0fb09924e0c5c365dc9e28cf9a307d7ac", "parents": [ "6bd054096dce061560cee0e016e292e588dc438f" ], "author": { "name": "Arnaud Patard", "email": "arnaud.patard@rtp-net.org", "time": "Sun Dec 11 20:32:25 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 11 22:42:01 2011 +0000" }, "message": "ARM: 7204/1: arch/arm/kernel/setup.c: initialize arm_dma_zone_size earlier\n\narm_dma_zone_size is used by arm_bootmem_free() which is called by\npaging_init(). Thus it needs to be set before calling it.\n\nSigned-off-by: Arnaud Patard \u003carnaud.patard@rtp-net.org\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nCc: stable@kernel.org\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1268fbc746ea1cd279886a740dcbad4ba5232225", "tree": "dc0ff36b4114992a3f67479e25132f5e99f36b9e", "parents": [ "b58bdccaa8d908e0f71dae396468a0d3f7bb3125" ], "author": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Thu Nov 17 18:48:14 2011 +0100" }, "committer": { "name": "Paul E. McKenney", "email": "paulmck@linux.vnet.ibm.com", "time": "Sun Dec 11 10:31:57 2011 -0800" }, "message": "nohz: Remove tick_nohz_idle_enter_norcu() / tick_nohz_idle_exit_norcu()\n\nThose two APIs were provided to optimize the calls of\ntick_nohz_idle_enter() and rcu_idle_enter() into a single\nirq disabled section. This way no interrupt happening in-between would\nneedlessly process any RCU job.\n\nNow we are talking about an optimization for which benefits\nhave yet to be measured. Let\u0027s start simple and completely decouple\nidle rcu and dyntick idle logics to simplify.\n\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nReviewed-by: Josh Triplett \u003cjosh@joshtriplett.org\u003e\nSigned-off-by: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\n" }, { "commit": "2bbb6817c0ac1b5f2a68d720f364f98eeb1ac4fd", "tree": "05bb5ba54671a8eaeca4fe4406a75e820317e473", "parents": [ "280f06774afedf849f0b34248ed6aff57d0f6908" ], "author": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Sat Oct 08 16:01:00 2011 +0200" }, "committer": { "name": "Paul E. McKenney", "email": "paulmck@linux.vnet.ibm.com", "time": "Sun Dec 11 10:31:36 2011 -0800" }, "message": "nohz: Allow rcu extended quiescent state handling seperately from tick stop\n\nIt is assumed that rcu won\u0027t be used once we switch to tickless\nmode and until we restart the tick. However this is not always\ntrue, as in x86-64 where we dereference the idle notifiers after\nthe tick is stopped.\n\nTo prepare for fixing this, add two new APIs:\ntick_nohz_idle_enter_norcu() and tick_nohz_idle_exit_norcu().\n\nIf no use of RCU is made in the idle loop between\ntick_nohz_enter_idle() and tick_nohz_exit_idle() calls, the arch\nmust instead call the new *_norcu() version such that the arch doesn\u0027t\nneed to call rcu_idle_enter() and rcu_idle_exit().\n\nOtherwise the arch must call tick_nohz_enter_idle() and\ntick_nohz_exit_idle() and also call explicitly:\n\n- rcu_idle_enter() after its last use of RCU before the CPU is put\nto sleep.\n- rcu_idle_exit() before the first use of RCU after the CPU is woken\nup.\n\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Mike Frysinger \u003cvapier@gentoo.org\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nSigned-off-by: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\n" }, { "commit": "280f06774afedf849f0b34248ed6aff57d0f6908", "tree": "62ef683226d0569c0e6c3ba34ab2e6d85b2e047f", "parents": [ "867f236bd12f5091df6dc7cc75f94d7fd982d78a" ], "author": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Fri Oct 07 18:22:06 2011 +0200" }, "committer": { "name": "Paul E. McKenney", "email": "paulmck@linux.vnet.ibm.com", "time": "Sun Dec 11 10:31:35 2011 -0800" }, "message": "nohz: Separate out irq exit and idle loop dyntick logic\n\nThe tick_nohz_stop_sched_tick() function, which tries to delay\nthe next timer tick as long as possible, can be called from two\nplaces:\n\n- From the idle loop to start the dytick idle mode\n- From interrupt exit if we have interrupted the dyntick\nidle mode, so that we reprogram the next tick event in\ncase the irq changed some internal state that requires this\naction.\n\nThere are only few minor differences between both that\nare handled by that function, driven by the ts-\u003einidle\ncpu variable and the inidle parameter. The whole guarantees\nthat we only update the dyntick mode on irq exit if we actually\ninterrupted the dyntick idle mode, and that we enter in RCU extended\nquiescent state from idle loop entry only.\n\nSplit this function into:\n\n- tick_nohz_idle_enter(), which sets ts-\u003einidle to 1, enters\ndynticks idle mode unconditionally if it can, and enters into RCU\nextended quiescent state.\n\n- tick_nohz_irq_exit() which only updates the dynticks idle mode\nwhen ts-\u003einidle is set (ie: if tick_nohz_idle_enter() has been called).\n\nTo maintain symmetry, tick_nohz_restart_sched_tick() has been renamed\ninto tick_nohz_idle_exit().\n\nThis simplifies the code and micro-optimize the irq exit path (no need\nfor local_irq_save there). This also prepares for the split between\ndynticks and rcu extended quiescent state logics. We\u0027ll need this split to\nfurther fix illegal uses of RCU in extended quiescent states in the idle\nloop.\n\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Mike Frysinger \u003cvapier@gentoo.org\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nSigned-off-by: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nReviewed-by: Josh Triplett \u003cjosh@joshtriplett.org\u003e\n" }, { "commit": "1c16d242aa441c11ccaeaa63b49712555b8bfaeb", "tree": "ff8332060f3d800abbabbfe63a942e0ef6d93d33", "parents": [ "d4bbf7e7759afc172e2bfbc5c416324590049cdd" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:06 2011 -0800" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:06 2011 -0800" }, "message": "memblock: Fix include breakages caused by 24aa07882b\n\n24aa07882b (memblock, x86: Replace memblock_x86_reserve/free_range()\nwith generic ones) removed arch/x86/include/asm/memblock.h and dropped\nits inclusion from include/linux/memblock.h which breaks other\narchitectures which depended on the generic memblock.h pulling in the\narch specific one.\n\nHowever, the proper fix isn\u0027t adding back the asm inclusion. memblock\ndoesn\u0027t have any arch dependent part and doesn\u0027t need arch specific\nheader file and asm/memblock.h files are either practically empty or\ncontain mostly unrelated arch specific stuff.\n\n* In microblaze, sh, powerpc, sparc and openrisc, asm/memblock.h is\n either empty or just contains unused MEMBLOCK_DBG() macro. Remove\n them.\n\n* In arm and unicore32, asm/memblock.h contains arch specific stuff.\n Include it directly from its users. It might be a good idea to\n rename the header file to avoid confusion.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nReported-by: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\n" }, { "commit": "6ae25a5b9d7ba86d6ac19c403dfa57dae6caa73d", "tree": "41d04269f268d6162e5f1866496dd42fbc79d2a4", "parents": [ "3ee0fc5ca129cbae81c073756febcb1c552af446", "497b7e943d0dc5743454de56dcdb67352bbf96b2" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 08 18:02:04 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 08 18:02:04 2011 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable\n\nConflicts:\n\tarch/arm/mm/ioremap.c\n" }, { "commit": "f7b8156d150f7383b42622a9219b230b36435b4a", "tree": "c06e0ed558f7a9e106920a9f3acbb6bed15017bf", "parents": [ "c9f27f1026f55b543df260ad8ab84a7bdab7792f" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:31 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:40 2011 +0000" }, "message": "ARM: LPAE: Add fault handling support\n\nThe DFSR and IFSR register format is different when LPAE is enabled. In\naddition, DFSR and IFSR have similar definitions for the fault type.\nThis modifies the fault code to correctly handle the new format.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "1b6ba46b7efa31055eb993a6f2c6bbcb8b35b001", "tree": "b04e3b1fd23ba81a643f64cba113551d127111a0", "parents": [ "da02877987e6e173ebba137d4e1e155e1f1151cd" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:29 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:39 2011 +0000" }, "message": "ARM: LPAE: MMU setup for the 3-level page table format\n\nThis patch adds the MMU initialisation for the LPAE page table format.\nThe swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new\nproc-v7-3level.S file contains the TTB initialisation, context switch\nand PTE setting code with the LPAE. The TTBRx split is based on the\nPAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings\n(supersections) and a few other memory types in mmu.c are conditionally\ncompiled.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "d675d0bc47f28c5414fbbe17fcc801f69c45b960", "tree": "78d7b2c43650d6af96caac9e631409cf15c8f25a", "parents": [ "8d2cd3a38fd663bd341507f5ac29002ffd81d986" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Nov 22 17:30:28 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:38 2011 +0000" }, "message": "ARM: LPAE: add ISBs around MMU enabling code\n\nBefore we enable the MMU, we must ensure that the TTBR registers contain\nsane values. After the MMU has been enabled, we jump to the *virtual*\naddress of the following function, so we also need to ensure that the\nSCTLR write has taken effect.\n\nThis patch adds ISB instructions around the SCTLR write to ensure the\nvisibility of the above.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "3ee0fc5ca129cbae81c073756febcb1c552af446", "tree": "08f061c1ec9e948df760a0746441bec9f290d774", "parents": [ "deee6d5359969a0ce4e2760cfd7b9f379bd5698a", "4e8ee7de227e3ab9a72040b448ad728c5428a042" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 06 20:27:54 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 06 20:27:54 2011 +0000" }, "message": "Merge branch \u0027kexec/idmap\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable\n" }, { "commit": "4e8ee7de227e3ab9a72040b448ad728c5428a042", "tree": "ffaf8492fd359d3281a55ff6e751504e905cc27c", "parents": [ "72662e01088394577be4a3f14da94cf87bea2591" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Nov 23 12:26:25 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Dec 06 14:04:15 2011 +0000" }, "message": "ARM: SMP: use idmap_pgd for mapping MMU enable during secondary booting\n\nThe ARM SMP booting code allocates a temporary set of page tables\ncontaining an identity mapping of the kernel image and provides this\nto secondary CPUs for initial booting.\n\nIn reality, we only need to include the __turn_mmu_on function in the\nidentity mapping since the rest of the kernel is executing from virtual\naddresses after this point.\n\nThis patch adds __turn_mmu_on to the .idmap.text section, allowing the\nSMP booting code to use the idmap_pgd directly and not have to populate\nits own set of page table.\n\nAs a result of this patch, we can make the identity_mapping_add function\nstatic (since it is only used within mm/idmap.c) and also remove the\nidentity_mapping_del function. The identity map population is moved to\nan early initcall so that it is setup in time for secondary CPU bringup.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "72662e01088394577be4a3f14da94cf87bea2591", "tree": "3626efb94b048cefa3f62aa0174c29949626d783", "parents": [ "2c8951ab0c337cb198236df07ad55f9dd4892c26" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Nov 23 12:03:27 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Dec 06 14:04:15 2011 +0000" }, "message": "ARM: head.S: only include __turn_mmu_on in the initial identity mapping\n\n__create_page_tables identity maps the region of memory from\n__enable_mmu to the end of __turn_mmu_on.\n\nIn preparation for including __turn_mmu_on in the .idmap.text section,\nthis patch modifies the identity mapping so that it only includes the\n__turn_mmu_on code.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "e6eadc67873d5f363c864cd7723104e7d47dcb44", "tree": "b6256b48201535207bfd4750efc5ca4a7d431abd", "parents": [ "8903826d0cd99aed9267e792d38284cf3092042b" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Nov 15 11:11:19 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Dec 06 14:04:14 2011 +0000" }, "message": "ARM: suspend: use idmap_pgd instead of suspend_pgd\n\nThe ARM CPU suspend code requires cpu_resume_mmu to be identity mapped\nin order to re-enable the MMU when coming out of suspend. Currently,\nthis is accomplished by maintaining a suspend_pgd with the relevant\nmapping put in place at init time.\n\nThis patch replaces the use of suspend_pgd with the new idmap_pgd.\ncpu_resume_mmu is placed in the .idmap.text section so that it is\nincluded in the identity map.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nTested-by: Lorenzo Pieralisi \u003cLorenzo.Pieralisi@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "8903826d0cd99aed9267e792d38284cf3092042b", "tree": "ec75fed09f62c215e2057d8c5e82c343e627c8fe", "parents": [ "ba8bb18a03f8c7508565c385576a5431a4ad804a" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Sep 30 11:43:29 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Dec 06 14:04:14 2011 +0000" }, "message": "ARM: idmap: populate identity map pgd at init time using .init.text\n\nWhen disabling and re-enabling the MMU, it is necessary to take out an\nidentity mapping for the code that manipulates the SCTLR in order to\navoid it disappearing from under our feet. This is useful when soft\nrebooting and returning from CPU suspend.\n\nThis patch allocates a set of page tables during boot and populates them\nwith an identity mapping for the .idmap.text section. This means that\nusers of the identity map do not need to manage their own pgd and can\ninstead annotate their functions with __idmap or, in the case of assembly\ncode, place them in the correct section.\n\nAcked-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nTested-by: Lorenzo Pieralisi \u003cLorenzo.Pieralisi@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "6bd054096dce061560cee0e016e292e588dc438f", "tree": "f24116c9e5804abc2bd2ce95d09773b7a578ee69", "parents": [ "de66a979012dbc66b1ec0125795a3f79ee667b8a" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 18:16:01 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 06 12:48:01 2011 +0000" }, "message": "ARM: 7185/1: perf: don\u0027t assign platform_device on unsupported CPUs\n\nIn the unlikely case that a platform registers a PMU platform_device\nwhen running on a CPU that is unsupported by perf, we will encounter a\nNULL dereference when trying to assign the platform_device to the\ncpu_pmu structure.\n\nThis patch checks that the CPU is supported by perf before assigning\nthe platform_device.\n\nReported-by: Pawel Moll \u003cpawel.moll@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "de66a979012dbc66b1ec0125795a3f79ee667b8a", "tree": "078ddb11791244de56fb6271a6be11b5ce622907", "parents": [ "974c07249b06d948154be3275bf4f6e55b585300" ], "author": { "name": "Uwe Kleine-König", "email": "u.kleine-koenig@pengutronix.de", "time": "Mon Dec 05 09:39:59 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 06 11:16:13 2011 +0000" }, "message": "ARM: 7187/1: fix unwinding for XIP kernels\n\nThe linker places the unwind tables in readonly sections. So when using\nan XIP kernel these are located in ROM and cannot be modified.\nFor that reason the current approach to convert the relative offsets in\nthe unwind index to absolute addresses early in the boot process doesn\u0027t\nwork with XIP.\n\nThe offsets in the unwind index section are signed 31 bit numbers and\nthe structs are sorted by this offset. So it first has offsets between\n0x40000000 and 0x7fffffff (i.e. the negative offsets) and then offsets\nbetween 0x00000000 and 0x3fffffff. When seperating these two blocks the\nnumbers are sorted even when interpreting the offsets as unsigned longs.\n\nSo determine the first non-negative entry once and track that using the\nnew origin pointer. The actual bisection can then use a plain unsigned\nlong comparison. The only thing that makes the new bisection more\ncomplicated is that the offsets are relative to their position in the\nindex section, so the key to search needs to be adapted accordingly in\neach step.\n\nMoreover several consts are added to catch future writes and rename the\nmember \"addr\" of struct unwind_idx to \"addr_offset\" to better match the\nnew semantic. (This has the additional benefit of breaking eventual\nusers at compile time to make them aware of the change.)\n\nIn my tests the new algorithm was a tad faster than the original and has\nthe additional upside of not needing the initial conversion and so saves\nsome boot time and it\u0027s possible to unwind even earlier.\n\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@fluxnic.net\u003e\nSigned-off-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "232ea344550c4a099d35d9df552509d6748a31c0", "tree": "2b4a1c351d290537fdf18cc5bed78bf43536f175", "parents": [ "40c043b077c6e377c8440d71563c055d0c4f0f0a", "dc440d10e1668b15fe704a23adb9b53fbbb24a44" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Dec 05 16:54:00 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Dec 05 16:54:00 2011 -0800" }, "message": "Merge branch \u0027perf-urgent-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027perf-urgent-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:\n perf: Fix loss of notification with multi-event\n perf, x86: Force IBS LVT offset assignment for family 10h\n perf, x86: Disable PEBS on SandyBridge chips\n trace_events_filter: Use rcu_assign_pointer() when setting ftrace_event_call-\u003efilter\n perf session: Fix crash with invalid CPU list\n perf python: Fix undefined symbol problem\n perf/x86: Enable raw event access to Intel offcore events\n perf: Don\u0027t use -ENOSPC for out of PMU resources\n perf: Do not set task_ctx pointer in cpuctx if there are no events in the context\n perf/x86: Fix PEBS instruction unwind\n oprofile, x86: Fix crash when unloading module (nmi timer mode)\n oprofile: Fix crash when unloading module (hr timer mode)\n" }, { "commit": "73829af71fdb8655e7ba4b5a2a6612ad34a75a11", "tree": "4277605ab142a4f02ff4efad9a7fe522054b7a7f", "parents": [ "742eaa6a6e356a16788ce6530271de89bc4f8fb5", "0af362f8440a78b970d5f215e234420fa87d0f3f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 05 23:27:54 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 05 23:27:59 2011 +0000" }, "message": "Merge branch \u0027vmalloc\u0027 of git://git.linaro.org/people/nico/linux into devel-stable\n" }, { "commit": "742eaa6a6e356a16788ce6530271de89bc4f8fb5", "tree": "12fc040daab06ac796c61c1d92bfad9bb054d1c1", "parents": [ "ba8bb18a03f8c7508565c385576a5431a4ad804a", "ae72fd588a2b302222769b44775912b83f0785eb" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 05 23:20:17 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 05 23:20:17 2011 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable\n\nConflicts:\n\tarch/arm/common/gic.c\n\tarch/arm/plat-omap/include/plat/common.h\n" }, { "commit": "ae72fd588a2b302222769b44775912b83f0785eb", "tree": "63ada914372900e2ba355e2532eee40ee411c5cb", "parents": [ "0445e7a58e794d82c3a76975b1eefd920addbf39", "feb45d06ffd7b59f43f1ed8edf53a0cfe3e7ad2a", "e0516a64e7ea9d9522d98f9f5f47aa38f147779f" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 15:22:18 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 15:22:18 2011 +0000" }, "message": "Merge branches \u0027perf/event-nos\u0027, \u0027perf/updates\u0027 and \u0027perf/omap4\u0027 into for-rmk\n" }, { "commit": "e0516a64e7ea9d9522d98f9f5f47aa38f147779f", "tree": "cb03a94b84dcb764de9db1f6ff0285018a792c0a", "parents": [ "14eec97ff4635977b026a53b27915ab0dec51e94" ], "author": { "name": "Ming Lei", "email": "ming.lei@canonical.com", "time": "Wed Mar 02 15:00:08 2011 +0800" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 15:16:33 2011 +0000" }, "message": "arm: pmu: allow platform specific irq enable/disable handling\n\nThis patch introduces .enable_irq and .disable_irq into\nstruct arm_pmu_platdata, so platform specific irq enablement\ncan be handled after request_irq, and platform specific irq\ndisablement can be handled before free_irq.\n\nThis patch is for support of pmu irq routed from CTI on omap4.\n\nAcked-by: Jean Pihet \u003cj-pihet@ti.com\u003e\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Ming Lei \u003cming.lei@canonical.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "feb45d06ffd7b59f43f1ed8edf53a0cfe3e7ad2a", "tree": "edb7c4425d0cd554b5eb2a4366fb98f424f214f5", "parents": [ "5611cc4572e889b62a7b4c72a413536bf6a9c416" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Nov 14 10:33:05 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 15:16:25 2011 +0000" }, "message": "ARM: perf: remove unused armpmu_get_max_events\n\narmpmu_get_max_events is only called from perf_num_counters, so we can\ninline it there. It existed as a separate entity as a hangover from\nthe original perf-based oprofile implementation.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "0445e7a58e794d82c3a76975b1eefd920addbf39", "tree": "0db845f2e96962dbcf0379ff7ab41878c29bdd84", "parents": [ "4d301512ab368f83f774f414213a5e6cf3641632" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Sep 29 18:23:39 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 15:16:16 2011 +0000" }, "message": "ARM: perf: add support for stalled cycle ABI events\n\nCommit 8f622422 (\"perf events: Add generic front-end and back-end\nstalled cycle event definitions\") added two new ABI events for counting\nstalled cycles.\n\nThis patch adds support for these new events to the ARM perf\nimplementation.\n\nCc: Jamie Iles \u003cjamie@jamieiles.com\u003e\nCc: Jean Pihet \u003cj-pihet@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "4d301512ab368f83f774f414213a5e6cf3641632", "tree": "7fb850540cfe7cae91e8063b97a7c2896f3783ef", "parents": [ "5611cc4572e889b62a7b4c72a413536bf6a9c416" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Sep 29 15:29:02 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Dec 02 15:16:16 2011 +0000" }, "message": "ARM: perf: clean and update ARMv7 event numbers\n\nThis patch updates the ARMv7 perf event numbers so that:\n\n(1) A consistent naming scheme is used between different CPUs.\n\n(2) Only events actually used by Linux are described.\n\n(3) Where possible, architected events are used in preference to\n CPU-specific events.\n\nThis results in the removal of a load of unused, hardcoded data and\nmakes it more clear as to which events are supported on each PMU.\n\nCc: Jean Pihet \u003cj-pihet@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "4cbd6b167f9ed756ced970e0a95538f60ae3b9ab", "tree": "261a7420aa3067b1c980fca2d4378b2d85a9f443", "parents": [ "b5bed7fe801d1460424b7aeb6b06464e23d2a1e6" ], "author": { "name": "Vincent Guittot", "email": "vincent.guittot@linaro.org", "time": "Tue Nov 29 15:50:20 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Nov 30 23:55:21 2011 +0000" }, "message": "ARM: 7182/1: ARM cpu topology: fix warning\n\nkernel/sched.c:7354:2: warning: initialization from incompatible pointer type\n\nAlign cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef\nuse int cpu instead of unsigned int cpu\n\nCc: \u003cstable@vger.kernel.org\u003e\nSigned-off-by: Vincent Guittot \u003cvincent.guittot@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b5bed7fe801d1460424b7aeb6b06464e23d2a1e6", "tree": "d7908f55743de30fa49d5cf01ad2c5aeafebf8eb", "parents": [ "14383c295ab48178c449336f5d74e9e615e36723" ], "author": { "name": "Jon Medhurst (Tixy)", "email": "tixy@yxit.co.uk", "time": "Tue Nov 29 08:16:02 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Nov 30 23:54:54 2011 +0000" }, "message": "ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and below\n\nThe SWP instruction is deprecated on ARMv6 and with ARMv7 it will be\nUNDEFINED when CONFIG_SWP_EMULATE is selected. In this case, probing a\nSWP instruction will cause an oops when the kprobes emulation code\nexecutes an undefined instruction.\n\nAs the SWP instruction should be rare or non-existent in kernels for\nARMv6 and later, we can simply avoid these problems by not allowing\nprobing of these.\n\nReported-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nTested-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Jon Medhurst \u003ctixy@yxit.co.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "14383c295ab48178c449336f5d74e9e615e36723", "tree": "d18981956db104fc75fc4212976e6363a094ecc3", "parents": [ "fe41db7b3aca512e19b8ef4fbd5ad55545005d25" ], "author": { "name": "Jon Medhurst (Tixy)", "email": "tixy@yxit.co.uk", "time": "Tue Nov 29 08:14:35 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Nov 30 23:54:53 2011 +0000" }, "message": "ARM: 7180/1: Change kprobes testcase with unpredictable STRD instruction\n\nThere is a kprobes testcase for the instruction \"strd r2, [r3], r4\".\nThis has unpredictable behaviour as it uses r3 for register writeback\naddressing and also stores it to memory.\n\nOn a cortex A9, this testcase would fail because the instruction writes\nthe updated value of r3 to memory, whereas the kprobes emulation code\nwrites the original value.\n\nFix this by changing testcase to used r5 instead of r3.\n\nReported-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nTested-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Jon Medhurst \u003ctixy@yxit.co.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "46589e2922509f9134ce79fa75180886c9765c58", "tree": "b702b16e613ce805a89dd57184f2f6b3dcc8c87f", "parents": [ "ea2e7057c0234cfb8b09467d8f137760d371fc72" ], "author": { "name": "Jon Medhurst", "email": "jon.medhurst@linaro.org", "time": "Thu Nov 24 13:01:08 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Nov 26 21:58:53 2011 +0000" }, "message": "ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernels\n\nWhen compiling kprobes-test-thumb.c an error like below may occur:\n\n/tmp/ccKcuJcG.s:19179: Error: offset out of range\n\nThis is caused by the compiler underestimating the size of the inline\nassembler instructions containing \".space 0x1000\" and failing to spill\nthe literal pool in time to prevent the generation of PC relative load\ninstruction with invalid offsets.\n\nThe fix implemented by this patch is to replace a single large .space\ndirective by a number of 4 byte .space\u0027s. This requires splitting the\nmacros which generate test cases for branch instructions into two forms:\none with, and one without support for inserting extra code between\nbranch and target.\n\nAcked-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Jon Medhurst \u003cjon.medhurst@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c89cefed35c8c5f53f36757f8a6768e390394ee3", "tree": "7cd7dbaddd405d53ec8c511ec5987a008161a6e2", "parents": [ "41dfaa934c5d866d626de9bea785e6168524a47e" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Tue Nov 22 23:42:12 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Nov 26 21:58:52 2011 +0000" }, "message": "ARM: 7170/2: fix compilation breakage in entry-armv.S\n\nFix compilation failure, when Thumb support is not enabled:\n\narch/arm/kernel/entry-armv.S: Assembler messages:\narch/arm/kernel/entry-armv.S:501: Error: backward ref to unknown label \"2:\"\narch/arm/kernel/entry-armv.S:502: Error: backward ref to unknown label \"3:\"\nmake[2]: *** [arch/arm/kernel/entry-armv.o] Error 1\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nReviewed-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7334c6755eb7dbaa5d3112a33f5f2cb9826abe8c", "tree": "f4937b349b3dae67725d24a3b08c9a973ffc57c4", "parents": [ "53cbcbcf4362ef39e0a692b1d23c395999397fca", "e5a21327644adba32816f74a415114d11c57f2e9" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 22 20:44:19 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 22 20:44:19 2011 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into fixes\n" }, { "commit": "e5a21327644adba32816f74a415114d11c57f2e9", "tree": "81264b2c3ba630e7f5d4f43f9ad99e6268515dad", "parents": [ "bce34d14428d35d9a06ddc10cd46ecef311764c9" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Nov 22 18:01:46 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Nov 22 18:01:46 2011 +0000" }, "message": "ARM: perf: check that we have a platform device when reserving PMU\n\nAttempting to use a hardware counter on a platform with a supported PMU\nbut where the platform_device (defining the interrupts) has not been\nregistered results in a NULL pointer dereference.\n\nThis patch fixes the problem by checking that we actually have a platform\ndevice registered before attempting to grab the interrupts.\n\nReported-by: Pawel Moll \u003cpawel.moll@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "2d13ccaa8797d7e599f3792aed4b1e44b47f94a5", "tree": "7079c1610373fc6709c3a285a53099beaf21295a", "parents": [ "59136ef3c596606d3eef920dc3e0fdfa2ce52c6f", "11f1c5de7be06bbb51363002ebc4d00edc2677df" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 21 21:56:56 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 21 21:56:56 2011 +0000" }, "message": "Merge branch \u0027irqchip-consolidation\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable\n\nConflicts:\n\tarch/arm/mach-omap2/board-4430sdp.c\n\tarch/arm/mach-omap2/board-omap4panda.c\n\tarch/arm/mach-omap2/include/mach/omap4-common.h\n\tarch/arm/plat-omap/include/plat/irqs.h\n\nThe changes to omap4-common.h were moved to arch/arm/mach-omap2/common.h\nand the other trivial conflicts resolved. The now empty ifdef in irqs.h\nwas also eliminated.\n" }, { "commit": "11ed0ba1754841316d4095478944300acf19acc3", "tree": "2b7b1002398ca3bd035ec69fbec92ac6648fadf6", "parents": [ "6fe4c6d466e95d31164f14b1ac4aefb51f0f4f82" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Nov 14 17:24:58 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 21 13:12:18 2011 +0000" }, "message": "ARM: 7161/1: errata: no automatic store buffer drain\n\nThis patch implements a workaround for PL310 erratum 769419. On\nrevisions of the PL310 prior to r3p2, the Store Buffer does not\nautomatically drain. This can cause normal, non-cacheable writes to be\nretained when the memory system is idle, leading to suboptimal I/O\nperformance for drivers using coherent DMA.\n\nThis patch adds an optional wmb() call to the cpu_idle loop. On systems\nwith an outer cache, this causes an explicit flush of the store buffer.\n\nCc: stable@vger.kernel.org\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nTested-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "e879c862fb81b986095ae7a4676b2281c2f97957", "tree": "bd7793e9e9924ff4b5826d14267125e8dc22afdd", "parents": [ "5aafec15bdc54cf0722696c95091d7bd674bfcad" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 01 13:16:26 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 21 09:47:48 2011 +0000" }, "message": "ARM: restart: only perform setup for restart when soft-restarting\n\nWe only need to set the system up for a soft-restart if we\u0027re going to\nbe doing a soft-restart. Provide a new function (soft_restart()) which\ndoes the setup and final call for this, and make platforms use it.\nEliminate the call to setup_restart() from the default handler.\n\nThis means that platforms arch_reset() function is no longer called with\nthe page tables prepared for a soft-restart, and caches will still be\nenabled.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\nAcked-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nAcked-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nAcked-by: Krzysztof Ha■asa \u003ckhc@pm.waw.pl\u003e\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nAcked-by: Richard Purdie \u003crichard.purdie@linuxfoundation.org\u003e\nAcked-by: Wan ZongShun \u003cmcuos.com@gmail.com\u003e\nAcked-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "27a3f0e91bed0f4dcf0a363e5f5938126d1ff4e5", "tree": "8ecb950e3b8c96cdb38ffda404571c2e375f0fcd", "parents": [ "3e28c800440d80ede7edb21dbde61f6522d6536b" ], "author": { "name": "Nicolas Pitre", "email": "nicolas.pitre@linaro.org", "time": "Thu Aug 25 19:10:29 2011 -0400" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Nov 18 13:51:21 2011 -0500" }, "message": "ARM: sort the meminfo array earlier\n\nThe meminfo array has to be sorted before sanity_check_meminfo() in\narch/arm/mm/mmu.c is called for it to work properly. This also allows\nfor a simpler find_limits() in arch/arm/mm/init.c.\n\nThe sort is moved to arch/arm/kernel/setup.c because that\u0027s where the\nmeminfo array is populated. Eventually this should be improved upon\nto make the memory bank parser a bit more robust against problems\nsuch as overlapping memory ranges.\n\nSigned-off-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\n" }, { "commit": "e5489847d6fc0ff176048b6e1cf5034507bf703a", "tree": "5107b2b91730fb8b283ac7d2a01cda1c4f1283fb", "parents": [ "a34dbfb03f472ad3e063d3b1d1e88f7ef8f88bf1" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 17 16:58:00 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 17 16:58:00 2011 +0000" }, "message": "ARM: wire up process_vm_writev and process_vm_readv syscalls\n\nThese two syscalls were introduced during the last merge window.\nAdd the entries into the ARM call tables for them.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bce34d14428d35d9a06ddc10cd46ecef311764c9", "tree": "231aafe3e3b35f7b00da16240fa5a6b8ecdf2870", "parents": [ "14e25c5eeb90d4f61cc94933307d04a19738ad2f" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 17 15:05:14 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 17 15:20:03 2011 +0000" }, "message": "ARM: perf: initialise used_mask for fake PMU during validation\n\nWhen validating an event group, we call pmu-\u003eget_event_idx for each\ngroup member in order to check that the group can be scheduled as a\nunit on an empty PMU.\n\nAs a result of 3fc2c830 (\"ARM: perf: remove event limit from\npmu_hw_events\"), the used_mask member of struct cpu_hw_events must be\nsetup explicitly, something which we don\u0027t do for the fake cpu_hw_events\nused for validation.\n\nThis patch sets up an empty used_mask for the fake validation\ncpu_hw_events, preventing NULL deferences when trying to get the event\nindex.\n\nReported-by: Pawel Moll \u003cpawel.moll@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "ec84d529b689f4ae31813cf74673f3271c36c83a", "tree": "e89f17c7d1f70fa0aa1ec0fa6febf3f51bdfcce4", "parents": [ "cfcfc9eca2bcbd26a8e206baeb005b055dbf8e37" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Nov 14 16:12:52 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Nov 16 10:06:42 2011 +0000" }, "message": "ARM: PMU: re-export release_pmu symbol to modules\n\nCommit b0e89590 (\"ARM: PMU: move CPU PMU platform device handling and\ninit into perf\") inadvertently removed the EXPORT_SYMBOL_GPL on\nrelease_pmu, so out-of-tree modules can no longer play nice with perf,\neven if they tried in the first place.\n\nThis patch re-exports the symbol.\n\nReported-by: Jon Medhurst (Tixy) \u003cjon.medhurst@linaro.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "abeb24ae4d3e543ecf0104cff08a3af4e7a42479", "tree": "899f014c399f7e30c8a7709ac01f6ab36a96e250", "parents": [ "db0d4db22a78d31c59087f7057b8f1612fecc35d" ], "author": { "name": "Marc Zyngier", "email": "marc.zyngier@arm.com", "time": "Tue Sep 06 09:23:26 2011 +0100" }, "committer": { "name": "Marc Zyngier", "email": "marc.zyngier@arm.com", "time": "Tue Nov 15 18:13:03 2011 +0000" }, "message": "ARM: Make global handler and CONFIG_MULTI_IRQ_HANDLER mutually exclusive\n\nEven when CONFIG_MULTI_IRQ_HANDLER is selected, the core code\nrequires the arch_irq_handler_default macro to be defined as\na fallback.\n\nIt turns out nobody is using that particular feature as both PXA\nand shmobile have all their machine descriptors populated with\nthe interrupt handler, leaving unused code (or empty macros) in\ntheir entry-macro.S file just to be able to compile entry-armv.S.\n\nMake CONFIG_MULTI_IRQ_HANDLER exclusive wrt arch_irq_handler_default,\nwhich allows to remove one test from the hot path. Also cleanup both\nPXA and shmobile entry-macro.S.\n\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\nTested-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nSigned-off-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\n" }, { "commit": "aa2bc1ade59003a379ffc485d6da2d92ea3370a6", "tree": "6d3551cbc594f6827682db9ab931e6e22a37fd6a", "parents": [ "1d5f003f5a964711853514b04ddc872eec0fdc7b" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Wed Nov 09 17:56:37 2011 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Nov 14 13:01:24 2011 +0100" }, "message": "perf: Don\u0027t use -ENOSPC for out of PMU resources\n\nPeople (Linus) objected to using -ENOSPC to signal not having enough\nresources on the PMU to satisfy the request. Use -EINVAL.\n\nRequested-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nCc: Will Deacon \u003cwill.deacon@arm.com\u003e\nCc: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nCc: David Daney \u003cdavid.daney@cavium.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLink: http://lkml.kernel.org/n/tip-xv8geaz2zpbjhlx0svmpp28n@git.kernel.org\n[ merged to newer kernel, fixed up MIPS impact ]\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "a34dbfb03f472ad3e063d3b1d1e88f7ef8f88bf1", "tree": "c3e5418493546663bf0b9ba00810621b9ec7b0d9", "parents": [ "798681bf2127e60f16e9decc5e3a0b901f3ff3fe" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Nov 11 11:35:58 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Nov 12 11:33:14 2011 +0000" }, "message": "ARM: 7160/1: setup: avoid overflowing {elf,arch}_name from proc_info_list\n\nsetup_processor copies the arch_name and elf_name fields out of the\nselected proc_info_list into two fixed size buffers.\n\nSince the proc_info_list structure is defined in a proc_*.S assembly\nfile, this can lead to subtle errors if the strings defined there are\ntoo long (for example, corrupting the machine ID).\n\nThis patch uses snprintf instead of sprintf to ensure that these buffers\nare not overrun.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "5aafec15bdc54cf0722696c95091d7bd674bfcad", "tree": "7d34a0872eb05dfe0258d21a82cb6b07d870f962", "parents": [ "ac15e00b1efe705b66a36d1a6a9db7f6ed524c43" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 01 10:15:27 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 10 22:30:28 2011 +0000" }, "message": "ARM: restart: remove argument to setup_mm_for_reboot()\n\nsetup_mm_for_reboot() doesn\u0027t make use of its argument, so remove it.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ac15e00b1efe705b66a36d1a6a9db7f6ed524c43", "tree": "203b398bbb6740f735d2a293149823a2a223740b", "parents": [ "34adeda943e1fb10e8de022b834996e04241fa7d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Oct 31 09:22:22 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 10 22:30:20 2011 +0000" }, "message": "ARM: restart: move reboot failure handing into machine_restart()\n\nMove the failure to reboot into machine_restart() to always catch\nthis condition, even if a platform decides to hook the restarting\nvia arm_pm_restart().\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b44c350d4104265cf3a6b4355dc1ee05c16aa5de", "tree": "e389eebe83caa3a2a2532724dc5ade66298845bd", "parents": [ "a528721da08a793e0cec6ef6281d404eddd6e27b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 01 14:27:33 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 10 22:30:10 2011 +0000" }, "message": "ARM: restart: allow platforms more flexibility specifying restart mode\n\nChange \u0027soft_reboot\u0027 into a more generic \u0027restart_mode\u0027 variable,\nallowing the default restart mode to be specified.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a528721da08a793e0cec6ef6281d404eddd6e27b", "tree": "909557c79b69093c6aaa3244a1c0181e419a5158", "parents": [ "1ea6b8f48918282bdca0b32a34095504ee65bab5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 04 15:05:24 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 10 22:30:01 2011 +0000" }, "message": "ARM: restart: add restart hook to machine_desc record\n\nAdd a restart hook to the machine_desc record so we don\u0027t have to\npopulate all platforms with init_early methods to initialize the\narm_pm_restart function pointer.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8428e84d42179c2a00f5f6450866e70d802d1d05", "tree": "f6d316f13665e51f4cb27ea13c5e4f5dcd259690", "parents": [ "71e63e748ee6f4bad482b8021386eeb74f6e47f1" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Nov 07 18:05:53 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 08 18:25:04 2011 +0000" }, "message": "ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processors\n\nRecent gcc versions generate unaligned accesses by default on ARMv6 and\nlater processors. This patch ensures that the SCTLR.A bit is always\ncleared on such processors to avoid kernel traping before\nalignment_init() is called.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nTested-by: John Linn \u003cJohn.Linn@xilinx.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nCc: stable@vger.kernel.org\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" } ], "next": "abf015f04614a3a7da43d35b55edc90189af4e6a" }