)]}' { "log": [ { "commit": "757df746fc5db0020ddab45914617a19d149c252", "tree": "d6c4d703c89b774c653d4327ed53d4620fbd7d96", "parents": [ "2eb5af44b1d22d7f7b715e0b9a4e516eb4451bf9" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Thu Jun 30 15:10:21 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jul 06 20:46:04 2011 +0100" }, "message": "ARM: 6980/1: mmci: use StartBitErr to detect bad connections\n\nStresstesting insert/remove of SD-cards can trigger\na StartBitErr. This made the driver to hang in forever\nwaiting for a non ocurring data timeout.\n\nThis bit and interrupt is documented in the original\nPL180 TRM, just never implemented until now.\n\nSigned-off-by: Ulf Hansson \u003culf.hansson@stericsson.com\u003e\nReviewed-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nReviewed-by: Jonas Aberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c31b55cd4eaf050bb5a15bd8251da1b3c7edeb1c", "tree": "75bc885df951307fda9215e33847411f37935c20", "parents": [ "d09408ade08a08a710a247fb52aa50101e73ebf7" ], "author": { "name": "Adrian Hunter", "email": "adrian.hunter@intel.com", "time": "Thu Jun 23 13:40:29 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:53:05 2011 -0400" }, "message": "mmc: queue: bring discard_granularity/alignment into line with SCSI\n\nSCSI defines discard alignment as the offset to the first\noptimal discard. In the case of SD/MMC, that is always zero\nwhich is the default.\n\nSCSI defines discard granularity as a hint of a optimal\ndiscard size. That is much better expressed by the MMC\n\"preferred erase size\" (pref_erase) field.\n\nSigned-off-by: Adrian Hunter \u003cadrian.hunter@intel.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "d09408ade08a08a710a247fb52aa50101e73ebf7", "tree": "ddae7661d9a0f5f9315bd7f746d79242ccba94bf", "parents": [ "4cf8c6dd2e261da94b87c4deadcc136ab022b6ac" ], "author": { "name": "Adrian Hunter", "email": "adrian.hunter@intel.com", "time": "Thu Jun 23 13:40:28 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:52:57 2011 -0400" }, "message": "mmc: queue: append partition subname to queue thread name\n\nFor example, an eMMC with 2 boot partitions will have 3 threads.\nThe names change from:\n\n 40 ? 00:00:00 mmcqd/0\n 41 ? 00:00:00 mmcqd/0\n 42 ? 00:00:00 mmcqd/0\n\nto:\n\n 40 ? 00:00:00 mmcqd/0\n 41 ? 00:00:00 mmcqd/0boot0\n 42 ? 00:00:00 mmcqd/0boot1\n\nSigned-off-by: Adrian Hunter \u003cadrian.hunter@intel.com\u003e\nCc: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "4cf8c6dd2e261da94b87c4deadcc136ab022b6ac", "tree": "5bad08b6490c694b60d8c4afc0ab638ccea838ff", "parents": [ "ddd6fa7e794e62af3ec3eb4ffdc78489885701f2" ], "author": { "name": "Adrian Hunter", "email": "adrian.hunter@intel.com", "time": "Thu Jun 23 13:40:27 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:52:53 2011 -0400" }, "message": "mmc: core: make erase timeout calculation allow for gated clock\n\nThe erase timeout calculation may depend on clock rate\nwhich is zero if the clock is gated, so use\nmmc_host_clk_rate() which allows for that case.\n\nSigned-off-by: Adrian Hunter \u003cadrian.hunter@intel.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "ddd6fa7e794e62af3ec3eb4ffdc78489885701f2", "tree": "bc572f9622a9a88f832b3b56923d439c9acbc4bc", "parents": [ "c6e633ad916e2af244dbfd11abd2bc077870bdfd" ], "author": { "name": "Adrian Hunter", "email": "adrian.hunter@intel.com", "time": "Thu Jun 23 13:40:26 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:52:49 2011 -0400" }, "message": "mmc: block: switch card to User Data Area when removing the block driver\n\nThe MMC block driver and other drivers (e.g. mmc-test) will expect\nthe card to be switched to the User Data Area eMMC partition when\nthey start. Hence the MMC block driver should ensure it is that\nway when it is removed.\n\nSigned-off-by: Adrian Hunter \u003cadrian.hunter@intel.com\u003e\nCc: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "c6e633ad916e2af244dbfd11abd2bc077870bdfd", "tree": "bbede7dde592280dd1e76add67b1cc3f1afe3619", "parents": [ "e9e8bcb8178e197d889ec31e79fa1ddc1732c8f9" ], "author": { "name": "Daniel Drake", "email": "dsd@laptop.org", "time": "Sat Jun 25 19:20:11 2011 +0100" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:52:44 2011 -0400" }, "message": "mmc: sdio: reset card during power_restore\n\nmmc_sdio_power_restore() skips some steps that are performed in other\npower-related codepaths which are necessary to fully reset the card.\nWithout this, runtime PM fails for SD8686 SDIO wifi on OLPC XO-1.5.\n\nSigned-off-by: Daniel Drake \u003cdsd@laptop.org\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "3e713373ce07b9f59c3901e7d39bc1edccda28da", "tree": "f067a8e07336c35ad375951e03b57808478f22dc", "parents": [ "7d8b4c2a4b73da8e3632603691838ca5b2a8c26d" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Tue May 24 12:24:07 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:52:20 2011 -0400" }, "message": "mmc: sdhi: DMA slave ID 0 is invalid\n\nDon\u0027t try to allocate DMA resources if the platform didn\u0027t specify\npositive DMA slave IDs.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "7d8b4c2a4b73da8e3632603691838ca5b2a8c26d", "tree": "c9f4bf96c6250ebb72b6c30936d7f06a10e3382c", "parents": [ "a9120c33ffbb0b3448d833dae392edc90d6cfac2" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Mon Jun 20 16:51:10 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:52:15 2011 -0400" }, "message": "mmc: tmio: fix regression in TMIO_MMC_WRPROTECT_DISABLE handling\n\nCommit b6147490e6aac82 (\"mmc: tmio: split core functionality, DMA and\nMFD glue\") broke handling of the TMIO_MMC_WRPROTECT_DISABLE flag by\nthe tmio-mmc driver. This patch restores the original behaviour.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "a9120c33ffbb0b3448d833dae392edc90d6cfac2", "tree": "8ea12aea362f9e5980926c1f1b2faae1425bd67b", "parents": [ "4a3dc6ef344ccfe80bf986aec0b05f51af000720" ], "author": { "name": "Per Forlin", "email": "per.forlin@linaro.org", "time": "Fri Jun 17 20:14:21 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:51:28 2011 -0400" }, "message": "mmc: omap_hsmmc: use original sg_len for dma_unmap_sg\n\nDon\u0027t use the returned sg_len from dma_map_sg() as inparameter\nto dma_unmap_sg(). Use the original sg_len for both dma_map_sg\nand dma_unmap_sg according to the documentation in DMA-API.txt.\n\nSigned-off-by: Per Forlin \u003cper.forlin@linaro.org\u003e\nReviewed-by: Venkatraman S \u003csvenkatr@ti.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "4a3dc6ef344ccfe80bf986aec0b05f51af000720", "tree": "d7644e3be353a6bcefc3b36e6fef589b106a89a1", "parents": [ "297c7f2f158f7dfa9ab5813260ff954f9c2f83d2" ], "author": { "name": "Anand Gadiyar", "email": "gadiyar@ti.com", "time": "Tue Jun 14 15:59:59 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:50:17 2011 -0400" }, "message": "mmc: omap_hsmmc: fix ocr mask usage\n\nThe OMAP HSMMC driver uses an ocr_mask to determine the list of voltages\nsupported by the card. It populates this mask based on the list of\nvoltages supported by the regulator that supplies the voltage.\n\nCommit 64be97822b (omap4 hsmmc: Update ocr mask for MMC2 for regulator\nto use) passed a fixed ocr_mask from the OMAP4 SDP board file to limit\nthe voltage to 2.9-3.0 Volts, and updated the driver to use this mask\nif provided, instead of using the regulator\u0027s supported voltages.\n\nHowever the commit is buggy - the ocr_mask is overridden by the\nregulator\u0027s capabilities anyway. Fix this.\n\n(The bug shows up when a system-wide suspend is attempted on the OMAP4\nSDP/Blaze platforms. The eMMC card comes up at 3V, but drops to 1.65V\nafter the system resumes).\n\nSigned-off-by: Anand Gadiyar \u003cgadiyar@ti.com\u003e\nAcked-by: Balaji T K \u003cbalajitk@ti.com\u003e\nAcked-by: Venkatraman S \u003csvenkatr@ti.com\u003e\nTested-by: Kishore Kadiyala \u003ckishore.kadiyala@ti.com\u003e\nSigned-off-by: Sourav Poddar \u003csourav.poddar@ti.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "297c7f2f158f7dfa9ab5813260ff954f9c2f83d2", "tree": "463c7dbb914337e1c47e1840ea86c29457dbf3bb", "parents": [ "be98ca652faa6468916a9b7608befff215a8ca70" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Thu Jun 09 23:40:27 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 25 18:49:55 2011 -0400" }, "message": "mmc: sdio: fix runtime PM path during driver removal\n\nAfter commit e1866b3 \"PM / Runtime: Rework runtime PM handling\nduring driver removal\" was introduced, the driver core stopped\nincrementing the runtime PM usage counter of the device during\nthe invocation of the -\u003eremove() callback.\n\nThis indirectly broke SDIO\u0027s runtime PM path during driver removal,\nbecause no one calls _put_sync() anymore after -\u003eremove() completes.\n\nThis means that the power of runtime-PM-managed SDIO cards is kept\nhigh after their driver is removed (even if it was powered down\nbeforehand).\n\nFix that by directly calling _put_sync() when the last usage\ncounter is downref\u0027ed by the SDIO bus.\n\nReported-and-tested-by: Daniel Drake \u003cdsd@laptop.org\u003e\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "742a0c7cae9bd0f913c71722289b8ec862d70a2b", "tree": "7cb32b3d9a6fb344fa2261688fd061dd3474d80e", "parents": [ "b9c350a0a9d3564d20f5301f472b8841f8934c7d" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Fri May 27 16:54:05 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 18 22:18:06 2011 -0400" }, "message": "mmc: sdhi: fix module unloading\n\nMMC host drivers must be able to process interrupts during\nmmc_remove_host().\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "b9c350a0a9d3564d20f5301f472b8841f8934c7d", "tree": "b3f71f42b1a4876ea325b10a7ca7d26d378b9272", "parents": [ "c44048dea28b3febd38417f36f7b2924d93f9bb2" ], "author": { "name": "Wanlong Gao", "email": "wanlong.gao@gmail.com", "time": "Tue May 24 21:03:22 2011 +0800" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 18 22:18:00 2011 -0400" }, "message": "mmc: of_mmc_spi: add NO_IRQ define to of_mmc_spi.c\n\nProvide a dummy value of NO_IRQ for architectures that don\u0027t support\nit (such as MIPS). Fixes the build error for MIPS.\n\nSigned-off-by: Wanlong Gao \u003cwanlong.gao@gmail.com\u003e\nAcked-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "c44048dea28b3febd38417f36f7b2924d93f9bb2", "tree": "3bb487e92183132d303cf47aa032fc754c404071", "parents": [ "c11760c6d80ab6aa20e383cf378a7287305f591c" ], "author": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Thu May 26 23:15:49 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Sat Jun 18 22:17:51 2011 -0400" }, "message": "mmc: vub300: fix null dereferences in error handling\n\nReported-by: Dan Carpenter \u003cerror27@gmail.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "19a1166fa2352f9c07a5ab34a3c2aab462cff35d", "tree": "0a99561aa026b8edc7a3621c3e32ba2314508d58", "parents": [ "13fca640bb8ab611a50e0ba120b186faa2994d6c", "7d7975a0e1da7d6e558211b6296a96f1d6bf60ce" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jun 15 22:01:36 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Jun 15 22:01:36 2011 -0700" }, "message": "Merge branch \u0027fixes\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027fixes\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n ARM: footbridge: fix clock event support\n ARM: footbridge: fix debug macros\n ARM: initrd: disable initrds outside of memory\n ARM: extend Code: line by one 16-bit quantity for Thumb instructions\n ARM: 6955/1: cmpxchg syscall should data abort if page not write\n ARM: 6954/1: zImage: fix Thumb2 breakage\n ARM: 6953/1: DT: don\u0027t try to access physical address zero\n ARM: 6949/2: mach-u300: fix compilaton warning in IO accessors\n Revert \"ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks\"\n Revert \"ARM: 6943/1: mm: use TTBR1 instead of reserved context ID\"\n davinci: make PCM platform devices static\n arm: davinci: Fix fallout from generic irq chip conversion\n ARM: 6894/1: mmci: trigger card detect IRQs on falling and rising edges\n ARM: 6952/1: fix lockdep warning of \"unannotated irqs-off\"\n ARM: 6951/1: include .bss in memory layout information\n ARM: 6948/1: Fix .size directives for __arm{7,9}tdmi_proc_info\n ARM: 6947/2: mach-u300: fix compilation error in timer\n ARM: 6946/1: vexpress: move v2m clock init to init_early\n ARM: mx51/sdma: Check the chip revision in run-time\n arm: mxs: include asm/processor.h for cpu_relax()\n" }, { "commit": "17ee083b7897ab27b4949c42de805889ebd2b4c5", "tree": "097d6a0b11178bbe7bc7fbb702cc4586dc782cae", "parents": [ "9fc2552a68eb28f95f367156cf46a3da7843ff37" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Thu May 05 17:23:10 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jun 06 11:11:12 2011 +0100" }, "message": "ARM: 6894/1: mmci: trigger card detect IRQs on falling and rising edges\n\nRight now the card detect IRQ for MMCI is requested without any\nflags which will give some default machine-specified IRQ\nbehaviour. However on the U300 rising+falling edges (such as can\nbe expected from a simple GPIO to generate when inserting/removing\na card) need to be requested explicitly.\n\nCc: Rabin Vincent \u003crabin.vincent@stericsson.com\u003e\nCc: Ulf Hansson \u003culf.hansson@stericsson.com\u003e\nCc: Sebastian Rasmussen \u003csebastian.rasmussen@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b1c1df7a7d50bf94de89704e963467bc94b1fef9", "tree": "be95cd2ed5cc248ac22cb31f3e6da382b135f41f", "parents": [ "e68273baf30390e9c907831b47384085c7f664d5" ], "author": { "name": "Balaji T K", "email": "balajitk@ti.com", "time": "Mon May 30 19:55:34 2011 +0530" }, "committer": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Wed Jun 01 02:25:04 2011 -0700" }, "message": "ARM: OMAP4: MMC: no regulator off during probe for eMMC\n\neMMC does not handle power off when not in sleep state,\nSkip regulator disable during probe when eMMC is\nnot in known state - state left by bootloader.\n\nResolves eMMC failure on OMAP4\nmmc0: error -110 whilst initialising MMC card\n\nSigned-off-by: Balaji T K \u003cbalajitk@ti.com\u003e\nTested-by: Kishore Kadiyala \u003ckishore.kadiyala@ti.com\u003e\nAcked-by: Kishore Kadiyala \u003ckishore.kadiyala@ti.com\u003e\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\n" }, { "commit": "2a56d2220284b0e4dd8569fa475d7053f1c40a63", "tree": "96f959486a2f31db599e5f97167074bd1ecb3dc6", "parents": [ "46f2cc80514e389bacfb642a32a4181fa1f1d20b", "239df0fd5ee25588f8a5ba7f7ee646940cc403f4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 27 19:51:32 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 27 19:51:32 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)\n ARM: 6945/1: Add unwinding support for division functions\n ARM: kill pmd_off()\n ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks\n ARM: 6943/1: mm: use TTBR1 instead of reserved context ID\n ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7\n ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area\n ARM: add sendmmsg syscall\n ARM: 6863/1: allow hotplug on msm\n ARM: 6832/1: mmci: support for ST-Ericsson db8500v2\n ARM: 6830/1: mach-ux500: force PrimeCell revisions\n ARM: 6829/1: amba: make hardcoded periphid override hardware\n ARM: 6828/1: mach-ux500: delete SSP PrimeCell ID\n ARM: 6827/1: mach-netx: delete hardcoded periphid\n ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resume\n ARM: 6938/1: fiq: Refactor {get,set}_fiq_regs() for Thumb-2\n ARM: 6914/1: sparsemem: fix highmem detection when using SPARSEMEM\n ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEM\n at91: drop at572d940hf support\n at91rm9200: introduce at91rm9200_set_type to specficy cpu package\n at91: drop boot_params and PLAT_PHYS_OFFSET\n ...\n" }, { "commit": "ec71974f2a3ae052cdbb57a92ce3c3b34ebd7b5d", "tree": "1158c337a4f29e84715965c2ef4c154634cbfc10", "parents": [ "a771e36e16e9fdacb2bb8d3b9be50be68f211b82" ], "author": { "name": "Samuel Ortiz", "email": "sameo@linux.intel.com", "time": "Wed Apr 06 11:38:14 2011 +0200" }, "committer": { "name": "Samuel Ortiz", "email": "sameo@linux.intel.com", "time": "Thu May 26 19:44:59 2011 +0200" }, "message": "mmc: Use device platform_data to retrieve tmio_mmc platform bits\n\nWith the addition of the platform device mfd_cell pointer, we can now\ncleanly pass the sub device drivers platform data pointers through the\nregular device platform_data one, and get rid of mfd_get_data()\n\nCc: Ian Molton \u003cspyro@f2s.com\u003e\nCc: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: Philipp Zabel \u003cphilipp.zabel@gmail.com\u003e\nAcked-by: Dmitry Eremin-Solenikov \u003cdbaryshkov@gmail.com\u003e\nSigned-off-by: Samuel Ortiz \u003csameo@linux.intel.com\u003e\n" }, { "commit": "1784b157c89cd2b5e6a3840abfdab6ed51f31d86", "tree": "22d0a9425f5cc2881f10fd76846ca8960d56fe8f", "parents": [ "729303191ef4bd5df4c5e9ffca62268758928b2c" ], "author": { "name": "Philippe Langlais", "email": "philippe.langlais@stericsson.com", "time": "Fri Mar 25 08:51:52 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu May 26 10:33:35 2011 +0100" }, "message": "ARM: 6832/1: mmci: support for ST-Ericsson db8500v2\n\nST-Ericsson modified ARM PrimeCell PL180 block has not got\nan updated corresponding amba-id, althought the IP block has\nchanged in db8500v2. The change was done to the datactrl register.\nUsing the overrided subversion ID, account for this.\n\nSigned-off-by: Philippe Langlais \u003cphilippe.langlais@linaro.org\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8c1c77ff9be27137fa7cbbf51efedef1a2ae915b", "tree": "cdbd09cac5f5d1c6eb5ec4257dc478c6acca70c5", "parents": [ "f3ae1c75203535f65448517e46c8dd70a56b6c71", "08ee80cc397ac1a306ca689a22ede954d92d0db1" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 25 16:55:55 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 25 16:55:55 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (75 commits)\n mmc: core: eMMC bus width may not work on all platforms\n mmc: sdhci: Auto-CMD23 fixes.\n mmc: sdhci: Auto-CMD23 support.\n mmc: core: Block CMD23 support for UHS104/SDXC cards.\n mmc: sdhci: Implement MMC_CAP_CMD23 for SDHCI.\n mmc: core: Use CMD23 for multiblock transfers when we can.\n mmc: quirks: Add/remove quirks conditional support.\n mmc: Add new VUB300 USB-to-SD/SDIO/MMC driver\n mmc: sdhci-pxa: Add quirks for DMA/ADMA to match h/w\n mmc: core: duplicated trial with same freq in mmc_rescan_try_freq()\n mmc: core: add support for eMMC Dual Data Rate\n mmc: core: eMMC signal voltage does not use CMD11\n mmc: sdhci-pxa: add platform code for UHS signaling\n mmc: sdhci: add hooks for setting UHS in platform specific code\n mmc: core: clear MMC_PM_KEEP_POWER flag on resume\n mmc: dw_mmc: fixed wrong regulator_enable in suspend/resume\n mmc: sdhi: allow powering down controller with no card inserted\n mmc: tmio: runtime suspend the controller, where possible\n mmc: sdhi: support up to 3 interrupt sources\n mmc: sdhi: print physical base address and clock rate\n ...\n" }, { "commit": "08ee80cc397ac1a306ca689a22ede954d92d0db1", "tree": "b36819e6b52c9fd939dd6c886af734cb6ccbc45f", "parents": [ "4f3d3e9b50931a3ec70f324d53fb7437e2a39388" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Tue May 24 18:14:58 2011 -0700" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed May 25 16:52:32 2011 -0400" }, "message": "mmc: core: eMMC bus width may not work on all platforms\n\nCMD19 -- The offical way to validate bus widths from the JEDEC spec\ndoes not work on all platforms. Some platforms that use PCI/PCIe\nto connect their SD controllers are known to fail.\n\nIf the quirk MMC_BUS_WIDTH_TEST is not defined we try to figure out\nthe bus width by reading the ext_csd at different bus widths and\ncompare this against the ext_csd read in 1 bit mode. If no ext_csd\nis available we default to 1 bit operations.\n\nCode has been tested on mmp2 against 8 bit eMMC and Transcend 2GB\ncard that is known to not work in 4 bit mode. The physical pins\non the card are not present to support 4 bit operation.\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "4f3d3e9b50931a3ec70f324d53fb7437e2a39388", "tree": "26018537aaea287e7aa6377e2305a4222699b8d7", "parents": [ "8edf63710bd43e62d59bfe017df542fa0713bbb3" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Wed May 25 10:42:50 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed May 25 16:52:26 2011 -0400" }, "message": "mmc: sdhci: Auto-CMD23 fixes.\n\nFixes bugs in Auto-CMD23 feature enable decision. Auto-CMD23\nshould be enabled if host is \u003e\u003d v3, and SDMA is not in use.\n\nUSE_ADMA | USE_SDMA | Auto-CMD23\n---------+----------+-----------\n 0 | 0 | 1\n---------+----------+-----------\n 0 | 1 | 0\n---------+----------+-----------\n 1 | 0 | 1\n---------+----------+-----------\n 1 | 1 | 1\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "8edf63710bd43e62d59bfe017df542fa0713bbb3", "tree": "98641f28d6d3ce2ca5c021de20f8dec35fb8affe", "parents": [ "f0d89972b01798cf9d245dfa1cacfa0ee78a3593" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon May 23 15:06:39 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed May 25 16:51:40 2011 -0400" }, "message": "mmc: sdhci: Auto-CMD23 support.\n\nEnables Auto-CMD23 support where available (SDHCI 3.0 controllers)\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nTested-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f0d89972b01798cf9d245dfa1cacfa0ee78a3593", "tree": "a3e69fc95825971384798eac4281148db837f891", "parents": [ "e89d456fcdde2df008c032bf928e69e628e07a28" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon May 23 15:06:38 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed May 25 16:49:03 2011 -0400" }, "message": "mmc: core: Block CMD23 support for UHS104/SDXC cards.\n\nSD cards operating at UHS104 or better support SET_BLOCK_COUNT.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nReviewed-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "e89d456fcdde2df008c032bf928e69e628e07a28", "tree": "ecc1942bea556086e015bdb6a6a548ad6e3a8957", "parents": [ "d0c97cfb81ebc5b416c0f92fa2fc18d2773e3023" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon May 23 15:06:37 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed May 25 16:49:00 2011 -0400" }, "message": "mmc: sdhci: Implement MMC_CAP_CMD23 for SDHCI.\n\nImplements support for multiblock transfers bounded\nby SET_BLOCK_COUNT (CMD23).\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "d0c97cfb81ebc5b416c0f92fa2fc18d2773e3023", "tree": "dbf0fa49bdad896d283a7f392c156483d9687d4b", "parents": [ "c59de9287993b5c36f9005f745a3ce0b1008131d" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon May 23 15:06:36 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed May 25 16:48:46 2011 -0400" }, "message": "mmc: core: Use CMD23 for multiblock transfers when we can.\n\nCMD23-prefixed instead of open-ended multiblock transfers\nhave a performance advantage on some MMC cards.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "88095e7b473a3d9ec3b9c60429576e9cbd327c89", "tree": "567c4d5eeafb314271a21048441c79decdd776e4", "parents": [ "73627f7ce11d135dcaf16730ecfad55c3fb12d30" ], "author": { "name": "Tony Olech", "email": "tony.olech@elandigitalsystems.com", "time": "Sat May 14 16:48:13 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:54:00 2011 -0400" }, "message": "mmc: Add new VUB300 USB-to-SD/SDIO/MMC driver\n\nAdd a driver for Elan Digital System\u0027s VUB300 chip which is a USB\nconnected SDIO/SDmem/MMC host controller. A VUB300 chip enables a USB 2.0\nor USB 1.1 connected host computer to use SDIO/SD/MMC cards without the\nneed for a directly connected, for example via PCI, SDIO host controller.\n\nSigned-off-by: Anthony F Olech \u003ctony.olech@elandigitalsystems.com\u003e\n[cjb: various punctuation and style fixes]\nTested-by: Chris Ball \u003ccjb@laptop.org\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "73627f7ce11d135dcaf16730ecfad55c3fb12d30", "tree": "f3725ad9b9c1f30e94ed76f75f808998898cad17", "parents": [ "06b2233a20bf25c8ee57b7c6e13f528309ac6edc" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Fri Apr 22 13:19:25 2011 -0700" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:54:00 2011 -0400" }, "message": "mmc: sdhci-pxa: Add quirks for DMA/ADMA to match h/w\n\n32 Bit DMA/ADMA Access\n32 Bit Size\nSupport ADMA End Descriptor in current chain\n\t(no need for dummy entry)\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Chris Ball \u003ccjb@laptop.org\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "06b2233a20bf25c8ee57b7c6e13f528309ac6edc", "tree": "00808b589ed4e95fd77722fadf106bf8a1121782", "parents": [ "4c4cb171054230c2e58ed6574d7faa1871c75bbe" ], "author": { "name": "Jaehoon Chung", "email": "jh80.chung@samsung.com", "time": "Thu May 12 17:18:59 2011 +0900" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:59 2011 -0400" }, "message": "mmc: core: duplicated trial with same freq in mmc_rescan_try_freq()\n\nmmc_rescan_try_freq() tries to init two times with the last frequency.\nFor example, if host-\u003ef_min is 400KHz, we see the message below:\n\nmmc1: mmc_rescan_try_freq: trying to init card at 400000 Hz\nmmc1: mmc_rescan_try_freq: trying to init card at 400000 Hz\n\nAndy Ross says that he didn\u0027t try this code on a board with an f_min\nthat exactly matches one of the table entries, which explains why the\nbug wasn\u0027t detected.\n\nSigned-off-by: Jaehoon Chung \u003cjh80.chung@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nCc: Andy Ross \u003candy.ross@windriver.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "4c4cb171054230c2e58ed6574d7faa1871c75bbe", "tree": "8ba336234def08a99ae98d29047da69de41cdcb0", "parents": [ "261bbd463a091b939770255d559bbc89b1bad568" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Fri May 13 11:17:18 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:58 2011 -0400" }, "message": "mmc: core: add support for eMMC Dual Data Rate\n\neMMC voltage change not required for 1.8V. 3.3V and 1.8V vcc\nare capable of doing DDR. vccq of 1.8v is not required.\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nReviewed-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "261bbd463a091b939770255d559bbc89b1bad568", "tree": "3d28f9b3d2da6677e6564c752bd15bd8d97a4db9", "parents": [ "756515c6267a580aecc67d114bb289dd30a466a1" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Fri May 13 11:17:17 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:58 2011 -0400" }, "message": "mmc: core: eMMC signal voltage does not use CMD11\n\neMMC chips do not use CMD11 when changing voltage. Add extra\nargument to call to indicate if CMD11 needs to be sent.\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nReviewed-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "756515c6267a580aecc67d114bb289dd30a466a1", "tree": "5a801d6a3736670cb5be2a9a86429fc5d63023e6", "parents": [ "6322cdd0eb22e016aeced886c2046d115139c962" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Fri May 13 11:17:16 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:57 2011 -0400" }, "message": "mmc: sdhci-pxa: add platform code for UHS signaling\n\nMarvell controller requires 1.8V bit in UHS control register 2\nbe set when doing UHS. eMMC does not require 1.8V for DDR.\nadd platform code to handle this.\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nReviewed-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "6322cdd0eb22e016aeced886c2046d115139c962", "tree": "8ab17b8220413f828b0edaceb1f0964b4ecf7dab", "parents": [ "a8e6df7343cf67c9104955da0de70075a6ee1dfd" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Fri May 13 11:17:15 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:57 2011 -0400" }, "message": "mmc: sdhci: add hooks for setting UHS in platform specific code\n\nAllow platform specific code to set UHS registers if\nimplementation requires speciial platform specific handling\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nReviewed-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "a8e6df7343cf67c9104955da0de70075a6ee1dfd", "tree": "5368d2c28837b304461e3fabf7f78ac76e671200", "parents": [ "1d6c4e0a00399de9de3f066de175eb5fcc4b7b46" ], "author": { "name": "Eliad Peller", "email": "eliad@wizery.com", "time": "Mon May 09 11:32:31 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:56 2011 -0400" }, "message": "mmc: core: clear MMC_PM_KEEP_POWER flag on resume\n\nSince the MMC_PM_KEEP_POWER flag should be set on each suspend,\nit should also cleared on each resume.\n\nUpon resuming, we have to know if power was kept\n(for re-initialization, etc.), so clear it just after resuming.\n\nSigned-off-by: Eliad Peller \u003celiad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "1d6c4e0a00399de9de3f066de175eb5fcc4b7b46", "tree": "793d02e138b86753f8a2eba04a8cae2eb97c9074", "parents": [ "2595880481ac894d390365092de9aaf92b44e147" ], "author": { "name": "Jaehoon Chung", "email": "jh80.chung@samsung.com", "time": "Wed May 11 15:52:39 2011 +0900" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:56 2011 -0400" }, "message": "mmc: dw_mmc: fixed wrong regulator_enable in suspend/resume\n\nregulator_enable() was incorrectly placed in the suspend function\ninstead of the resume function.\n\nSigned-off-by: Jaehoon Chung \u003cjh80.chung@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nAcked-by: Will Newton \u003cwill.newton@imgtec.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "2595880481ac894d390365092de9aaf92b44e147", "tree": "4ab065140c59e8b68e661926bfaa588e4a7e2a0a", "parents": [ "7311bef0697bcfbbcb898c3c22e61e23f203ae9d" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed May 11 16:51:15 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:55 2011 -0400" }, "message": "mmc: sdhi: allow powering down controller with no card inserted\n\nSupply a link to TMIO private data for platforms to implement their\nown card detection.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "7311bef0697bcfbbcb898c3c22e61e23f203ae9d", "tree": "0ef14a5a255472ba32473c54679af43866265387", "parents": [ "d6a1f863433bdf3f8406dedfa33fa79ee9259db3" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed May 11 16:51:11 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:55 2011 -0400" }, "message": "mmc: tmio: runtime suspend the controller, where possible\n\nThe TMIO MMC controller cannot be powered off to save power, when no\ncard is plugged in, because then it will not be able to detect a new\ncard-insertion event. On some implementations, however, it is\npossible to switch to using another source to detect card insertion.\nThis patch adds support for such implementations.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "d6a1f863433bdf3f8406dedfa33fa79ee9259db3", "tree": "a514e8b4db8f8842c7bad2174708f8c690e279c1", "parents": [ "1f7d6819e56dda651a32b0193ff9e7929f62709f" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri May 06 11:02:45 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:54 2011 -0400" }, "message": "mmc: sdhi: support up to 3 interrupt sources\n\nConvert the SDHI code to support more than a single interrupt source.\nNeeded to support hardware that uses GIC instead of INTC as interrupt\ncontroller.\n\nWill also allow us to remove the irq forwarding workaround from the\nINTC code in the future.\n\nSigned-off-by: Simon Horman \u003chorms@verge.net.au\u003e\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "1f7d6819e56dda651a32b0193ff9e7929f62709f", "tree": "939149bf42d6d00d2b1744b864cfd427f8b819ca", "parents": [ "3ab5006471855e0864e0d83a5b39c811c525ed83" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri May 06 11:02:41 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:54 2011 -0400" }, "message": "mmc: sdhi: print physical base address and clock rate\n\nInstead of printing out useless information such as the virtual base\naddress and one of 4 interrupts, convert the SDHI probe() to print\nout physical base address together with clock rate.\n\nWe do have a struct device so make use of dev_info().\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "3ab5006471855e0864e0d83a5b39c811c525ed83", "tree": "7484343b28cad8118c3ca1deb54a26401ba9d9f0", "parents": [ "8e7bfdb37ac001c95d2c768932b57de1019409cd" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri May 06 11:02:37 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:53 2011 -0400" }, "message": "mmc: sdhi: no need for special interrupt flags\n\nModify the SDHI driver to get rid of unwanted irq flags.\n\nIRQF_DISABLED unused, see include/linux/interrupt.h\nIRQF_TRIGGER_FALLING only relevant on external IRQ pins,\nbut since SDHI is internal in the SoC this can go away.\n\nNeeded to support SDHI on sh73a0 that comes with a GIC\nthat errors out with the IRQF_TRIGGER_FALLING setting.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "8e7bfdb37ac001c95d2c768932b57de1019409cd", "tree": "8b91c25442de01ce415563ae60ee30eb8d7e6e3c", "parents": [ "df3ef2d3c92c0a562ebde3699af7d12401fddf60" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri May 06 11:02:33 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:52 2011 -0400" }, "message": "mmc: tmio/sdhi: break out interrupt request/free\n\nMove request_irq()/free_irq() from the shared code\nin tmio_mmc.c into the SDHI/tmio specific portion\nin sh_mobile_sdhi.c and tmio_mmc_pio.c.\n\nThis is ground work to allow us to adjust the SDHI\ncode with IRQ flags and number of interupt sources.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "df3ef2d3c92c0a562ebde3699af7d12401fddf60", "tree": "4969fcb7e716bcedd8634ccfdf14e3d1f274abee", "parents": [ "faca6648e6f9659400bdafb985b50ba41f1a23b5" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Apr 21 07:20:16 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:52 2011 -0400" }, "message": "mmc: protect the tmio_mmc driver against a theoretical race\n\nThe MMC subsystem does not guarantee, that host driver .request() and\n.set_ios() callbacks are serialised. Such concurrent calls, however,\ndo not have to be meaningfully supported, drivers just have to make\nsure to avoid any severe problems.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "faca6648e6f9659400bdafb985b50ba41f1a23b5", "tree": "741cc5ac765e8ce564d4ef1d4b04ca725d4cd5aa", "parents": [ "e6ee7182c3b22afe0b983eac89dc020a93a13179" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu May 05 16:20:48 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:51 2011 -0400" }, "message": "mmc: add runtime and system power-management support to the MMCIF driver\n\nAdding support for runtime power-management to the MMCIF driver allows\nit to save power as long as no card is present. To also allow to turn\noff the power domain at that time, we release DMA channels during that\ntime, since on some sh-mobile systems the DMA controller(s) and the\nMMCIF block belong to the same power domain. System-wide power\nmanagement has been tested with experimental PM patches on AP4-based\nsystems.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "e6ee7182c3b22afe0b983eac89dc020a93a13179", "tree": "ed40843e6e306917818f00aa00dc0a3c37d98d31", "parents": [ "3b0beafc92406b98cbc2749b8db736f313d390b1" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu May 05 16:13:12 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:51 2011 -0400" }, "message": "mmc: Add runtime and system-wide PM to the TMIO MMC driver\n\nAdd runtime and system-wide power management to the TMIO MMC driver\nin PIO and DMA modes, allowing it to properly save and restore its\nstate during system suspend. Runtime PM is very crude ATM, because\nthe controller has to be powered on all the time to detect card\nhotplug events.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "3b0beafc92406b98cbc2749b8db736f313d390b1", "tree": "d782fec514beb5dbb4281adc6d6ec28b7c5915da", "parents": [ "06e8935febe687e2a561707d4c7ca4245d261dbe" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Fri Apr 15 18:30:47 2011 +0000" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:50 2011 -0400" }, "message": "mmc: sh_mmcif: protect against a theoretical race\n\nThe MMC subsystem does not guarantee that host driver .request() and\n.set_ios() callbacks are serialised. Such concurrent calls, however,\ndo not have to be meaningfully supported, drivers just have to make\nsure to avoid any severe problems.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: Simon Horman \u003chorms@verge.net.au\u003e\nCc: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "06e8935febe687e2a561707d4c7ca4245d261dbe", "tree": "0eef896f5b1614576fb0a1b744b4f87e8124f515", "parents": [ "253d6a280f77a9b61a76f9b1bfb83545fbd58726" ], "author": { "name": "Stefan Nilsson XK", "email": "stefan.xk.nilsson@stericsson.com", "time": "Wed May 11 17:48:05 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:50 2011 -0400" }, "message": "mmc: sdio: optimized SDIO IRQ handling for single irq\n\nIf there is only 1 function interrupt registered it is possible to\nimprove performance by directly calling the irq handler and avoiding\nthe overhead of reading the CCCR registers.\n\nSigned-off-by: Per Forlin \u003cper.forlin@linaro.org\u003e\nAcked-by: Ulf Hansson \u003culf.hansson@stericsson.com\u003e\nReviewed-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "253d6a280f77a9b61a76f9b1bfb83545fbd58726", "tree": "789a8a45a28163ded5d9c52e490d603b9ea001e4", "parents": [ "aea253ecffecd38b5ab97edd73fbe2842a7de371" ], "author": { "name": "Andy Shevchenko", "email": "ext-andriy.shevchenko@nokia.com", "time": "Tue May 10 15:59:01 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:49 2011 -0400" }, "message": "mmc: mmc_test: minor clean up, use t \u003d \u0026test.area everywhere\n\nSigned-off-by: Andy Shevchenko \u003cext-andriy.shevchenko@nokia.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "aea253ecffecd38b5ab97edd73fbe2842a7de371", "tree": "43ed3d608705c5a7fb5dbdbb8d75efa120f114ba", "parents": [ "cf2b5eea1ea0ff9b3184bc6771bcb93a9fdcd1d9" ], "author": { "name": "Vladimir Motyka", "email": "vladimir.motyka@gmail.com", "time": "Wed May 11 00:00:43 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:49 2011 -0400" }, "message": "mmc: card: fix potential null dereference of \u0027idata\u0027\n\nWhen allocation of idata failed there was a null dereference. Also avoid\ncalling kfree where it isn\u0027t needed.\n\nSigned-off-by: Vladimir Motyka \u003cvladimir.motyka@gmail.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "cf2b5eea1ea0ff9b3184bc6771bcb93a9fdcd1d9", "tree": "36288f760fb7556952f8365c3c0cad6b445b04f6", "parents": [ "c3ed3877625f10d600b0eca2ca48a68c46aed660" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:07 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:48 2011 -0400" }, "message": "mmc: sdhci: add support for retuning mode 1\n\nHost Controller v3.00 can support retuning modes 1,2 or 3 depending on\nthe bits 46-47 of the Capabilities register. Also, the timer count for\nretuning is indicated by bits 40-43 of the same register. We initialize\ntimer_list for retuning the first time we execute tuning procedure. This\ncondition is indicated by SDHCI_NEEDS_RETUNING not being set. Since\nretuning mode 1 sets a limit of 4MB on the maximum data length, we set\nmax_blk_count appropriately. Once the tuning timer expires, we set\nSDHCI_NEEDS_RETUNING flag, and if the flag is set, we execute tuning\nprocedure before sending the next command. We need to restore mmc_request\nstructure after executing retuning procedure since host-\u003emrq is used\ninside the procedure to send CMD19. We also disable and re-enable this\nflag during suspend and resume respectively, as per the spec v3.00.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "c3ed3877625f10d600b0eca2ca48a68c46aed660", "tree": "d8170541551dca7abcefa118c4681d7294e3456d", "parents": [ "4d55c5a13a189a80d40383f02c8026f9a87d7c87" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:06 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:48 2011 -0400" }, "message": "mmc: sdhci: add support for programmable clock mode\n\nHost Controller v3.00 supports programmable clock mode as an optional\nfeature. The support for this mode is indicated by non-zero value in\nbits 48-55 of the Capabilities register. If supported, the actual\nvalue of Clock Multiplier is one more than the value provided in the\nbit fields. We only set Clock Generator Select (bit 5) and SDCLK\nFrequency Select (bits 8-15) of the Clock Control register in case\nPreset Value Enable is not set, otherwise these fields are automatically\nset by the Host Controller based on the UHS mode selected. Also, since\nthe maximum and minimum clock frequency in this mode can be\n(Base Clock * Clock Mul) and (Base Clock * Clock Mul)/1024 respectively,\nf_max and f_min have been recalculated to reflect this change.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "4d55c5a13a189a80d40383f02c8026f9a87d7c87", "tree": "6151dd86bac16adf96e7aefb6bc0ca6604a0ebc8", "parents": [ "b513ea250eb7c36a8afb3df938d632ca6b4df7cd" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:05 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:47 2011 -0400" }, "message": "mmc: sdhci: enable preset value after uhs initialization\n\nAccording to the Host Controller spec v3.00, setting Preset Value Enable\nin the Host Control2 register lets SDCLK Frequency Select, Clock Generator\nSelect and Driver Strength Select to be set automatically by the Host\nController based on the UHS-I mode set. This patch enables this feature.\nSince Preset Value Enable makes sense only for UHS-I cards, we enable this\nfeature after successfull UHS-I initialization. We also reset Preset Value\nEnable next time before initialization.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "b513ea250eb7c36a8afb3df938d632ca6b4df7cd", "tree": "41b597f488ffa21c675f49bd8c8ea00d177125e2", "parents": [ "3a3035114307cd55e024662bb295a87b849f0bd4" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:04 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:46 2011 -0400" }, "message": "mmc: sd: add support for tuning during uhs initialization\n\nHost Controller needs tuning during initialization to operate SDR50\nand SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is\nindicated by bit 45 of the Host Controller Capabilities register.\nA new command CMD19 has been defined in the Physical Layer spec\nv3.01 to request the card to send tuning pattern.\n\nWe enable Buffer Read Ready interrupt at the very begining of tuning\nprocedure, because that is the only interrupt generated by the Host\nController during tuning. We program the block size to 64 in the\nBlock Size register. We make sure that DMA Enable and Multi Block\nSelect in the Transfer Mode register are set to 0 before actually\nsending CMD19. The tuning block is sent by the card to the Host\nController using DAT lines, so we set Data Present Select (bit 5) in\nthe Command register. The Host Controller is responsible for doing\nthe verfication of tuning block sent by the card at the hardware\nlevel. After sending CMD19, we wait for Buffer Read Ready interrupt.\nIn case we don\u0027t receive an interrupt after the specified timeout\nvalue, we fall back on fixed sampling clock by setting Execute\nTuning (bit 6) and Sampling Clock Select (bit 7) of Host Control2\nregister to 0. Before exiting the tuning procedure, we disable Buffer\nRead Ready interrupt and re-enable other interrupts.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "3a3035114307cd55e024662bb295a87b849f0bd4", "tree": "764f881c7a677641abaa211128f27a37c9613d90", "parents": [ "5371c927bcd06a5c9dd6785bab2d452b87d9abc6" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:03 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:46 2011 -0400" }, "message": "mmc: sd: report correct speed and capacity of uhs cards\n\nSince only UHS-I cards respond with S18A set in response to ACMD41,\nwe set the card as ultra-high-speed after successfull initialization.\nWe need to decide whether a card is SDXC based on the C_SIZE field\nof CSDv2.0 register. According to Physical Layer spec v3.01, the\nminimum value of C_SIZE for SDXC card is 00FFFFh.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "5371c927bcd06a5c9dd6785bab2d452b87d9abc6", "tree": "71add97be08e93fcb5ac2bfcc44fc66d8f2b92df", "parents": [ "49c468fcf878d2c86e31920cf54aa90c88418a66" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:02 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:45 2011 -0400" }, "message": "mmc: sd: set current limit for uhs cards\n\nWe decide on the current limit to be set for the card based on the\nCapability of Host Controller to provide current at 1.8V signalling,\nand the maximum current limit of the card as indicated by CMD6\nmode 0. We then set the current limit for the card using CMD6 mode 1.\nAs per the Physical Layer Spec v3.01, the current limit switch is\nonly applicable for SDR50, SDR104, and DDR50 bus speed modes. For\nother UHS-I modes, we set the default current limit of 200mA.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "49c468fcf878d2c86e31920cf54aa90c88418a66", "tree": "d8088bf8fb1a011f05ebbdefef49f2a6f4739432", "parents": [ "758535c4e3cdd2b5b09565d9651aaa541aac3de8" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:01 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:45 2011 -0400" }, "message": "mmc: sd: add support for uhs bus speed mode selection\n\nThis patch adds support for setting UHS-I bus speed mode during UHS-I\ninitialization procedure. Since both the host and card can support\nmore than one bus speed, we select the highest speed based on both of\ntheir capabilities. First we set the bus speed mode for the card using\nCMD6 mode 1, and then we program the host controller to support the\nrequired speed mode. We also set High Speed Enable in case one of the\nUHS-I modes is selected. We take care to reset SD clock before setting\nUHS mode in the Host Control2 register, and then re-enable it as per\nthe Host Controller spec v3.00. We then set the clock frequency for\nthe UHS-I mode selected.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "758535c4e3cdd2b5b09565d9651aaa541aac3de8", "tree": "68675c722181a7d83e19830ee5b1bd50399b8d64", "parents": [ "d6d50a15a2897d4133d536dd4343b5cf21163db3" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:19:00 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:44 2011 -0400" }, "message": "mmc: sdhci: reset sdclk before setting high speed enable\n\nAs per Host Controller spec v3.00, we reset SDCLK before setting\nHigh Speed Enable, and then set it back to avoid generating clock\ngliches. Before enabling SDCLK again, we make sure the clock is\nstable, so we use sdhci_set_clock().\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "d6d50a15a2897d4133d536dd4343b5cf21163db3", "tree": "b56723c1b3e74ae2ae9e9d7fb39e916cdfa74958", "parents": [ "013909c4ffd16ded4895528b856fd8782df04dc6" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:18:59 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 23:53:24 2011 -0400" }, "message": "mmc: sd: add support for driver type selection\n\nThis patch adds support for setting driver strength during UHS-I\ninitialization procedure. Since UHS-I cards set S18A (bit 24) in\nresponse to ACMD41, we use this as a base for UHS-I initialization.\nWe modify the parameter list of mmc_sd_get_cid() so that we can\nsave the ROCR from ACMD41 to check whether bit 24 is set.\n\nWe decide whether the Host Controller supports A, C, or D driver\ntype depending on the Capabilities register. Driver type B is\nsuported by default. We then set the appropriate driver type for\nthe card using CMD6 mode 1. As per Host Controller spec v3.00, we\nset driver type for the host only if Preset Value Enable in the\nHost Control2 register is not set. SDHCI_HOST_CONTROL has been\nrenamed to SDHCI_HOST_CONTROL1 to conform to the spec.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "013909c4ffd16ded4895528b856fd8782df04dc6", "tree": "b74fe0c34dfd3c2348497b1aa3a34f5132ca4822", "parents": [ "f2119df6b764609af4baceb68caf1e848c1c8aa7" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:18:58 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:04:40 2011 -0400" }, "message": "mmc: sd: query function modes for uhs cards\n\nSD cards which conform to Physical Layer Spec v3.01 can support\nadditional Bus Speed Modes, Driver Strength, and Current Limit\nother than the default values. We use CMD6 mode 0 to read these\nadditional card functions. The values read here will be used\nduring UHS-I initialization steps.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f2119df6b764609af4baceb68caf1e848c1c8aa7", "tree": "3c234b150d7add419cd07e15929b94b8c3baec63", "parents": [ "cb87ea28ed9e75a41eb456bfcb547b4e6f10e750" ], "author": { "name": "Arindam Nath", "email": "arindam.nath@amd.com", "time": "Thu May 05 12:18:57 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:04:38 2011 -0400" }, "message": "mmc: sd: add support for signal voltage switch procedure\n\nHost Controller v3.00 adds another Capabilities register. Apart\nfrom other things, this new register indicates whether the Host\nController supports SDR50, SDR104, and DDR50 UHS-I modes. The spec\ndoesn\u0027t mention about explicit support for SDR12 and SDR25 UHS-I\nmodes, so the Host Controller v3.00 should support them by default.\nAlso if the controller supports SDR104 mode, it will also support\nSDR50 mode as well. So depending on the host support, we set the\ncorresponding MMC_CAP_* flags. One more new register. Host Control2\nis added in v3.00, which is used during Signal Voltage Switch\nprocedure described below.\n\nSince as per v3.00 spec, UHS-I supported hosts should set S18R\nto 1, we set S18R (bit 24) of OCR before sending ACMD41. We also\nneed to set XPC (bit 28) of OCR in case the host can supply \u003e150mA.\nThis support is indicated by the Maximum Current Capabilities\nregister of the Host Controller.\n\nIf the response of ACMD41 has both CCS and S18A set, we start the\nsignal voltage switch procedure, which if successfull, will switch\nthe card from 3.3V signalling to 1.8V signalling. Signal voltage\nswitch procedure adds support for a new command CMD11 in the\nPhysical Layer Spec v3.01. As part of this procedure, we need to\nset 1.8V Signalling Enable (bit 3) of Host Control2 register, which\nif remains set after 5ms, means the switch to 1.8V signalling is\nsuccessfull. Otherwise, we clear bit 24 of OCR and retry the\ninitialization sequence. When we remove the card, and insert the\nsame or another card, we need to make sure that we start with 3.3V\nsignalling voltage. So we call mmc_set_signal_voltage() with\nMMC_SIGNAL_VOLTAGE_330 set so that we are back to 3.3V signalling\nvoltage before we actually start initializing the card.\n\nTested by Zhangfei Gao with a Toshiba uhs card and general hs card,\non mmp2 in SDMA mode.\n\nSigned-off-by: Arindam Nath \u003carindam.nath@amd.com\u003e\nReviewed-by: Philip Rakity \u003cprakity@marvell.com\u003e\nTested-by: Philip Rakity \u003cprakity@marvell.com\u003e\nAcked-by: Zhangfei Gao \u003czhangfei.gao@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "cb87ea28ed9e75a41eb456bfcb547b4e6f10e750", "tree": "e3fe4a653bd96815c650dd9f5db11edc6b39b0db", "parents": [ "641c3187b9d53cfd4c23b0ce2ab18a13d5e775e5" ], "author": { "name": "John Calixto", "email": "john.calixto@modsystems.com", "time": "Tue Apr 26 18:56:29 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:54 2011 -0400" }, "message": "mmc: core: Add mmc CMD+ACMD passthrough ioctl\n\nAllows appropriately-privileged applications to send CMD (normal) and ACMD\n(application-specific; preceded with CMD55) commands to cards/devices on\nthe mmc bus. This is primarily useful for enabling the security\nfunctionality built in to every SD card.\n\nIt can also be used as a generic passthrough (e.g. to enable virtual\nmachines to control mmc bus devices directly). However, this use case has\nnot been tested rigorously. Generic passthrough testing was only conducted\nfor a few non-security opcodes to prove the feasibility of the passthrough.\n\nSince any opcode can be sent using this passthrough, it is very possible to\nrender the card/device unusable. Applications that use this ioctl must\nhave CAP_SYS_RAWIO.\n\nSecurity commands tested on TI PCIxx12 (SDHCI), Sigma Designs SMP8652 SoC,\nTI OMAP3621/OMAP3630 SoC, Samsung S5PC110 SoC, Qualcomm MSM7200A SoC.\n\nSigned-off-by: John Calixto \u003cjohn.calixto@modsystems.com\u003e\nReviewed-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "641c3187b9d53cfd4c23b0ce2ab18a13d5e775e5", "tree": "9bea85b68521e8d7b1efe4a01b9c19b722860b1b", "parents": [ "82b0e23a295cc58d1290017ee97a40956ad68d94" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Sat Apr 23 20:52:58 2011 +0530" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:49 2011 -0400" }, "message": "mmc: block: init force_ro sysfs attribute\n\nTo avoid lockdep warnings:\n\nBUG: key dc90a520 not in .data!\n------------[ cut here ]------------\nWARNING: at /home/rabin/kernel/arm/kernel/lockdep.c:2701 sysfs_add_file_mode+0x4c/0xb0()\nModules linked in:\n[\u003cc004b5d8\u003e] (unwind_backtrace+0x0/0xe4) from [\u003cc0074f20\u003e] (warn_slowpath_common+0x4c/0x64)\n[\u003cc0074f20\u003e] (warn_slowpath_common+0x4c/0x64) from [\u003cc0074f50\u003e] (warn_slowpath_null+0x18/0x1c)\n[\u003cc0074f50\u003e] (warn_slowpath_null+0x18/0x1c) from [\u003cc0157fec\u003e] (sysfs_add_file_mode+0x4c/0xb0)\n[\u003cc0157fec\u003e] (sysfs_add_file_mode+0x4c/0xb0) from [\u003cc02d61e4\u003e] (mmc_add_disk+0x40/0x64)\n[\u003cc02d61e4\u003e] (mmc_add_disk+0x40/0x64) from [\u003cc02d64cc\u003e] (mmc_blk_probe+0x188/0x1fc)\n[\u003cc02d64cc\u003e] (mmc_blk_probe+0x188/0x1fc) from [\u003cc02ce820\u003e] (mmc_bus_probe+0x14/0x18)\n...\n\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "82b0e23a295cc58d1290017ee97a40956ad68d94", "tree": "f3f140be979623ae8b83b79841eb842858ed054b", "parents": [ "f06c9153f5ecd47dfed23f87b9d08e42ff0e4170" ], "author": { "name": "Takashi Iwai", "email": "tiwai@suse.de", "time": "Thu Apr 21 20:26:38 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:42 2011 -0400" }, "message": "mmc: sdhci: Fix read-only detection with JMicron 388 chip\n\nOn HP laptops with JMicron 388 chip, the write-locked SD card isn\u0027t\ndetected correctly as read-only in many cases. This is because the\nPRESENT_STATE register becomes unsable just after plugging, and it\nreturns the WRITE_PROTECT bit wrongly at the first read.\n\nThis patch fixes the read-only detection by adding a new sdhci quirk\nindicating to check the register more intensively with a relatively\nlong delay.\n\nThe patch is tested with 2.6.39-rc4 kernel.\n\nCc: Aries Lee \u003carieslee@jmicron.com\u003e\nSigned-off-by: Takashi Iwai \u003ctiwai@suse.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f06c9153f5ecd47dfed23f87b9d08e42ff0e4170", "tree": "0557ae6ba11f6bf1c100f3432a1547c62cbcc864", "parents": [ "393c1a34dd852dbf0c409ec94dd48057100480ea" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Thu Apr 21 22:46:13 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:38 2011 -0400" }, "message": "mmc: Ensure hardware partitions don\u0027t mess with mmcblk device naming.\n\nWith the hardware partitions support (which represent additional logical\ndevices present on MMC), devidx does not correspond with index used to form\n/dev/mmcblkX names. So use an additional allocated index for device names.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "393c1a34dd852dbf0c409ec94dd48057100480ea", "tree": "e24e7ceda2f730cfe53f4c5744f979a45f0478d6", "parents": [ "4b01681c77642c62a833187066c35e71e59caaf5" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Fri Jan 21 11:26:40 2011 -0800" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:33 2011 -0400" }, "message": "mmc: sdhci: Add pre and post reset processing for chip specific reset\n\nMarvell pxa controllers have private registers that may need to be\nmodified before and after a reset is done.\n\nFor example, the SD reset operation, RESET_ALL, will reset the private\nregisters to their default state. This will cause the clock adjustment\nregisters that may have been programmed to have incorrect values.\n\nRESET_DATA sometimes needs to be delayed before the reset is done\n(depending on SoC) to enable any transactions being handled by the\nSDIO card to be completed. Needed in pre SD 3.0 silicon to handle\nclock gating.\n\nImplement hooks to allow this to happen.\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "4b01681c77642c62a833187066c35e71e59caaf5", "tree": "d9826b3bbd20c260cbff1cb4571c9518b784dab4", "parents": [ "24f5b53ba076e983bc64fa48534ca795d7813d51" ], "author": { "name": "Mark Brown", "email": "broonie@opensource.wolfsonmicro.com", "time": "Tue Apr 19 18:44:17 2011 +0100" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:12 2011 -0400" }, "message": "mmc: sdhci: Fix SDHCI_QUIRK_TIMEOUT_USES_SDCLK\n\nCommit 373e6a (mmc: sdhci: R1B command handling + MMC_CAP_ERASE) moved the\nhandling of SDHCI_QUIRK_TIMEOUT_USES_SDCLK from sdhci_calc_timeout() to\nsdhci_add_host(). This causes division by zero errors on at least the S3C\nSDHCI controller as the quirk implementation needs host-\u003eclock set to work\nbut host-\u003eclock has not been set when sdhci_add_host() is called.\n\nFix this by backing out that portion of the change, the clock may vary at\nruntime anyway. It does occur to me that we may want to move the quirk to\nwhere we set the clock but this seems more invasive and I\u0027m concerned\nabout undesirable side effects.\n\nSigned-off-by: Mark Brown \u003cbroonie@opensource.wolfsonmicro.com\u003e\nCc: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "24f5b53ba076e983bc64fa48534ca795d7813d51", "tree": "6ae546b6443ec6f28694a9688fdd79da633c57b7", "parents": [ "a61ad2b49bfce94dfddce828cd9222e4b9e7825b" ], "author": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed Apr 13 23:49:45 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:02:01 2011 -0400" }, "message": "mmc: initialize struct mmc_request at declaration time\n\nConverts from:\n\tstruct mmc_request mrq;\n\tmemset(\u0026mrq, 0, sizeof(struct mmc_request));\n\nto:\n\tstruct mmc_request mrq \u003d {0};\n\nbecause it\u0027s shorter, as performant, and easier to work out whether\ninitialization has happened.\n\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "a61ad2b49bfce94dfddce828cd9222e4b9e7825b", "tree": "36f93e61adc7c7d7523c78c78c3df1e75fae5e33", "parents": [ "1278dba167f01bb3c6626d16450d31129d041087" ], "author": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed Apr 13 23:46:05 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:56 2011 -0400" }, "message": "mmc: initialize struct mmc_data at declaration time\n\nConverts from:\n\tstruct mmc_data data;\n\tmemset(\u0026data, 0, sizeof(struct mmc_data));\n\nto:\n\tstruct mmc_data data \u003d {0};\n\nbecause it\u0027s shorter, as performant, and easier to work out whether\ninitialization has happened.\n\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "1278dba167f01bb3c6626d16450d31129d041087", "tree": "6fb3af716e5437cb558ae37fd8a58db23b9b173e", "parents": [ "62929e4be3fe4cc632b3b03645e083c6548de531" ], "author": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed Apr 13 23:40:30 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:52 2011 -0400" }, "message": "mmc: initialize struct mmc_command at declaration time\n\nConverts from:\n\tstruct mmc_command cmd;\n\tmemset(\u0026cmd, 0, sizeof(struct mmc_command));\n\nto:\n\tstruct mmc_command cmd \u003d {0};\n\nbecause it\u0027s shorter, as performant, and easier to work out whether\ninitialization has happened.\n\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "62929e4be3fe4cc632b3b03645e083c6548de531", "tree": "811cae5f01b1130d23c49fc47869bb6adf9cf026", "parents": [ "30574ed143e10dd19295b7d80be55f2cd6764c6f" ], "author": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed Apr 13 16:28:34 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:47 2011 -0400" }, "message": "mmc: card: Fix use of uninitialized data in mmc_blk_issue_rw_rq.\n\nmmc_blk_issue_rw_rq did not zero out mmc_command on stack.\n\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "30574ed143e10dd19295b7d80be55f2cd6764c6f", "tree": "ff99f1105ccb7e8d6c8c908e3773b9382acb11f4", "parents": [ "87f6119e25bbe0fd60e76f599d5fa10cf489519c" ], "author": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Wed Apr 13 16:25:30 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:42 2011 -0400" }, "message": "mmc: core: Fix use of uninitialized data in mmc_send_if_cond.\n\nmmc_send_if_cond did not zero out mmc_command on stack.\n\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "87f6119e25bbe0fd60e76f599d5fa10cf489519c", "tree": "10cc6964609facbddb8653b04475dfd33850ab01", "parents": [ "6a7a6b45f454686a1549729bfbae31f0b3b595d6" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Wed Apr 13 15:33:12 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:38 2011 -0400" }, "message": "mmc: core: Fix use of uninitialized data in mmc_cmd_app.\n\nmmc_cmd_app did not zero out mmc_command on stack.\n\nReported-by: Chuanxiao Dong \u003cchuanxiao.dong@intel.com\u003e\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "6a7a6b45f454686a1549729bfbae31f0b3b595d6", "tree": "dafdeae86c51d07c0115065114906d438781a50d", "parents": [ "f6a03cbf43e586211f8ea088148c8ecd3fc4b5be" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Tue Apr 12 15:06:53 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:34 2011 -0400" }, "message": "mmc: quirks: Fix erase/trim for certain SanDisk cards.\n\nCMD38 argument is passed through EXT_CSD[113].\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f6a03cbf43e586211f8ea088148c8ecd3fc4b5be", "tree": "6b3c34b585d7412cf1c82d0eb33b389ea0fa8e0f", "parents": [ "6f60c22252af05df94352240f30f9fc84090d88d" ], "author": { "name": "Mikko Vinni", "email": "mmvinni@yahoo.com", "time": "Tue Apr 12 09:36:18 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:29 2011 -0400" }, "message": "mmc: sdhci: work around broken dma boundary behavior\n\nSome SD host controllers (noticed on an integrated JMicron SD reader on an\nHP Pavilion dv5-1250eo laptop) don\u0027t update the dma address register before\nsignaling a dma interrupt due to a dma boundary. Update the register\nmanually to the next boundary (by default 512KiB), at which the transfer\nstopped.\n\nAs long as each transfer is at most 512KiB in size (guaranteed by a BUG_ON\nin sdhci_prepare_data()) and the boundary is kept at the default value,\nthis fix is needed at most once per transfer. Smaller boundaries are taken\ncare of by counting the transferred bytes.\n\nFixes: https://bugzilla.kernel.org/show_bug.cgi?id\u003d28462\n\nSigned-off-by: Mikko Vinni \u003cmmvinni@yahoo.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "6f60c22252af05df94352240f30f9fc84090d88d", "tree": "f7c4f8c9cc726491c8f515b0f87a6905795ae819", "parents": [ "371a689f64b0da140c3bcd3f55305ffa1c3a58ef" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 19:11:04 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:25 2011 -0400" }, "message": "mmc: quirks: Support for block quirks.\n\nBlock quirks implemented using core/quirks.c support.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "371a689f64b0da140c3bcd3f55305ffa1c3a58ef", "tree": "c0dff82d668378d395cb22ce33cd93e6dafef9eb", "parents": [ "1a258db6f396e26c2c00b19c0107a891895d4584" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 18:10:25 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:21 2011 -0400" }, "message": "mmc: MMC boot partitions support.\n\nAllows device MMC boot partitions to be accessed. MMC partitions are\ntreated effectively as separate block devices on the same MMC card.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "1a258db6f396e26c2c00b19c0107a891895d4584", "tree": "b9012952b952612a929994f87f3488ce88bcb46f", "parents": [ "d3a8d95dcbb726b9cf0bbc166b2473bdd236c88c" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 18:10:24 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:16 2011 -0400" }, "message": "mmc: card: block.c cleanup for host claim/release.\n\nMove host claim/release into mmc_blk_issue_rq.\n\n(This is helpful so that selecting partition only has to happen\nin one place for these commands.)\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "d3a8d95dcbb726b9cf0bbc166b2473bdd236c88c", "tree": "10c6e435f28f6d61562ce54291063913e59dc0b3", "parents": [ "a3c7778f8153b9e4eceea6738973280b9e63c618" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 16:13:43 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:13 2011 -0400" }, "message": "mmc: core: Allow setting CMD timeout for CMD6 (SWITCH).\n\nCMD6 is an R1B-type command, where DAT is used as busy. Depending\non register written using CMD6, timeout value can be different\nas per spec.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "a3c7778f8153b9e4eceea6738973280b9e63c618", "tree": "73d81d32c5c4b06d76ae9f81b444cd6b08b7325e", "parents": [ "eaa02f751ff4f8abfc2e55a15c20a5a274244418" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 16:13:42 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:09 2011 -0400" }, "message": "mmc: sdhci: R1B command handling + MMC_CAP_ERASE.\n\nERASE command needs R1B response, so fix R1B-type command\nhandling for SDHCI controller. For non-DAT commands using a busy\nresponse, the cmd-\u003ecmd_timeout_ms (in ms) field is used for timeout\ncalculations.\n\nBased on patch by Chuanxiao Dong \u003cchuanxiao.dong@intel.com\u003e\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "eaa02f751ff4f8abfc2e55a15c20a5a274244418", "tree": "c521e84176e140acdc03926683b525250ceee777", "parents": [ "853c6cac0dc0d9d330deb5b48c19eebafaed1841" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 16:13:41 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:01:05 2011 -0400" }, "message": "mmc: core: Rename erase_timeout to cmd_timeout_ms.\n\nRenames erase_timeout to cmd_timeout_ms inside struct mmc_command.\nFirst step to making host honor timeouts for non-data-transfer\ncommands. Cleans up erase timeout code.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "32780cd1350e651e68bdf33b7f5b009d21d5b794", "tree": "e8e86350a3eca20cca098b488e596d2b76ecaea8", "parents": [ "f317dfeb86c83d03304a74ce5426a69422b79547" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Mon Apr 11 17:02:15 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:00:54 2011 -0400" }, "message": "mmc: quirks: Extends card quirks with MMC/SD quirks matching the CID.\n\nThe current mechanism is SDIO-only. This allows us to create\nfunction-specific quirks, without creating messy Kconfig dependencies,\nor polluting core/ with function-specific code.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f317dfeb86c83d03304a74ce5426a69422b79547", "tree": "c5f313b1afcc4318c7d86dd243fb8867b01ffb05", "parents": [ "b177bc9188c04e140e5d8928e88623a92ba751bf" ], "author": { "name": "Wolfram Sang", "email": "w.sang@pengutronix.de", "time": "Mon Apr 11 06:11:29 2011 +0200" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:00:50 2011 -0400" }, "message": "mmc: core: fix memory leak in mmc_add_host\n\nled_trigger_register_simple() allocates memory which must not be leaked\nin the error-path of mmc_add_host. Move it past the only error-check in\nthe function.\n\nSigned-off-by: Wolfram Sang \u003cw.sang@pengutronix.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "b177bc9188c04e140e5d8928e88623a92ba751bf", "tree": "20dbad913f51c246c38165d6fd9cb128fb365ab5", "parents": [ "14e7dc76f24577694f1c121e6ce1fd2f3d46c726" ], "author": { "name": "Ameya Palande", "email": "2ameya@gmail.com", "time": "Tue Apr 05 21:13:13 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:00:41 2011 -0400" }, "message": "mmc: sdhci-pci: Fix checkpatch.pl errors\n\nThis patch fixes 21 errors and 6 warnings reported by checkpatch.pl.\n\nSigned-off-by: Ameya Palande \u003c2ameya@gmail.com\u003e\nReviewed-by: Wolfram Sang \u003cw.sang@pengutronix.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "14e7dc76f24577694f1c121e6ce1fd2f3d46c726", "tree": "b16d3dbc8f7d0858b9df6490863892f70dd21dcb", "parents": [ "2059a02dcb84236f9db9197fa9b00418d7b8465b" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Apr 05 18:02:26 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:00:05 2011 -0400" }, "message": "mmc: quirks: wl1271 is MMC_QUIRK_DISABLE_CD\n\nThe wl12xx device supports disconnecting the pull-up resistor on\nCD/DAT[3] (pin 1) of the card.\n\nTell SDIO core to disconnect that resistor during card init,\nsince we don\u0027t need it at that point (and anyway all\nhosts shall provide pull-up resistors on all data lines DAT[3:0]\nas described in section 6 of the SD physical specification).\n\nAs a result, this may save some power, but it\u0027s also generally healthy\nsince it prevents both ends from pulling up that pin, which\nresults in undesirable asymmetric physical bus.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "2059a02dcb84236f9db9197fa9b00418d7b8465b", "tree": "d51b9fe1b70a7e3e7d5c24912637d22a04bf35b5", "parents": [ "0b4043d70af5871908864fa725821bc8e667542d" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Apr 05 18:02:25 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 21:00:01 2011 -0400" }, "message": "mmc: add MMC_QUIRK_DISABLE_CD\n\n006ebd5d introduced sdio_disable_cd(), which disconnects the pull-up\nresistor on CD/DAT[3] (pin 1) of the card.\n\nMake it possible to start using sdio_disable_cd() by introducing\nMMC_QUIRK_DISABLE_CD.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "0b4043d70af5871908864fa725821bc8e667542d", "tree": "665b1a5337f4cc137d5b57a0e2c8bb7323cc522f", "parents": [ "eab4068795d670b065164096805cbf15a19e9690" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Apr 05 17:50:15 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:56 2011 -0400" }, "message": "mmc: quirks: wl1271 is MMC_QUIRK_NONSTD_FUNC_IF\n\nTell SDIO core to ignore the standard SDIO function interface\ncodes indicated by the wl1271. This is required because the\nwl1271 erroneously indicates its first function as a standard\nBluetooth SDIO interface, and that drives btsdio mad.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "eab4068795d670b065164096805cbf15a19e9690", "tree": "5fb62e0a18163fe2c46044cb23c276a9dad64477", "parents": [ "6b93d01fe5971951911a070f51f412d50e9536dc" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Apr 05 17:50:14 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:52 2011 -0400" }, "message": "mmc: add MMC_QUIRK_NONSTD_FUNC_IF\n\nIntroduce MMC_QUIRK_NONSTD_FUNC_IF to ignore the \"SDIO Standard Function\ninterface code\" as indicated by the card\u0027s FBR, and instead treat all\nfunctions as non-standard interfaces.\n\nThis is required to prevent standard drivers from facing\nerrors when trying to communicate with SDIO cards that erroneously\nindicate standard function interface codes.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "6b93d01fe5971951911a070f51f412d50e9536dc", "tree": "0e0221f3af9f954bd60e469f94810730899ee374", "parents": [ "a5e9425d2010978c5f85986cc70a9fa0c0d5b912" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Apr 05 17:43:21 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:47 2011 -0400" }, "message": "mmc: do not switch to 1-bit mode if not required\n\n6b5eda36 followed SDIO spec part E1 section 8, which states that\nin case SDIO interrupts are being used to wake up a suspended host,\nthen it is required to switch to 1-bit mode before stopping the clock.\n\nBefore switching to 1-bit mode (or back to 4-bit mode on resume),\nmake sure that SDIO interrupts are really being used to wake the host.\n\nThis is helpful for devices which have an external irq line (e.g.\nwl1271), and do not use SDIO interrupts to wake up the host.\n\nIn this case, switching to 1-bit mode (and back to 4-bit mode on resume)\nis not necessary.\n\nReported-by: Eliad Peller \u003celiad@wizery.com\u003e\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "a5e9425d2010978c5f85986cc70a9fa0c0d5b912", "tree": "2d58d5b79f3e0b2fe30edbb5fc1b6808b7576d81", "parents": [ "f4c5522b0a8827f39f83f928961d87e081bfe71c" ], "author": { "name": "Ohad Ben-Cohen", "email": "ohad@wizery.com", "time": "Tue Apr 05 17:43:20 2011 +0300" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:43 2011 -0400" }, "message": "mmc: mmc_card_keep_power cleanups\n\nmmc_card_is_powered_resumed is a mouthful; instead, simply use\nmmc_card_keep_power, which also better explains the purpose of\nthe macro.\n\nEmploy mmc_card_keep_power() where possible.\n\nSigned-off-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f4c5522b0a8827f39f83f928961d87e081bfe71c", "tree": "3c2126f0adb2a3444b2fd152cc1a880c192c9d77", "parents": [ "766a6bf6e987ff5f5085c614b5a62a55006b6a7e" ], "author": { "name": "Andrei Warkentin", "email": "andreiw@motorola.com", "time": "Thu Mar 31 18:40:00 2011 -0500" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:38 2011 -0400" }, "message": "mmc: Reliable write support.\n\nAllows reliable writes to be used for MMC writes. Reliable writes are used\nto service write REQ_FUA/REQ_META requests. Handles both the legacy and\nthe enhanced reliable write support in MMC cards.\n\nSigned-off-by: Andrei Warkentin \u003candreiw@motorola.com\u003e\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "766a6bf6e987ff5f5085c614b5a62a55006b6a7e", "tree": "dd213ed5cbd1210e5ad029ab73a6698c7749c03a", "parents": [ "c7f409e39e65cb007304da718b0a7b25a0144a0a" ], "author": { "name": "Shawn Guo", "email": "shawn.guo@linaro.org", "time": "Thu Mar 31 09:31:19 2011 +0800" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:34 2011 -0400" }, "message": "mmc: sdhci: change CONFIG of MMC_SDHCI_TEGRA from \u0027tristate\u0027 to \u0027bool\u0027\n\nThis config option is used to decide whether tegra sdhci support\nshould be build into the sdhci-platform module. So setting it \u0027m\u0027\nis nonsense, since we can\u0027t build part of an module as a module.\nThe effect for \u0027m\u0027 will probably be the same as for \u0027n\u0027.\n\nSigned-off-by: Shawn Guo \u003cshawn.guo@linaro.org\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "c7f409e39e65cb007304da718b0a7b25a0144a0a", "tree": "f835f6e38b48e8ea5fad8c18be03071cf833c599", "parents": [ "0b38c4ebf037290eef27b31bdc37cacf804c7a48" ], "author": { "name": "Venkat Rao", "email": "vrao@broadcom.com", "time": "Fri Mar 25 20:37:47 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:30 2011 -0400" }, "message": "mmc: tegra: add pm_flags\n\nEnable fast bcm4329 WIFI suspend/resume on Tegra2 board.\n\nThis patch allows the mach-tegra support to tell the tegra MMC host\ncontroller to NOT turn off power for the MMC controller the WIFI part\nlives behind. Thus bcm4329 firmware doesn\u0027t need to be reloaded.\n\nSigned-off-by: Venkat Rao \u003cvrao@broadcom.com\u003e\nTested-by: Grant Grundler \u003cgrundler@chromium.org\u003e\nReviewed-by: Olof Johansson \u003colof@lixom.net\u003e\nAcked-by: Olof Johansson \u003colof@lixom.net\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "0b38c4ebf037290eef27b31bdc37cacf804c7a48", "tree": "97a947537da85f161b2862d2d26221402d637194", "parents": [ "41e2a4893566ced3c46af15df5b727326881e47d" ], "author": { "name": "John Ogness", "email": "john.ogness@linutronix.de", "time": "Fri Mar 25 09:47:37 2011 +0100" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:17 2011 -0400" }, "message": "mmc: remove redundant irq disabling\n\nThere is no need to disable irq\u0027s when using the sg_copy_*_buffer()\nfunctions because those functions do that already. There are also\nno races for the mm_queue struct here that would require the irq\u0027s\nto be disabled before calling sg_copy_*_buffer().\n\nSigned-off-by: John Ogness \u003cjohn.ogness@linutronix.de\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "41e2a4893566ced3c46af15df5b727326881e47d", "tree": "62263d47bf1f034857e8138095af724aa61c53bb", "parents": [ "7c21738efd0b5e8c2a9ac2440e7ffbf432d6f239" ], "author": { "name": "Philip Rakity", "email": "prakity@marvell.com", "time": "Sat Mar 19 14:10:33 2011 -0400" }, "committer": { "name": "Chris Ball", "email": "cjb@laptop.org", "time": "Tue May 24 20:59:13 2011 -0400" }, "message": "mmc: Ensure linux starts in eMMC user partition\n\nuBoot sometimes leaves eMMC pointing to the private boot partition.\nEnsure we always start looking at the user partition.\n\nSigned-off-by: Philip Rakity \u003cprakity@marvell.com\u003e\nSigned-off-by: Bruce Clemens \u003cbpclemens@marvell.com\u003e\nSigned-off-by: Mark F. Brown \u003cmarkb@marvell.com\u003e\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\n" }, { "commit": "f50d1d9e8d964fdd3b4cedfbca8843d1bc5916c1", "tree": "105b5bc4bb96b555dba90fa11dd5af66784c132f", "parents": [ "98b98d316349e9a028e632629fe813d07fa5afdd", "4ef7e71444b48cc89152cbc499ed94dde50515ee" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 24 13:28:35 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 24 13:28:35 2011 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/brodo/pcmcia-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/brodo/pcmcia-2.6:\n pcmcia: Make struct pcmcia_device_id const, sound drivers edition\n staging: pcmcia: Convert pcmcia_device_id declarations to const\n pcmcia: Convert pcmcia_device_id declarations to const\n pcmcia: Make declaration and uses of struct pcmcia_device_id const\n pcmcia/sa1100: put sa11x0_pcmcia_hw_init[] to .devinit.data\n" }, { "commit": "42cd71bf1e3a081b3150018bbf448cb6c8a844a5", "tree": "4a5d2eb0444255e4ad827a76dbd1417dd3876db6", "parents": [ "f5039935ac685b3b9b8c13fbc33cac8643dee32e", "9a55d9752d8abfc62f1ab05ccc790d22a0c8e7c0" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 15:15:27 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 15:15:27 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits)\n ARM: bcmring: convert to use sp804 clockevents\n ARM: bcmring: convert to sp804 clocksource\n ARM: 6912/1: bcmring: Add clkdev table in init_early\n clockevents: ARM sp804: obtain sp804 timer rate via clks\n clockevents: ARM sp804: allow clockevent name to be specified\n clocksource: ARM sp804: obtain sp804 timer rate via clks\n clocksource: ARM sp804: allow clocksource name to be specified\n clocksource: convert OMAP1 to 32-bit down counting clocksource\n clocksource: convert MXS timrotv2 to 32-bit down counting clocksource\n clocksource: convert SPEAr platforms 16-bit up counting clocksource\n clocksource: convert Integrator/AP 16-bit down counting clocksource\n clocksource: convert W90x900 24-bit down counting clocksource\n clocksource: convert ARM 32-bit down counting clocksources\n clocksource: convert ARM 32-bit up counting clocksources\n clocksource: add common mmio clocksource\n ARM: update sa1100 to reflect PXA updates\n ARM: omap1: convert to using readl/writel instead of volatile struct\n ARM: omap1: delete useless interrupt handler\n ARM: s5p: consolidate selection of timer register\n ARM: 6939/1: fix missing \u0027cpu_relax()\u0027 declaration\n ...\n" }, { "commit": "ec19628d72cff8f80220b7cedba089074ac6a599", "tree": "c3ec69d6648fdfd3e19563fa341d6585a3d77567", "parents": [ "4b60e5f90dec4ae251386f20464336369e962e9c", "b0ec5cf191eeca7fd885ef2860e9a586d29bff00", "603605abae9ee731bdafb2af83a487d98a568815", "8373dc38ca8d4918210710807256a313cd111f0b", "399bc4863e2a3b4b255ca22189820c81ca34f4e0", "16dc062b42459e6ddd244c2bc8255cac45db47e4", "f1f6ac111d6b1c55a604afbbff966e284b392050" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 23 19:27:40 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 23 19:27:40 2011 +0100" }, "message": "Merge branches \u0027consolidate\u0027, \u0027ep93xx\u0027, \u0027fixes\u0027, \u0027misc\u0027, \u0027mmci\u0027, \u0027remove\u0027 and \u0027spear\u0027 into for-linus\n" }, { "commit": "57d19e80f459dd845fb3cfeba8e6df8471bac142", "tree": "8254766715720228db3d50f1ef3c7fe003c06d65", "parents": [ "ee9ec4f82049c678373a611ce20ac67fe9ad836e", "e64851f5a0ad6ec991f74ebb3108c35aa0323d5f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 09:12:26 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 09:12:26 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)\n b43: fix comment typo reqest -\u003e request\n Haavard Skinnemoen has left Atmel\n cris: typo in mach-fs Makefile\n Kconfig: fix copy/paste-ism for dell-wmi-aio driver\n doc: timers-howto: fix a typo (\"unsgined\")\n perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c\n md, raid5: Fix spelling error in comment (\u0027Ofcourse\u0027 --\u003e \u0027Of course\u0027).\n treewide: fix a few typos in comments\n regulator: change debug statement be consistent with the style of the rest\n Revert \"arm: mach-u300/gpio: Fix mem_region resource size miscalculations\"\n audit: acquire creds selectively to reduce atomic op overhead\n rtlwifi: don\u0027t touch with treewide double semicolon removal\n treewide: cleanup continuations and remove logging message whitespace\n ath9k_hw: don\u0027t touch with treewide double semicolon removal\n include/linux/leds-regulator.h: fix syntax in example code\n tty: fix typo in descripton of tty_termios_encode_baud_rate\n xtensa: remove obsolete BKL kernel option from defconfig\n m68k: fix comment typo \u0027occcured\u0027\n arch:Kconfig.locks Remove unused config option.\n treewide: remove extra semicolons\n ...\n" }, { "commit": "e05503ef1186ad33dfe56794407891eb1dd93ef6", "tree": "1c90134537a697a689be0612582b13beaf3bff84", "parents": [ "9e76a7ac87c13bb7515e5d7652bbb6bda4733b6e" ], "author": { "name": "Jean Delvare", "email": "khali@linux-fr.org", "time": "Wed May 18 16:49:24 2011 +0200" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Wed May 18 23:24:50 2011 +0200" }, "message": "Haavard Skinnemoen has left Atmel\n\nHaavard\u0027s e-mail address at Atmel is no longer valid.\n\nSigned-off-by: Jean Delvare \u003ckhali@linux-fr.org\u003e\nAcked-by: Havard Skinnemoen \u003chskinnemoen@gmail.com\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "b1608d69cb804e414d0887140ba08a9398e4e638", "tree": "8999cd827e7fb4138ff83f7829d8fdcf44ee653d", "parents": [ "01294d82622d6d9d64bde8e4530c7e2c6dbb6ee6" ], "author": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed May 18 11:19:24 2011 -0600" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed May 18 12:32:23 2011 -0600" }, "message": "drivercore: revert addition of of_match to struct device\n\nCommit b826291c, \"drivercore/dt: add a match table pointer to struct\ndevice\" added an of_match pointer to struct device to cache the\nof_match_table entry discovered at driver match time. This was unsafe\nbecause matching is not an atomic operation with probing a driver. If\ntwo or more drivers are attempted to be matched to a driver at the\nsame time, then the cached matching entry pointer could get\noverwritten.\n\nThis patch reverts the of_match cache pointer and reworks all users to\ncall of_match_device() directly instead.\n\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" } ], "next": "86f315bbb2374f1f077500ad131dd9b71856e697" }