)]}' { "log": [ { "commit": "16c1020362083b320868c0deef492249089c3cd3", "tree": "ff200df3502e6010745713275d69fd0a07e399cf", "parents": [ "65e5d002b5ad220db2bf9557f53de5a98f7dab86", "bbba75606963c82febf7bd2761ea848ac5d1a1bb" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 15 12:33:40 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 15 12:33:40 2011 -0800" }, "message": "Merge branch \u0027devel-stable\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027devel-stable\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)\n ARM: pxa: fix building issue of missing physmap.h\n ARM: mmp: PXA910 drive strength FAST using wrong value\n ARM: mmp: MMP2 drive strength FAST using wrong value\n ARM: pxa: fix recursive calls in pxa_low_gpio_chip\n AT91: Support for gsia18s board\n AT91: Acme Systems FOX Board G20 board files\n AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h\n ARM: pxa: fix suspend/resume array index miscalculation\n ARM: pxa: use cpu_has_ipr() consistently in irq.c\n ARM: pxa: remove unused variable in clock-pxa3xx.c\n ARM: pxa: fix warning in zeus.c\n ARM: sa1111: fix typo in sa1111_retrigger_lowirq()\n ARM mxs: clkdev related compile fixes\n ARM i.MX mx31_3ds: Fix MC13783 regulator names\n ARM: plat-stmp3xxx: irq_data conversion.\n ARM: plat-spear: irq_data conversion.\n ARM: plat-orion: irq_data conversion.\n ARM: plat-omap: irq_data conversion.\n ARM: plat-nomadik: irq_data conversion.\n ARM: plat-mxc: irq_data conversion.\n ...\n\nFix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert\nBuytenhek\u0027s irq_data conversion clashing with some omap irq updates)\n" }, { "commit": "65e5d002b5ad220db2bf9557f53de5a98f7dab86", "tree": "93d36afd4b82a24e5b553766a574a6632fca3aff", "parents": [ "38567333a6dabd0f2b4150e9fb6dd8e3ba2985e5", "cb4d3eaebb96616085f5a46a7d7e004ddd955b09" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 15 12:29:50 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Jan 15 12:29:50 2011 -0800" }, "message": "Merge branch \u0027fixes\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027fixes\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n ARM: fix missing branch in __error_a\n ARM: fix /proc/$PID/stack on SMP\n ARM: Fix build regression on SA11x0, PXA, and H720x targets\n ARM: 6625/1: use memblock memory regions for \"System RAM\" I/O resources\n ARM: fix wrongly patched constants\n ARM: 6624/1: fix dependency for CONFIG_SMP_ON_UP\n ARM: 6623/1: Thumb-2: Fix out-of-range offset for Thumb-2 in proc-v7.S\n ARM: 6622/1: fix dma_unmap_sg() documentation\n ARM: 6621/1: bitops: remove condition code clobber for CLZ\n ARM: 6620/1: Change misleading warning when CONFIG_CMDLINE_FORCE is used\n ARM: 6619/1: nommu: avoid mapping vectors page when !CONFIG_MMU\n ARM: sched_clock: make minsec argument to clocks_calc_mult_shift() zero\n ARM: sched_clock: allow init_sched_clock() to be called early\n ARM: integrator: fix compile warning in cpu.c\n ARM: 6616/1: Fix ep93xx-fb init/exit annotations\n ARM: twd: fix display of twd frequency\n ARM: udelay: prevent math rounding resulting in short udelays\n" }, { "commit": "cb4d3eaebb96616085f5a46a7d7e004ddd955b09", "tree": "68d53e993cdc1810762f0ff91c8891dc4090f86e", "parents": [ "d5996b2ff0e26cf7ed4c103084a2d6fc569e7216" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jan 15 11:19:19 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jan 15 11:19:19 2011 +0000" }, "message": "ARM: fix missing branch in __error_a\n\nWhen DEBUG_LL is not set, we don\u0027t want __error_a re-entering\n__lookup_machine_type - we want it to go to the error function. This\nused to be the case before we reorganized the layout for hotplug cpu,\nas we used to fall through to __error. With the changed layout, we\nneed an explicit branch here instead.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d5996b2ff0e26cf7ed4c103084a2d6fc569e7216", "tree": "c4d50df299e9c0e07e8ae66406489c01f4c9d6a9", "parents": [ "671289c2872cfc050954ac1dd3131429fca30aad" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jan 15 09:27:04 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jan 15 09:27:04 2011 +0000" }, "message": "ARM: fix /proc/$PID/stack on SMP\n\nRabin Vincent reports:\n| On SMP, this BUG() in save_stack_trace_tsk() can be easily triggered\n| from user space by reading /proc/$PID/stack, where $PID is any pid but\n| the current process:\n|\n|\tif (tsk !\u003d current) {\n| #ifdef CONFIG_SMP\n|\t\t/*\n|\t\t * What guarantees do we have here that \u0027tsk\u0027\n|\t\t * is not running on another CPU?\n|\t\t */\n|\t\tBUG();\n| #else\n\nFix this by replacing the BUG() with an entry to terminate the stack\ntrace, returning an empty trace - I\u0027d rather not expose the dwarf\nunwinder to a volatile stack of a running thread.\n\nReported-by: Rabin Vincent \u003crabin@rab.in\u003e\nTested-by: Rabin Vincent \u003crabin@rab.in\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "11b9369cbb0a13cabb581aec3e6812a171cf2fd7", "tree": "92f47c2f30eb4910b2720165476e5112a8359b32", "parents": [ "30b99d07b7e08d0e6bcc2f0b924828c03e67f881" ], "author": { "name": "Dima Zavin", "email": "dima@android.com", "time": "Fri Jan 14 23:05:14 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 14 22:14:04 2011 +0000" }, "message": "ARM: 6625/1: use memblock memory regions for \"System RAM\" I/O resources\n\nDo not use memory bank info to request the \"system ram\" resources as\nthey do not track holes created by memblock_remove inside\nmachine\u0027s reserve callback. If the removed memory is passed as\nplatform_device\u0027s ioresource, then drivers that call\nrequest_mem_region would fail due to a conflict with the incorrectly\nconfigured system ram resource.\n\nInstead, iterate through the regions of memblock.memory and add\nthose as \"System RAM\" resources.\n\nSigned-off-by: Dima Zavin \u003cdima@android.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d0a21265dfb5fa8ae54e90d0fb6d1c215b10a28a", "tree": "a3bf2c96ad8e180f32a52e208667a40bb972275b", "parents": [ "ec3f64fc9c196a304c4b7db3e1ff56d640628509" ], "author": { "name": "David Rientjes", "email": "rientjes@google.com", "time": "Thu Jan 13 15:46:02 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 13 17:32:34 2011 -0800" }, "message": "mm: unify module_alloc code for vmalloc\n\nFour architectures (arm, mips, sparc, x86) use __vmalloc_area() for\nmodule_init(). Much of the code is duplicated and can be generalized in a\nglobally accessible function, __vmalloc_node_range().\n\n__vmalloc_node() now calls into __vmalloc_node_range() with a range of\n[VMALLOC_START, VMALLOC_END) for functionally equivalent behavior.\n\nEach architecture may then use __vmalloc_node_range() directly to remove\nthe duplication of code.\n\nSigned-off-by: David Rientjes \u003crientjes@google.com\u003e\nCc: Christoph Lameter \u003ccl@linux.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "4a87bac4c9b3291ade91fe4fc1382f22dd9e9e91", "tree": "c0fa9d67f09a26df6823825d4157d60a8e48e5b3", "parents": [ "f64305a68b3cc688a20970cd6317f96c5778ea6f" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Mon Nov 29 10:21:01 2010 +0100" }, "committer": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Thu Jan 13 12:26:17 2011 +0100" }, "message": "ARM: ecard: irq_data conversion.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@secretlab.ca\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f64305a68b3cc688a20970cd6317f96c5778ea6f", "tree": "5f6be13ee877f1789ae15afa8a14e1178209bcae", "parents": [ "e2a93ecc7fc469dab52323c11a2d8ceaa62aac7b" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Mon Nov 29 10:21:48 2010 +0100" }, "committer": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Thu Jan 13 12:26:17 2011 +0100" }, "message": "ARM: core irq_data conversion.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@secretlab.ca\u003e\n" }, { "commit": "22eeb8f6e0214a83ac6958a29a83572137f174bb", "tree": "60a8dc6d8550376efdeedb6ed9cec9cd5092d9a3", "parents": [ "6cde6d4217ff01422c093d3f7ff550b7a324e96e" ], "author": { "name": "Alexander Holler", "email": "holler@ahsoftware.de", "time": "Wed Jan 12 14:08:37 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 12 14:22:25 2011 +0000" }, "message": "ARM: 6620/1: Change misleading warning when CONFIG_CMDLINE_FORCE is used\n\nWhen CONFIG_CMDLINE_FORCE is used, the warning\n\n Ignoring unrecognised tag 0x54410009\n\nwas displayed. Change this to\n\n Ignoring tag cmdline (using the default kernel command line)\n\nSigned-off-by: Alexander Holler \u003choller@ahsoftware.de\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6cde6d4217ff01422c093d3f7ff550b7a324e96e", "tree": "2542d21d333bbbb1dd1deed655acabc834465c0f", "parents": [ "edc4d272551594729f63ca4cde1612608494091f" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Jan 11 14:04:36 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 17:32:24 2011 +0000" }, "message": "ARM: 6619/1: nommu: avoid mapping vectors page when !CONFIG_MMU\n\nWhen running without an MMU, we do not need to install a mapping for the\nvectors page. Attempting to do so causes a compile-time error because\ninstall_special_mapping is not defined.\n\nThis patch adds compile-time guards to the vector mapping functions\nso that we can build nommu configurations once more.\n\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "edc4d272551594729f63ca4cde1612608494091f", "tree": "e823892f052e72e1fa6ee07eae986993965cc3e8", "parents": [ "211baa7016894c02fc18693e21ca479cd08ac0c0" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 16:44:02 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 16:44:02 2011 +0000" }, "message": "ARM: sched_clock: make minsec argument to clocks_calc_mult_shift() zero\n\nThe purpose of the minsec argument is to prevent 64-bit math overflow\nwhen the number of cycles is multiplied up. However, the multipler\nis 32-bit, and in the sched_clock() case, the cycle counter is up to\n32-bit as well. So the math can never overflow.\n\nWith a value of 60, and clock rates greater than 71MHz, the calculated\nmultiplier is unnecessarily reduced in value, which reduces accuracy by\nmaybe 70ppt. It\u0027s almost not worth bothering with as the oscillator\ndriving the counter won\u0027t be any more than 1ppm - unless you\u0027re using\na rubidium lamp or caesium fountain frequency standard.\n\nSo, set the minsec argument to zero.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "211baa7016894c02fc18693e21ca479cd08ac0c0", "tree": "0fea398c6288b46542fc1640adff697f9b1e07a5", "parents": [ "1aa023b8fda8096caf41c20427a0ef396d88eb0f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 16:23:04 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 16:23:04 2011 +0000" }, "message": "ARM: sched_clock: allow init_sched_clock() to be called early\n\nsched_clock is supposed to be initialized early - in the recently added\ninit_early platform hook. However, in doing so we end up calling\nmod_timer() before the timer lists are initialized, resulting in an\noops.\n\nSplit the initialization in two - the part which the platform calls\nearly which starts things off. The addition of the timer can be\ndelayed until after we have more of the kernel initialized - when the\nnormal time sources are initialized.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6426d2c2f071e0be50a22052a47b582f2561e5e0", "tree": "8591717e1f4fb24e6236db78fb9aa029adfd1be4", "parents": [ "56949d414acd30353fdba4b64876a0a7953a7b77" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 12:11:01 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 11 12:11:01 2011 +0000" }, "message": "ARM: twd: fix display of twd frequency\n\nThe fraction of MHz was not being displayed correctly as the calculation\nwas a factor of 10 out. Fix this.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3c0cb7c31c206aaedb967e44b98442bbeb17a6c4", "tree": "3ecba45d7ffae4fba4a5aafaef4af5b0b1105bde", "parents": [ "f70f5b9dc74ca7d0a64c4ead3fb28da09dc1b234", "404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 06 16:50:35 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 06 16:50:35 2011 -0800" }, "message": "Merge branch \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (416 commits)\n ARM: DMA: add support for DMA debugging\n ARM: PL011: add DMA burst threshold support for ST variants\n ARM: PL011: Add support for transmit DMA\n ARM: PL011: Ensure IRQs are disabled in UART interrupt handler\n ARM: PL011: Separate hardware FIFO size from TTY FIFO size\n ARM: PL011: Allow better handling of vendor data\n ARM: PL011: Ensure error flags are clear at startup\n ARM: PL011: include revision number in boot-time port printk\n ARM: vexpress: add sched_clock() for Versatile Express\n ARM i.MX53: Make MX53 EVK bootable\n ARM i.MX53: Some bug fix about MX53 MSL code\n ARM: 6607/1: sa1100: Update platform device registration\n ARM: 6606/1: sa1100: Fix platform device registration\n ARM i.MX51: rename IPU irqs\n ARM i.MX51: Add ipu clock support\n ARM: imx/mx27_3ds: Add PMIC support\n ARM: DMA: Replace page_to_dma()/dma_to_page() with pfn_to_dma()/dma_to_pfn()\n mx51: fix usb clock support\n MX51: Add support for usb host 2\n arch/arm/plat-mxc/ehci.c: fix errors/typos\n ...\n" }, { "commit": "404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34", "tree": "99119edc53fdca73ed7586829b8ee736e09440b3", "parents": [ "28cdac6690cb113856293bf79b40de33dbd8f974", "1051b9f0f9eab8091fe3bf98320741adf36b4cfa" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:33:32 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:33:32 2011 +0000" }, "message": "Merge branch \u0027devel-stable\u0027 into devel\n\nConflicts:\n\tarch/arm/mach-pxa/clock.c\n\tarch/arm/mach-pxa/clock.h\n" }, { "commit": "28cdac6690cb113856293bf79b40de33dbd8f974", "tree": "64cd8ca8376ccf9a12faee3588c15a5839f9a28b", "parents": [ "4073723acb9cdcdbe4df9c0e0c376c65d1697e43", "36bb94ba36f332de767cfaa3af6a5136435a3a9c" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:33:19 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:33:19 2011 +0000" }, "message": "Merge branch \u0027pgt\u0027 (early part) into devel\n" }, { "commit": "4073723acb9cdcdbe4df9c0e0c376c65d1697e43", "tree": "f41c17eac157b1223ce104845cf9b1e5a9e6a83d", "parents": [ "58daf18cdcab550262a5f4681e1f1e073e21965a", "4ec3eb13634529c0bc7466658d84d0bbe3244aea" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:32:52 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:32:52 2011 +0000" }, "message": "Merge branch \u0027misc\u0027 into devel\n\nConflicts:\n\tarch/arm/Kconfig\n\tarch/arm/common/Makefile\n\tarch/arm/kernel/Makefile\n\tarch/arm/kernel/smp.c\n" }, { "commit": "4ec3eb13634529c0bc7466658d84d0bbe3244aea", "tree": "b491daac2ccfc7b8ca88e171a43f66888463568a", "parents": [ "24056f525051a9e186af28904b396320e18bf9a0", "15095bb0fe779c0403091bda7adce5fb3bb9ca35" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:31:35 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 06 22:32:03 2011 +0000" }, "message": "Merge branch \u0027smp\u0027 into misc\n\nConflicts:\n\tarch/arm/kernel/entry-armv.S\n\tarch/arm/mm/ioremap.c\n" }, { "commit": "58daf18cdcab550262a5f4681e1f1e073e21965a", "tree": "2096324b947761a567dd451f33664f17ee1de2cd", "parents": [ "aa312be1987d43216e72ffce42bccf6bf81f62ed", "0af85dda39d9b673aca8c0ebae004ea70f3efc93" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 05 18:09:03 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 05 18:09:03 2011 +0000" }, "message": "Merge branch \u0027clksrc\u0027 into devel\n\nConflicts:\n\tarch/arm/mach-vexpress/v2m.c\n\tarch/arm/plat-omap/counter_32k.c\n\tarch/arm/plat-versatile/Makefile\n" }, { "commit": "31edf274f9aff1ccd39934a0b2fce38f4405c656", "tree": "fdc7bc445307ccb9648ca1a71375947c8ed59722", "parents": [ "3c0eee3fe6a3a1c745379547c7e7c904aa64f6d5", "ed60453fa8f8fc3d034dfdf10371a99cc6905626", "ac61d143ffe2a6db4d4bcf47c21a5159d6a1b644", "28257f7fdee0facc3b7f934e82c2485f27120d41", "b23065313297e750edd57ab6edfd36224826724e", "50005a8deb38e5e6456ebd94e57adb321d4589de", "cf562b4a550b3cd9d602a05bc27aaaaa376947b4", "3d09fbcd26851ffb2c40cec411b8e56db02520d1", "8a9618f5dfca35edb0d7ab6374ff586e2e9e989b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 05 18:08:10 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 05 18:08:10 2011 +0000" }, "message": "Merge branches \u0027ftrace\u0027, \u0027gic\u0027, \u0027io\u0027, \u0027kexec\u0027, \u0027mod\u0027, \u0027sa11x0\u0027, \u0027sh\u0027 and \u0027versatile\u0027 into devel\n" }, { "commit": "aef1b9cef78ae65c6501850851cc3f61f9be477b", "tree": "9769972983e84620df17c13b73f70a8341c4b125", "parents": [ "20c457b8587bee4644d998331d9e13be82e05b4c", "3c0eee3fe6a3a1c745379547c7e7c904aa64f6d5" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Jan 05 14:22:08 2011 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Jan 05 14:22:10 2011 +0100" }, "message": "Merge commit \u0027v2.6.37\u0027 into perf/core\n\nMerge reason: Add the final .37 tree.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "dec12e62c03d26bbc7a142f067215a3a43cce7d0", "tree": "e83d19c45b487ad17ceb43c743aad2ed5701be8d", "parents": [ "8ff1443c5439ecee7472b80cf12ecfc337e6ee98" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 16 13:49:34 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 24 09:49:52 2010 +0000" }, "message": "ARM: provide an early platform initialization hook\n\nThis allows platforms to hook into the initialization early to setup\nthings like scheduler clocks, etc.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8ff1443c5439ecee7472b80cf12ecfc337e6ee98", "tree": "b6899444bc0b66a016d29271c5d70e8ad43db5ca", "parents": [ "cd544ce754ac2432ffcc0626ea802d2b30876b50" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 10:18:36 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 24 09:49:51 2010 +0000" }, "message": "ARM: simplify early machine init hooks\n\nRather than storing each machine init hook separately, store a\npointer to the machine description record and dereference this\ninstead. This pointer is only available while the init sections\nare present, which is not a problem as we only use it from init\ncode.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "cd544ce754ac2432ffcc0626ea802d2b30876b50", "tree": "c1c678191e34ffb3c5bae173579191992ae530aa", "parents": [ "521086412ee423fbdfc7da81f257239c43f707b4" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Wed Dec 22 13:20:08 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 24 09:47:36 2010 +0000" }, "message": "ARM: 6538/1: Subarch IRQ handler macros V3\n\nPer subarch interrupt handler macros V3.\n\nThis patch breaks out code from the irq_handler macro\ninto arch_irq_handler and arch_irq_handler_default.\n\nThe macros are put in the header file \"entry-macro-multi.S\"\n\nThe arch_irq_handler_default macro is designed to be\nused by irq_handler in entry-armv.S while arch_irq_handler\nis suitable for per-subarch use.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "521086412ee423fbdfc7da81f257239c43f707b4", "tree": "88423e6db9544002ebec1494b82a3d91bfb57363", "parents": [ "4a50bfe365a977f634311504484342fbfffe855c" ], "author": { "name": "eric miao", "email": "eric.y.miao@gmail.com", "time": "Mon Dec 13 09:42:34 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 24 09:47:34 2010 +0000" }, "message": "ARM: 6532/1: Allow machine to specify it\u0027s own IRQ handlers at run-time\n\nNormally different ARM platform has different way to decode the IRQ\nhardware status and demultiplex to the corresponding IRQ handler.\nThis is highly optimized by macro irq_handler in entry-armv.S, and\neach machine defines their own macro to decode the IRQ number.\nHowever, this prevents multiple machine classes to be built into a\nsingle kernel.\n\nBy allowing each machine to specify thier own handler, and making\nfunction pointer \u0027handle_arch_irq\u0027 to point to it at run time, this\ncan be solved. And introduce CONFIG_MULTI_IRQ_HANDLER to allow both\nsolutions to work.\n\nComparing with the highly optimized macro of irq_handler, the new\nfunction must be written with care not to lose too much performance.\nAnd the IPI stuff on SMP is expected to move to the provided arch\nIRQ handler as well.\n\nThe assembly code to invoke handle_arch_irq is optimized by Russell\nKing.\n\nSigned-off-by: Eric Miao \u003ceric.miao@canonical.com\u003e\nAcked-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d13e5edd7284bedcf5952e1b6490e39ad843cb91", "tree": "3fd22e4592bfe8ba175d231c706a9816ecaa594b", "parents": [ "875728807ff001b67a1e0535de5ad2cd3c41d47c" ], "author": { "name": "Todd Android Poynor", "email": "toddpoynor@google.com", "time": "Thu Dec 23 01:52:44 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 24 09:37:59 2010 +0000" }, "message": "ARM: 6540/1: Stop irqsoff trace on return to user\n\nIf the irqsoff tracer is in use, stop tracing the interrupt disable\ninterval when returning to userspace. Tracing userspace execution time\nas interrupts disabled time is not helpful for kernel performance\nanalysis purposes. Only do so if the irqsoff tracer is enabled, to\navoid overhead for lockdep, which doesn\u0027t care.\n\nSigned-off-by: Todd Poynor \u003ctoddpoynor@google.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "25cf0398bdf365d027e171116aa4a281e9cd3c1c", "tree": "a8be3d3d314625a376be0e62c67809dc22274dd4", "parents": [ "9326845f45650f6af9953a4b6a31e89b54fab82f", "59bdd133561a432c4655146e283caf85fa64c2fb" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 22 22:46:24 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 22 22:46:24 2010 +0000" }, "message": "Merge branch \u0027devel\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable\n" }, { "commit": "112f38a4a31668eb6a7d91d128296a26afdf7c4b", "tree": "9f5ce228978cf13c9e23a4762b062733ff0cbcd5", "parents": [ "b5776c4a6d0afc13697e8452b9ebe1cc4d961b74" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 15 19:23:07 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 22 22:44:43 2010 +0000" }, "message": "ARM: sched_clock: provide common infrastructure for sched_clock()\n\nProvide common sched_clock() infrastructure for platforms to use to\ncreate a 64-bit ns based sched_clock() implementation from a counter\nrunning at a non-variable clock rate.\n\nThis implementation is based upon maintaining an epoch for the counter\nand an epoch for the nanosecond time. When we desire a sched_clock()\ntime, we calculate the number of counter ticks since the last epoch\nupdate, convert this to nanoseconds and add to the epoch nanoseconds.\n\nWe regularly refresh these epochs within the counter wrap interval.\nWe perform a similar calculation as above, and store the new epochs.\n\nWe read and write the epochs in such a way that sched_clock() can easily\n(and locklessly) detect when an update is in progress, and repeat the\nloading of these constants when they\u0027re known not to be stable. The\none caveat is that sched_clock() is not called in the middle of an\nupdate. We achieve that by disabling IRQs.\n\nFinally, if the clock rate is known at compile time, the counter to ns\nconversion factors can be specified, allowing sched_clock() to be tightly\noptimized. We ensure that these factors are correct by providing an\ninitialization function which performs a run-time check.\n\nAcked-by: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nTested-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nTested-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nTested-by: Mikael Pettersson \u003cmikpe@it.uu.se\u003e\nTested-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\nTested-by: Olof Johansson \u003colof@lixom.net\u003e\nTested-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nReviewed-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "614dd0585f376a25c638abbed9c5fbd21d7baece", "tree": "9bd2c8bb3523632901e3ddc3f9b1eba24e7671ab", "parents": [ "26bbf0b57a0848932f725076bcb1245ca696e8d3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 21 11:41:57 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 22 11:05:33 2010 +0000" }, "message": "ARM: pgtable: collect up identity mapping functions\n\nWe have two places where we create identity mappings - one when we bring\nsecondary CPUs online, and one where we setup some mappings for soft-\nreboot. Combine these two into a single implementation. Also collect\nthe identity mapping deletion function.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "26bbf0b57a0848932f725076bcb1245ca696e8d3", "tree": "b55a13203002c0d0295ecacd1fc4883ffcc9240c", "parents": [ "d30e45eeabefadc6039d7f876a59e5f5f6cb11c6" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 21 11:30:36 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 22 11:05:33 2010 +0000" }, "message": "ARM: pgtable: remove L2 cache flushes for SMP page table bring-up\n\nThe MMU is always configured to read page tables from the L2 cache\nso there\u0027s little point flushing them out of the L2 cache back to\nRAM. Remove these flushes.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "faabfa0816916b0a7cfc93f6a9be382830658c80", "tree": "95b003cd7a92c20e4212ab7d315fc75287f91bd8", "parents": [ "03b505eae6a276b8c38b6222694afb6cea10b1cc" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 16:58:19 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 16:58:19 2010 +0000" }, "message": "ARM: SMP: ensure frame pointer is reinitialized for soft-CPU hotplug\n\nWhen we soft-CPU hotplug a CPU, we reset the stack pointer and\njump back to start_secondary(). This allows us to restart as if\nthe CPU was actually reset.\n\nHowever, we weren\u0027t resetting the frame pointer, which could cause\nproblems with backtracing. Reset the frame pointer to zero (which\nmeans no parent frame) just like the early assembly code also does.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "03b505eae6a276b8c38b6222694afb6cea10b1cc", "tree": "f1d50844aa65996fb1c5f790c027445e272d0a78", "parents": [ "10034aabca9032246762daaca3152f3e79380ea0" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 14:44:32 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:17 2010 +0000" }, "message": "ARM: SMP: split out software TLB maintainence broadcasting\n\nsmp.c is becoming too large, so split out the TLB maintainence\nbroadcasting into a separate smp_tlb.c file.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "10034aabca9032246762daaca3152f3e79380ea0", "tree": "32c0143b054ab6c5beeeb9726eaf86b87f2abd80", "parents": [ "e3d9c625f5e4158014e041f492b46e38ad10987e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 14:28:02 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:16 2010 +0000" }, "message": "ARM: localtimer: clean up local timer on hot unplug\n\nWhen a CPU is hot unplugged, the generic tick code cleans up the\nclock event device, but fails to call down to the device\u0027s set_mode\nfunction to actually shut the device down.\n\nTo work around this, we\u0027ve historically had a local_timer_stop()\ncallback out of the hotplug code. However, this adds needless\ncomplexity when we have the clock event device itself available.\n\nExplicitly call the clock event device\u0027s set_mode function with\nCLOCK_EVT_MODE_UNUSED, so that the hardware can be cleanly shutdown\nwithout any special external callbacks. When/if the generic code\nis fixed, percpu_timer_stop() can be killed off.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "58613cd1d4f8c2d5f25b6c57ad7fbed80e75a67b", "tree": "e28891865b6c3fd1dfc16b18f7af705a9689ccc3", "parents": [ "90b44199e83ec780d6def11a602d825dc68438e3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 18 12:34:39 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:14 2010 +0000" }, "message": "ARM: smp: improve CPU bringup failure diagnostics\n\nWe used to print a bland error message which gave no clue as to the\nfailure when we failed to bring up a secondary CPU. Resolve this by\nseparating the two failure cases.\n\nIf boot_secondary() fails, we print a message indicating the returned\nerror code from boot_secondary():\n\t\"CPU%u: failed to boot: %d\\n\", cpu, ret.\n\nHowever, if boot_secondary() succeeded, but the CPU did not appear to\nmark itself online within the timeout, indicate that it failed to come\nonline:\n\t\"CPU%u: failed to come online\\n\", cpu\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ed3768a8d9dc2d345d4f27eb44ee1e4825056c08", "tree": "7ca8b45e83fa1eac70b285898e41332b28fe1626", "parents": [ "86e62b93368cffca9111996e3ed9e5b7bf6f0af3" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Wed Dec 01 15:39:23 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:12 2010 +0000" }, "message": "ARM: 6516/1: Allow SMP_ON_UP to work with Thumb-2 kernels.\n\n * __fixup_smp_on_up has been modified with support for the\n THUMB2_KERNEL case. For THUMB2_KERNEL only, fixups are split\n into halfwords in case of misalignment, since we can\u0027t rely on\n unaligned accesses working before turning the MMU on.\n\n No attempt is made to optimise the aligned case, since the\n number of fixups is typically small, and it seems best to keep\n the code as simple as possible.\n\n * Add a rotate in the fixup_smp code in order to support\n CPU_BIG_ENDIAN, as suggested by Nicolas Pitre.\n\n * Add an assembly-time sanity-check to ALT_UP() to ensure that\n the content really is the right size (4 bytes).\n\n (No check is done for ALT_SMP(). Possibly, this could be fixed\n by splitting the two uses ot ALT_SMP() (ALT_SMP...SMP_UP versus\n ALT_SMP...SMP_UP_B) into two macros. In the first case,\n ALT_SMP needs to expand to \u003e\u003d 4 bytes, not \u003d\u003d 4.)\n\n * smp_mpidr.h (which implements ALT_SMP()/ALT_UP() manually due\n to macro limitations) has not been modified: the affected\n instruction (mov) has no 16-bit encoding, so the correct\n instruction size is satisfied in this case.\n\n * A \"mode\" parameter has been added to smp_dmb:\n\n smp_dmb arm @ assumes 4-byte instructions (for ARM code, e.g. kuser)\n smp_dmb @ uses W() to ensure 4-byte instructions for ALT_SMP()\n\n This avoids assembly failures due to use of W() inside smp_dmb,\n when assembling pure-ARM code in the vectors page.\n\n There might be a better way to achieve this.\n\n * Kconfig: make SMP_ON_UP depend on\n (!THUMB2_KERNEL || !BIG_ENDIAN) i.e., THUMB2_KERNEL is now\n supported, but only if !BIG_ENDIAN (The fixup code for Thumb-2\n currently assumes little-endian order.)\n\nTested using a single generic realview kernel on:\n\tARM RealView PB-A8 (CONFIG_THUMB2_KERNEL\u003d{n,y})\n\tARM RealView PBX-A9 (SMP)\n\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nAcked-by: Nicolas Pitre \u003cnicolas.pitre@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f36d340122ae8744e64af0a92a6f77b97542c0a4", "tree": "85f7d8dc6d1407ea0fd7b3673a8b9ce0ec9d7507", "parents": [ "bbc81fd4327f9ed4480b05981e38acd48b1d184a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 30 12:21:30 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:11 2010 +0000" }, "message": "ARM: CPU hotplug: ensure correct ordering of unplug\n\nDon\u0027t call idle_task_exit() with interrupts disabled, and ensure\nthat we have a memory barrier after interrupts are disabled but\nbefore signalling that this CPU has shut down.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3c030beabf937b1d3b4ecaedfd1fb2f1e2aa0c70", "tree": "3cac64838c83ecc2d0d070be268fb087dffd8d4b", "parents": [ "2c0136dba4e43b0916ccc9ecc7f11e6d6b73f046" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 30 11:07:35 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:10 2010 +0000" }, "message": "ARM: CPU hotplug: move cpu_killed completion to core code\n\nWe always need to wait for the dying CPU to reach a safe state before\ntaking it down, irrespective of the requirements of the platform.\nMove the completion code into the ARM SMP hotplug code rather than\nhaving each platform re-implement this.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2c0136dba4e43b0916ccc9ecc7f11e6d6b73f046", "tree": "11670406e209607ada215377a95ad73de4ca6e09", "parents": [ "05c74a6cbcfb416286a947668ba32f63d99fe74a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 03 15:00:49 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:09 2010 +0000" }, "message": "ARM: SMP: consolidate trace_hardirqs_off() into common SMP code\n\nAll platforms call trace_hardirqs_off() in their secondary startup code,\nso move this into the core SMP code - it doesn\u0027t need to be in the\nper-platform code.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "05c74a6cbcfb416286a947668ba32f63d99fe74a", "tree": "96f4dd3d5cbc67b14b93e9630f4f02becaa1a66a", "parents": [ "aec66ba1f75c2030cf66f5a21d1c81aa83aa5d95" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 03 11:09:48 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:09:08 2010 +0000" }, "message": "ARM: SMP: consolidate the common parts of smp_prepare_cpus()\n\nThere is a certain amount of smp_prepare_cpus() which doesn\u0027t belong\nin the platform support code - that is, code which is invariant to the\nSMP implementation. Move this code into arch/arm/kernel/smp.c, and\nadd a platform_ prefix to the original function.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "28e18293cf0f8d23a0950d7b1d2212d11af494dc", "tree": "fbd27f23bbd1b85ef7b06cf4b5f733f46a929044", "parents": [ "0eb0511d176534674600a1986c3c766756288908" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 02 09:53:54 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:08:26 2010 +0000" }, "message": "ARM: SMP: ensure smp_send_stop() waits for CPUs to stop\n\nWait for CPUs to indicate that they\u0027ve stopped, after sending the\nstop IPI, rather than blindly continuing on and hoping that they\u0027ve\nstopped in time. Print a warning if we fail to stop the other CPUs.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0eb0511d176534674600a1986c3c766756288908", "tree": "28e3625826844913f85aebe22eb1e4e79ecaa167", "parents": [ "b54992fe1b4bad7b7488d58b8696e4e8974fdab0" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 22 12:06:28 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:08:02 2010 +0000" }, "message": "ARM: SMP: use more sane register allocation for __fixup_smp_on_up\n\nUse r0,r3-r6 rather than r0,r3,r4,r6,r7, which makes it easier to\nunderstand which registers can be modified. Also document which\nregisters hold values which must be preserved.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b54992fe1b4bad7b7488d58b8696e4e8974fdab0", "tree": "42c87b7a7f04627c841467ca65cf4e90f87ce2e2", "parents": [ "4a88abd7b48e8ec8084b1252d0f5ebdab43c2508" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 14:46:46 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:08:01 2010 +0000" }, "message": "ARM: SMP: collect IPI and local timer IRQs for /proc/stat\n\nThe IPI and local timer interrupts weren\u0027t being properly accounted\nfor in /proc/stat. Collect them from the irq_stat structure, and\nreturn their sum.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4a88abd7b48e8ec8084b1252d0f5ebdab43c2508", "tree": "6f2bd56428c4a684c1bd4a06767e78128977c492", "parents": [ "f13cd4170ee789f63b3c9585c1ae34e028bd549d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 14:40:29 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:08:01 2010 +0000" }, "message": "ARM: SMP: provide individual IPI interrupt statistics\n\nThis separates out the individual IPI interrupt counts from the\ntotal IPI count, which allows better visibility of what IPIs are\nbeing used for.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ef6c84454f8567d4968c210d7d194fb711ed3739", "tree": "de7d0315aa2b9c2adaed5fd93cca1b6a74520f6b", "parents": [ "a79a9ad94acdbd0106491f5a444167636562460f" ], "author": { "name": "Haojian Zhuang", "email": "haojian.zhuang@marvell.com", "time": "Wed Nov 24 11:54:25 2010 +0800" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Mon Dec 20 23:07:36 2010 +0800" }, "message": "ARM: pxa: add iwmmx support for PJ4\n\niwmmxt is used in XScale, XScale3, Mohawk and PJ4 core. But the instructions\nof accessing CP0 and CP1 is changed in PJ4. Append more files to support\niwmmxt in PJ4 core.\n\nSigned-off-by: Zhou Zhu \u003czzhu3@marvell.com\u003e\nSigned-off-by: Haojian Zhuang \u003chaojian.zhuang@marvell.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@fluxnic.net\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "f13cd4170ee789f63b3c9585c1ae34e028bd549d", "tree": "5304bd2cec241d635a13f3d588e80bbc17997d5b", "parents": [ "cab8c6f3053c1b147bba825844c8e208f8b3b9f4" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 14:33:51 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:07:32 2010 +0000" }, "message": "ARM: fix /proc/interrupts formatting\n\nAs per x86, align the initial column according to how many IRQs we\nhave. Also, provide an english explaination for the \u0027LOC:\u0027 and\n\u0027IPI:\u0027 lines.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "cab8c6f3053c1b147bba825844c8e208f8b3b9f4", "tree": "ee11484788efc820b48f2348ec72df6e8356b7b5", "parents": [ "46c48f222f568decb881a552caa1c8f9c96c521e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 14:20:41 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:06:58 2010 +0000" }, "message": "ARM: SMP: move ipi_count into irq_stat structure\n\nMove the ipi_count into irq_stat, which allows the ipi_data structure\nto be entirely removed.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "46c48f222f568decb881a552caa1c8f9c96c521e", "tree": "d84e79cfc44af8d99eb23e2aebee376feb55ef8a", "parents": [ "ec405ea9fe5fdeb40824edba7082803b3e98f176" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 14:15:03 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:06:58 2010 +0000" }, "message": "ARM: SMP: provide accessors for irq_stat data\n\nProvide __inc_irq_stat() and __get_irq_stat() to increment and\nread the irq stat counters.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ec405ea9fe5fdeb40824edba7082803b3e98f176", "tree": "62903c7d594e682d58aef61c84f9a16c1d327d95", "parents": [ "e3fbb087650df130788d8e3ac29875ee56819249" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 13:38:06 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:06:57 2010 +0000" }, "message": "ARM: include local timer irq stats only when local timers configured\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "e3fbb087650df130788d8e3ac29875ee56819249", "tree": "4d85c79146353a51946198f1dbf26e47322bd47b", "parents": [ "0df7095205cbf6ea1cdfe6254e0d6a3b823caa3b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 14:47:19 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 20 15:06:56 2010 +0000" }, "message": "ARM: SMP: remove send_ipi_message()\n\nsend_ipi_message() does nothing except call smp_cross_call(). As\nthis is a static function, nothing external to this file calls it,\nso we can easily clean up this now unnecessary indirection.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2f841ed13b9f10037e25ddf417d01700ecd886d0", "tree": "123448d98b3be03ac90fbb6e32f224235063c8bf", "parents": [ "961ec6daa7b14f376c30d447a830fa4783a2112c", "8fbf397c3389c1dedfa9ee412715046ab28fd82d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 18 14:27:55 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 18 14:27:55 2010 +0000" }, "message": "Merge branch \u0027hw-breakpoint\u0027 of git://repo.or.cz/linux-2.6/linux-wd into devel-stable\n" }, { "commit": "1ae1b5f053cf36bd0f913e83f3b136fec8152d4d", "tree": "6cdbeadac1efdca5ec36e44e362e058da3def680", "parents": [ "c15524a40a1603dc56a8691c4f50172fb86c23d8" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 18 13:57:00 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 18 13:57:00 2010 +0000" }, "message": "ARM: smp: avoid incrementing mm_users on CPU startup\n\nWe should not be incrementing mm_users when we startup a secondary\nCPU - doing so results in mm_users incrementing by one each time we\nhotplug a CPU, which will eventually wrap, and will cause problems.\n\nOther architectures such as x86 do not increment mm_users, but only\nmm_count, so we follow that pattern.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2e80a82a49c4c7eca4e35734380f28298ba5db19", "tree": "c60fe1cc6696c893a2c6c5891981bf8e81d9ab90", "parents": [ "9f58a205c62d0dad1df38d076324a89b1a0f1d65" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Wed Nov 17 23:17:36 2010 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Dec 16 11:36:43 2010 +0100" }, "message": "perf: Dynamic pmu types\n\nExtend the perf_pmu_register() interface to allow for named and\ndynamic pmu types.\n\nBecause we need to support the existing static types we cannot use\ndynamic types for everything, hence provide a type argument.\n\nIf we want to enumerate the PMUs they need a name, provide one.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c20101117222056.259707703@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "8fbf397c3389c1dedfa9ee412715046ab28fd82d", "tree": "b363718fb46602f882cfb58d372ec6746e3f92c5", "parents": [ "4a55c18e2023096c8684fae5fa1cfa96a03172ff" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Dec 01 17:37:45 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Dec 15 12:31:03 2010 +0000" }, "message": "ARM: hw_breakpoint: do not fail initcall if monitor mode is disabled\n\nThe debug registers can only be manipulated from software if monitor\ndebug mode is enabled. On some cores, this can never be enabled (i.e.\nthe corresponding bit in the DSCR is RAZ/WI).\n\nThis patch ensures we can handle this hardware configuration and fail\ngracefully, rather than blow up the kernel during boot.\n\nReported-by: Cyril Chemparathy \u003ccyril@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "ac61d143ffe2a6db4d4bcf47c21a5159d6a1b644", "tree": "a0a5f36bc862c2163d4cc37333f46eb0257b3140", "parents": [ "7627dc802a98aebebc6a34e5b6558ea4717c968c" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 06 10:38:14 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 14 19:21:52 2010 +0000" }, "message": "ARM: GIC: move enablement of PPI interrupts to gic.c\n\nAvoid adding nasty genirq-specific code to local timers to enable PPI\ninterrupts. Instead, provide a gic function to do this.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "10a18d7dc0d9f12483c95ffc234118e9b80edfeb", "tree": "0f43620107d5231cab669bca4b3c923b721330c7", "parents": [ "f984ba4eb575e4a27ed28a76d4126d2aa9233c32", "cf7d7e5a1980d1116ee152d25dac382b112b9c17" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 07 07:49:48 2010 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 07 07:49:51 2010 +0100" }, "message": "Merge commit \u0027v2.6.37-rc5\u0027 into perf/core\n\nMerge reason: Pick up the latest -rc.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "4a55c18e2023096c8684fae5fa1cfa96a03172ff", "tree": "d97cd84ed4c91eae3876aabd919cc1ddcc7505de", "parents": [ "ce9b1b09520789223f72a9fefd5f0e329f8d89d0" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Nov 29 17:06:53 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:57 2010 +0000" }, "message": "ARM: hw_breakpoint: fix warnings generated by sparse\n\nsparse doesn\u0027t like per-cpu accesses such as:\n\nstatic DEFINE_PER_CPU(struct perf_event *, foo[MAXLEN]);\nstruct perf_event **bar \u003d __get_cpu_var(foo);\n\nand shouts quite loudly about it:\n\n| warning: incorrect type in assignment (different modifiers)\n| expected struct perf_event **slots\n| got struct perf_event *[noderef] *\u003cnoident\u003e\n\nThis patch adds casts to these sorts of assignments in hw_breakpoint.c\nin order to silence the warnings.\n\nReported-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "ce9b1b09520789223f72a9fefd5f0e329f8d89d0", "tree": "b834c7a9d7a94812e4fe1e8e3a1b0fef720b04b7", "parents": [ "3ce70b2e24cd35cc9f2df8cf5205b8ab4e6178e1" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 12:59:31 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:57 2010 +0000" }, "message": "ARM: ptrace: fix style issue with hw_breakpoint interface\n\nThis patch fixes a trivial style issue in ptrace.c.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "3ce70b2e24cd35cc9f2df8cf5205b8ab4e6178e1", "tree": "2f0939d5d8f2ac9d97932905f0b147b5a5e1891e", "parents": [ "9ebb3cbcc39d4e61ae6751167086acfb5c201e6f" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Dec 01 17:05:24 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:57 2010 +0000" }, "message": "ARM: hw_breakpoint: disallow per-cpu breakpoints without overflow handler\n\nSingle-stepping a breakpoint requires us to disable it temporarily so that\nwe don\u0027t get stuck in a recursive debug trap. With per-cpu breakpoints this\npresents a problem where an interrupt can be taken before the single-step has\ncompleted and a new task is eventually scheduled. This new task will not\nhit the breakpoint because it will have been disabled during the previous\nhandling code.\n\nThis patch disallows per-cpu breakpoints on ARM when an overflow handler\nis not present. A similar effect can be created by placing breakpoints on\na shell and then running applications there.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "9ebb3cbcc39d4e61ae6751167086acfb5c201e6f", "tree": "4e88970d75cb2e7b3a5a2f1b50c58ab358d30339", "parents": [ "93a04a3416da12647c47840ebe2bb812fcb801d0" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Dec 01 14:12:13 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:57 2010 +0000" }, "message": "ARM: hw_breakpoint: unify single-stepping code for watchpoints and breakpoints\n\nThe single-stepping code is currently different depending on whether\nwe are stepping over a breakpoint or a watchpoint. There is no good\nreason for this, so let\u0027s sort it out.\n\nThis patch adds functions for enabling/disabling single-step for\na particular hw_breakpoint and integrates this with the exception\nhandling code.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "93a04a3416da12647c47840ebe2bb812fcb801d0", "tree": "bee210af11e5a3c4d7ff33f50916819b2190ea81", "parents": [ "0017ff42ac37ff6aeb87d0b006c5d32b9a39f5fc" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Nov 29 16:56:01 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:57 2010 +0000" }, "message": "ARM: hw_breakpoint: do not allocate new breakpoints with preemption disabled\n\nThe watchpoint single-stepping code calls register_user_hw_breakpoint to\nregister a mismatch breakpoint for stepping over the watchpoint. This is\nperformed with preemption disabled, which is unsafe as we may end up scheduling\nwhilst in_atomic(). Furthermore, using the perf API is rather overkill since\nwe are already in the hw-breakpoint backend and only require access to reserved\nbreakpoints anyway.\n\nThis patch reworks the watchpoint stepping code so that we don\u0027t require\nanother perf_event for the mismatch breakpoint. Instead, we hold a separate\narch_hw_breakpoint_ctrl struct inside the watchpoint which is used exclusively\nfor stepping. We can check whether or not stepping is enabled when installing\nor uninstalling the watchpoint and operate on the breakpoint accordingly.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "0017ff42ac37ff6aeb87d0b006c5d32b9a39f5fc", "tree": "ee68bfe2ece2e7223e0802431a1cddd54157d4a2", "parents": [ "7e20269647169e7ea08a62bdc4979a3ba32e615c" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sun Nov 28 15:09:36 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:56 2010 +0000" }, "message": "ARM: hw_breakpoint: don\u0027t advertise reserved breakpoints\n\nTo permit handling of watchpoint exceptions without signalling a\ndebugger, it is necessary to reserve breakpoint registers for in-kernel\nuse only.\n\nThis patch ensures that we record and subtract the number of reserved\nbreakpoints from the number of usable breakpoint registers that we\nadvertise to userspace via the ptrace API.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "7e20269647169e7ea08a62bdc4979a3ba32e615c", "tree": "b66a6c5e893a34ee9659403f66f44841dfb34232", "parents": [ "6ee33c2712fcdff2568d9bbadb25c8e5a7c36212" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sun Nov 28 14:57:24 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:56 2010 +0000" }, "message": "ARM: hw_breakpoint: disable preemption during debug exception handling\n\nOn ARM, debug exceptions occur in the form of data or prefetch aborts.\nOne difference is that debug exceptions require access to per-cpu banked\nregisters and data structures which are not saved in the low-level exception\ncode. For kernels built with CONFIG_PREEMPT, there is an unlikely scenario\nthat the debug handler ends up running on a different CPU from the one\nthat originally signalled the event, resulting in random data being read\nfrom the wrong registers.\n\nThis patch adds a debug_entry macro to the low-level exception handling\ncode which checks whether the taken exception is a debug exception. If\nit is, the preempt count for the faulting process is incremented. After\nthe debug handler has finished, the count is decremented.\n\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "6ee33c2712fcdff2568d9bbadb25c8e5a7c36212", "tree": "94c2510ccdd1cb2843897422746b67adf6ba1cd5", "parents": [ "7d99331e4793b52d488e911876ef11d843c6c8c9" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 12:01:54 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:56 2010 +0000" }, "message": "ARM: hw_breakpoint: correct and simplify alignment fixup code\n\nThe current hw_breakpoint code tries to fix up the alignment of\nbreakpoints so that we can make use of sparse byte-address-select\nbits in the control register and give the illusion that we can\nset breakpoints on unaligned addresses.\n\nAlthough this works on v6 cores, v7 forbids this behaviour, instead\nrequiring breakpoints to be set on aligned addresses and have contiguous\nbyte-address-select ranges depending on the instruction set in use.\nFor ARM the only supported size is 4 bytes, whilst Thumb-2 also permits\n2 byte breakpoints (watchpoints can be of 1, 2, 4 or 8 bytes long).\n\nThis patch simplifies the alignment fixup code so that we require\naddresses to be aligned to the size of the corresponding breakpoint.\nThis allows us to handle the common case of breaking on a half-word\naligned Thumb-2 instruction and also allows us to set byte watchpoints\non arbitrary addresses.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "7d99331e4793b52d488e911876ef11d843c6c8c9", "tree": "0b9d7e659ed21a56c166303772043afcdf9da61a", "parents": [ "ac88e07122fc0eb5cbad403be97ef02c317a06b7" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Nov 24 17:45:49 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:56 2010 +0000" }, "message": "ARM: hw_breakpoint: reset control registers in hotplug path\n\nThe ARMv7 debug architecture doesn\u0027t make any guarantees about the\ncontents of debug control registers following a debug logic reset.\n\nThis patch ensures that we reset the control registers when a cpu\ncomes ONLINE (for example, with hotplug) so that when we enable\nmonitor mode while inserting a breakpoint we won\u0027t exhibit random\nbehaviour.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "ac88e07122fc0eb5cbad403be97ef02c317a06b7", "tree": "0cddfd29474fc4ff5a1be95d2273d3a1e626055f", "parents": [ "e8a7e48bb248a1196484d3f8afa53bded2b24e71" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Nov 24 16:51:17 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Mon Dec 06 11:55:56 2010 +0000" }, "message": "ARM: hw_breakpoint: ensure OS lock is clear before writing to debug registers\n\nARMv7 architects a system for saving and restoring the debug registers\nacross low-power modes. At the heart of this system is a lock register\nwhich, when set, forbids writes to the debug registers. While locked,\nwrites to debug registers via the co-processor interface will result\nin undefined instruction traps. Linux currently doesn\u0027t make use of\nthis feature because we update the debug registers on context switch\nanyway, however the status of the lock is IMPLEMENTATION DEFINED on\nreset.\n\nThis patch ensures that the lock is cleared during boot so that we\ncan write to the debug registers safely.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "0385ebc0c9b16fc2d8262c082843165313f7b1e4", "tree": "c7179a16d3314438e81aac129b98b95a7a6c254e", "parents": [ "daf8741675562197d4fb4c4e9d773f53494203a5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 04 17:45:55 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 05 08:39:37 2010 +0000" }, "message": "ARM: move high-usage mostly read variables in setup.c to __read_mostly\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "daf8741675562197d4fb4c4e9d773f53494203a5", "tree": "a21505624d4c7963ae70e46f25b13f449c22cc18", "parents": [ "0b05da7200dd56a5364c4d9cf5441715c1d706ed" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 04 17:08:32 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 05 08:39:36 2010 +0000" }, "message": "ARM: implement support for read-mostly sections\n\nAs our SMP implementation uses MESI protocols. Grouping together data\nwhich is mostly only read together means that we avoid unnecessary\ncache line bouncing when this code shares a cache line with other data.\n\nIn other words, cache lines associated with read-mostly data are\nexpected to spend most of their time in shared state.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "961ec6daa7b14f376c30d447a830fa4783a2112c", "tree": "fd4952bd65fa9e991de7687eaef4b2e5af7a0e70", "parents": [ "4d6b7a779be34e1df296abc1dc555134a8cf34af" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Dec 02 18:01:49 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 04 11:18:08 2010 +0000" }, "message": "ARM: 6521/1: perf: use raw_spinlock_t for pmu_lock\n\nFor kernels built with PREEMPT_RT, critical sections protected\nby standard spinlocks are preemptible. This is not acceptable\non perf as (a) we may be scheduled onto a different CPU whilst\nreading/writing banked PMU registers and (b) the latency when\nreading the PMU registers becomes unpredictable.\n\nThis patch upgrades the pmu_lock spinlock to a raw_spinlock\ninstead.\n\nReported-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4d6b7a779be34e1df296abc1dc555134a8cf34af", "tree": "928b2459936859a87aaa2af46d521059cffca570", "parents": [ "83cf1eecfe9afee99d6b86f963187acd414c019d" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Nov 30 18:15:53 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 04 11:17:44 2010 +0000" }, "message": "ARM: 6512/1: perf: fix warnings generated by sparse\n\nRussell reported a number of warnings coming from sparse when\nchecking the ARM perf_event.c files:\n\n| perf_event.c seems to also have problems too:\n|\n| CHECK arch/arm/kernel/perf_event.c\n| arch/arm/kernel/perf_event.c:37:1: warning: symbol \u0027pmu_lock\u0027 was not declared. Should it be static?\n| arch/arm/kernel/perf_event.c:70:1: warning: symbol \u0027cpu_hw_events\u0027 was not declared. Should it be static?\n| arch/arm/kernel/perf_event.c:1006:1: warning: symbol \u0027armv6pmu_enable_event\u0027 was not declared. Should it be static?\n| arch/arm/kernel/perf_event.c:1113:1: warning: symbol \u0027armv6pmu_stop\u0027 was not declared. Should it be static?\n| arch/arm/kernel/perf_event.c:1956:6: warning: symbol \u0027armv7pmu_enable_event\u0027 was not declared. Should it be static?\n| arch/arm/kernel/perf_event.c:3072:14: warning: incorrect type in argument 1 (different address spaces)\n| arch/arm/kernel/perf_event.c:3072:14: expected void const volatile [noderef] \u003casn:1\u003e*\u003cnoident\u003e\n| arch/arm/kernel/perf_event.c:3072:14: got struct frame_tail *tail\n| arch/arm/kernel/perf_event.c:3074:49: warning: incorrect type in argument 2 (different address spaces)\n| arch/arm/kernel/perf_event.c:3074:49: expected void const [noderef] \u003casn:1\u003e*from\n| arch/arm/kernel/perf_event.c:3074:49: got struct frame_tail *tail\n\nThis patch resolves these issues so we can live in silence\nagain.\n\nReported-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b23065313297e750edd57ab6edfd36224826724e", "tree": "93b2935d8d94bc702e35e2b99047a7d0dc931e8b", "parents": [ "cd849ae9cd291117c0f7e0e8d531ab62a906e308" ], "author": { "name": "Per Fransson", "email": "per.xx.fransson@stericsson.com", "time": "Fri Dec 03 10:53:38 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 04 11:02:04 2010 +0000" }, "message": "ARM: 6522/1: kexec: Add call to non-crashing cores through IPI\n\nWhen kexec is used to start a crash kernel the other cores\nare notified. These non-crashing cores will save their state\nin the crash notes and then do nothing.\n\nSigned-off-by: Per Fransson \u003cper.xx.fransson@stericsson.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "55afd264cdd5d5848753e90884ed596e11bce0ff", "tree": "b1c55d9f8b51b5f93bd89ea2e523da7230a47fd6", "parents": [ "ed7c84d54837b182c5f56f821ef213c8ca817a91" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Wed Dec 01 18:12:43 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 04 11:01:12 2010 +0000" }, "message": "ARM: 6519/1: kuser: Fix incorrect cmpxchg syscall in kuser helpers\n\nThe existing code invokes the syscall with rubbish in r7,\ndue to what looks like an incorrect literal load idiom.\n\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0df7095205cbf6ea1cdfe6254e0d6a3b823caa3b", "tree": "e7938838aa7ca32588d5d77fdb72f01e5c14ae9a", "parents": [ "24480d980e9063b3ebd0dfdf2f396c305956c356" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 02 19:16:56 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 03 08:26:31 2010 +0000" }, "message": "ARM: SMP: remove IRQ-disabling for smp_cross_call()\n\nAs we\u0027ve now removed the spinlock and bitmask, we have nothing left\nwhich requires interrupts to be disabled when sending an IPI. All\ncurrent IPI-sending implementations use the GIC, which also does not\nrequire interrupts disabled when calling gic_raise_softirq().\n\nRemove the now unnecessary IRQ disable.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "24480d980e9063b3ebd0dfdf2f396c305956c356", "tree": "0be240f0f376c5bfe38700929adab78956edef06", "parents": [ "ad3b6993b9c5482e8a2ec5aed181538c921fdcbd" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 09:54:18 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 03 08:26:30 2010 +0000" }, "message": "ARM: SMP: avoid using bitmasks and locks for IPIs, use hardware instead\n\nAvoid using bitmasks and locks in the percpu area for IPIs, and instead\nuse individual software generated interrupts to identify the reason for\nthe IPI. This avoids the problems of having spinlocks in the percpu\narea.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ad3b6993b9c5482e8a2ec5aed181538c921fdcbd", "tree": "ec14d13777bc9b7d495929d74a83c36687ec4eab", "parents": [ "d92e04713c6323e09a0d0fdfa0d7cbcedb175e49" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 15 09:42:08 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 03 08:26:30 2010 +0000" }, "message": "ARM: SMP: pass an ipi number to smp_cross_call()\n\nThis allows us to use smp_cross_call() to trigger a number of different\nsoftware generated interrupts, rather than combining them all on one\nSGI. Recover the SGI number via do_IPI.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "50005a8deb38e5e6456ebd94e57adb321d4589de", "tree": "22a45e6e598848aeb1d930bfb0bc13bd974bf85c", "parents": [ "8931360eb9c6ec8bd30efef579cef81917a2fcf3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 12 13:04:16 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 01 10:23:05 2010 +0000" }, "message": "ARM: module: ignore unwind for sections not marked SHF_ALLOC\n\nIf a section is not marked with SHF_ALLOC, it will be discarded\nby the module code. Therefore, it is not correct to register\nthe unwind tables.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "8931360eb9c6ec8bd30efef579cef81917a2fcf3", "tree": "6179950607d502290a4bd69b520f6feb875c7b5b", "parents": [ "f6614b7bb405a9b35dd28baea989a749492c46b2" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 12 13:02:46 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 01 10:23:04 2010 +0000" }, "message": "ARM: module: clean up handling of ELF unwind tables\n\nThere\u0027s no need to keep pointers to the ELF sections available while\nthe module is loaded - we only need the section pointers while we\u0027re\nfinding and registering the unwind tables, which can all be done during\nthe finalize stage of loading.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a75e5248c51af1eaeed936be6bd3497b93f09685", "tree": "e46a3ea86126f77fb3c6539514290dcf874fffd2", "parents": [ "26e5ca93dda9425f8ff78ccb2f9b193328087e45" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Mon Nov 29 19:43:28 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 30 13:44:26 2010 +0000" }, "message": "ARM: 6504/1: Thumb-2: Fix long-distance conditional branches in head.S for Thumb-2.\n\nThe 32-bit conditional branches in Thumb-2 have a shorter range\n(+/-512K) than their ARM counterparts (+/-32MB). The linker does\nnot currently generate trampolines to extend the range of these\nThumb-2 conditional branches, resulting in link errors when vmlinux\nis sufficiently large, e.g.:\n\nhead.o:(.text+0x464): relocation truncated to fit: R_ARM_THM_JUMP19\n\nThis patch forces the longer-range, unconditional branch encoding\nby use of an explicit IT instruction. The resulting branches are\ntriggered on the same conditions as before.\n\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4f79a5dd7c3e316e2230dc0ee665c40a39023a81", "tree": "38ba4294db39a53c40dda2540392eabaf98ae23e", "parents": [ "077248fcce5edabb1b77ba3269e6c72341769d94" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Mon Nov 29 19:43:24 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 30 13:44:24 2010 +0000" }, "message": "ARM: 6500/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in kernel/head.S\n\nDirectives such as .long and .word do not magically cause the\nassembler location counter to become aligned in gas. As a result,\nusing these directives in code sections can result in misaligned\ndata words when building a Thumb-2 kernel (CONFIG_THUMB2_KERNEL).\n\nThis is a Bad Thing, since the ABI permits the compiler to assume\nthat fundamental types of word size or above are word- aligned when\naccessing them from C. If the data is not really word-aligned,\nthis can cause impaired performance and stray alignment faults in\nsome circumstances.\n\nIn general, the following rules should be applied when using data\nword declaration directives inside code sections:\n\n * .quad and .double:\n .align 3\n\n * .long, .word, .single, .float:\n .align (or .align 2)\n\n * .short:\n No explicit alignment required, since Thumb-2\n instructions are always 2 or 4 bytes in size.\n immediately after an instruction.\n\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bc8b57f08c53344d13e3b5e644c56c0355899b47", "tree": "5474a82e8341eb06ceac9bba0eeb9a1415130d20", "parents": [ "e6afec9b6808eff6dc392ac07c1552e87aebcdf7" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Mon Nov 29 19:43:21 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 30 13:44:23 2010 +0000" }, "message": "ARM: 6497/1: kexec: Correct data alignment for CONFIG_THUMB2_KERNEL\n\nDirectives such as .long and .word do not magically cause the\nassembler location counter to become aligned in gas. As a result,\nusing these directives in code sections can result in misaligned\ndata words when building a Thumb-2 kernel (CONFIG_THUMB2_KERNEL).\n\nThis is a Bad Thing, since the ABI permits the compiler to assume\nthat fundamental types of word size or above are word- aligned when\naccessing them from C. If the data is not really word-aligned,\nthis can cause impaired performance and stray alignment faults in\nsome circumstances.\n\nIn general, the following rules should be applied when using data\nword declaration directives inside code sections:\n\n * .quad and .double:\n .align 3\n\n * .long, .word, .single, .float:\n .align (or .align 2)\n\n * .short:\n No explicit alignment required, since Thumb-2\n instructions are always 2 or 4 bytes in size.\n immediately after an instruction.\n\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "69529c0eb76469168f1dd5851f363dbab17ce8fd", "tree": "c37e90dc48384e372536e72a4101c768a5ede014", "parents": [ "b510b049b549500816280f7ceaa087cfefdec581" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 16 00:19:55 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 26 20:45:45 2010 +0000" }, "message": "ARM: pgtable: directly pass pgd/pmd/pte to their error functions\n\nRather than passing the pte value to __pte_error, pass the raw pte_t\ncookie instead. Do the same for pmd and pgd functions.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "004417a6d468e24399e383645c068b498eed84ad", "tree": "ce3f4ea25186080faec7a7be6648b177e526c436", "parents": [ "5ef428c4b5950dddce7311e84321abb3aff7ebb0" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Thu Nov 25 18:38:29 2010 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Nov 26 15:14:56 2010 +0100" }, "message": "perf, arch: Cleanup perf-pmu init vs lockup-detector\n\nThe perf hardware pmu got initialized at various points in the boot,\nsome before early_initcall() some after (notably arch_initcall).\n\nThe problem is that the NMI lockup detector is ran from early_initcall()\nand expects the hardware pmu to be present.\n\nSanitize this by moving all architecture hardware pmu implementations to\ninitialize at early_initcall() and move the lockup detector to an explicit\ninitcall right after that.\n\nCc: paulus \u003cpaulus@samba.org\u003e\nCc: davem \u003cdavem@davemloft.net\u003e\nCc: Michael Cree \u003cmcree@orcon.net.nz\u003e\nCc: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1290707759.2145.119.camel@laptop\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "283a1b92e25fe3a62c766a042f96dad2eefa7d17", "tree": "3bd026babf438fd2ffc64d593825e4bc7443d20d", "parents": [ "6d803ba736abb5e122dede70a4720e4843dd6df4" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 08 10:11:19 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 26 10:51:05 2010 +0000" }, "message": "ARM: always build swp_emulate as ARMv7\n\nswp_emulate is only used on ARMv7+, and includes ARMv7+ assembly\ninstructions. Allow the assembler to accept ARMv7 instructions,\nbut leave the compiler\u0027s code generation options alone.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "83cf1eecfe9afee99d6b86f963187acd414c019d", "tree": "4381bdcc45d81c8c3713630cae9660d770885d96", "parents": [ "f1690d17d2c7afa2a2079e3c91eb2bca8c1c5ecd", "0e341af835fdf553820a1fa98341b93ab32ce466" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 26 10:28:11 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 26 10:28:11 2010 +0000" }, "message": "Merge branch \u0027ftrace\u0027 of git://github.com/rabinv/linux-2.6 into devel-stable\n" }, { "commit": "43eab87828fee65f89f4088736b2b7a187390a2f", "tree": "f43f9b595b1401e5429d630cf84367923e52e701", "parents": [ "629948310e4270e9b32c37b4a65a8cd5d6ebf38a" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sat Nov 13 19:04:32 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 16:52:08 2010 +0000" }, "message": "ARM: perf: separate PMU backends into multiple files\n\nThe ARM perf_event.c file contains all PMU backends and, as new PMUs\nare introduced, will continue to grow.\n\nThis patch follows the example of x86 and splits the PMU implementations\ninto separate files which are then #included back into the main\nfile. Compile-time guards are added to each PMU file to avoid compiling\nin code that is not relevant for the version of the architecture which\nwe are targetting.\n\nAcked-by: Jean Pihet \u003cj-pihet@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "629948310e4270e9b32c37b4a65a8cd5d6ebf38a", "tree": "f1b8d4d2239e43f52e3d48cddd86990ec1771504", "parents": [ "3cb314bae2191b432a7e898abf865db880f6d07d" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sat Nov 13 18:45:27 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 16:52:08 2010 +0000" }, "message": "ARM: perf: encode PMU name in arm_pmu structure\n\nCurrently, perf uses the PMU ID as an index into a string table\nto look up the name of a given PMU.\n\nThis patch encodes the name of a PMU directly into the arm_pmu\nstructure so that PMU-specific code can be factored out into\nseparate files.\n\nAcked-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nAcked-by: Jean Pihet \u003cj-pihet@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "3cb314bae2191b432a7e898abf865db880f6d07d", "tree": "2e815f3f7277467c837963064684c5bb1cc4abf7", "parents": [ "59a98a1e56edea4d7d9c5f4ce9d50e271a04993c" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sat Nov 13 17:37:46 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 16:52:07 2010 +0000" }, "message": "ARM: perf: add _init() functions to PMUs\n\nIn preparation for separating the PMU-specific code, this patch adds\nself-contained init functions to each PMU, therefore removing any\nPMU-specific knowledge from the PMU-agnostic init_hw_perf_events\nfunction.\n\nAcked-by: Jamie Iles \u003cjamie@jamieiles.com\u003e\nAcked-by: Jean Pihet \u003cj-pihet@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "59a98a1e56edea4d7d9c5f4ce9d50e271a04993c", "tree": "bcc50fef41e703c2d516e8474e0493098811e0ef", "parents": [ "84fee97a026ca085f08381054513f9e24689a303" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sat Nov 13 17:18:36 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 16:52:07 2010 +0000" }, "message": "ARM: perf: avoid exposing internal stop function for v6 PMU\n\nUnlike other pmu functions, armv6pmu_pmu_stop is not declared static.\nThis patch adds the missing keyword.\n\nAcked-by: Jamie Iles \u003cjamie.iles@jamieiles.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "84fee97a026ca085f08381054513f9e24689a303", "tree": "a9cb1205453b4e78741bd26db82e7e7254ebd6c3", "parents": [ "3561d43fd289f590fdae672e5eb831b8d5cf0bf6" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Sat Nov 13 17:13:56 2010 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 25 16:52:07 2010 +0000" }, "message": "ARM: perf: consolidate common PMU behaviour\n\nThe functions for mapping PMU events (perf, cache and raw) are\ncommon between all PMU types and differ only in the data on which\nthey operate.\n\nThis patch implements common definitions of these mapping functions\nand changes the arm_pmu struct to hold pointers to the data which\nthey require. This is in anticipation of separating out the PMU-specific\ncode into separate files.\n\nAcked-by: Jamie Iles \u003cjamie.iles@jamieiles.com\u003e\nAcked-by: Jean Pihet \u003cj-pihet@ti.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "dd686eb13959e49a1112fd608c124ab711050582", "tree": "58dfcbac57ace3dcb449593ca333b98c147a2410", "parents": [ "376cfa8730c08c0394d0aa1d4a80fd8c9971f323" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Sat Nov 06 23:03:21 2010 +0530" }, "committer": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Fri Nov 19 21:43:27 2010 +0530" }, "message": "ARM: ftrace: graph tracer + dynamic ftrace\n\nSupport the graph tracer + dynamic ftrace combination on ARM.\n\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\n" }, { "commit": "376cfa8730c08c0394d0aa1d4a80fd8c9971f323", "tree": "f1384eb77981241b1ab1028a50b94382c2c6e723", "parents": [ "d3b9dc9dd2b994f396741f7086ffe7a48bacb165" ], "author": { "name": "Tim Bird", "email": "tim.bird@am.sony.com", "time": "Sat Oct 09 22:24:38 2010 +0530" }, "committer": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Fri Nov 19 21:43:27 2010 +0530" }, "message": "ARM: ftrace: function graph tracer support\n\nCc: Tim Bird \u003ctim.bird@am.sony.com\u003e\n[rabin@rab.in: rebase on top of latest code,\n\t keep code in ftrace.c instead of separate file,\n\t check for ftrace_graph_entry also]\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\n" }, { "commit": "d3b9dc9dd2b994f396741f7086ffe7a48bacb165", "tree": "84491baf18d9c950277419df04e1e75a5b33ed51", "parents": [ "61b5cb1c3bff8875d2fd289c7b6ac344f95261fa" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Thu Oct 07 17:39:47 2010 +0530" }, "committer": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Fri Nov 19 21:43:26 2010 +0530" }, "message": "ARM: ftrace: use gas macros to avoid code duplication\n\nUse assembler macros to avoid copy/pasting code between the\nimplementations of the two variants of the mcount call.\n\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\n" }, { "commit": "61b5cb1c3bff8875d2fd289c7b6ac344f95261fa", "tree": "05a10694778dc70c5eb6114a1ed8403745a2cfcd", "parents": [ "ec763f0de879fa1a64b7641098271107f5e32c67" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Thu Oct 07 20:51:58 2010 +0530" }, "committer": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Fri Nov 19 21:43:26 2010 +0530" }, "message": "ARM: place C irq handlers in IRQ_ENTRY for ftrace\n\nWhen FUNCTION_GRAPH_TRACER is enabled, place do_IRQ() and friends in the\nIRQ_ENTRY section so that the irq-related features of the function graph\ntracer work.\n\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\n" }, { "commit": "69448c2a4d23e5883cbca21a173e3eb89f095746", "tree": "51db37303a64724241dcd27307e62dd66df2e63d", "parents": [ "235584b6f3b71bc1381be13a963a16f7107650cf" ], "author": { "name": "Joe Perches", "email": "joe@perches.com", "time": "Fri Nov 05 16:12:34 2010 -0700" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 07 17:58:40 2010 +0000" }, "message": "ARM: arch/arm/kernel/traps.c: Convert sprintf_symbol to %pS\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "235584b6f3b71bc1381be13a963a16f7107650cf", "tree": "476c2e226f887dc5ce661f64096723e69fd5d84d", "parents": [ "85d988fcff5a7e35df0d0fb0c581470f4b72a3de" ], "author": { "name": "Joe Perches", "email": "joe@perches.com", "time": "Sat Oct 30 14:21:24 2010 -0700" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 07 17:58:39 2010 +0000" }, "message": "ARM: arch/arm/kernel/hw_breakpoint.c: Convert WARN_ON to WARN\n\nMessage isn\u0027t printed by WARN_ON.\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c3b291d98878a5f25fee56255bcfa420e85dff59", "tree": "9e3a996e5985fb98434ea6c1103a94f305707cb3", "parents": [ "d33aadbf8e9ba0b844c2a4a03723969c913ab03a" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 04 18:23:50 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 07 16:12:38 2010 +0000" }, "message": "ARM: 6469/1: perf-events: squash compiler warning\n\narmv7_pmnc_counter_has_overflowed can return uninitialised data\nif an invalid counter is specified.\n\nThis patch fixes the code to return 0 in this case, which squashes\nthe compiler warning from GCC 4.5.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d33aadbf8e9ba0b844c2a4a03723969c913ab03a", "tree": "110b53d919f21b45cf9aca08f7e5f28f21845800", "parents": [ "261ca205817deb3d3dfd0be218cc0154be8e6472" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Nov 04 18:22:51 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 07 16:12:37 2010 +0000" }, "message": "ARM: 6468/1: backtrace: fix calculation of thread stack base\n\nWhen unwinding stack frames we must take care not to unwind\nareas of memory that lie outside of the known extent of the stack.\n\nThis patch fixes an incorrect calculation of the stack base where\nTHREAD_SIZE is added to the stack pointer after it has already\nbeen aligned to this value. Since the ALIGN macro performs this\naddition internally, we end up overshooting the base by 8k.\n\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "64d2dc384e41e2b7acead6804593ddaaf8aad8e1", "tree": "07f6e34981bd4a6642cdffb546b32a2a973aec5d", "parents": [ "247055aa21ffef1c49dd64710d5e94c2aee19b58" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@arm.com", "time": "Thu Sep 16 18:00:47 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 04 15:45:24 2010 +0000" }, "message": "ARM: 6396/1: Add SWP/SWPB emulation for ARMv7 processors\n\nThe SWP instruction was deprecated in the ARMv6 architecture,\nsuperseded by the LDREX/STREX family of instructions for\nload-linked/store-conditional operations. The ARMv7 multiprocessing\nextensions mandate that SWP/SWPB instructions are treated as undefined\nfrom reset, with the ability to enable them through the System Control\nRegister SW bit.\n\nThis patch adds the alternative solution to emulate the SWP and SWPB\ninstructions using LDREX/STREX sequences, and log statistics to\n/proc/cpu/swp_emulation. To correctly deal with copy-on-write, it also\nmodifies cpu_v7_set_pte_ext to change the mappings to priviliged RO when\nuser RO.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@arm.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Kirill A. Shutemov \u003ckirill@shutemov.name\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "247055aa21ffef1c49dd64710d5e94c2aee19b58", "tree": "e9e026b96597d080de4c16bb88c17b0495c61904", "parents": [ "ff8b16d7e15a8ba2a6086645614a483e048e3fbf" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Sep 13 16:03:21 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 04 15:44:31 2010 +0000" }, "message": "ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUs\n\nThis patch removes the domain switching functionality via the set_fs and\n__switch_to functions on cores that have a TLS register.\n\nCurrently, the ioremap and vmalloc areas share the same level 1 page\ntables and therefore have the same domain (DOMAIN_KERNEL). When the\nkernel domain is modified from Client to Manager (via the __set_fs or in\nthe __switch_to function), the XN (eXecute Never) bit is overridden and\nnewer CPUs can speculatively prefetch the ioremap\u0027ed memory.\n\nLinux performs the kernel domain switching to allow user-specific\nfunctions (copy_to/from_user, get/put_user etc.) to access kernel\nmemory. In order for these functions to work with the kernel domain set\nto Client, the patch modifies the LDRT/STRT and related instructions to\nthe LDR/STR ones.\n\nThe user pages access rights are also modified for kernel read-only\naccess rather than read/write so that the copy-on-write mechanism still\nworks. CPU_USE_DOMAINS gets disabled only if the hardware has a TLS register\n(CPU_32v6K is defined) since writing the TLS value to the high vectors page\nisn\u0027t possible.\n\nThe user addresses passed to the kernel are checked by the access_ok()\nfunction so that they do not point to the kernel space.\n\nTested-by: Anton Vorontsov \u003ccbouatmailru@gmail.com\u003e\nCc: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "706d4b12f8d7edd28d7e879a77235472da393edb", "tree": "c9bc1ce06b1154a49da1d0d907cac544a818eb0e", "parents": [ "3af54c9bd9e6f14f896aac1bb0e8405ae0bc7a44", "9bafc74163d8bccca9810159aab39be926fb877c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 08:26:25 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Oct 30 08:26:25 2010 -0700" }, "message": "Merge branch \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027devel\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)\n ARM: memblock: setup lowmem mappings using memblock\n ARM: memblock: move meminfo into find_limits directly\n ARM: memblock: convert free_highpages() to use memblock\n ARM: move freeing of highmem pages out of mem_init()\n ARM: memblock: convert memory detail printing to use memblock\n ARM: memblock: use memblock to free memory into arm_bootmem_init()\n ARM: memblock: use memblock when initializing memory allocators\n ARM: ensure membank array is always sorted\n ARM: 6466/1: implement flush_icache_all for the rest of the CPUs\n ARM: 6464/2: fix spinlock recursion in adjust_pte()\n ARM: fix memblock breakage\n ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type\n ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt\n ARM: 6449/1: Fix for compiler warning of uninitialized variable.\n ARM: 6445/1: fixup TCM memory types\n ARM: imx: Add wake functionality to GPIO\n ARM: mx5: Add gpio-keys to mx51 babbage board\n ARM: imx: Add gpio-keys to plat-mxc\n mx31_3ds: Fix spi registration\n mx31_3ds: Fix the logic for detecting the debug board\n ...\n" }, { "commit": "1e431a9d6478940c0b5fcfa1c17a336fc0683409", "tree": "ce6b454ecbad4f535b9a18ef8605f8218a409ee6", "parents": [ "75d73126fd490e26a9bdfc2338ca068e71563e0b", "ff10b88b5a05c8f1646dd15fb9f6093c1384ff6d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 11:49:38 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 29 11:49:38 2010 -0700" }, "message": "Merge branch \u0027for_linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb\n\n* \u0027for_linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb:\n kgdb,ppc: Individual register get/set for ppc\n kgdbts: prevent re-entry to kgdbts before it unregisters\n debug_core,x86,blackfin: Clean up hw debug disable API\n kdb: Fix early debugging crash regression\n kgdb,arm: fix register dump\n kdb: fix per_cpu command to remove supress mask\n kdb: Add kdb kernel module sample\n" } ], "next": "834b2964b7ab047610da038e42d61dc8dac6339a" }