)]}'
{
  "log": [
    {
      "commit": "bb6d8c8828123e01e2ae6c9d9c4870477889fd94",
      "tree": "43d7a6ec2cc15f1bf8810a65aa38d508c7fa955a",
      "parents": [
        "3095faf5295f2da9118469c925d2cfb7775ad287"
      ],
      "author": {
        "name": "Sascha Hauer",
        "email": "sascha@saschahauer.de",
        "time": "Mon Jun 19 15:27:53 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Jun 19 15:27:53 2006 +0100"
      },
      "message": "[ARM] 3567/2: arm: base support for Hilscher netX\n\nPatch from Sascha Hauer\n\nThis patch adds the base support for Hilscher\u0027s netX network\nprocessors.\n\nSigned-off-by: Robert Schwebel \u003cr.schwebel@pengutronix.de\u003e\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "78818e477bf785391b02672d053fdbb2e111fb50",
      "tree": "d1a43ddfb1b966fe981c10c874bae4faad070f29",
      "parents": [
        "a5a503038e71a6b7d4bd9e596ac13087274e60c7"
      ],
      "author": {
        "name": "Vitaly Wool",
        "email": "vwool@ru.mvista.com",
        "time": "Tue May 16 11:54:37 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Jun 18 16:16:55 2006 +0100"
      },
      "message": "[ARM] 3466/1: [2/3] Support for Philips PNX4008 platform: chip support\n\nPatch from Vitaly Wool\n\nThis patch adds basic chip support for PNX4008 ARM platform.\nIt\u0027s basically the same as the previous one, but with the rmk\u0027s\ncomments taken into account.\n\nSigned-off-by: Vitaly Wool \u003cvwool@ru.mvista.com\u003e\nSigned-off-by: Dmitry Pervushin \u003cdpervushin@gmail.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "5cedae9ca752a43cfb1074907d12c9f01fbebd45",
      "tree": "30bff4b8211984984c6614b7fc530ff916630d6b",
      "parents": [
        "29f767a254be8fd44fb5d2b5a48e9cda8399c4ea"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Wed May 31 16:14:05 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed May 31 16:27:44 2006 -0700"
      },
      "message": "[PATCH] ARM: Fix XScale PMD setting\n\nThe ARM Architecture Reference Manual lists bit 4 of the PMD as \"implementation\ndefined\" and it must be set to zero on Intel XScale CPUs or the cache does\nnot behave properly. Found by Mike Rapoport while debugging a flash issue\non the PXA255:\n\n\thttp://marc.10east.com/?l\u003dlinux-arm-kernel\u0026m\u003d114845287600782\u0026w\u003d1\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "e6ed89ac9f5da16fea5111651b6de0ff0a76a5c2",
      "tree": "99f8afada42812b3ca5e1546584dc6e915b039f6",
      "parents": [
        "9a8fca0499c611ab37b5c0d4481ca09d3f6e8101"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Tue May 30 14:36:49 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Tue May 30 20:33:20 2006 -0700"
      },
      "message": "[PATCH] ARM: explicitly disable BTB on ixp2350\n\nWe don\u0027t enable the BTB on the ixp2350 as that can cause weird\ncrashes (erratum #42.)  However, some bootloaders enable the BTB,\nwhich means that we have to disable the BTB explicitly.\n\nFound thanks to Tom Rini.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "478922c2b3c4ec8844ff2dec7eb1eba6f89a10ee",
      "tree": "827e2d2df5798a97f5aa401505dba88fee998ca3",
      "parents": [
        "1d6760a3ac6b5691e4914a3333b48fee5c2e275d"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Tue May 16 11:30:26 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue May 16 11:39:31 2006 +0100"
      },
      "message": "[ARM] 3526/1: ioremap should use vunmap instead of vfree on ARM\n\nPatch from Catalin Marinas\n\nThis patch modifies the __ioremap_pfn and __iounmap functions in\narch/arm/mm/ioremap.c to use vunmap instead of vfree.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "95f3df6bcb89d370c57b7165f55c5a409d011c8e",
      "tree": "9accc55603a6274a281fce6950fbef26f051a2c5",
      "parents": [
        "f1dc24d53e9e91cf795f05751eeb7e220c7c15e1"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Fri Apr 07 13:17:15 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Apr 07 13:23:57 2006 +0100"
      },
      "message": "[ARM] Fix SA110/SA1100 cache flushing\n\nWe had two implementations for flushing the cache, which meant StrongARM\ncaches weren\u0027t being correctly flushed.  Fix this by always using the\nv4wb_flush_kern_cache_all method, rather than duplicating it.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "74d02fb9543ec85b04319b5b50926c78e7f07f3e",
      "tree": "ce98ba7ac0634f939e29ecf50d11382ff2ebec1a",
      "parents": [
        "7d12963757b9170f162f317b7461353c5fb574e8"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Tue Apr 04 21:47:43 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Apr 07 13:22:21 2006 +0100"
      },
      "message": "[ARM] Move FLUSH_BASE macros to asm/arch/memory.h\n\nFLUSH_BASE must be visible to arch/arm/mm/init.c in order for the\nmemory region to be setup.  Move these definitions from\nasm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm\nstuff can see them.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "23759dc6430428897a36c4d493f611eca55c9481",
      "tree": "c62050927599b36ed223753c35fd737e3c0c6762",
      "parents": [
        "d3f4c571b6e596f9d39c596426269006a309d3b8"
      ],
      "author": {
        "name": "Lennert Buytenhek",
        "email": "buytenh@wantstofly.org",
        "time": "Sun Apr 02 00:07:39 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Apr 02 00:07:39 2006 +0100"
      },
      "message": "[ARM] 3439/2: xsc3: add I/O coherency support\n\nPatch from Lennert Buytenhek\n\nThis patch adds support for the I/O coherent cache available on the\nxsc3.  The approach is to provide a simple API to determine whether the\nchipset supports coherency by calling arch_is_coherent() and then\nsetting the appropriate system memory PTE and PMD bits.  In addition,\nwe call this API on dma_alloc_coherent() and dma_map_single() calls.\nA generic version exists that will compile out all the coherency-related\ncode that is not needed on the majority of ARM systems.\n\nNote that we do not check for coherency in the dma_alloc_writecombine()\nfunction as that still requires a special PTE setting.  We also don\u0027t\ntouch dma_mmap_coherent() as that is a special ARM-only API that is by\ndefinition only used on non-coherent system.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "b48340aff031db98dbd34a4bbc575eec9bb78359",
      "tree": "b69ef39c4ff0371fec067b7496134ce301f5daf0",
      "parents": [
        "d53ace70052b5c0a08a4f92993c0614f84920abf"
      ],
      "author": {
        "name": "Lennert Buytenhek",
        "email": "buytenh@wantstofly.org",
        "time": "Thu Mar 30 10:24:07 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Mar 30 10:24:07 2006 +0100"
      },
      "message": "[ARM] 3425/1: xsc3: need to include pgtable-hwdef.h\n\nPatch from Lennert Buytenhek\n\nAdapt xsc3 to the changes in 74945c8616a50074277e18641baaae7464006766\n(xsc3 was written before but merged after the latter went in.)\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "23bdf86aa06ebe71bcbf6b7d25de9958c6ab33fa",
      "tree": "56636558e8cdeee0739e7d8c82d66ffe625340b3",
      "parents": [
        "de4533a04eb4f66dbef71f59a9c118256b886823"
      ],
      "author": {
        "name": "Lennert Buytenhek",
        "email": "buytenh@wantstofly.org",
        "time": "Tue Mar 28 21:00:40 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Mar 28 21:00:40 2006 +0100"
      },
      "message": "[ARM] 3377/2: add support for intel xsc3 core\n\nPatch from Lennert Buytenhek\n\nThis patch adds support for the new XScale v3 core.  This is an\nARMv5 ISA core with the following additions:\n\n- L2 cache\n- I/O coherency support (on select chipsets)\n- Low-Locality Reference cache attributes (replaces mini-cache)\n- Supersections (v6 compatible)\n- 36-bit addressing (v6 compatible)\n- Single instruction cache line clean/invalidate\n- LRU cache replacement (vs round-robin)\n\nI attempted to merge the XSC3 support into proc-xscale.S, but XSC3\ncores have separate errata and have to handle things like L2, so it\nis simpler to keep it separate.\n\nL2 cache support is currently a build option because the L2 enable\nbit must be set before we enable the MMU and there is no easy way to\ncapture command line parameters at this point.\n\nThere are still optimizations that can be done such as using LLR for\ncopypage (in theory using the exisiting mini-cache code) but those\ncan be addressed down the road.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "3747b36eeab93d8969e86987bbc1d44971229b26",
      "tree": "2d6360f93f03b945644fd8a9e002f0154643798b",
      "parents": [
        "4682adcfb06448827fbdfd8b6c636796de569b7d"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Mar 27 16:59:07 2006 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Mar 27 16:59:07 2006 +0100"
      },
      "message": "[ARM] proc-v6: mark page table walks outer-cacheable, shared.  Enable NX.\n\nMark page table walks with outer-cacheable attribute, and enable no-execute\nin page tables.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "0003cedfc577be9d679c16531f8720739e9637ed",
      "tree": "3b7a1e9087384706c8320f85f650ab96139e8c00",
      "parents": [
        "3ee357f0f38a5fddebab18500c290d3879a2d89c",
        "c76b6b41d0ae29e1127d9f81cb687cabda57c14c"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Sat Mar 25 22:08:55 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sat Mar 25 22:08:55 2006 +0000"
      },
      "message": "Merge nommu tree\n\nFix merge conflict in arch/arm/mm/proc-xscale.S\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "591eb85ecd7e6eb8596c6129ae074e16636b99f4",
      "tree": "535fb7e9bc29113ff62fd70b0dcd8ad197ab51e2",
      "parents": [
        "4658f79bec0b51222e769e328c2923f39f3bda77",
        "3a2916aa289504d694072a98876d23ca31d6401e"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Mar 22 17:32:09 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Mar 22 17:32:09 2006 -0800"
      },
      "message": "Merge master.kernel.org:/home/rmk/linux-2.6-arm\n\n* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)\n  [ARM] 3389/1: typo and grammar fix\n  [ARM] 3386/1: AT91RM9200 Clock update\n  [ARM] 3384/1: AT91RM9200: Timer\n  [ARM] 3382/1: ixp2000: unify defconfigs\n  [ARM] 3381/1: ixp2000: fix slowport write timing control register fields\n  [ARM] 3380/1: ixp2000: simplify ixdp2x00_master_npu() check\n  [ARM] 3379/1: ixp2000: use generic 8250 debug macros\n  [ARM] 3378/1: ixp2000: fix gpio interrupt handling\n  [ARM] Quieten spurious IRQ detection\n  [ARM] Use kcalloc to allocate counter_config array rather than kmalloc\n  [ARM] Oprofile: dynamically allocate counter_config\n  [ARM] Oprofile: Convert semaphore to mutex\n  [ARM] 3376/2: S3C2410 - update defconfig\n  [ARM] 3375/1: S3C2440 - fix osiris machine build\n  [ARM] 3374/1: ep93xx: gpio interrupt support\n  [ARM] 3361/1: S3C24XX - add USB bus clock source\n  [ARM] 3360/1: S3C2440 - add set rate methods and camera clock\n  [ARM] 3359/1: S3C24XX - add support for clk_set_rate\n  [ARM] Convert kmalloc+memset to kzalloc\n  [ARM] 3373/1: move uengine loader to arch/arm/common\n  ...\n"
    },
    {
      "commit": "7835e98b2e3c66dba79cb0ff8ebb90a2fe030c29",
      "tree": "405a96eade34845dabe2f125b6c5eb095846869d",
      "parents": [
        "70dc991d66cac40fdb07346dba2b5d862d732c34"
      ],
      "author": {
        "name": "Nick Piggin",
        "email": "npiggin@suse.de",
        "time": "Wed Mar 22 00:08:40 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Mar 22 07:54:02 2006 -0800"
      },
      "message": "[PATCH] remove set_page_count() outside mm/\n\nset_page_count usage outside mm/ is limited to setting the refcount to 1.\nRemove set_page_count from outside mm/, and replace those users with\ninit_page_count() and set_page_refcounted().\n\nThis allows more debug checking, and tighter control on how code is allowed\nto play around with page-\u003e_count.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "8dfcc9ba27e2ed257e5de9539f7f03e57c2c0e33",
      "tree": "aecaeb6a0b33c23f79dfcd2418e4a3881a29f2e2",
      "parents": [
        "8e7a9aae91101916b86de07fafe3272ea8dc1f10"
      ],
      "author": {
        "name": "Nick Piggin",
        "email": "npiggin@suse.de",
        "time": "Wed Mar 22 00:08:05 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Mar 22 07:53:57 2006 -0800"
      },
      "message": "[PATCH] mm: split highorder pages\n\nHave an explicit mm call to split higher order pages into individual pages.\n Should help to avoid bugs and be more explicit about the code\u0027s intention.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nSigned-off-by: Yoichi Yuasa \u003cyoichi_yuasa@tripeaks.co.jp\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "e7736d47a11a771ba87314be563b2cb6b8d11d14",
      "tree": "21f27b7311a5298b9295b1e4b229eec190bfd23c",
      "parents": [
        "73deb7dc05b4cf968e506e7b18345bc65bcbc0f3"
      ],
      "author": {
        "name": "Lennert Buytenhek",
        "email": "buytenh@wantstofly.org",
        "time": "Mon Mar 20 17:10:13 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Mar 21 22:06:11 2006 +0000"
      },
      "message": "[ARM] 3369/1: ep93xx: add core cirrus ep93xx support\n\nPatch from Lennert Buytenhek\n\nThis patch adds support for the Cirrus ep93xx series of CPUs.  The\nep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,\nIrDA, MaverickCrunch floating point coprocessor, between 24 and 64\nGPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster\nengine, graphics accelerator, IDE controller and a bunch of other\nstuff.\n\nThis patch adds the core ep93xx support code, and support for the\nGlomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "f78f10436806660f39440a729acbaf03e3a01023",
      "tree": "3cef9023d54d12bc029893b35945f7bec69a22d3",
      "parents": [
        "bfe65704812f82751470106ea50aeb7e7d37cc3f"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Sat Mar 04 11:04:12 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Mar 21 22:05:50 2006 +0000"
      },
      "message": "[ARM] Remove unnecessary asm/hardware.h includes\n\nasm/hardware.h is not required for the majority of processor support\nfiles, ioremap support, mm initialisation, acorn IO support, nor\nthe debug code (which picks up its machine specific includes via\ndebug-macros.S)\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "48fa14f7618fe89cac9b807b05b66df4b595fc7e",
      "tree": "66bd0889f1182c8716dd2613a1e23bed57374682",
      "parents": [
        "74945c8616a50074277e18641baaae7464006766"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Mar 16 14:52:33 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Mar 21 22:03:26 2006 +0000"
      },
      "message": "[ARM] select TLS_REG_EMUL and NEEDS_SYSCALL_FOR_CMPXCHG\n\nRather than having a growing dependency line, use select to set\nthese configuration symbols.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "74945c8616a50074277e18641baaae7464006766",
      "tree": "b74a005fd0c38b2582783378321bf324545f3346",
      "parents": [
        "0f44ba1d1e67201c0c58af26eb441fa7014c89ec"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Mar 16 14:44:36 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Mar 21 22:03:25 2006 +0000"
      },
      "message": "[ARM] nommu: Move hardware page table definitions to pgtable-hwdef.h\n\nMove the hardware PMD and PTE page table definitions from pgtable.h\ninto pgtable-hwdef.h, and include pgtable-hwdef.h as necessary.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "141fa40cff90881ac4d81f6afa27bc283fe7acca",
      "tree": "7991b0f3910dafb58e1ef92044153e5383b01850",
      "parents": [
        "e7fcdb79ecaa01e2eba06e3fb64e10455bdb5aa7"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Mar 10 22:26:47 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Mar 10 22:26:47 2006 +0000"
      },
      "message": "[ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem\n\nPatch from Catalin Marinas\n\nARM1136 erratum 371025 (category 2) specifies that, under rare\nconditions, an invalidate I-cache by MVA (line or range) operation can\nfail to invalidate a cache line. The recommended workaround is to\neither invalidate the entire I-cache or invalidate the range by\nset/way rather than MVA.\n\nNote that for a 16K cache size, invalidating a 4K page by set/way is\nequivalent to invalidating the entire I-cache.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "6a0e243069b09a323255f6e847c87d531961cd96",
      "tree": "575a7194c86b2b3e1b9db30e283a2f5705e89e99",
      "parents": [
        "d11d9b2dd2c43dd99a491df8a83ae28401db0044"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Tue Mar 07 14:42:27 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Mar 07 14:42:27 2006 +0000"
      },
      "message": "[ARM] 3352/1: DSB required for the completion of a TLB maintenance operation\n\nPatch from Catalin Marinas\n\nChapter B2.7.3 in the latest ARM ARM (with v6 information) states that\nthe completion of a TLB maintenance operation is only guaranteed by\nthe execution of a DSB (Data Syncronization Barrier, formerly Data\nWrite Barrier or Drain Write Buffer).\n\nNote that a DSB is only needed in the flush_tlb_kernel_* functions\nsince the completion is guaranteed by a mode change (i.e. switching\nback to user mode) for the flush_tlb_user_* functions.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "43cc19816b3fc5286258e6f5e43ef4ead458f9a3",
      "tree": "8ea24fe2df9218d7fab8a3607ac5e644d2456e10",
      "parents": [
        "75d2f18088ded458f5bc4014b6c4e2d9651d41d4"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Feb 22 21:13:28 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Feb 22 21:13:28 2006 +0000"
      },
      "message": "[ARM] CONFIG_CPU_MPCORE -\u003e CONFIG_CPU_32v6K\n\nCONFIG_CPU_MPCORE has never been a configuration symbol - it should\nbe CONFIG_CPU_32v6K.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "18afea04f1dfc5d52fd2579cd17adc3956acd4ad",
      "tree": "45b56a2a6c16662bfd135637295798a9fba3ac69",
      "parents": [
        "8a052e0bc25ff52f17b3dff150846ca9eb969162"
      ],
      "author": {
        "name": "Nicolas Pitre",
        "email": "nico@cam.org",
        "time": "Wed Feb 01 19:26:01 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Feb 01 19:26:01 2006 +0000"
      },
      "message": "[ARM] 3294/1: don\u0027t invalidate individual BTB entries on ARMv6\n\nPatch from Nicolas Pitre\n\nDoing so adds a much larger cost to the loop than the cost implied by\nsimply invalidating the whole BTB at once.\n\nSigned-off-by: Nicolas Pitre \u003cnico@cam.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "8a052e0bc25ff52f17b3dff150846ca9eb969162",
      "tree": "607355bc9ce1ac2d6f5611287cf89fa473d48d02",
      "parents": [
        "62500d1f8eadff078cca462dc4df035a29180383"
      ],
      "author": {
        "name": "Nicolas Pitre",
        "email": "nico@cam.org",
        "time": "Wed Feb 01 19:26:01 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Feb 01 19:26:01 2006 +0000"
      },
      "message": "[ARM] 3293/1: don\u0027t invalidate the whole I-cache with xscale_coherent_user_range\n\nPatch from Nicolas Pitre\n\nThe mini I-cache issue is valid only for kernel space since debuggers\nwould not fly if they used user space addresses for their stubs.\n\nSigned-off-by: Nicolas Pitre \u003cnico@cam.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "7efb83002bc20c5c72151d51468593834b510d71",
      "tree": "990debbebce08e8f9e847011999f0fb9e664ae2c",
      "parents": [
        "0367a8d37af6028b64127ac70922717575b81113"
      ],
      "author": {
        "name": "George G. Davis",
        "email": "davis_g@mvista.com",
        "time": "Thu Jan 26 15:21:28 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Jan 26 15:21:28 2006 +0000"
      },
      "message": "[ARM] 3269/1: Add ARMv6 MT_NONSHARED_DEVICE mem_types[] index\n\nPatch from George G. Davis\n\nThis Freescale Semiconductor, Inc. contributed patch adds mem_types[]\nsupport for ARMv6 non-shared device memory region attributes. This\nimplementation provides support for only first level section mapped\nnon-shared devices. Second level non-shared device mappings are not\nyet supported.\n\nSigned-off-by: George G. Davis \u003cgdavis@mvista.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "20a2c88f5039b8b17f0aa3fbc2ac3e9257961123",
      "tree": "87ae77bec4f914dfa16a12104cf00fd4af84c833",
      "parents": [
        "fa1b4f91d6374663cfb3c6fbe3d78fd03954a862"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Fri Jan 20 20:52:50 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Jan 20 20:52:50 2006 +0000"
      },
      "message": "[ARM] Fix ioremap.c vfree type warning\n\narch/arm/mm/ioremap.c:145: warning: passing argument 1 of \u0027vfree\u0027 makes pointer from integer without a cast\n\nresulted from commit id 9d4ae7276ae26c5bfba6207cf05340af1931d8d4\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "37134cd55d57e95d3f606c6f2a57fa496bdad333",
      "tree": "0c5c3bb4a52550613eb5f171c5954725b51a1915",
      "parents": [
        "a3e49436867e6c7acc1b5eed21d30c88d156825b"
      ],
      "author": {
        "name": "Kevin Hilman",
        "email": "kevin@hilman.org",
        "time": "Thu Jan 12 16:12:21 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Jan 12 16:12:21 2006 +0000"
      },
      "message": "[ARM] 3209/1: Configurable DMA-consistent memory region\n\nPatch from Kevin Hilman\n\nThis patch increase available DMA-consistent memory allocated by dma_coherent_alloc(). The default remains at 2M (defined in asm/memory.h) and each platform has the ability to override in asm/arch-foo/memory.h.\n\nSigned-off-by: Kevin Hilman \u003ckevin@hilman.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "9d4ae7276ae26c5bfba6207cf05340af1931d8d4",
      "tree": "bf6f09189541ac964365c68362e9915c48510eb5",
      "parents": [
        "16ed926eee5497db52fbee4d2db2dedbcd23561c"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Mon Jan 09 19:23:11 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Jan 09 19:23:11 2006 +0000"
      },
      "message": "[ARM] 3070/2: Add __ioremap_pfn() API\n\nPatch from Deepak Saxena\n\nIn working on adding 36-bit addressed supersection support to ioremap(),\nI came to the conclusion that it would be far simpler to do so by just\nsplitting __ioremap() into a main external interface and adding an\n__ioremap_pfn() function that takes a pfn + offset into the page that\n__ioremap() can call. This way existing callers of __ioremap() won\u0027t have\nto change their code and 36-bit systems will just call __ioremap_pfn()\nand we will not have to deal with unsigned long long variables.\n\nNote that __ioremap_pfn() should _NOT_ be called directly by drivers\nbut is reserved for use by arch_ioremap() implementations that map\n32-bit resource regions into the real 36-bit address and then call\nthis new function.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "73a59c1c4af06c675a168d698d3ebfbb3270ddbe",
      "tree": "fa1708e19cf89a6bd13c8f7725a9cc67cc4ae6fd",
      "parents": [
        "50365c57860cd931c2d806057e0987634797e9af"
      ],
      "author": {
        "name": "SAN People",
        "email": "andrew@sanpeople.com",
        "time": "Mon Jan 09 17:05:41 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Jan 09 17:05:41 2006 +0000"
      },
      "message": "[ARM] 3240/2: AT91RM9200 support for 2.6 (Core)\n\nPatch from SAN People\n\nFollowing changes were made to clock.c:\n\n1) Replaced \u003casm/hardware/clock.h\u003e with \u003clinux/clk.h\u003e\n2) Removed old unused clk_enable \u0026 clk_disable.\n3) Replaced clk_use/clk_unuse with clk_enable/clk_disable.\n\nOtherwise it\u0027s the same as the previous patch.\n\nSigned-off-by: Andrew Victor \u003candrew@sanpeople.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "0fec53a24a5e5f7ba68d891b68f568b6aeafaca6",
      "tree": "c16976218b4f9bd1632ffea9619d209392c1a213",
      "parents": [
        "b9abaa3fb7328851bdeaad19e694048f0ff71d9a"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Sun Jan 08 22:37:46 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Jan 08 22:37:46 2006 +0000"
      },
      "message": "[ARM] Remove EPXA10DB machine support\n\nEPXA10DB seems to be uncared for:\n- the \"PLD\" code has never been merged\n- no one has reported that this platform has been broken since\n  at least 2.6.10\n- interest seems to have dried up around March 2003.\n\nTherefore, remove EPXA10DB support.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "78ff18a412da24a4b79c6a97000ef5e467e813da",
      "tree": "901d67dc2c709b71fba37b37b901ea167cef21a2",
      "parents": [
        "9d4f13e531b4722fe40cc8e28c02a495bdd49267"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Tue Jan 03 17:39:34 2006 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Jan 03 17:39:34 2006 +0000"
      },
      "message": "[ARM] Cleanup ARM includes\n\narch/arm/kernel/entry-armv.S has contained a comment suggesting\nthat asm/hardware.h and asm/arch/irqs.h should be moved into the\nasm/arch/entry-macro.S include.  So move the includes to these\ntwo files as required.\n\nAdd missing includes (asm/hardware.h, asm/io.h) to asm/arch/system.h\nincludes which use those facilities, and remove asm/io.h from\nkernel/process.c.\n\nRemove other unnecessary includes from arch/arm/kernel, arch/arm/mm\nand arch/arm/mach-footbridge.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "df2f5e721ed36e21da27e1f415c71ba0e20f31b5",
      "tree": "1c2df43e11a802a5316d1523bb73e6bd7d152c5a",
      "parents": [
        "d2ef5ebb4c4fe141a82252d4db8d8521e6765c5a"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Nov 30 16:02:54 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Nov 30 16:02:54 2005 +0000"
      },
      "message": "[ARM SMP] Disable lazy flush_dcache_page for SMP\n\nLazy flush_dcache_page() causes userspace instability on SMP\nplatforms, so disable it for now.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "5edf71ae129167ac276ebac18b25ccc7bec6ac3e",
      "tree": "619daac39d08dbf66fb19698205b263e21bba3d0",
      "parents": [
        "3c0bdac3875505516eda1c6b6e68dd84eff3b231"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Fri Nov 25 15:52:51 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Nov 25 15:52:51 2005 +0000"
      },
      "message": "[ARM] Do not call flush_tlb_kernel_range() with IRQs disabled.\n\nWe must not call TLB maintainence operations with interrupts disabled,\notherwise we risk a lockup in the SMP IPI code.\n\nThis means that consistent_free() can not be called from a context with\nIRQs disabled.  In addition, we must not hold the lock in consistent_free\nwhen we call flush_tlb_kernel_range().  However, we must continue to\nprevent consistent_alloc() from re-using the memory region until we\u0027ve\nfinished tearing down the mapping and dealing with the TLB.\n\nTherefore, leave the vm_region entry in the list, but mark it inactive\nbefore dropping the lock and starting the tear-down process.  After the\nmapping has been torn down, re-acquire the lock and remove the entry\nfrom the list.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "a6c61e9dfdd0adf8443932cfc43b0c1e25036ad5",
      "tree": "68e09d27ce1ef0aecbe11fb9eb139fba92e1afe9",
      "parents": [
        "d2c5b69099ff747f9757da2416383b9a999171b1"
      ],
      "author": {
        "name": "Daniel Jacobowitz",
        "email": "drow@false.org",
        "time": "Sat Nov 19 10:01:07 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sat Nov 19 10:01:07 2005 +0000"
      },
      "message": "[ARM] 3168/1: Update ARM signal delivery and masking\n\nPatch from Daniel Jacobowitz\n\nAfter delivering a signal (creating its stack frame) we must check for\nadditional pending unblocked signals before returning to userspace.\nOtherwise signals may be delayed past the next syscall or reschedule.\n\nOnce that was fixed it became obvious that the ARM signal mask manipulation\nwas broken.  It was a little bit broken before the recent SA_NODEFER\nchanges, and then very broken after them.  We must block the requested\nsignals before starting the handler or the same signal can be delivered\nagain before the handler even gets a chance to run.\n\nSigned-off-by: Daniel Jacobowitz \u003cdan@codesourcery.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "02b30839220fa3ef80a34ed6ee174fa2d9937eac",
      "tree": "faac60850e1e51b892622887c9f7cc37e2891e5e",
      "parents": [
        "67a1901ff498363e253b90ba132e336c925203ed"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Nov 17 22:43:30 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 17 22:43:30 2005 +0000"
      },
      "message": "[ARM] Fix some corner cases in new mm initialisation\n\nDocument that the VMALLOC_END address must be aligned to 2MB since\nit must align with a PGD boundary.\n\nAllocate the vectors page early so that the flush_cache_all() later\nwill cause any dirty cache lines in the direct mapping will be safely\nwritten back.\n\nMove the flush_cache_all() to the second local_flush_cache_tlb() and\nremove the now redundant first local_flush_cache_tlb().\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "67a1901ff498363e253b90ba132e336c925203ed",
      "tree": "ea1a771de1c5e986f40f31ff17079c088041b9c7",
      "parents": [
        "0c2e4b4ff38986e5b6f707d006799bff9663c802"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Nov 17 16:48:00 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 17 16:48:00 2005 +0000"
      },
      "message": "[ARM] __ioremap doesn\u0027t use 4th argument\n\nThe \"align\" argument in ARMs __ioremap is unused and provides a\nmisleading expectation that it might do something.  It doesn\u0027t.\nRemove it.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "1dbae815a724303b46ab4663b5fc23c13e9d9690",
      "tree": "7979efc3eb2bc5c2f969020354b8c9b2954470f0",
      "parents": [
        "1a8bfa1eb998af6e650ad26201f7cae9f2a2fdc8"
      ],
      "author": {
        "name": "Tony Lindgren",
        "email": "tony@atomide.com",
        "time": "Thu Nov 10 14:26:51 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 10 14:26:51 2005 +0000"
      },
      "message": "[ARM] 3145/1: OMAP 3a/5: Add support for omap24xx\n\nPatch from Tony Lindgren\n\nThis patch adds support for omap24xx series of processors.\nThe files live in arch/arm/mach-omap2, and share common\nfiles with omap15xx and omap16xx processors in\narch/arm/plat-omap.\n\nOmap24xx support was originally added for 2.6.9 by TI.\nThis code was then improved and integrated to share common\ncode with omap15xx and omap16xx processors by various\nomap developers, such as Paul Mundt, Juha Yrjola, Imre Deak,\nTony Lindgren, Richard Woodruff, Nishant Menon, Komal Shah\net al.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "3179a019391f0f8081245fd564a5f1be308ba64f",
      "tree": "afdc1200f17b0ca97e04baa7c2cc2d4d2883e0c9",
      "parents": [
        "a7918f39bbe59fe76f43743bdb6bb8b0bdefd94a"
      ],
      "author": {
        "name": "Tony Lindgren",
        "email": "tony@atomide.com",
        "time": "Thu Nov 10 14:26:48 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 10 14:26:48 2005 +0000"
      },
      "message": "[ARM] 3141/1: OMAP 1/5: Update omap1 specific files\n\nPatch from Tony Lindgren\n\nThis patch syncs the mainline kernel with linux-omap tree.\nThe highlights of the patch are:\n\n- Omap1 serial pport and framebuffer init updates by Imre Deak\n\n- Add support for omap310 processor and Palm Tungsten E PDA\n  by Laurent Gonzales, Romain Goyet, et al. Omap310 and\n  omap1510 processors are now handled as omap15xx.\n\n- Omap1 specific changes to shared omap clock framework\n  by Tony Lindgren\n\n- Omap1 specific changes to shared omap pin mux framework\n  by Tony Lindgren\n\n- Other misc fixes, such as update memory timings for smc91x,\n  omap1 specific device initialization etc.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "862184fe013146a0d9654a5598c5a2691747541c",
      "tree": "0f3f0d46c79c7eae3d504c0e1be9ff923f1b2e36",
      "parents": [
        "fea543f47733cc843cd74d95065ed1d4a04b38ed"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Nov 07 21:05:42 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Nov 07 21:05:42 2005 +0000"
      },
      "message": "[ARM SMP] Add Realview MPcore SMP support\n\nAdd SMP support for the MPcore tile fitted to the Realview ARM\nplatform.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "cd03adb0812fe0fb06cdb935e61ec9514254e951",
      "tree": "6a79344e646b6c3815a77f0eb4ed721f50c31701",
      "parents": [
        "0b154bb7d0cce80e9c0bcf11d4f9e71b59409d26"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Nov 07 10:10:28 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Nov 07 10:10:28 2005 +0000"
      },
      "message": "[ARM SMP] Add support for shared memory attribute\n\nWe need to set the shared memory attribute in the page tables\non SMP systems to allow the cache coherency to operate.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "5f8b1178e246422ebddc1b16487314c91edf85fe",
      "tree": "67b0b09acc80bfc1ca81f92cdad45ca156706bea",
      "parents": [
        "24bcc2f46cf8982dbc02c8e3037dfc5e12f1e35c",
        "7e5e6e9a509c4ed2973a345ec7ffb96577f42e26"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Nov 03 21:02:39 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 03 21:02:39 2005 +0000"
      },
      "message": "[ARM] Merge SMP tree\n"
    },
    {
      "commit": "24bcc2f46cf8982dbc02c8e3037dfc5e12f1e35c",
      "tree": "1136d17728f1222470f0e03f58163b9ed4c72dca",
      "parents": [
        "089311e117adb8ffe13984d122e33287ffa8c7ec"
      ],
      "author": {
        "name": "Nicolas Pitre",
        "email": "nico@cam.org",
        "time": "Thu Nov 03 20:40:50 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 03 20:40:50 2005 +0000"
      },
      "message": "[ARM] 3092/1: remove excessive print format padding\n\nPatch from Nicolas Pitre\n\nUsing a llx format to print addresses that might possibly be (only) 36\nbits wide make sense.  However making it a zero padded 16 char wide\nfield is a bit excessive and useless.\n\nSigned-off-by: Nicolas Pitre \u003cnico@cam.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "4a5f79e7e65d24d2fa9eb6e6208672571704d337",
      "tree": "44364e64ba8cedf3fbc5c3bb5c79b669dba0c1fd",
      "parents": [
        "06024f217d607369f0ee0071034ebb03071d5fb2"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Nov 03 15:48:21 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Nov 03 15:48:21 2005 +0000"
      },
      "message": "[ARM SMP] Add configuration option for ARMv6K processors\n\nThe \u0027K\u0027 extension adds several new instructions to the ARMv6 ISA\nwhich are primerily useful for SMP.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "6bf7bd6967b1cdde1fe953b0edb951966799fb44",
      "tree": "4b2537d200a51e13ea9e2b439c58411f7769f325",
      "parents": [
        "bfca94590bfd3dcd958c542d2fb6406518150fee"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Nov 02 14:11:35 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Nov 02 14:11:35 2005 +0000"
      },
      "message": "[ARM] Fix mm initialisation with write buffered write allocate caches\n\nIt seems that without the extra tlb flush, we may end up faulting\nduring the early kernel initialisation because the TLB can\u0027t see\nthe updated page tables.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "8ad68bbf7a06cdd77c170be792418488dbb65da4",
      "tree": "7caed40139d8e0a490cd7a9de0cf4c78f4285c05",
      "parents": [
        "e2f2e58e7968f8446b1078a20a18bf8ea12b4fbc"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Mon Oct 31 14:25:02 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Oct 31 14:25:02 2005 +0000"
      },
      "message": "[ARM] Add support for ARM RealView board\n\nSupport for RealView EB.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "b4c2803ca8ad7bb1aad215d89532e24488e9e68e",
      "tree": "719a557c8f30724270d59a425c33fc0d1db067ed",
      "parents": [
        "d362979aa2b031b91ee12122e5c4cad89577d8d3"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Sun Oct 30 19:03:21 2005 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Oct 30 19:03:21 2005 +0000"
      },
      "message": "[ARM] Make v6 copypage function static and cleanup pgprots\n\nWe know what pgprot we\u0027re going to use, so don\u0027t #define it.  Also,\nsince we select the nonaliasing/aliasing copypage implementation at\nrun time, there\u0027s no point having it globally visible.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "4c21e2f2441dc5fbb957b030333f5a3f2d02dea7",
      "tree": "1f76d33bb1d76221c6424bc5fed080a4f91349a6",
      "parents": [
        "b38c6845b695141259019e2b7c0fe6c32a6e720d"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Sat Oct 29 18:16:40 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sat Oct 29 21:40:42 2005 -0700"
      },
      "message": "[PATCH] mm: split page table lock\n\nChristoph Lameter demonstrated very poor scalability on the SGI 512-way, with\na many-threaded application which concurrently initializes different parts of\na large anonymous area.\n\nThis patch corrects that, by using a separate spinlock per page table page, to\nguard the page table entries in that page, instead of using the mm\u0027s single\npage_table_lock.  (But even then, page_table_lock is still used to guard page\ntable allocation, and anon_vma allocation.)\n\nIn this implementation, the spinlock is tucked inside the struct page of the\npage table page: with a BUILD_BUG_ON in case it overflows - which it would in\nthe case of 32-bit PA-RISC with spinlock debugging enabled.\n\nSplitting the lock is not quite for free: another cacheline access.  Ideally,\nI suppose we would use split ptlock only for multi-threaded processes on\nmulti-cpu machines; but deciding that dynamically would have its own costs.\nSo for now enable it by config, at some number of cpus - since the Kconfig\nlanguage doesn\u0027t support inequalities, let preprocessor compare that with\nNR_CPUS.  But I don\u0027t think it\u0027s worth being user-configurable: for good\ntesting of both split and unsplit configs, split now at 4 cpus, and perhaps\nchange that to 8 later.\n\nThere is a benefit even for singly threaded processes: kswapd can be attacking\none part of the mm while another part is busy faulting.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "69b0475456ff7ef520e16f69d7a15c0d68b74e64",
      "tree": "3e70d47f16437254eff3b3cca4aa275be1b5e275",
      "parents": [
        "60ec5585496871345c1a8113d7b60ed9d9474866"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Sat Oct 29 18:16:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sat Oct 29 21:40:42 2005 -0700"
      },
      "message": "[PATCH] mm: arm ready for split ptlock\n\nPrepare arm for the split page_table_lock: three issues.\n\nSignal handling\u0027s preserve and restore of iwmmxt context currently involves\nreading and writing that context to and from user space, while holding\npage_table_lock to secure the user page(s) against kswapd.  If we split the\nlock, then the structure might span two pages, secured by to read into and\nwrite from a kernel stack buffer, copying that out and in without locking (the\nstructure is 160 bytes in size, and here we\u0027re near the top of the kernel\nstack).  Or would the overhead be noticeable?\n\narm_syscall\u0027s cmpxchg emulation use pte_offset_map_lock, instead of\npte_offset_map and mm-wide page_table_lock; and strictly, it should now also\ntake mmap_sem before descending to pmd, to guard against another thread\nmunmapping, and the page table pulled out beneath this thread.\n\nUpdated two comments in fault-armv.c.  adjust_pte is interesting, since its\nmodification of a pte in one part of the mm depends on the lock held when\ncalling update_mmu_cache for a pte in some other part of that mm.  This can\u0027t\nbe done with a split page_table_lock (and we\u0027ve already taken the lowest lock\nin the hierarchy here): so we\u0027ll have to disable split on arm, unless\nCONFIG_CPU_CACHE_VIPT to ensures adjust_pte never used.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "b462705ac679f6195d1b23a752cda592d9107495",
      "tree": "c4d9be08f67b0ffdc66c3e170614bd03945f3c42",
      "parents": [
        "c74df32c724a1652ad8399b4891bb02c9d43743a"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Sat Oct 29 18:16:24 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sat Oct 29 21:40:40 2005 -0700"
      },
      "message": "[PATCH] mm: arches skip ptlock\n\nConvert those few architectures which are calling pud_alloc, pmd_alloc,\npte_alloc_map on a user mm, not to take the page_table_lock first, nor drop it\nafter.  Each of these can continue to use pte_alloc_map, no need to change\nover to pte_alloc_map_lock, they\u0027re neither racy nor swappable.\n\nIn the sparc64 io_remap_pfn_range, flush_tlb_range then falls outside of the\npage_table_lock: that\u0027s okay, on sparc64 it\u0027s like flush_tlb_mm, and that has\nalways been called from outside of page_table_lock in dup_mmap.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "872fec16d9a0ed3b75b8893aa217e49cca575ee5",
      "tree": "1dfc8b9f2754bdfff645188e497865c00201d535",
      "parents": [
        "46dea3d092d23a58b42499cc8a21de0fad079f4a"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Sat Oct 29 18:16:21 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sat Oct 29 21:40:40 2005 -0700"
      },
      "message": "[PATCH] mm: init_mm without ptlock\n\nFirst step in pushing down the page_table_lock.  init_mm.page_table_lock has\nbeen used throughout the architectures (usually for ioremap): not to serialize\nkernel address space allocation (that\u0027s usually vmlist_lock), but because\npud_alloc,pmd_alloc,pte_alloc_kernel expect caller holds it.\n\nReverse that: don\u0027t lock or unlock init_mm.page_table_lock in any of the\narchitectures; instead rely on pud_alloc,pmd_alloc,pte_alloc_kernel to take\nand drop it when allocating a new one, to check lest a racing task already\ndid.  Similarly no page_table_lock in vmalloc\u0027s map_vm_area.\n\nSome temporary ugliness in __pud_alloc and __pmd_alloc: since they also handle\nuser mms, which are converted only by a later patch, for now they have to lock\ndifferently according to whether or not it\u0027s init_mm.\n\nIf sources get muddled, there\u0027s a danger that an arch source taking\ninit_mm.page_table_lock will be mixed with common source also taking it (or\nneither take it).  So break the rules and make another change, which should\nbreak the build for such a mismatch: remove the redundant mm arg from\npte_alloc_kernel (ppc64 scrapped its distinct ioremap_mm in 2.6.13).\n\nExceptions: arm26 used pte_alloc_kernel on user mm, now pte_alloc_map; ia64\nused pte_alloc_map on init_mm, now pte_alloc_kernel; parisc had bad args to\npmd_alloc and pte_alloc_kernel in unused USE_HPPA_IOREMAP code; ppc64\nmap_io_page forgot to unlock on failure; ppc mmu_mapin_ram and ppc64 im_free\ntook page_table_lock for no good reason.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1a47ebc0d971fbc47cd859a09956f7c7d001f5fd",
      "tree": "7e1f083a72712f7bbc29829622683a5077927492",
      "parents": [
        "b4a1f67fbfb848ded8cf0c6c305224534144ab2d"
      ],
      "author": {
        "name": "Nicolas Pitre",
        "email": "nico@cam.org",
        "time": "Sat Oct 29 16:28:29 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sat Oct 29 16:28:29 2005 +0100"
      },
      "message": "[ARM] 3059/1: fix XIP support\n\nPatch from Nicolas Pitre\n\nFix XIP support after recent bootmem code refactoring.\n\nSigned-off-by: Nicolas Pitre \u003cnico@cam.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "83928e17b92b7a667bfe674f1b330619adc2ac88",
      "tree": "bdfc0fd037ad1380d75cefa0e47be24e344d977c",
      "parents": [
        "9be16a03928642f944915b8c05945fd87b7a15cb",
        "50f4c001bc1534db77663592496204ceba151e97"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Oct 28 09:24:22 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Oct 28 09:24:22 2005 -0700"
      },
      "message": "Merge master.kernel.org:/home/rmk/linux-2.6-arm\n\nMinor manual fixups for gfp_t clashes.\n"
    },
    {
      "commit": "f9e3214a7964f523e12b4f30b6bd6396794818bd",
      "tree": "1a10942dbaed7395f561e6698ce194a077bd7d7b",
      "parents": [
        "8267e268e0914ac9371d07f711fcf20cc572993c"
      ],
      "author": {
        "name": "Al Viro",
        "email": "viro@zeniv.linux.org.uk",
        "time": "Fri Oct 21 03:20:58 2005 -0400"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Oct 28 08:16:47 2005 -0700"
      },
      "message": "[PATCH] gfp_t: dma-mapping (arm)\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "0b7cd62ecdc1f09b7df4608a3fee644b1c27985b",
      "tree": "3769b043ea6b15ffe7b74a1a5d42903e08b126bc",
      "parents": [
        "9769c2468d423a1562dd59a5db250bd0a5533ec9"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Fri Oct 28 15:19:12 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Oct 28 15:19:12 2005 +0100"
      },
      "message": "[ARM] 3017/1: Add support for 36-bit addresses to create_mapping()\n\nPatch from Deepak Saxena\n\nThis patch adds support for 36-bit static mapped I/O. While there\nare no platforms in the tree ATM that use it, it has been tested\ntested on the IXP2350 NPU and I would like to get the support for\nthat chipset upstream one piece at a time. There are also other\nIntel chipset ports in development that are waiting on this to go\nupstream.\n\nThe patch replaces the print formats for physical addresses with\n%016llx which will create a bit extraneous output on 32-bit systems,\nbut I think that is cleaner than having #ifdefs, specially since\nusers will only see the output in error cases.\n\nDepends on 3016/1.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "9769c2468d423a1562dd59a5db250bd0a5533ec9",
      "tree": "d584ad444ed8bd5d1abfc197c918dfc6a9af7ddb",
      "parents": [
        "c8d2729858d76de4ef7522c8171004fc1959cc44"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Fri Oct 28 15:19:11 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Oct 28 15:19:11 2005 +0100"
      },
      "message": "[ARM] 3016/1: Replace map_desc.physical with map_desc.pfn\n\nPatch from Deepak Saxena\n\nConvert map_desc.physical to map_desc.pfn. This allows us to add\nsupport for 36-bit addressed physical devices in the static maps\nwithout having to resort to u64 variables.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "90072059d2963dec237ae0cf49831ef77ddb5739",
      "tree": "5ec0cc3e9759599957ea98eb9f5c372ffabca00f",
      "parents": [
        "f339ab3d6c59f8f898c165384aa2b6a0ae5d4c1c"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Fri Oct 28 14:48:37 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Oct 28 14:48:37 2005 +0100"
      },
      "message": "[ARM] Re-jig bootmem initialisation\n\nMake ARM independent of the way bootmem operates internally.  We\nnow map each node as we initialise it, and place the bootmem bitmap\ninside each node, rather than all in the first node.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "f339ab3d6c59f8f898c165384aa2b6a0ae5d4c1c",
      "tree": "c17ec50ffe9544c8c67a6532644bb0a1cedc53b7",
      "parents": [
        "674c04538284736c4a44224c78cb784b2c972f98"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Fri Oct 28 14:29:43 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Oct 28 14:29:43 2005 +0100"
      },
      "message": "[ARM] Fix sparse warnings\n\nFix sparse warnings in arch/arm/kernel/module.c,\narch/arm/mm/consistent.c, drivers/pcmcia/sa1111_generic.c,\nand platform support files.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "674c04538284736c4a44224c78cb784b2c972f98",
      "tree": "b975860890debe5fadcafd4137ad3112f1784849",
      "parents": [
        "c6b8fdad144bbb915d124ffd95011ad55730bf9f"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Fri Oct 28 14:25:28 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Oct 28 14:25:28 2005 +0100"
      },
      "message": "[ARM] 3/4: Remove asm/hardware.h from SA1100 io.h\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "67c5587ad4047041e4fb137628076388ede05281",
      "tree": "7766782d34a12fe84ba5468e6f0ed5dd77b7ca5d",
      "parents": [
        "d1972efaf24e56c06b43c40c364f9377763c2e13"
      ],
      "author": {
        "name": "Tony Lindgren",
        "email": "tony@atomide.com",
        "time": "Wed Oct 19 23:00:56 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Oct 19 23:00:56 2005 +0100"
      },
      "message": "[ARM] 3024/1: Add cpu_v6_proc_fin\n\nPatch from Tony Lindgren\n\nMachine restart calls cpu_proc_fin() to clean and disable\ncache, and turn off interrupts. This patch adds proper\ncpu_v6_proc_fin.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "737d0bb7701cdebb661e4db0236071a7df977777",
      "tree": "fe250db7c6bf3381d01418bdab50fb9124e6fe00",
      "parents": [
        "cd26f45bfca4d4fa5ddfe21613d2da46f1acb821"
      ],
      "author": {
        "name": "George G. Davis",
        "email": "davis_g@mvista.com",
        "time": "Wed Oct 12 19:58:10 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Oct 12 19:58:10 2005 +0100"
      },
      "message": "[ARM] 2969/1: miscellaneous whitespace cleanup\n\nPatch from George G. Davis\n\nFix leading, trailing and other miscellaneous whitespace issues\nin arch/arm/kernel/alignment.c.\n\nSigned-off-by: George G. Davis \u003cgdavis@mvista.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "19da83f632d235fff9f94671d2e2cf87d27a2446",
      "tree": "7c5935b9c88497367c7da4b373c98180cafd9a2b",
      "parents": [
        "79d13b62ef9da84d3ba551caac42d6107e57208f"
      ],
      "author": {
        "name": "George G. Davis",
        "email": "davis_g@mvista.com",
        "time": "Mon Oct 10 10:17:44 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Oct 10 10:17:44 2005 +0100"
      },
      "message": "[ARM] 2959/1: Add test for invalid LDRD/STRD Rd cases in ARM alignment handler\n\nPatch from George G. Davis\n\nAdd test for invalid LDRD/STRD Rd cases in ARM alignment handler\nand restore SWP printk KERN_ERR.\n\nSigned-off-by: Steve Longerbeam \u003cslongerbeam@mvista.com\u003e\nSigned-off-by: George G. Davis \u003cgdavis@mvista.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "e03eb5272b670e5002463c95fdc023410ba18484",
      "tree": "abb775231d2871ade31006874a1541e397ff7d16",
      "parents": [
        "bb77c03cf40fec911c4ce9610b8207bf0050a5fd"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Oct 05 23:06:36 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Oct 05 23:06:36 2005 +0100"
      },
      "message": "[ARM] 2954/1: Allow D and I cache and branch prediction disabling for ARMv6\n\nPatch from Catalin Marinas\n\nThere is no reason to not allow these config options. They are useful when\nthe hardware has problems.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "2c3a0540999ac9bd7147fb98833224a58cdaf217",
      "tree": "85fe67c8a02c5e7b90f9ceb2330c0e6b8d1f6b7d",
      "parents": [
        "487fd4eb1445407c9760af08b0b34c3f4cdb4afc"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Sun Oct 02 22:34:35 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Oct 02 22:34:35 2005 +0100"
      },
      "message": "[ARM] 2943/1: Clear the exclusive monitor in v6_early_abort\n\nPatch from Catalin Marinas\n\nData abort caused by ldrex/strex can leave the exclusive monitor in an\nunpredictable state. It is recommended that a clrex/strex is performed to\nclear this state.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "217874feed0d3a6543a6b7127782f4a08bffd731",
      "tree": "88c9468bea86336ac5cf27fb72252bd3527b7cb3",
      "parents": [
        "a06f5466c4576dcbf838a50a87903b0082774da7"
      ],
      "author": {
        "name": "Gen FUKATSU",
        "email": "fukatsu.gen@jp.panasonic.com",
        "time": "Fri Sep 30 16:09:17 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Sep 30 16:09:17 2005 +0100"
      },
      "message": "[ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S\n\nPatch from Gen FUKATSU\n\nInvalidate BTB entry instruction flushes two instruction\nat a time. Therefore this instruction should be done four\ntimes after invalidate instruction cache line.\n\nSigned-off-by: Gen Fukatsu\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "481467d6fa4489aa42321a067e78bad26349488f",
      "tree": "8d6d8335a98d57e204cd5bacc99569ff7d424cae",
      "parents": [
        "dce79affd5d04e9cbabe35016eda55213b9b36f6"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Sep 30 16:07:04 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Sep 30 16:07:04 2005 +0100"
      },
      "message": "[ARM] 2939/1: Fix compilation error in arch/arm/mm/flush.c\n\nPatch from Catalin Marinas\n\nWhen CONFIG_CPU_CACHE_VIPT is defined, the flush_pfn_alias() function is\nimplicitely declared and it later conflicts with its actual definition.\nThis patch moves the function definition to the beginning of the file.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "840ff6a4f6174d7fe19c206b5f36ff64123a2f45",
      "tree": "1b66816135fad5a97d5ea0862b95341278f4227f",
      "parents": [
        "5fe10ab19046d84f3fd243436cbd5fa01019e809"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Tue Sep 20 17:52:13 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Sep 20 17:52:13 2005 +0100"
      },
      "message": "[ARM] Prevent deadlock in page fault handler\n\nAs per x86, we may deadlock while trying to get the mmap semaphore.\nImplement the same fix, which allows (eg) recursive faults to cause\nan oops instead of deadlocking.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "02b7dd1244aab9267ae4078e1ad6a2fdaabeb6ed",
      "tree": "27e3ee0cb242a58aca567537af5bc9c971904390",
      "parents": [
        "bfe6815e0465035d013b2b676444376fe2b3716e"
      ],
      "author": {
        "name": "Ben Dooks",
        "email": "ben-linux@fluff.org",
        "time": "Tue Sep 20 16:35:03 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Sep 20 16:35:03 2005 +0100"
      },
      "message": "[ARM] 2926/1: .proc.info - postfix section with .init for `make buildcheck`\n\nPatch from Ben Dooks\n\nThe `make buildcheck` is erroneously reporting that the .proc.info\nlist is referencing items in the .init section as it is not itself\npostfixed with .init\n\nSigned-off-by: Ben Dooks \u003cben-linux@fluff.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "486a153f0e294f7cc735838edcb6b32e623cbe52",
      "tree": "f16a31eb3526968dd08aa93c12cbb211f31f2084",
      "parents": [
        "9c8550ee25e26d14a8f0fe1b761a676e23fe3cf0",
        "f64a227b6b5cc1f8cc7f6ef9cc3351343636bac9"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Sep 09 15:46:49 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Sep 09 15:46:49 2005 -0700"
      },
      "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild \n"
    },
    {
      "commit": "e6ae744dd2eae8e00af328b11b1fe77cb0931136",
      "tree": "726e20fb0950b9a51f602b2b805d016e813ce38a",
      "parents": [
        "0013a85454c281faaf064ccb576e373a2881aac8"
      ],
      "author": {
        "name": "Sam Ravnborg",
        "email": "sam@mars.(none)",
        "time": "Fri Sep 09 21:08:59 2005 +0200"
      },
      "committer": {
        "name": "Sam Ravnborg",
        "email": "sam@mars.(none)",
        "time": "Fri Sep 09 21:08:59 2005 +0200"
      },
      "message": "kbuild: arm - use generic asm-offsets.h support\n\nDelete obsoleted stuff from arch Makefile and rename\nconstants.h to asm-offsets.h\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\n"
    },
    {
      "commit": "d7b6b3589471c3856f1e6dc9c77abc4af962ffdb",
      "tree": "82751eba321a062ce91af7f0f0bff8c4c5531a1c",
      "parents": [
        "b38d950d3aedf90c8b15b3c7c799b5eb53c47c45"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Sep 08 15:32:23 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Sep 08 15:32:23 2005 +0100"
      },
      "message": "[ARM] Fix ARMv6 VIPT cache \u003e\u003d 32K\n\nThis adds the necessary changes to ensure that we flush the\ncaches correctly with aliasing VIPT caches.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "ca6ca91d8c7498d45e0d35800503699164366f10",
      "tree": "3e340cd984e08f4f1edd7c8f33c4e45cf6ace743",
      "parents": [
        "9bed07d0fed01f7c39d128e59e5d35d7d67ff439"
      ],
      "author": {
        "name": "Timothy Baldwin",
        "email": "T.E.Baldwin99@members.leeds.ac.uk",
        "time": "Sun Sep 04 10:13:48 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Sep 04 10:13:48 2005 +0100"
      },
      "message": "[ARM] 2875/1: Data Abort fixes\n\nPatch from Timothy Baldwin\n\nAll data aborts are treated as read accesses. The existing code updates the wrong bit of r1, also the comments are wrong in that the sense of the L bit is inverted.\n\nSigned-off-by: Timothy E. Baldwin \u003cT.E.Baldwin99@members.leeds.ac.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "86a8a83963a3f6beeca4900d26da93c7d2a9d92d",
      "tree": "67c38d24dc4d2b3360c7d41588244f3a0d424cf5",
      "parents": [
        "103461a80c2f2dd95fe9a39a5decd984622c2a9e"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Sep 01 22:41:55 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Sep 01 22:41:55 2005 +0100"
      },
      "message": "[ARM] Fix ARMv6 page table bits\n\nWe weren\u0027t explicitly setting the page table bits we desired\nin user_prot in the protection table, which resulted in the\nuser mappings for v6 CPUs being marked global.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "103461a80c2f2dd95fe9a39a5decd984622c2a9e",
      "tree": "01d0fa7bfa325cbbeec6ea484378355a18269444",
      "parents": [
        "08f4ffb3eb4ff23daf9c61bcd523940d43c2270c"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Sep 01 14:51:59 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Sep 01 14:51:59 2005 +0100"
      },
      "message": "[ARM] Simplify setup_mm_for_reboot()\n\nNo point checking what CPU architecture level we have each time\nwithin the loop, so precompute the base PMD flags outside the\nloop.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "08f4ffb3eb4ff23daf9c61bcd523940d43c2270c",
      "tree": "4aefef161593bc013a0d848a0be05610eaea0d69",
      "parents": [
        "569d2c34dcf259b07977835492aa8813d1168230"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Sep 01 14:45:18 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Sep 01 14:45:18 2005 +0100"
      },
      "message": "[ARM] Convert open-coded __pmd_populate to use inline function\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "f21ee2d4245293ee6906eb7afd0a701f40e839b9",
      "tree": "a7c1339ca77ecc664c53ffa16864788ee41f3933",
      "parents": [
        "3618886f645c2ede45742d3e3d22a96b2ee2f527"
      ],
      "author": {
        "name": "Steve Longerbeam",
        "email": "stevel@mwwireless.net",
        "time": "Wed Aug 31 21:22:20 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Aug 31 21:22:20 2005 +0100"
      },
      "message": "[ARM] 2867/2: unaligned ldrd/strd fixups\n\nPatch from Steve Longerbeam\n\nAdds an implementation of unaligned LDRD and STRD fixups.\nAlso fixes a bug where do_alignment() would misinterpret and\nfixup an unaligned LDRD/STRD as LDRH/STRH, causing memory\ncorruption.\nThis is the same as Patch #2867/1, but with minor whitespace\nand comments changes, plus a check for arch-level \u003e\u003d v5TE\nbefore printing ai_dword count in proc_alignment_read().\n\nSigned-off-by: Steve Longerbeam \u003cstevel@mwwireless.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "083bc6b3c9b52b5998cc49d4aa2f8f15c2e84e6b",
      "tree": "935852aa0f2bee2d68d704d8007a2524189a3f4f",
      "parents": [
        "3e88a579d05e1bb6c51d88f0936e372895edb8ff"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Mon Aug 29 22:54:53 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Aug 29 22:54:53 2005 +0100"
      },
      "message": "[ARM] 2853/1: Make alloc_init_supersection() work with 36-bit mappings\n\nPatch from Deepak Saxena\n\nWorking on adding support for 36-bit static mappings for ARMv6 and\nIntel\u0027s XSC3 core and noticed that alloc_init_supersection currently\nincrements the phys addr by 1MB on each of the 16 iterations and then\nforces alignment to supersection size (16MB).  This is really uneeded\nb/c we have already forced the phys address to be 16MB aligned in\ncreate_mapping(). Furthermore, this breaks 36-bit addressing b/c bits\n[23:20] of the PMD contain bits [35:32] of the physical address and\nthe masking causes us to loose those bits thus ending up with an\nincorrect virt -\u003e phys translation.  The other option is to have an\nalloc_init_supersection36.\nTested on Intel IXP2350 CPU with 36-bit static I/O mappings.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "22d8be866ee23bf3ad9fe867587eef5f4200bf84",
      "tree": "30776229759256eae069428e15423ce61faed970",
      "parents": [
        "54738e82755f73080e779ba0c8052e232df24d78"
      ],
      "author": {
        "name": "Sean Lee",
        "email": "beginner2arm@eyou.com",
        "time": "Wed Aug 17 09:28:26 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Aug 17 09:28:26 2005 +0100"
      },
      "message": "[ARM] 2852/1: Correct the mistake in arch/arm/mm/Kconfig file\n\nPatch from Sean Lee\n\nIn the arch/arm/mm/Kconfig file, the CPU_DCACHE_WRITETHROUGH\noption is depend on the CPU_DISABLE_DCACHE, but the \"Disable\nD-Cache\" option is configured as CPU_DCACHE_DISABLE.\nThe CPU_DISABLE_DCACHE should be CPU_DCACHE_DISABLE\n\nSigned-off-by: Sean Lee \u003cbeginner2arm@eyou.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "d93742f5a73c3dff641732c029836170f86392d2",
      "tree": "d69f618b5b5b7889ae02dd15160338834756cb91",
      "parents": [
        "498de0cc5ea3009af762dc968a46d6f5df96b67a"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Aug 15 16:53:38 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Aug 15 16:53:38 2005 +0100"
      },
      "message": "[ARM] Remove extraneous whitespace introduced in previous ARMv6 patch\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "6626a7076d39f0a18156cdd97d4e2cbef91ad701",
      "tree": "13909ea6ae009b9b418cf3302baebe1baaa0dbd4",
      "parents": [
        "1b9749e7f15bf2db19f5d201f88401c7517910b7"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Aug 10 16:18:35 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Aug 10 16:18:35 2005 +0100"
      },
      "message": "[ARM] Control v6 \u0027global\u0027 bit via Linux PTE entries\n\nUnfortunately, we can\u0027t use the \"user\" bit in the page tables to\ncontrol whether a page table entry is \"global\" or \"asid\" specific,\nsince the vector page is mapped as \"user\" accessible but is not\nprocess specific.\n\nTherefore, give direct control of the ARMv6 \"nG\" (not global)\nbit to the mm layers.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "1b9749e7f15bf2db19f5d201f88401c7517910b7",
      "tree": "43654821aa73118f73f0e98e40bfb470f089e96d",
      "parents": [
        "86b3786078d63242d3194ffc58ae8dae1d1bbef3"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Aug 10 16:15:32 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Aug 10 16:15:32 2005 +0100"
      },
      "message": "[ARM] Use #defined constants for manipulating v6 hardware PTE bits\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "ff2afb9df607dfcaacdaf67ea84b773c6fb08f4c",
      "tree": "8163106927016a97d336a2116518effabab6c0e3",
      "parents": [
        "d95a1b4818f2fe38a3cfc9a7d5817dc9a1a69329"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Aug 04 14:17:33 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Aug 04 14:17:33 2005 +0100"
      },
      "message": "[PATCH] ARM: Fix ARM fault handler for get_user_pages() fixes.\n\nThe ARM fault handler is optimised to make the fast path, err, fast.\nThe renumbering of the VM_FAULT_* codes broke this because numbers\nwere used instead of the definitions.  Fix this.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "975ad141eecccb24fc8db1e0f4a08f5580f4a9a9",
      "tree": "cc392df5cf9909b22bfa608755e0285fccb9b187",
      "parents": [
        "f148af2593ef76ac705d1cc6abe48f455c9912cc"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Wed Aug 03 19:49:17 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Aug 03 19:49:17 2005 +0100"
      },
      "message": "[PATCH] ARM: 2839/1: Remove XScale cache and TLB locking code\n\nPatch from Deepak Saxena\n\nThe XScale locking code is not something that has been validated\non 2.6 and needs to be replaced with a more generic API to use\nwith other ARMs that support locking features.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "186efd5275bbe7ffb73d939c1ce5690682668200",
      "tree": "2d90ed4547cd15249570747d8790005ec7229c2f",
      "parents": [
        "6d9b37a3a80195d317887ff81aad6a58a66954b5"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Tue Jul 26 19:51:26 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Jul 26 19:51:26 2005 +0100"
      },
      "message": "[PATCH] ARM SMP: Mark device mappings as \"device\" in ARMv6 parlance\n\nARMv6 introduces memory types into the page tables.  Mark devices\nmappings with the \"shared device\" memory type.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "b288f75ffa6f26f720d0c69fcd09b4ee7122e17b",
      "tree": "eb0f051be6693ed4436d23296a9caba2c88d13a7",
      "parents": [
        "af973d2aff6008bc7500277eb5a523db579731c6"
      ],
      "author": {
        "name": "Tony Lindgren",
        "email": "tony@atomide.com",
        "time": "Sun Jul 10 19:58:08 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Jul 10 19:58:08 2005 +0100"
      },
      "message": "[PATCH] ARM: 2798/1: OMAP update 2/11: Change ARM Kconfig to support omap1 and omap2\n\nPatch from Tony Lindgren\n\nThis patch by Paul Mundt and other OMAP developers modifies\nARM specific Kconfig to allow sharing code between OMAP1 and\nOMAP2 architectures.\nIn order to share code between OMAP1 and OMAP2, all OMAP1\nspecific code is moved into mach-omap1 directory in the\nfollowing patch. A new mach-omap2 directory will be added\nlater on.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "8107338bf9d0367d0b3f42730906b83532b6786f",
      "tree": "c2245d2507a45034ed594e1094b0f0e2a627be6c",
      "parents": [
        "4bebdab7eb11ee533ff843f4f1fec9975666e64e"
      ],
      "author": {
        "name": "Deepak Saxena",
        "email": "dsaxena@plexity.net",
        "time": "Sun Jul 10 19:44:55 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Jul 10 19:44:55 2005 +0100"
      },
      "message": "[PATCH] ARM: 2796/1: Fix ARMv5[TEJ] check in MMU initalization\n\nPatch from Deepak Saxena\n\nThe code in mm-armv.c checks for the condition (cpu_architecture()\u003c\u003d ARMv5)\nin a few places but should be checking for ARMv5TEJ as the MMU is shared\nacross all v5 variations.\n\nSigned-off-by: Deepak Saxena \u003cdsaxena@plexity.net\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "d1d890edace65721e9a7582545c943f67f500709",
      "tree": "0c0170ed290533e2d1cf3576090afd5277fed579",
      "parents": [
        "a18bcb7450840f07a772a45229de4811d930f461"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Wed Jul 06 23:06:03 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Wed Jul 06 23:06:03 2005 +0100"
      },
      "message": "[PATCH] ARM: 2789/1: Enable access to both CP10 and CP11 on ARMv6\n\nPatch from Catalin Marinas\n\nThe VFP instructions trigger undefined exceptions because the access to\nCP11 is disabled (only CP10 is currently enabled by the kernel). The patch\nfixes this problem.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "0d670b413f042eccdffc45bafb9840244752707f",
      "tree": "5658514d70f4a62ae2268f1837a3d05e3b87bfba",
      "parents": [
        "75f631dc45c7327df26b82b9aea69376a306409c"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Sun Jul 03 17:53:25 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Sun Jul 03 17:53:25 2005 +0100"
      },
      "message": "[PATCH] ARM: 2784/1: Fix the block cache flush operation range\n\nPatch from Catalin Marinas\n\nThe range for the ARMv6 block cache operations is inclusive but the\nkernel doesn\u0027t re-calculate the end address, causing a page fault when\nused (this only happens with support for cache aliasing, otherwise the\nblk_flush_kern_dcache_page() is not called). This patch subtracts\nL1_CACHE_BYTES from the end address.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "abaf48a05a8f097654e746af2a5afb2ab95861a1",
      "tree": "80cd0d34086e3cb8c1781e317b49c84ad6c97841",
      "parents": [
        "c28a814f25d48f193565003223df0ae617796892"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Jun 30 17:04:14 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Jun 30 17:04:14 2005 +0100"
      },
      "message": "[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs\n\nPatch from Catalin Marinas\n\nThis patch fixes the V bit setting for the ARM1020x processors. At\nreset, this bit is automatically set to the value of the HIVECSINIT\ninput signal which just happened to be 1 but it is not mandatory.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "c19cb1df809dcf343dd1eb6fe60d53639dafcb8c",
      "tree": "a0c0442cf4cd8e14ea53a193d4e9522b46cef75c",
      "parents": [
        "41359dca9442b0c664336e3fcf3aaf70b6507b1d"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Thu Jun 30 17:04:13 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Jun 30 17:04:13 2005 +0100"
      },
      "message": "[PATCH] ARM: 2777/1: Fix broken comment arch/arm/mm/proc-arm1020.S\n\nPatch from Catalin Marinas\n\nThis patch fixes a broken comment in the proc-arm1020.S file which\nprevents the file compilation\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "cfb0810eab39d1162f45b73fc96f45ab1cbcbe8b",
      "tree": "bbe5ec68ab0a4483324bd4e231cb6fb2358d23ab",
      "parents": [
        "9b4311eedb17fa88f02e4876cd6aa9a08e383cd6"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Thu Jun 30 11:06:49 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Thu Jun 30 11:06:49 2005 +0100"
      },
      "message": "[PATCH] ARM: Don\u0027t try to send a signal to pid0\n\nIf we receive an unrecognised abort during boot, don\u0027t try to\nsend a signal to pid0, but instead report the current state.\nThis leads to less confusing debug reports.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n\n"
    },
    {
      "commit": "564c90aa07cd43dc434d46cef8a15773a23d49a2",
      "tree": "e9ac4ec0e396359dba8e8eb7e46b42ae33ee944f",
      "parents": [
        "603fff54420a0ccc4c3b48bfef43896fb4e33161"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Tue Jun 28 13:46:09 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Tue Jun 28 13:46:09 2005 +0100"
      },
      "message": "[PATCH] ARM SMP: Use local_flush_tlb* where we really want to be local\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "a013053d4965d9a45300938e713a4b512e0257d8",
      "tree": "d0a03ece81d34de8df497f23376918ec2472bd1e",
      "parents": [
        "a343e6075a396e07eeff52c0da5629c8fd396be2"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 27 14:16:47 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Jun 27 14:16:47 2005 +0100"
      },
      "message": "[PATCH] ARM: Move memmap freeing into init.c\n\nIt doesn\u0027t make sense for this to be in mm-armv.c now that 26-bit\nARM support is no longer integrated into arch/arm.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "a343e6075a396e07eeff52c0da5629c8fd396be2",
      "tree": "8ee3bcc2d24acb24476e683eea6c4662fb90f514",
      "parents": [
        "2ea83398b75309d8fdc999c4bb252e72d7e4fd9d"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 27 14:08:56 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Jun 27 14:08:56 2005 +0100"
      },
      "message": "[PATCH] ARM: Move PGD kernel page table initialisation\n\nIt doesn\u0027t make sense to have the PGD kernel pointers initialisation\nseparate from the PGD user pointers, especially when we clean the\ndata cache over the whole range.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "79042f087b5ac7bba819de03dc3e7462bab8aad9",
      "tree": "0fb7ca4b0d690d59a4a0d5bc6774a345edb43284",
      "parents": [
        "5932ae3f5d610fd8d047ef4693bab9f084e5c56d"
      ],
      "author": {
        "name": "Catalin Marinas",
        "email": "catalin.marinas@arm.com",
        "time": "Fri Jun 24 21:27:39 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Fri Jun 24 21:27:39 2005 +0100"
      },
      "message": "[PATCH] ARM: 2698/1: Enable kernel r/w access to user pages on ARMv6\n\nPatch from Catalin Marinas\n\ncpu_v6_set_pte() sets the kernel access rights to r/o for user\npages (L_PTE_USER) when neither L_PTE_WRITE nor L_PTE_DIRTY are\nset. This causes a kernel data abort when writing the TLS value\nin the 0xffff0000 page. This patch enables the kernel r/w access.\n\nSigned-off-by: Catalin Marinas\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "92a8cbed29eb9bf6e8eec16ca29d54015bc0e8a2",
      "tree": "142314e2863863a1cbe1ea950ac688fc1aaeef6c",
      "parents": [
        "3a66941106855215127f8bf1afd06099b72dc75b"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Jun 22 21:47:25 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Wed Jun 22 21:47:25 2005 +0100"
      },
      "message": "[PATCH] ARM: Remove explicit page-alignments in memory init\n\nSince meminfo.bank[] array contains page-aligned start/size, we\nno longer need to explicitly round up/down the addresses when\nconverting to PFNs.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "1363c3cd8603a913a27e2995dccbd70d5312d8e6",
      "tree": "405e7fc1ef44678f3ca0a54c536d0457e6e80f45",
      "parents": [
        "e7c8d5c9955a4d2e88e36b640563f5d6d5aba48a"
      ],
      "author": {
        "name": "Wolfgang Wander",
        "email": "wwc@rentec.com",
        "time": "Tue Jun 21 17:14:49 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Tue Jun 21 18:46:16 2005 -0700"
      },
      "message": "[PATCH] Avoiding mmap fragmentation\n\nIngo recently introduced a great speedup for allocating new mmaps using the\nfree_area_cache pointer which boosts the specweb SSL benchmark by 4-5% and\ncauses huge performance increases in thread creation.\n\nThe downside of this patch is that it does lead to fragmentation in the\nmmap-ed areas (visible via /proc/self/maps), such that some applications\nthat work fine under 2.4 kernels quickly run out of memory on any 2.6\nkernel.\n\nThe problem is twofold:\n\n  1) the free_area_cache is used to continue a search for memory where\n     the last search ended.  Before the change new areas were always\n     searched from the base address on.\n\n     So now new small areas are cluttering holes of all sizes\n     throughout the whole mmap-able region whereas before small holes\n     tended to close holes near the base leaving holes far from the base\n     large and available for larger requests.\n\n  2) the free_area_cache also is set to the location of the last\n     munmap-ed area so in scenarios where we allocate e.g.  five regions of\n     1K each, then free regions 4 2 3 in this order the next request for 1K\n     will be placed in the position of the old region 3, whereas before we\n     appended it to the still active region 1, placing it at the location\n     of the old region 2.  Before we had 1 free region of 2K, now we only\n     get two free regions of 1K -\u003e fragmentation.\n\nThe patch addresses thes issues by introducing yet another cache descriptor\ncached_hole_size that contains the largest known hole size below the\ncurrent free_area_cache.  If a new request comes in the size is compared\nagainst the cached_hole_size and if the request can be filled with a hole\nbelow free_area_cache the search is started from the base instead.\n\nThe results look promising: Whereas 2.6.12-rc4 fragments quickly and my\n(earlier posted) leakme.c test program terminates after 50000+ iterations\nwith 96 distinct and fragmented maps in /proc/self/maps it performs nicely\n(as expected) with thread creation, Ingo\u0027s test_str02 with 20000 threads\nrequires 0.7s system time.\n\nTaking out Ingo\u0027s patch (un-patch available per request) by basically\ndeleting all mentions of free_area_cache from the kernel and starting the\nsearch for new memory always at the respective bases we observe: leakme\nterminates successfully with 11 distinctive hardly fragmented areas in\n/proc/self/maps but thread creating is gringdingly slow: 30+s(!) system\ntime for Ingo\u0027s test_str02 with 20000 threads.\n\nNow - drumroll ;-) the appended patch works fine with leakme: it ends with\nonly 7 distinct areas in /proc/self/maps and also thread creation seems\nsufficiently fast with 0.71s for 20000 threads.\n\nSigned-off-by: Wolfgang Wander \u003cwwc@rentec.com\u003e\nCredit-to: \"Richard Purdie\" \u003crpurdie@rpsys.net\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e (partly)\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "038c5b602524b33447008492e932cdd0a1e806c9",
      "tree": "a2a474e180e370dfbc966bfd7f0050469aff4b98",
      "parents": [
        "09f0551d20ddf6d22c333adcc59f2b1148734273"
      ],
      "author": {
        "name": "Bellido Nicolas",
        "email": "nb-ml@be.rmk.(none)",
        "time": "Mon Jun 20 18:51:05 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Jun 20 18:51:05 2005 +0100"
      },
      "message": "[PATCH] ARM: 2686/2: AAEC-2000 Core support\n\nPatch from Bellido Nicolas\n\nCore support for AAEC-2000 based platforms.\nThis is an updated version of the previous patch, and takes\ninto account Russell\u0027s comments.\nAAED-2000 default configuration will follow as soon\nas some problems with the bootloader are sorted out...\n\nSigned-off-by: Nicolas Bellido\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "09f0551d20ddf6d22c333adcc59f2b1148734273",
      "tree": "321c877843fc24ef6047225569a66479d9d6269b",
      "parents": [
        "a507ef3ac68f0671fdd3f824885cd7f1ea1040b1"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 20 18:44:37 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 20 18:44:37 2005 +0100"
      },
      "message": "[PATCH] ARM: Add iomap support for ARM\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "b8a9b66fbee09d0cc71c272b5c1d1f3320afbbf0",
      "tree": "25be8fc2ef91f6dcbb7f7dd2b9e3db2a95963477",
      "parents": [
        "8830f04a092b47f3d246271b24685cd9eab82027"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 20 11:31:09 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 20 11:31:09 2005 +0100"
      },
      "message": "[PATCH] ARM: Add common CACHE_COLOUR macro\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    },
    {
      "commit": "8830f04a092b47f3d246271b24685cd9eab82027",
      "tree": "8258af450ec736fd0ff3cf0864eb5407b3f8b5ff",
      "parents": [
        "d411b845dcc8e1d97e8b02a345e765af5134700f"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 20 09:51:03 2005 +0100"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk@dyn-67.arm.linux.org.uk",
        "time": "Mon Jun 20 09:51:03 2005 +0100"
      },
      "message": "[PATCH] ARM: Fix delayed dcache flush for ARMv6 non-aliasing caches\n\nflush_dcache_page() did nothing for these caches, but since they\nsuffer from I/D cache coherency issues, we need to ensure that data\nis written back to RAM.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n"
    }
  ],
  "next": "4e71e47da3367e8df5994a17fb421ddeaa5025e3"
}