)]}'
{
  "log": [
    {
      "commit": "081d835fa4ce70ad1e42ac76de850a49e23a1557",
      "tree": "8d76d9a5276d3eb8f6fc4a0ab3555f3234a48022",
      "parents": [
        "c15524a40a1603dc56a8691c4f50172fb86c23d8"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Tue Nov 02 22:28:01 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Dec 17 19:44:35 2010 +0000"
      },
      "message": "MIPS: Fix build errors in sc-mips.c\n\nSeen with malta_defconfig on Linus\u0027 tree:\n\n  CC      arch/mips/mm/sc-mips.o\narch/mips/mm/sc-mips.c: In function \u0027mips_sc_is_activated\u0027:\narch/mips/mm/sc-mips.c:77: error: \u0027config2\u0027 undeclared (first use in this function)\narch/mips/mm/sc-mips.c:77: error: (Each undeclared identifier is reported only once\narch/mips/mm/sc-mips.c:77: error: for each function it appears in.)\narch/mips/mm/sc-mips.c:81: error: \u0027tmp\u0027 undeclared (first use in this function)\nmake[2]: *** [arch/mips/mm/sc-mips.o] Error 1\nmake[1]: *** [arch/mips/mm] Error 2\nmake: *** [arch/mips] Error 2\n\n[Ralf: Cosmetic changes to minimize the number of arguments passed to\nmips_sc_is_activated]\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1752/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "a3aad4aaf871045ab1dd9c99be6c1ace881d8eb0",
      "tree": "17fa5ace3d47ef500b0c8e1e1fc2d5adcf02ba03",
      "parents": [
        "d002aaadf84c081623a0a8502c122d1492fbd47c"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Dec 09 19:14:09 2010 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Dec 16 18:11:01 2010 +0000"
      },
      "message": "MIPS: Rename mips_dma_cache_sync back to dma_cache_sync\n\nThis fixes IP22 and IP28 build errors.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "ea31a6b203710c03d1fc025377a19572e620588a",
      "tree": "b9a39c79e7080b9790936618a704439d057cb78a",
      "parents": [
        "af231172634b5c0923fa7484a043fadcc07e899e"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Wed Oct 20 20:05:42 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:52 2010 +0100"
      },
      "message": "MIPS: Honor L2 bypass bit\n\nOn many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates\nthat the L2 cache is disabled and therefore Linux should not attempt\nto use it.\n\n[Ralf: Moved the code added by Kevin\u0027s original patch into a separate\nfunction that can easily be replaced for platforms that need more a\ndifferent probe.]\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: linux-mips@linux-mips.org\u003e\nCc: \u003clinux-kernel@vger.kernel.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1723/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "602977b0d672687909b0cb0542ede134ed6ef858",
      "tree": "8f40b3cfbf2cc32a445a69a548837521fcdfd7d6",
      "parents": [
        "3a9ab99e0341558e451327fbbfc39b0d3cff7e9a"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Sat Oct 16 14:22:30 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:50 2010 +0100"
      },
      "message": "MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code\n\nBMIPS processor cores are used in 50+ different chipsets spread across\n5+ product lines.  In many cases the chipsets do not share the same\nperipheral register layouts, the same register blocks, the same\ninterrupt controllers, the same memory maps, or much of anything else.\n\nBut, across radically different SoCs that share nothing more than the\nsame BMIPS CPU, a few things are still mostly constant:\n\nSMP operations\nAccess to performance counters\nDMA cache coherency quirks\nCache and memory bus configuration\n\nSo, it makes sense to treat each BMIPS processor type as a generic\n\"building block,\" rather than tying it to a specific SoC.  This makes it\neasier to support a large number of BMIPS-based chipsets without\nunnecessary duplication of code, and provides the infrastructure needed\nto support BMIPS-proprietary features.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: mbizon@freebox.fr\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nTested-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1706/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\n"
    },
    {
      "commit": "7f788d2d53085815d474559cd51ef1f38b0a9bb8",
      "tree": "32c2b6af15da818a02502a678225ff4de754b542",
      "parents": [
        "6dbd972850c092e50e10bd14a3324e2abe88997a"
      ],
      "author": {
        "name": "Deng-Cheng Zhu",
        "email": "dengcheng.zhu@gmail.com",
        "time": "Tue Oct 12 19:37:21 2010 +0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:48 2010 +0100"
      },
      "message": "MIPS: add support for software performance events\n\nSoftware events are required as part of the measurable stuff by the\nLinux performance counter subsystem. Here is the list of events added by\nthis patch:\nPERF_COUNT_SW_PAGE_FAULTS\nPERF_COUNT_SW_PAGE_FAULTS_MIN\nPERF_COUNT_SW_PAGE_FAULTS_MAJ\nPERF_COUNT_SW_ALIGNMENT_FAULTS\nPERF_COUNT_SW_EMULATION_FAULTS\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nReviewed-by: Matt Fleming \u003cmatt@console-pimps.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1686/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "c9941158fd8a539a56b0e8a4740ec1f6beb23ea3",
      "tree": "73e3868737061e1d5b0b61c182ea443e3ccd94e3",
      "parents": [
        "468ffde46d429fbd291b0ef43a06afe9c837629f"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Oct 07 16:03:53 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:43 2010 +0100"
      },
      "message": "MIPS: Octeon: Apply CN63XXP1 errata workarounds.\n\nThe CN63XXP1 needs a couple of workarounds to ensure memory is not written\nin unexpected ways.\n\nAll PREF with hints in the range 0-4,6-24 are replaced with PREF 28.  We\npass a flag to the assembler to cover compiler generated code, and patch\nuasm for the dynamically generated code.\n\nThe write buffer threshold is reduced to 4.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1672/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "f8bf7e688c226ba83b35a1547146e296e14b33c7",
      "tree": "c46c98c7cb29e3c93d4b54c5e8e991e19485b79d",
      "parents": [
        "1584d7f2d58999c00066a4afc4ad95e07b2a04e8"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Oct 07 16:03:44 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:36 2010 +0100"
      },
      "message": "MIPS: Octeon: Handle Octeon II caches.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1664/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "48e1fd5a81416a037f5a48120bf281102f2584e2",
      "tree": "c5c4bd344f50493bb1d1c36d485300e9061c5aa2",
      "parents": [
        "43e4f7ae4b4a96b5e84f6e1592d2e9353138e88c"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri Oct 01 13:27:32 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:31 2010 +0100"
      },
      "message": "MIPS: Convert DMA to use dma-mapping-common.h\n\nUse asm-generic/dma-mapping-common.h to handle all DMA mapping operations\nand establish a default get_dma_ops() that forwards all operations to the\nexisting code.\n\nAugment dev_archdata to carry a pointer to the struct dma_map_ops, allowing\nDMA operations to be overridden on a per device basis.  Currently this is\nnever filled in, so the default dma_map_ops are used.  A follow-on patch\nsets this for Octeon PCI devices.\n\nAlso initialize the dma_debug system as it is now used if it is configured.\n\nIncludes fixes by Kevin Cernekee \u003ccernekee@gmail.com\u003e.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1637/\nPatchwork: http://patchwork.linux-mips.org/patch/1678/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "48a26e60c6a5adb0d2f3ba56ea7c5bbb58d2118e",
      "tree": "627c04e1a90ff6330c9c1e47164193eb9c2b3170",
      "parents": [
        "c8c5f3fd9f0518cef58c9114513eee61855dec44"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:25 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:25 2010 +0100"
      },
      "message": "MIPS: Remove wait argument of r4k_on_each_cpu\n\nAll callers were passing in 1 anyway.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "c8c5f3fd9f0518cef58c9114513eee61855dec44",
      "tree": "6cc8cea12b18a3409fed5e84c1afb20596ebb094",
      "parents": [
        "7837314d141c661c70bc13c5050694413ecfe14a"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:25 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Oct 29 19:08:25 2010 +0100"
      },
      "message": "MIPS: More detailed description of r4k_on_each_cpu\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "20273941f2129aa5a432796d98a276ed73d60782",
      "tree": "85da0d951ac10f239f81ad7f69559fdeb692095b",
      "parents": [
        "a8e23a291852cd7c4fb5ca696dbb93912185ad10"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Wed Oct 27 15:32:58 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Oct 27 18:03:05 2010 -0700"
      },
      "message": "mm: fix race in kunmap_atomic()\n\nChristoph reported a nice splat which illustrated a race in the new stack\nbased kmap_atomic implementation.\n\nThe problem is that we pop our stack slot before we\u0027re completely done\nresetting its state -- in particular clearing the PTE (sometimes that\u0027s\nCONFIG_DEBUG_HIGHMEM).  If an interrupt happens before we actually clear\nthe PTE used for the last slot, that interrupt can reuse the slot in a\ndirty state, which triggers a BUG in kmap_atomic().\n\nFix this by introducing kmap_atomic_idx() which reports the current slot\nindex without actually releasing it and use that to find the PTE and delay\nthe _pop() until after we\u0027re completely done.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nReported-by: Christoph Hellwig \u003chch@infradead.org\u003e\nAcked-by: Rik van Riel \u003criel@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "3e4d3af501cccdc8a8cca41bdbe57d54ad7e7e73",
      "tree": "2ce507f7ec7275563653e52f18606aba4f99b7f1",
      "parents": [
        "61ecdb801ef2cd28e32442383106d7837d76deac"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Tue Oct 26 14:21:51 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue Oct 26 16:52:08 2010 -0700"
      },
      "message": "mm: stack based kmap_atomic()\n\nKeep the current interface but ignore the KM_type and use a stack based\napproach.\n\nThe advantage is that we get rid of crappy code like:\n\n\t#define __KM_PTE\t\t\t\\\n\t\t(in_nmi() ? KM_NMI_PTE : \t\\\n\t\t in_irq() ? KM_IRQ_PTE :\t\\\n\t\t KM_PTE0)\n\nand in general can stop worrying about what context we\u0027re in and what kmap\nslots might be appropriate for that.\n\nThe downside is that FRV kmap_atomic() gets more expensive.\n\nFor now we use a CPP trick suggested by Andrew:\n\n  #define kmap_atomic(page, args...) __kmap_atomic(page)\n\nto avoid having to touch all kmap_atomic() users in a single patch.\n\n[ not compiled on:\n  - mn10300: the arch doesn\u0027t actually build with highmem to begin with ]\n\n[akpm@linux-foundation.org: coding-style fixes]\n[akpm@linux-foundation.org: fix up drivers/gpu/drm/i915/intel_overlay.c]\nAcked-by: Rik van Riel \u003criel@redhat.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Hugh Dickins \u003chughd@google.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Dave Airlie \u003cairlied@linux.ie\u003e\nCc: Li Zefan \u003clizf@cn.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "a2e715a86c6dc85fb4a13c0c818637131de44cd2",
      "tree": "3a7cc8414c582403eb87cb573b3f685fce18414f",
      "parents": [
        "244599469f4c5860c8a4ae8fa8c6907a10caeccf"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 02 23:22:23 2010 +0200"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Oct 04 18:33:56 2010 +0100"
      },
      "message": "MIPS: DMA: Fix computation of DMA flags from device\u0027s coherent_dma_mask.\n\nThis only matters for ISA devices with a 24-bit DMA limit or for devices\nwith a 32-bit DMA limit on systems with ZONE_DMA32 enabled.  The latter\ncurrently only affects 32-bit PCI cards on Sibyte-based systems with more\nthan 1GB RAM installed.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "543001f8d8a878c3babe4525cb16d83d25c16762",
      "tree": "5a20cb97445a6cf5576b319d1708f6f50fec3cb3",
      "parents": [
        "26deda5ceedbe28df4beb3b98e3fbce281b53a07"
      ],
      "author": {
        "name": "Ricardo Mendoza",
        "email": "ricmm@gentoo.org",
        "time": "Fri Aug 06 11:12:57 2010 -0430"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Oct 04 18:33:54 2010 +0100"
      },
      "message": "MIPS: RM7000: Symbol should be static\n\nSigned-off-by: Ricardo Mendoza \u003cricmm@gentoo.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1540/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "3b9c6c11f519718d618f5d7c9508daf78b207f6f",
      "tree": "6c99992e25b9305fbe3977dff30f5eeb445f25e0",
      "parents": [
        "d80e0d96a328cc864a1cb359f545a6ed0c61812d"
      ],
      "author": {
        "name": "FUJITA Tomonori",
        "email": "fujita.tomonori@lab.ntt.co.jp",
        "time": "Tue Aug 10 18:03:25 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Aug 11 08:59:21 2010 -0700"
      },
      "message": "dma-mapping: remove dma_is_consistent API\n\nArchitectures implement dma_is_consistent() in different ways (some\nmisinterpret the definition of API in DMA-API.txt).  So it hasn\u0027t been so\nuseful for drivers.  We have only one user of the API in tree.  Unlikely\nout-of-tree drivers use the API.\n\nEven if we fix dma_is_consistent() in some architectures, it doesn\u0027t look\nuseful at all.  It was invented long ago for some old systems that can\u0027t\nallocate coherent memory at all.  It\u0027s better to export only APIs that are\ndefinitely necessary for drivers.\n\nLet\u0027s remove this API.\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: James Bottomley \u003cJames.Bottomley@HansenPartnership.com\u003e\nReviewed-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\nCc: \u003clinux-arch@vger.kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "597781f3e51f48ef8e67be772196d9e9673752c4",
      "tree": "6e1974bc899889da40f2fde47b04a5ece0bd3399",
      "parents": [
        "3edd4fc9537d95e460d502987c63a90d6b9a7a82"
      ],
      "author": {
        "name": "Cesar Eduardo Barros",
        "email": "cesarb@cesarb.net",
        "time": "Mon Aug 09 17:18:32 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Mon Aug 09 20:44:54 2010 -0700"
      },
      "message": "kmap_atomic: make kunmap_atomic() harder to misuse\n\nkunmap_atomic() is currently at level -4 on Rusty\u0027s \"Hard To Misuse\"\nlist[1] (\"Follow common convention and you\u0027ll get it wrong\"), except in\nsome architectures when CONFIG_DEBUG_HIGHMEM is set[2][3].\n\nkunmap() takes a pointer to a struct page; kunmap_atomic(), however, takes\ntakes a pointer to within the page itself.  This seems to once in a while\ntrip people up (the convention they are following is the one from\nkunmap()).\n\nMake it much harder to misuse, by moving it to level 9 on Rusty\u0027s list[4]\n(\"The compiler/linker won\u0027t let you get it wrong\").  This is done by\nrefusing to build if the type of its first argument is a pointer to a\nstruct page.\n\nThe real kunmap_atomic() is renamed to kunmap_atomic_notypecheck()\n(which is what you would call in case for some strange reason calling it\nwith a pointer to a struct page is not incorrect in your code).\n\nThe previous version of this patch was compile tested on x86-64.\n\n[1] http://ozlabs.org/~rusty/index.cgi/tech/2008-04-01.html\n[2] In these cases, it is at level 5, \"Do it right or it will always\n    break at runtime.\"\n[3] At least mips and powerpc look very similar, and sparc also seems to\n    share a common ancestor with both; there seems to be quite some\n    degree of copy-and-paste coding here. The include/asm/highmem.h file\n    for these three archs mention x86 CPUs at its top.\n[4] http://ozlabs.org/~rusty/index.cgi/tech/2008-03-30.html\n[5] As an aside, could someone tell me why mn10300 uses unsigned long as\n    the first parameter of kunmap_atomic() instead of void *?\n\nSigned-off-by: Cesar Eduardo Barros \u003ccesarb@cesarb.net\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e (arch/arm)\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e (arch/mips)\nCc: David Howells \u003cdhowells@redhat.com\u003e (arch/frv, arch/mn10300)\nCc: Koichi Yasutake \u003cyasutake.koichi@jp.panasonic.com\u003e (arch/mn10300)\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e (arch/parisc)\nCc: Helge Deller \u003cdeller@gmx.de\u003e (arch/parisc)\nCc: \"James E.J. Bottomley\" \u003cjejb@parisc-linux.org\u003e (arch/parisc)\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e (arch/powerpc)\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e (arch/powerpc)\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e (arch/sparc)\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e (arch/x86)\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e (arch/x86)\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e (arch/x86)\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e (include/asm-generic)\nCc: Rusty Russell \u003crusty@rustcorp.com.au\u003e (\"Hard To Misuse\" list)\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "c1bf207d6ee1eb72e9c10365edbdc7c9ff7fb9b0",
      "tree": "4c5875c8bd9087cd7b2193ac264c002cc384febb",
      "parents": [
        "2ea6399f553bf9a47260723b44d50f747e310218"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Tue Aug 03 11:22:20 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:29 2010 +0100"
      },
      "message": "MIPS: kprobe: Add support.\n\nThis patch is based on previous work by Sony and Himanshu Chauhan.\n\nI have done some cleanup and implemented JProbes and KRETPROBES.  The\nKRETPROBES part is pretty much copied verbatim from powerpc.  A possible\nfuture enhance might be to factor out the common code.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: Himanshu Chauhan \u003chschauhan@nulltrace.org\u003e\nTo: linux-mips@linux-mips.org\nTo: ananth@in.ibm.com,\nTo: anil.s.keshavamurthy@intel.com\nTo: davem@davemloft.net\nTo: masami.hiramatsu.pt@hitachi.com\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1525/\nPatchwork: https://patchwork.linux-mips.org/patch/1530/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "22b0763a2328434ac68cca884e1b7d350ca61332",
      "tree": "59635ba7ba3368d40defdebc07c94d61d5941491",
      "parents": [
        "5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri Jul 23 18:41:43 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:21 2010 +0100"
      },
      "message": "MIPS: uasm: Add option to export uasm API.\n\nA \u0027select EXPORT_UASM\u0027 in Kconfig will cause the uasm to be exported\nfor use in modules.  When it is exported, all the uasm data and code\ncease to be __init and __initdata.\n\nAlso daddiu_bug cannot be __cpuinitdata if uasm is exported.  The\ncleanest thing is to just make it normal data.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nTo: wim@iguana.be\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1500/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf",
      "tree": "e307c9bccdf7a5dfd32fd5157b0d8b5f617a8dfc",
      "parents": [
        "de6d5b555c1887b5b9b59854a45ebd4805fb4b39"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri Jul 23 18:41:42 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:21 2010 +0100"
      },
      "message": "MIPS: uasm: Add BBIT0 and BBIT1 instructions\n\nThese are OCTEON specific instructions.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nTo: wim@iguana.be\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1496/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "de6d5b555c1887b5b9b59854a45ebd4805fb4b39",
      "tree": "6f99e2f60a21a7ed4de851942ca4925b16ebb250",
      "parents": [
        "ca148125e6134de334b61822539d220794d8da18"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri Jul 23 18:41:41 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:20 2010 +0100"
      },
      "message": "MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nTo: wim@iguana.be\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1495/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "83ccf69d8f118306e90af703f32109edb6c1e4a1",
      "tree": "4fbbfdf6e9f57eeafd2b79d11b2208ba915c5f29",
      "parents": [
        "babba4f11379fb3804de802a3d0bc6b96c59d547"
      ],
      "author": {
        "name": "Lars-Peter Clausen",
        "email": "lars@metafoo.de",
        "time": "Sat Jul 17 11:07:51 2010 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:12 2010 +0100"
      },
      "message": "MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-Chip\n\nAdds a new cpu type for the JZ4740 to the Linux MIPS architecture code.\nIt also adds the iomem addresses for the different components found on\na JZ4740 SoC.\n\nSigned-off-by: Lars-Peter Clausen \u003clars@metafoo.de\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1464/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "745aef5df1e2277ee9e34d86491084c0d6106338",
      "tree": "3d20535d8b5d7f1ccc2867240cf70376eb23a574",
      "parents": [
        "58a6d45193a4f5af9d55f243779ea485656e3a22"
      ],
      "author": {
        "name": "Ricardo Mendoza",
        "email": "ricmm@gentoo.org",
        "time": "Mon Jul 19 05:00:00 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:06 2010 +0100"
      },
      "message": "MIPS: RM7000: Add support for tertiary cache\n\nAdd support for the external T-cache interface. Allow for platform\nindependent size probing from 512KB to 8MB in powers of two.\n\nSigned-off-by: Ricardo Mendoza \u003cricmm@gentoo.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1477/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "58a6d45193a4f5af9d55f243779ea485656e3a22",
      "tree": "493f9cbd858c38754374a2b90e5d467e052628ec",
      "parents": [
        "65ab2826c4185fc949c3a720186bd09d75ea14a4"
      ],
      "author": {
        "name": "Ricardo Mendoza",
        "email": "ricmm@gentoo.org",
        "time": "Mon Jul 19 04:59:59 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:26:06 2010 +0100"
      },
      "message": "MIPS: RM7000: Make use of cache_op() instead of inline asm\n\nSmall cleanup of the cache code to get rid of inline asm, in preparation\nto give tertiary cache support.\n\nSigned-off-by: Ricardo Mendoza \u003cricmm@gentoo.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1476/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "ea7a8463be6b5dd824bdf42b8f2af1d34f157877",
      "tree": "33db1a433e4a9a772659f3ced0b3d36f5e3ef3f5",
      "parents": [
        "034260d6779087431a8b2f67589c68b919299e5c"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:25:59 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:25:59 2010 +0100"
      },
      "message": "MIPS: Remove unnecessary header file inclusion from fault.c.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "66f9ba101f54bda63ab1db97f9e9e94763d0651b",
      "tree": "5f7f16a2fa212641a7adb259f67ac2f85bdf8bcc",
      "parents": [
        "9aeb404b4cfed41fdfd01e6fb3cc995c327ba98e"
      ],
      "author": {
        "name": "Sam Ravnborg",
        "email": "sam@ravnborg.org",
        "time": "Sun May 30 16:26:40 2010 +0200"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Aug 05 13:25:44 2010 +0100"
      },
      "message": "MIPS: Add -Werror to arch/mips/Kbuild\n\nAdding subdirs-ccflags-y :\u003d -Werror to arch/mips/Kbuild\nlet us in one go cover all files with -Werror.\n\nIn addition this allows us to remove the\nindividual -Werror definition in various Makefile.\n\nAdding the definition to Kbuild as a recursive\noption help us not to forget to do so.\n\nWith this change we now compile arch/mips/kernel/cpufreq with -Werror\n\nOne drawback:\nWhen specifying a subdirectory covered by the Kbuild file like this:\n\n    make arch/mips/kernel/\n\nthen kbuild fails to pick up the -Werror definition.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nTo: linux-mips \u003clinux-mips@linux-mips.org\u003e\nTo: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1301/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "1ec56329ff939aba29291c0dec1a28ceed660162",
      "tree": "45788e1f4f0baef44d727e7ca31821c16ba6317f",
      "parents": [
        "3be6022c27ace1e3b4ba963e7ffd2e3b60cecd8a"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Apr 28 12:16:18 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Apr 30 20:52:48 2010 +0100"
      },
      "message": "MIPS: Check for accesses beyond the end of the PGD.\n\nFor some combinations of PAGE_SIZE and vmbits, it is possible to have\nuserspace access that are beyond what is covered by the PGD, but within\nvmbits.  Such an access would cause the TLB refill handler to load garbage\nvalues for PMD and PTE potentially giving userspace access to parts of the\nphysical address space to which it is not entitled.\n\nIn the TLB refill hot path, we add a single dsrl instruction so we can\ncheck if any bits outside of the range covered by the PGD are set.  In\nthe vmalloc side we then separate the bad case from the normal vmalloc\ncase and call tlb_do_page_fault_0 if warranted.  This slows us down a\nbit, but has the benefit of yielding deterministic behavior.\n\n[Ralf: Fixed build error for 32-bit kernels.]\n[Ralf: Folded lmo commit c8c0e22b2aa3982852b44279638ef37f9aa31b7d into this\n commit.]\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1152/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n"
    },
    {
      "commit": "3be6022c27ace1e3b4ba963e7ffd2e3b60cecd8a",
      "tree": "617178ac2ee9395e609aef3899b56756fb701cbb",
      "parents": [
        "26b9e547e90db6b8b409084a9d4501124ff492b3"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Apr 28 12:16:17 2010 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Apr 30 20:52:47 2010 +0100"
      },
      "message": "MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.c\n\nThis makes the code somewhat cleaner while reducing the risk of shift\namount overflows when various page table related options are changed.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1154/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "7b3e543ddb39b69b75c9c24bb54180eca152f541",
      "tree": "78e3ef45016424cdb970fe0fb136b31e202a2dfa",
      "parents": [
        "3d45285dd1ff4d4a1361b95e2d6508579a4402b5"
      ],
      "author": {
        "name": "Anton Altaparmakov",
        "email": "aia21@cam.ac.uk",
        "time": "Thu Mar 25 20:48:12 2010 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Apr 12 17:26:21 2010 +0100"
      },
      "message": "MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modules\n\nCommit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp.\n351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) break non-GPL modules\nthat use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on\nMIPS.\n\nAll those functions are EXPORT_SYMBOL() so are meant to be allowed to be\nused by non-GPL kernel modules.  These calls all take page protection as\nan argument which is normally a constant like PAGE_KERNEL.\n\nThis commit causes all protection constants like PAGE_KERNEL to not be\nconstants and instead to contain the GPL-only symbol _page_cachable_default.\n\nThis means that all calls to __vmalloc(), vmap(), etc, cause non-GPL\nmodules to fail to link with the complaint that they are trying to use the\nGPL-only symbol _page_cachable_default...\n\nChange EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for\nnon-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc.\n\nSigned-off-by: Anton Altaparmakov \u003caia21@cantab.net\u003e\nCc: Chris Dearman \u003cchris@mips.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: http://patchwork.linux-mips.org/patch/1084/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "3d45285dd1ff4d4a1361b95e2d6508579a4402b5",
      "tree": "8130cd7c5289983de1e622728de07eb1588a326a",
      "parents": [
        "5e3644a95db11e2e582ae3765ffad6e0cce5376e"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Tue Mar 23 17:56:38 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Apr 12 17:26:21 2010 +0100"
      },
      "message": "MIPS: Sibyte: Fix M3 TLB exception handler workaround.\n\nThe M3 workaround needs to cmpare the region and VPN2 fields only.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "5808184f1b2fe06ef8a54a2b7fb1596d58098acf",
      "tree": "1ecb3addfdc3269cf55cffe112976e97a828736e",
      "parents": [
        "8d9df29db273ab9a330828f4f4f6669d293a730a"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Tue Mar 23 15:54:50 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Apr 12 17:26:20 2010 +0100"
      },
      "message": "MIPS: uasm: Add OR instruction.\n\nThis is needed for the fix of the M3 workaround.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "58b9e2239fa63c7c470acb4a77e9da17e6a6fa4f",
      "tree": "2f94c2146e2fe9adba511c4b66c3e3dd89d669b9",
      "parents": [
        "847253b9483f713b3797877034e0940fd45ce375"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Feb 18 16:13:03 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Apr 12 17:26:14 2010 +0100"
      },
      "message": "MIPS: Add SYSCALL to uasm.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/976/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05",
      "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1",
      "parents": [
        "ed391f4ebf8f701d3566423ce8f17e614cde9806"
      ],
      "author": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Wed Mar 24 17:04:11 2010 +0900"
      },
      "committer": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Tue Mar 30 22:02:32 2010 +0900"
      },
      "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files.  percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed.  Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability.  As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n  http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n  only the necessary includes are there.  ie. if only gfp is used,\n  gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n  blocks and try to put the new include such that its order conforms\n  to its surrounding.  It\u0027s put in the include block which contains\n  core kernel includes, in the same order that the rest are ordered -\n  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n  doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n  because the file doesn\u0027t have fitting include block), it prints out\n  an error message indicating which .h file needs to be added to the\n  file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n   over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n   and ~3000 slab.h inclusions.  The script emitted errors for ~400\n   files.\n\n2. Each error was manually checked.  Some didn\u0027t need the inclusion,\n   some needed manual addition while adding it to implementation .h or\n   embedding .c file was more appropriate for others.  This step added\n   inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n   from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n   e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n   APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n   editing them as sprinkling gfp.h and slab.h inclusions around .h\n   files could easily lead to inclusion dependency hell.  Most gfp.h\n   inclusion directives were ignored as stuff from gfp.h was usually\n   wildly available and often used in preprocessor macros.  Each\n   slab.h inclusion directive was examined and added manually as\n   necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my\n   distributed build env didn\u0027t work with gcov compiles) and a few\n   more options had to be turned off depending on archs to make things\n   build (like ipr on powerpc/64 which failed due to missing writeq).\n\n   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n   * powerpc and powerpc64 SMP allmodconfig\n   * sparc and sparc64 SMP allmodconfig\n   * ia64 SMP allmodconfig\n   * s390 SMP allmodconfig\n   * alpha SMP allmodconfig\n   * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n   a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n"
    },
    {
      "commit": "46bbffad54bd48bb809f2691c1970a79a588976b",
      "tree": "21779a574f118b1cba5d6832bc0a0fa3bee97075",
      "parents": [
        "85fe20bfd415af0a2e93bd1166533d4a6eb591ea",
        "c1fd1b43831fa20c91cdd461342af8edf2e87c2f"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Feb 28 10:38:45 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Feb 28 10:38:45 2010 -0800"
      },
      "message": "Merge branch \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, mm: Unify kernel_physical_mapping_init() API\n  x86, mm: Allow highmem user page tables to be disabled at boot time\n  x86: Do not reserve brk for DMI if it\u0027s not going to be used\n  x86: Convert tlbstate_lock to raw_spinlock\n  x86: Use the generic page_is_ram()\n  x86: Remove BIOS data range from e820\n  Move page_is_ram() declaration to mm.h\n  Generic page_is_ram: use __weak\n  resources: introduce generic page_is_ram()\n"
    },
    {
      "commit": "6f329468f3086e9d8f3832930fdb09ab3769176b",
      "tree": "d77b274399cf101fba59b0de01fd9491b4e28fee",
      "parents": [
        "6dd9344cfc41bcc60a01cdc828cb278be7a10e01"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Feb 10 15:12:48 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:26 2010 +0100"
      },
      "message": "MIPS: Give Octeon+ CPUs their own cputype.\n\nThis allows us to treat them differently at runtime.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/951/\nPatchwork: http://patchwork.linux-mips.org/patch/987/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "6dd9344cfc41bcc60a01cdc828cb278be7a10e01",
      "tree": "9c62d563eba8f3acfd1c826a63e6999261b06f5a",
      "parents": [
        "32546f38fab839eee6f62b3f06c2774eade4188a"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Feb 10 15:12:47 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:26 2010 +0100"
      },
      "message": "MIPS: Implement Read Inhibit/eXecute Inhibit\n\nThe SmartMIPS ASE specifies how Read Inhibit (RI) and eXecute Inhibit\n(XI) bits in the page tables work.  The upper two bits of EntryLo{0,1}\nare RI and XI when the feature is enabled in the PageGrain register.\nSmartMIPS only covers 32-bit systems.  Cavium Octeon+ extends this to\n64-bit systems by continuing to place the RI and XI bits in the top of\nEntryLo even when EntryLo is 64-bits wide.\n\nBecause we need to carry the RI and XI bits in the PTE, the layout of\nthe PTE is changed.  There is a two instruction overhead in the TLB\nrefill hot path to get the EntryLo bits into the proper position.\nAlso the TLB load exception has to probe the TLB to check if RI or XI\ncaused the exception.\n\nAlso of note is that the layout of the PTE bits is done at compile and\nruntime rather than statically.  In the 32-bit case this allows for\nthe same number of PFN bits as before the patch as the _PAGE_HUGE is\nnot supported in 32-bit kernels (we have _PAGE_NO_EXEC and\n_PAGE_NO_READ instead of _PAGE_READ and _PAGE_HUGE).\n\nThe patch is tested on Cavium Octeon+, but should also work on 32-bit\nsystems with the Smart-MIPS ASE.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/952/\nPatchwork: http://patchwork.linux-mips.org/patch/956/\nPatchwork: http://patchwork.linux-mips.org/patch/962/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "32546f38fab839eee6f62b3f06c2774eade4188a",
      "tree": "582cb9fb18c8e741d24a4a27d9c2dee46bfd977f",
      "parents": [
        "9fe2e9d6f5390d7151a0b9d8c100f0da26eaa2b7"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Feb 10 15:12:46 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:25 2010 +0100"
      },
      "message": "MIPS: Add TLBR and ROTR to uasm.\n\nThe soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and\nROTR support in uasm.  We also add a UASM_i_ROTR macro.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/953/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "9b8c38917b8e083a6343bb5a0c6bbaea78ebff7a",
      "tree": "7b6a8513c3335f005e6a58b06f53cf179eabeb21",
      "parents": [
        "52d7ecd033316b0540a6ac4af70574fae4aba295"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Feb 10 15:12:44 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:25 2010 +0100"
      },
      "message": "MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.\n\n64-bit CPUs have 64-bit c0_entrylo{0,1} registers.  We should use the\n64-bit dmtc0 instruction to set them.  This becomes important if we\nwant to set the RI and XI bits present in some processors.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/954/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "b66bb6090d9aa36931911e34d3f069932934b6fe",
      "tree": "178b1f6082ce245cf2918acbc4b1f21cc9d42172",
      "parents": [
        "ab4ba291683d07038c7ddf1eec191d3d09e1f468"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Tue Feb 02 17:19:38 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:23 2010 +0100"
      },
      "message": "MIPS: Remove #if 0 r4k_update_mmu_cache_hwbug\n\nThe function is #if 0ed out.  There are no other occurrences of its\nname in the tree.  It is safe to remove.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/936/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "3482d713a91befb8c96722cb8d55aed36c212d9e",
      "tree": "e5b8f0e779fb64e9952765694ceaaf572aa6a0fa",
      "parents": [
        "fcf6735e9cf08343bef9ff43205d91ef102af52f"
      ],
      "author": {
        "name": "Florian Fainelli",
        "email": "florian@openwrt.org",
        "time": "Thu Jan 28 15:21:24 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:19 2010 +0100"
      },
      "message": "MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h\n\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nTo: linux-mips@linux-mips.org\nTo: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/887/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "e0e53dee69e07e9446eb16ceabd55a1116611696",
      "tree": "0f46618d019bf984e86c84c2bfd31c60869ba56d",
      "parents": [
        "2fe062608086f9b74a80f16272c5a59a3e05722f"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:14 2010 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:14 2010 +0100"
      },
      "message": "MIPS: Nuke trailing blank lines\n\nRecent git versions now warn about those and they\u0027ve always been a bit of\nan annoyance.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "2a880986d899f556f5a327bc77cc8760d5bb9c64",
      "tree": "179032b7895ca3594c3fec96a194178ffecf4ad6",
      "parents": [
        "f868ba29723be46e0981226d7455090d515b08ef"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri Jan 22 14:41:14 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:12 2010 +0100"
      },
      "message": "MIPS: Remove probe_tlb().\n\nThe function probe_tlb() only does anything for processors that are\nnot PRID_COMP_LEGACY.  This is precisely the set of processors for\nwhich decode_configs() is called to do identical tlbsize probing\ncalculations.  Therefore probe_tlb() is completely redundant and may\nbe removed.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/865/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "325f8a0a31df567dbafafc48f8e60f3c1f101a46",
      "tree": "b36383f4d483ecc6d057cdd41ef50b6403e89b9c",
      "parents": [
        "ef6c1fd662d18c0e2ed92825c8837e94b5ec3a1f"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri Dec 04 13:52:36 2009 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Feb 27 12:53:03 2010 +0100"
      },
      "message": "MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.\n\nFor 64-bit kernels with 64KB pages and two level page tables, there are\n42 bits worth of virtual address space This is larger than the 40 bits of\nvirtual address space obtained with the default 4KB Page size and three\nlevels, so there are no draw backs for using two level tables with this\nconfiguration.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/761/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "52ab320ac560af3333191a473e56615fb48fff95",
      "tree": "50498055e6f0c6ef4d96c8a735772c030e7207ee",
      "parents": [
        "627fa177a1502ad24390d945851209ac022f3a36"
      ],
      "author": {
        "name": "Yoichi Yuasa",
        "email": "yuasa@linux-mips.org",
        "time": "Sat Feb 20 21:23:22 2010 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Feb 22 21:42:11 2010 +0100"
      },
      "message": "MIPS: Highmem: Fix build error\n\narch/mips/mm/highmem.c: In function \u0027kmap_init\u0027:\narch/mips/mm/highmem.c:130: error: \u0027init_mm\u0027 undeclared (first use in this function)\narch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once\narch/mips/mm/highmem.c:130: error: for each function it appears in.)\n\nSigned-off-by: Yoichi Yuasa \u003cyuasa@linux-mips.org\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/980/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "b7e56edba4b02f2079042c326a8cd72a44635817",
      "tree": "b5042002e9747cd8fb1278d61f86d8b92a74c018",
      "parents": [
        "13ca0fcaa33f6b1984c4111b6ec5df42689fea6f",
        "b0483e78e5c4c9871fc5541875b3bc006846d46b"
      ],
      "author": {
        "name": "Thomas Gleixner",
        "email": "tglx@linutronix.de",
        "time": "Wed Feb 17 18:27:37 2010 +0100"
      },
      "committer": {
        "name": "Thomas Gleixner",
        "email": "tglx@linutronix.de",
        "time": "Wed Feb 17 18:28:05 2010 +0100"
      },
      "message": "Merge branch \u0027linus\u0027 into x86/mm\n\nx86/mm is on 32-rc4 and missing the spinlock namespace changes which\nare needed for further commits into this topic.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "63731c964d6cd9de4800891bd33b6f9e47a249bc",
      "tree": "32869cf37195162789b1a8d8d6041905539af9a2",
      "parents": [
        "59d302b342e5d451c4448479e82e1105864a3112"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Feb 04 15:48:49 2010 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Feb 10 22:15:45 2010 +0100"
      },
      "message": "MIPS: Fix __devinit __cpuinit confusion in cpu_cache_init\n\ncpu_cache_init and the things it calls should all be __cpuinit instead\nof __devinit.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/938/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "61ef2489dbf587258526cfd4ebf4bba3b079f401",
      "tree": "4806ed052c73d84821d958f306699b2a27da965e",
      "parents": [
        "ccef086454d4c97e7b722e9303390207d681cb4c"
      ],
      "author": {
        "name": "Wu Fengguang",
        "email": "fengguang.wu@intel.com",
        "time": "Fri Jan 22 16:16:19 2010 +0800"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon Feb 01 16:58:17 2010 -0800"
      },
      "message": "resources: introduce generic page_is_ram()\n\nIt\u0027s based on walk_system_ram_range(), for archs that don\u0027t have\ntheir own page_is_ram().\n\nThe static verions in MIPS and SCORE are also made global.\n\nv4: prefer plain 1 instead of PAGE_IS_RAM (H. Peter Anvin)\nv3: add comment (KAMEZAWA Hiroyuki)\n    \"AFAIK, this \"System RAM\" information has been used for kdump to\n    grab valid memory area and seems good for the kernel itself.\"\nv2: add PAGE_IS_RAM macro (Américo Wang)\n\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nCc: Américo Wang \u003cxiyou.wangcong@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nReviewed-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nSigned-off-by: Wu Fengguang \u003cfengguang.wu@intel.com\u003e\nLKML-Reference: \u003c20100122081619.GA6431@localhost\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "abbdc3d88aa2d5c937b21044c336bcd056c1732f",
      "tree": "c015bc3bbffcb074439fbe4c3b25f6f645774778",
      "parents": [
        "066000dd856709b6980123eb39b957fe26993f7b"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Dec 03 17:43:54 2009 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Tue Jan 12 18:19:29 2010 +0100"
      },
      "message": "MIPS: Cleanup forgotten label_module_alloc in tlbex.c\n\ncommit c8af165342e83a4eb078c9607d29a7c399d30a53 (lmo) rsp.\ne0cc87f59490d7d62a8ab2a76498dc8a2b64927a (kernel.org) left\nlabel_module_alloc unused.  Remove it now.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/752/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "4b529401c5089cf33f7165607cbc2fde43357bfb",
      "tree": "0e559e77e9a2c837cd7c25f3a48e83ee788d7d4b",
      "parents": [
        "50f411e34d623efbf4e4b4b0c1a4a20e04c5cc9e"
      ],
      "author": {
        "name": "Andreas Fenkart",
        "email": "andreas.fenkart@streamunlimited.com",
        "time": "Fri Jan 08 14:42:31 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Mon Jan 11 09:34:03 2010 -0800"
      },
      "message": "mm: make totalhigh_pages unsigned long\n\nMakes it consistent with the extern declaration, used when CONFIG_HIGHMEM\nis set Removes redundant casts in printout messages\n\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "13e79b462212ac46a046932af06117eaf7a9f77b",
      "tree": "711fe1984506c22d241a2bdccd9a7b9bd0b1778e",
      "parents": [
        "a9e8641f4c252f93875cf30cb28c0f333539f0bf"
      ],
      "author": {
        "name": "Akinobu Mita",
        "email": "akinobu.mita@gmail.com",
        "time": "Fri Nov 13 16:04:53 2009 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Dec 17 01:57:16 2009 +0000"
      },
      "message": "MIPS: Sibyte: Use hweight8 instead of counting bits\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/637/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "82622284dd2f8791f9759f3cef601520a8bc63b2",
      "tree": "ee47f43af373d0c021cc83ff9e22925942e9d001",
      "parents": [
        "92078e0618f525e22945040b5daea21d4b6d4a16"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Oct 14 12:16:56 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Dec 17 01:57:01 2009 +0000"
      },
      "message": "MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.\n\nProcessors that support the mips64r2 ISA can in four instructions\nconvert a shifted PGD pointer stored in the upper bits of c0_context\ninto a usable pointer.  By doing this we save a memory load and\nassociated potential cache miss in the TLB exception handlers.\n\nSince the upper bits of c0_context were holding the CPU number, we\nmove this to the upper bits of c0_xcontext which doesn\u0027t have enough\nbits to hold the PGD pointer, but has plenty for the CPU number.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "92078e0618f525e22945040b5daea21d4b6d4a16",
      "tree": "f5c222ab3dcc3fcfe08200dca2fd470d449cb2b7",
      "parents": [
        "f6ed1b3b3579db5c8c3aaf6fd3010c706973a35d"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Oct 14 12:16:55 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Dec 17 01:57:01 2009 +0000"
      },
      "message": "MIPS: Add drotr and dins instructions to uasm.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "6b2f3d1f769be5779b479c37800229d9a4809fc3",
      "tree": "046ef6736ec6c25ab1c68741ba715d13645af336",
      "parents": [
        "59bc055211b8d266ab6089158058bf8268e02006"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Tue Oct 27 11:05:28 2009 +0100"
      },
      "committer": {
        "name": "Jan Kara",
        "email": "jack@suse.cz",
        "time": "Thu Dec 10 15:02:50 2009 +0100"
      },
      "message": "vfs: Implement proper O_SYNC semantics\n\nWhile Linux provided an O_SYNC flag basically since day 1, it took until\nLinux 2.4.0-test12pre2 to actually get it implemented for filesystems,\nsince that day we had generic_osync_around with only minor changes and the\ngreat \"For now, when the user asks for O_SYNC, we\u0027ll actually give\nO_DSYNC\" comment.  This patch intends to actually give us real O_SYNC\nsemantics in addition to the O_DSYNC semantics.  After Jan\u0027s O_SYNC\npatches which are required before this patch it\u0027s actually surprisingly\nsimple, we just need to figure out when to set the datasync flag to\nvfs_fsync_range and when not.\n\nThis patch renames the existing O_SYNC flag to O_DSYNC while keeping it\u0027s\nnumerical value to keep binary compatibility, and adds a new real O_SYNC\nflag.  To guarantee backwards compatiblity it is defined as expanding to\nboth the O_DSYNC and the new additional binary flag (__O_SYNC) to make\nsure we are backwards-compatible when compiled against the new headers.\n\nThis also means that all places that don\u0027t care about the differences can\njust check O_DSYNC and get the right behaviour for O_SYNC, too - only\nplaces that actuall care need to check __O_SYNC in addition.  Drivers and\nnetwork filesystems have been updated in a fail safe way to always do the\nfull sync magic if O_DSYNC is set.  The few places setting O_SYNC for\nlower layers are kept that way for now to stay failsafe.\n\nWe enforce that O_DSYNC is set when __O_SYNC is set early in the open path\nto make sure we always get these sane options.\n\nNote that parisc really screwed up their headers as they already define a\nO_DSYNC that has always been a no-op.  We try to repair it by using it for\nthe new O_DSYNC and redefinining O_SYNC to send both the traditional\nO_SYNC numerical value _and_ the O_DSYNC one.\n\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Grant Grundler \u003cgrundler@parisc-linux.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Andreas Dilger \u003cadilger@sun.com\u003e\nAcked-by: Trond Myklebust \u003cTrond.Myklebust@netapp.com\u003e\nAcked-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nAcked-by: Ulrich Drepper \u003cdrepper@redhat.com\u003e\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jan Kara \u003cjack@suse.cz\u003e\n"
    },
    {
      "commit": "f8ac04255dc8baa1c018e8028222d842efa56e6b",
      "tree": "4aedfaf3f4a2e5f0ffbc3280fa94e48e10ac9e38",
      "parents": [
        "da0bac33413b2888d3623dad3ad19ce76b688f07"
      ],
      "author": {
        "name": "Yoichi Yuasa",
        "email": "yoichi_yuasa@tripeaks.co.jp",
        "time": "Thu Jun 04 00:16:04 2009 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Nov 13 18:10:37 2009 +0100"
      },
      "message": "MIPS: Add DMA declare coherent memory support\n\nThe ohci-sm501 driver requires dma_declare_coherent_memory().  It is used\nby the driver\u0027s local memory allocation with dma_alloc_coherent().\n\nTested on TANBAC TB0287(VR4131 + SM501).\n\n[Ralf: Fixed reject in dma-default.c and removed the entire #if 0\u0027ed block\n in dma-mapping.h instead of just the #if 0.]\n\nSigned-off-by: Yoichi Yuasa \u003cyoichi_yuasa@tripeaks.co.jp\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "0f334a3e8c3586f81286345eb077ed32b375e8d6",
      "tree": "02278a0f6ef99b43c56af12ba44d964f099c70c3",
      "parents": [
        "39d2211d20518677511043d7ee16bbca6d0c5070"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Mon Sep 07 11:11:31 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Nov 02 12:00:04 2009 +0100"
      },
      "message": "MIPS: Fix machine check exception in kmap_coherent()\n\nOn an SMP system with cache aliases, the following sequence of events may\nhappen:\n\n1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a\n   temporary mapping in the fixmap region\n2) copy_page() starts on CPU0\n3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page()\n4) CPU0 takes the interrupt, interrupting copy_page()\n5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again\n6) The second invocation of kmap_coherent() on CPU0 tries to use the\n   same fixmap virtual address that was being used by copy_user_highpage()\n7) CPU0 throws a machine check exception for the TLB address conflict\n\nFixed by creating an extra set of fixmap entries for use in interrupt\nhandlers.  This prevents fixmap VA conflicts between copy_user_highpage()\nrunning in user context, and local_r4k_flush_cache_page() invoked from an\nSMP IPI.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "96983ffefce46312e9372d357309dda413553009",
      "tree": "da15ecb8a3c728af409fa0903f292731c358e222",
      "parents": [
        "a648e8119666782f21b509a7886be9b281e41ccb"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Fri Sep 18 19:12:45 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Sep 30 21:47:00 2009 +0200"
      },
      "message": "MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.\n\nThis extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover\nMIPSxx-style board cache code.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "55b8cab49dd43d227f0dd49e3524406fdc46d37b",
      "tree": "d12ddec7ae2ee5f0dd2d8dbea84ec834a0f42c53",
      "parents": [
        "7ce1df49e1b1b004ff15fb0af9a02c6b1ff71f70"
      ],
      "author": {
        "name": "Rusty Russell",
        "email": "rusty@rustcorp.com.au",
        "time": "Thu Sep 24 09:34:50 2009 -0600"
      },
      "committer": {
        "name": "Rusty Russell",
        "email": "rusty@rustcorp.com.au",
        "time": "Thu Sep 24 09:34:51 2009 +0930"
      },
      "message": "cpumask: use mm_cpumask() wrapper: mips\n\nMakes code futureproof against the impending change to mm-\u003ecpu_vm_mask.\n\nIt\u0027s also a chance to use the new cpumask_ ops which take a pointer\n(the older ones are deprecated, but there\u0027s no hurry for arch code).\n\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\n"
    },
    {
      "commit": "3089aa1b0c07fb7c48f9829c619f50198307789d",
      "tree": "63677c773c559458ba301bd448ecce6e007b6742",
      "parents": [
        "908eedc6168bd92e89f90d89fa389065a36358fa"
      ],
      "author": {
        "name": "KAMEZAWA Hiroyuki",
        "email": "kamezawa.hiroyu@jp.fujitsu.com",
        "time": "Tue Sep 22 16:45:48 2009 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Sep 23 07:39:41 2009 -0700"
      },
      "message": "kcore: use registerd physmem information\n\nFor /proc/kcore, each arch registers its memory range by kclist_add().\nIn usual,\n\n\t- range of physical memory\n\t- range of vmalloc area\n\t- text, etc...\n\nare registered but \"range of physical memory\" has some troubles.  It\ndoesn\u0027t updated at memory hotplug and it tend to include unnecessary\nmemory holes.  Now, /proc/iomem (kernel/resource.c) includes required\nphysical memory range information and it\u0027s properly updated at memory\nhotplug.  Then, it\u0027s good to avoid using its own code(duplicating\ninformation) and to rebuild kclist for physical memory based on\n/proc/iomem.\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nSigned-off-by: Jiri Slaby \u003cjirislaby@gmail.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nCc: KOSAKI Motohiro \u003ckosaki.motohiro@jp.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "a0614da88b67ffa3dbcc0d40b817e682c7c4a0ee",
      "tree": "ae4ca3a8553592af41f7c2cc1a64912d934f6baf",
      "parents": [
        "c30bb2a25fcfde6157e6154a32c14686fb0bedbe"
      ],
      "author": {
        "name": "KAMEZAWA Hiroyuki",
        "email": "kamezawa.hiroyu@jp.fujitsu.com",
        "time": "Tue Sep 22 16:45:44 2009 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Sep 23 07:39:41 2009 -0700"
      },
      "message": "kcore: register vmalloc area in generic way\n\nFor /proc/kcore, vmalloc areas are registered per arch.  But, all of them\nregisters same range of [VMALLOC_START...VMALLOC_END) This patch unifies\nthem.  By this.  archs which have no kclist_add() hooks can see vmalloc\narea correctly.\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "c30bb2a25fcfde6157e6154a32c14686fb0bedbe",
      "tree": "afa4811d46e5f9035a035b2c8c864bbb6c5af049",
      "parents": [
        "2ef43ec772551e975a6ea7cf22b59c84955aadf9"
      ],
      "author": {
        "name": "KAMEZAWA Hiroyuki",
        "email": "kamezawa.hiroyu@jp.fujitsu.com",
        "time": "Tue Sep 22 16:45:43 2009 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Sep 23 07:39:41 2009 -0700"
      },
      "message": "kcore: add kclist types\n\nPresently, kclist_add() only eats start address and size as its arguments.\nConsidering to make kclist dynamically reconfigulable, it\u0027s necessary to\nknow which kclists are for System RAM and which are not.\n\nThis patch add kclist types as\n  KCORE_RAM\n  KCORE_VMALLOC\n  KCORE_TEXT\n  KCORE_OTHER\n\nThis \"type\" is used in a patch following this for detecting KCORE_RAM.\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "cc013a88906bad9d2832d6316de1c7dbc1c2a794",
      "tree": "c47d1bc76cf9bbf94c328ca6e15ac99ddbab7603",
      "parents": [
        "73d7c33e81aed92ac185950a20407c1a2ea65a83"
      ],
      "author": {
        "name": "Geert Uytterhoeven",
        "email": "Geert.Uytterhoeven@sonycom.com",
        "time": "Mon Sep 21 17:02:36 2009 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue Sep 22 07:17:34 2009 -0700"
      },
      "message": "arches: drop superfluous casts in nr_free_pages() callers\n\nCommit 96177299416dbccb73b54e6b344260154a445375 (\"Drop free_pages()\")\nmodified nr_free_pages() to return \u0027unsigned long\u0027 instead of \u0027unsigned\nint\u0027.  This made the casts to \u0027unsigned long\u0027 in most callers superfluous,\nso remove them.\n\n[akpm@linux-foundation.org: coding-style fixes]\nSigned-off-by: Geert Uytterhoeven \u003cGeert.Uytterhoeven@sonycom.com\u003e\nReviewed-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nAcked-by: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Chris Zankel \u003czankel@tensilica.com\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "0de663ef8627f35fda9106a8faaca512f29e493e",
      "tree": "99e6b080199dae6ee2ced2edb91c5e29b1298c2f",
      "parents": [
        "512254ba8383c5dd7eca6819d0da1ce2fe9ede47"
      ],
      "author": {
        "name": "Maxime Bizon",
        "email": "mbizon@freebox.fr",
        "time": "Tue Aug 18 13:23:37 2009 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 17 20:07:52 2009 +0200"
      },
      "message": "MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.\n\nTodo: Nothing ever detects CPU_BCM6338 but the code tests for it anyway.\n\nSigned-off-by: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "2ca2ebfd952d0338a0972c1f1f56b9b0c1a3b09c",
      "tree": "6a43cd0634d9eb6d2fd1247b89b309d97095d698",
      "parents": [
        "e0cc87f59490d7d62a8ab2a76498dc8a2b64927a"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed Sep 02 15:47:34 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 17 20:07:52 2009 +0200"
      },
      "message": "MIPS: Don\u0027t corrupt page tables on vmalloc fault.\n\nThe code after the vmalloc_fault: label in do_page_fault() modifies\nuser page tables, this is not correct for 64-bit kernels.\n\nFor 64-bit kernels we should go straight to the no_context handler\nskipping vmalloc_fault.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "e0cc87f59490d7d62a8ab2a76498dc8a2b64927a",
      "tree": "d68107417b92d83493bbb95c08af98b0f8597220",
      "parents": [
        "a7bcb1ae6094db78b077ae17e92c69de7643014f"
      ],
      "author": {
        "name": "Wu Fei",
        "email": "at.wufei@gmail.com",
        "time": "Thu Sep 03 22:29:53 2009 +0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 17 20:07:51 2009 +0200"
      },
      "message": "MIPS: Shrink the size of tlb handler\n\nBy combining swapper_pg_dir and module_pg_dir, several if conditions\ncan be eliminated from the tlb exception handler. The reason they\ncan be combined is that, the effective virtual address of vmalloc\nreturned is at the bottom, and of module_alloc returned is at the\ntop. It also fixes the bug in vmalloc(), which happens when its\nreturn address is not covered by the first pgd.\n\nSigned-off-by: Wu Fei \u003cat.wufei@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "982f6ffeeed5ef6104cfd72e517ff9e7a9270fda",
      "tree": "cfe3546c4983d29deb1794890dcfd26ea480296a",
      "parents": [
        "2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 17 02:25:07 2009 +0200"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu Sep 17 20:07:51 2009 +0200"
      },
      "message": "MIPS: Remove useless zero initializations.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "a887b4dada2f23b2ff2aa725e0509c92dc652597",
      "tree": "7841c40cff0b0f04db27304e89ea54b179fac96f",
      "parents": [
        "49316cbf0a9875f102f98dc8b7c80cfa142e33cf"
      ],
      "author": {
        "name": "Akinobu Mita",
        "email": "akinobu.mita@gmail.com",
        "time": "Sat Jul 04 01:33:09 2009 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Aug 03 17:52:40 2009 +0100"
      },
      "message": "MIPS: Drop mmap_sem in pagefault oom path\n\nFix the pagefault oom path which does not drop mm-\u003emmap_sem.\nThis was introduced by commit c7c1e3846bac1e4b8a8941f6a194812e28b0a519\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "49316cbf0a9875f102f98dc8b7c80cfa142e33cf",
      "tree": "366e7f239ffa5ab28b63b994137d569c6e3f336c",
      "parents": [
        "1c1a90d866c5fb029099b9f0f40534e01b7c4d91"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Jul 06 09:13:17 2009 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Aug 03 17:52:40 2009 +0100"
      },
      "message": "MIPS: Eleminate filenames from comments\n\nThey tend to get not updated when files are moved around or copied and\nlack any obvious use.  While at it zap some only too obvious comments and\nas per Shinya\u0027s suggestion, add a copyright header to extable.c.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nAcked-by: Shinya Kuribayashi \u003cshinya.kuribayashi@necel.com\u003e\nAcked-by: Thadeu Lima de Souza Cascardo \u003ccascardo@holoscopio.com\u003e\n"
    },
    {
      "commit": "1c1a90d866c5fb029099b9f0f40534e01b7c4d91",
      "tree": "4c277aa638c38436f82f72306c8ef0b42060007f",
      "parents": [
        "a33a052f19a21d727847391c8c1aff3fb221c472"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jul 05 19:23:30 2009 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Aug 03 17:52:39 2009 +0100"
      },
      "message": "[PATCH] MIPS: Cavium: Move swapped comments to their rightful place.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "405f55712dfe464b3240d7816cc4fe4174831be2",
      "tree": "96c425ea7fa8b31058b8f83a433c5e5265c8ebc7",
      "parents": [
        "f9fabcb58a6d26d6efde842d1703ac7cfa9427b6"
      ],
      "author": {
        "name": "Alexey Dobriyan",
        "email": "adobriyan@gmail.com",
        "time": "Sat Jul 11 22:08:37 2009 +0400"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Jul 12 12:22:34 2009 -0700"
      },
      "message": "headers: smp_lock.h redux\n\n* Remove smp_lock.h from files which don\u0027t need it (including some headers!)\n* Add smp_lock.h to files which do need it\n* Make smp_lock.h include conditional in hardirq.h\n  It\u0027s needed only for one kernel_locked() usage which is under CONFIG_PREEMPT\n\n  This will make hardirq.h inclusion cheaper for every PREEMPT\u003dn config\n  (which includes allmodconfig/allyesconfig, BTW)\n\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "631330f5847b3f8a7ea67d689e9f7c56833ccaa6",
      "tree": "d3bda03e877ecabf1d4f73532fc84dc5e1f4299e",
      "parents": [
        "0ca5921e791fb2011d4d6de787f6485b3900703d"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Jun 19 14:05:26 2009 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 24 18:34:39 2009 +0100"
      },
      "message": "MIPS: Build fix - include \u003clinux/smp.h\u003e into all smp_processor_id() users.\n\nSome of the were relying into smp.h being dragged in by another header\nwhich of course is fragile.  \u003casm/cpu-info.h\u003e uses smp_processor_id()\nonly in macros and including smp.h there leads to an include loop, so\ndon\u0027t change cpu-info.h.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "d06063cc221fdefcab86589e79ddfdb7c0e14b63",
      "tree": "00ccaf8c1992b57a4445d78b9eae25fde0b3ab31",
      "parents": [
        "30c9f3a9fae79517bca595826a19c6855fbb6d32"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Apr 10 09:01:23 2009 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Jun 21 13:08:22 2009 -0700"
      },
      "message": "Move FAULT_FLAG_xyz into handle_mm_fault() callers\n\nThis allows the callers to now pass down the full set of FAULT_FLAG_xyz\nflags to handle_mm_fault().  All callers have been (mechanically)\nconverted to the new calling convention, there\u0027s almost certainly room\nfor architectures to clean up their code and then add FAULT_FLAG_RETRY\nwhen that support is added.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "fd062c847a8cea2821347d7e18165dfa658f7dce",
      "tree": "95410c5460f7d153a9c9b15184ea52e2059427c3",
      "parents": [
        "dd7943920b492d9d8a79080fe05e25ecd7e10bc3"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed May 27 17:47:44 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:30 2009 +0100"
      },
      "message": "MIPS: TLB support for hugetlbfs.\n\nThe TLB handlers need to check for huge pages and give them special\nhandling.  Huge pages consist of two contiguous sub-pages of physical\nmemory.\n\n* Loading entrylo0 and entrylo1 need to be handled specially.\n\n* The page mask must be set for huge pages and then restored after\n  writing the TLB entries.\n\n* The PTE for huge pages resides in the PMD, we halt traversal of the\n  tables there.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "50a41ff292fafe1e937102be23464b54fed8b78c",
      "tree": "ef4a650765ce979d217dcb09a829ea44e595b646",
      "parents": [
        "bd1437e49d80fa3369ffbea9e73cde7f6d69e550"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed May 27 17:47:42 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:30 2009 +0100"
      },
      "message": "MIPS: Add support files for hugetlbfs.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "bd1437e49d80fa3369ffbea9e73cde7f6d69e550",
      "tree": "eaf4d6002b5640ab80ebc69348e1d5c7a80985b4",
      "parents": [
        "80ff0fd3ab6451407a20c19b80c1643c4a6d6434"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Fri May 08 15:10:50 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:30 2009 +0100"
      },
      "message": "MIPS: Remove unused parameters from iPTE_LW.\n\nThe l parameter to iPTE_LW() is unused. Remove it and from some of its\ncallers as well.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "faed5288af0f05aa61ac1e8d47306d855a2868f0",
      "tree": "406480e08fe3493f4b3ab57b1e6ff9d539d9dffd",
      "parents": [
        "9e290a19f21f4d6c305090d3c61fbfad65908188"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Tue May 12 12:41:55 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:26 2009 +0100"
      },
      "message": "MIPS: Remove dead case label.\n\nCPU_CAVIUM_OCTEON is mips_r2 which is handled before the switch.  This\nlabel in the switch statement is dead code, so we remove it.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nReviewed by: David VomLehn \u003cdvomlehn@cisco.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "41f0e4d041aa30507a34998c29d0b7ac0bede277",
      "tree": "7e84895b367ff6cfad682c6177c5ff706bb177c8",
      "parents": [
        "95affdda9bfba0ac17025d48c622e1f30964e316"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Tue May 12 12:41:53 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:26 2009 +0100"
      },
      "message": "MIPS: Allow R2 CPUs to turn off generation of \u0027ehb\u0027 instructions.\n\nSome CPUs do not need ehb instructions after writing CP0 registers.\nBy allowing ehb generation to be overridden in\ncpu-feature-overrides.h, we can save a few instructions in the TLB\nhandler hot paths.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "95affdda9bfba0ac17025d48c622e1f30964e316",
      "tree": "18a3551d8882b07da35922d77d4bee7f3b16365e",
      "parents": [
        "e6f72d3abafd50984decc2833c706e717f5ba04e"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed May 20 11:40:59 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:26 2009 +0100"
      },
      "message": "MIPS: Fold the TLB refill at the vmalloc path if possible.\n\nTry to fold the 64-bit TLB refill handler opportunistically at the\nbeginning of the vmalloc path so as to avoid splitting execution flow in\nhalf and wasting cycles for a branch required at that point then.  Resort\nto doing the split if either of the newly created parts would not fit into\nits designated slot.\n\nOriginal-patch-by: Maciej W. Rozycki \u003cmacro@linux-mips.org\u003e\nSigned-off-by: Maciej W. Rozycki \u003cmacro@linux-mips.org\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "e6f72d3abafd50984decc2833c706e717f5ba04e",
      "tree": "ccc081325d055339d853858bdcb8a9cd7c7d2a1c",
      "parents": [
        "742cd5867b2ef7ce865d7ab67574c4e3aa1fb155"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Wed May 20 11:40:58 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:25 2009 +0100"
      },
      "message": "MIPS: Replace some magic numbers with symbolic values in tlbex.c\n\nThe logic used to split the r4000 refill handler is liberally\nsprinkled with magic numbers.  We attempt to explain what they are and\nnormalize them against a new symbolic value (MIPS64_REFILL_INSNS).\n\nCC: David VomLehn \u003cdvomlehn@cisco.com\u003e\nReviewed-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "605b7ef7b79cee8e36ae5c48700e1a1eec74d38a",
      "tree": "81b17230afc77fad0cb07728448ea2427e97069d",
      "parents": [
        "3807ef3f61e094c9417d1a12f18d6b3c8e27d96f"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Thu Apr 23 17:36:53 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:24 2009 +0100"
      },
      "message": "MIPS: Support 64-byte D-cache line size\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "3807ef3f61e094c9417d1a12f18d6b3c8e27d96f",
      "tree": "c0be5433db80a74dcc06930e9255b1836fd3a941",
      "parents": [
        "d3f634b96a86521f51bbaf04a81e34e7adb0eeb4"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Thu Apr 23 17:25:12 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:24 2009 +0100"
      },
      "message": "MIPS: Pass struct device to plat_dma_addr_to_phys()\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "d3f634b96a86521f51bbaf04a81e34e7adb0eeb4",
      "tree": "b4c38e61a58deb1a20f2e9cb44a12ccfdc0f8d17",
      "parents": [
        "7762f206a3f3a19a38ed91a3d87f019d8b4eafc1"
      ],
      "author": {
        "name": "Kevin Cernekee",
        "email": "cernekee@gmail.com",
        "time": "Thu Apr 23 17:03:43 2009 -0700"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Jun 17 11:06:24 2009 +0100"
      },
      "message": "MIPS: Add size and direction arguments to plat_unmap_dma_mem()\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "a5e696e5d0f1377ff6beb10d2f40edb6a3d1de18",
      "tree": "2f7b194c53e9a7e2ab6c8b58335c299a897231fe",
      "parents": [
        "195d1a96ae5fdfbedb8dc4b97afee578921fa99e"
      ],
      "author": {
        "name": "Greg Ungerer",
        "email": "gerg@snapgear.com",
        "time": "Wed May 20 16:12:32 2009 +1000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed May 20 18:53:14 2009 +0100"
      },
      "message": "MIPS: 64-bit: Fix system lockup.\n\nThe address range size calculation inside local_flush_tlb_kernel_range()\nis being truncated by a too small size variable holder on 64-bit systems.\nThe truncated size can result in an erroneous tlbsize check that means we\nsit spinning inside a loop trying to flush a hige number of TLB entries.\nThis is for all intents and purposes a system hang. Fix by using an\nappropriately sized valiable to hold the size.\n\n[Ralf: Greg\u0027s original patch submission identified the issue and fixed one\ninstance in tlb-r4k.c but there there were several more.  For consistency\nI also modified tlb-r3k.c even though that file is only used on 32-bit.]\n\nSigned-off-by: Greg Ungerer \u003cgerg@snapgear.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "bb86bf28aec6d0a207ae09f38a43e94133d4d6db",
      "tree": "34bd8f653eb10dc4eb82aa8ef2576475346070e1",
      "parents": [
        "0b54352600b820a6d25f151cbd8975ed9b2aeb09"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sat Apr 25 11:25:34 2009 +0200"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu May 14 13:50:29 2009 +0100"
      },
      "message": "MIPS: Fix highmem.\n\nCommit 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) rsp.\nb3594a089f1c17ff919f8f78505c3f20e1f6f8ce (linux-mips.org):\n\n\u003e From: Chris Dearman \u003cchris@mips.com\u003e\n\u003e Date: Wed, 19 Sep 2007 00:58:24 +0100\n\u003e Subject: [PATCH] [MIPS] Allow setting of the cache attribute at run time.\n\u003e\n\u003e Slightly tacky, but there is a precedent in the sparc archirecture code.\n\nintroduces the variable _page_cachable_default, which defaults to zero and.\nis used to create the prototype PTE for __kmap_atomic in\narch/mips/mm/init.c:kmap_init before initialization in\narch/mips/mm/c-r4k.c:coherency_setup, so the default value of 0 will be\nused as the CCA of kmap atomic pages which on many processors is not a\ndefined CCA value and may result in writes to kmap_atomic pages getting\ncorrupted.  Debugged by Jon Fraser (jfraser@broadcom.com).\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "4f29c057aa81c5440f06b716f768ba9f8a041fe9",
      "tree": "152ebccf4c65945e0c28bb391e5dcbfc69b1863b",
      "parents": [
        "47740eb887796608fb4c629aa6b8507a2fb6c0eb"
      ],
      "author": {
        "name": "Atsushi Nemoto",
        "email": "anemo@mba.ocn.ne.jp",
        "time": "Fri Jan 23 00:42:11 2009 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu May 14 13:50:26 2009 +0100"
      },
      "message": "MIPS: Synchronize dma_map_page and dma_map_single\n\nSynchronize dma_map_page/dma_unmap_page and dma_map_single/dma_unmap_single.\nThis will reduce unnecessary writebacks and invalidates.\n\n[Ralf: make dma_unmap_page an inline function.]\n\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "7fc7316aa82fb3874f69689bd36134afea9c8bfd",
      "tree": "a3b96659869687e595c168da4bf75a182eaa71ed",
      "parents": [
        "b6d57ae97af3c38d28f066b5e47b7d58e468728a"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Apr 01 16:11:53 2009 +0200"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu May 14 13:50:25 2009 +0100"
      },
      "message": "MIPS: Print the actual detected I-cache associativity on bootup.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "1291417eb61d1cd3fc69e295c2e9b83c5f6a8ff9",
      "tree": "d43403c39c97aeda5eb9bdff77dc03aeeb9058c1",
      "parents": [
        "1d9c114dc1702306215439cd608047ab639700db"
      ],
      "author": {
        "name": "Dmitri Vorobiev",
        "email": "dmitri.vorobiev@movial.com",
        "time": "Mon Mar 30 22:53:23 2009 +0300"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Thu May 14 13:50:24 2009 +0100"
      },
      "message": "MIPS: IP32: Two symbols can become static\n\nThe file arch/mips/mm/sc-rm7k.c needlessly defines two global symbols:\n\nrm7k_sc_ops\nrm7k_tcache_enabled\n\nThis patch makes these symbols static.\n\nSigned-off-by: Dmitri Vorobiev \u003cdmitri.vorobiev@movial.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "7ca43e7564679604d86e9ed834e7bbcffd8a4a3f",
      "tree": "575e21270d7c8284f54b1e91eb5dd128ae03d713",
      "parents": [
        "f4112de6b679d84bd9b9681c7504be7bdfb7c7d5"
      ],
      "author": {
        "name": "Akinobu Mita",
        "email": "akinobu.mita@gmail.com",
        "time": "Tue Mar 31 15:23:25 2009 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Apr 01 08:59:14 2009 -0700"
      },
      "message": "mm: use debug_kmap_atomic\n\nUse debug_kmap_atomic in kmap_atomic, kmap_atomic_pfn, and\niomap_atomic_prot_pfn.\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: \u003clinux-arch@vger.kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "2f794d099da2f081de2fe19b289a3aa807f735fa",
      "tree": "9d4065219b135c17c94a532fd8b4d51e49535f72",
      "parents": [
        "32647e0c1f63eead3e84d52b3edb8bc2f1fa2dd4"
      ],
      "author": {
        "name": "Manuel Lauss",
        "email": "mano@roarinelk.homelinux.net",
        "time": "Wed Mar 25 17:49:30 2009 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 30 14:49:46 2009 +0200"
      },
      "message": "MIPS: Alchemy: MIPS hazard workarounds are not required.\n\nThe Alchemy manuals state:\n\n\"All pipeline hazards and dependencies are enforced by hardware interlocks\n so that any sequence of instructions is guaranteed to execute correctly.\n Therefore, it is not necessary to pad legacy MIPS hazards (such as\n load delay slots and coprocessor accesses) with NOPs.\"\n\nRun-tested on Au12x0, without any ill effects.\n\nSigned-off-by: Manuel Lauss \u003cmano@roarinelk.homelinux.net\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "270717a8a0e5f03c104a6d47466036b615edfcde",
      "tree": "33b319a455d24b246df5200e523aa66a7341cb42",
      "parents": [
        "76544504aebc606b8279a5314595af5d568e7fea"
      ],
      "author": {
        "name": "Manuel Lauss",
        "email": "mano@roarinelk.homelinux.net",
        "time": "Wed Mar 25 17:49:28 2009 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 30 14:49:45 2009 +0200"
      },
      "message": "MIPS: Alchemy: unify CPU model constants.\n\nThis patch removes the various CPU_AU1??? model constants in favor of\na single CPU_ALCHEMY one.\n\nAll currently existing Alchemy models are identical in terms of cpu\ncore and cache size/organization.  The parts of the mips kernel which\nneed to know the exact CPU revision extract it from the c0_prid register\nalready; and finally nothing else in-tree depends on those any more.\n\nShould a new variant with slightly different \"company options\" and/or\n\"processor revision\" bits in c0_prid appear, it will be supported\nimmediately (minus an exact model string in cpuinfo).\n\nSigned-off-by: Manuel Lauss \u003cmano@roarinelk.homelinux.net\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "b72b7092f8f5f0729cc9f0868997351f21dbc5cd",
      "tree": "e384dbc5a43d4a2288360a8ccf6a48f7ba9dfcb4",
      "parents": [
        "ae03550500654e95c47229775bfec33ed0effe40"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 30 14:49:44 2009 +0200"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 30 14:49:44 2009 +0200"
      },
      "message": "MIPS: Use BUG_ON() where possible.\n\nBased on original patch by Stoyan Gaydarov \u003cstoyboyker@gmail.com\u003e which\nmissed a few places.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "5864810bc50de57e1b4757850d3208f69579af7f",
      "tree": "918469c22095b0734d19b31f5ad56bc43a411778",
      "parents": [
        "d7001198366bffce4506ba21b7b0fee2de194f73"
      ],
      "author": {
        "name": "Shinya Kuribayashi",
        "email": "shinya.kuribayashi@necel.com",
        "time": "Wed Mar 18 09:04:01 2009 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 23 23:38:04 2009 +0100"
      },
      "message": "MIPS: VR5500: Enable prefetch\n\nSigned-off-by: Shinya Kuribayashi \u003cshinya.kuribayashi@necel.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "d7001198366bffce4506ba21b7b0fee2de194f73",
      "tree": "d6fc12a93c413fc913b2652fc51a0f0d5265787b",
      "parents": [
        "d56ffd38a93841a07c839a375049a56b51e9567c"
      ],
      "author": {
        "name": "Jan Nikitenko",
        "email": "jan.nikitenko@gmail.com",
        "time": "Fri Nov 28 08:52:58 2008 +0100"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Mar 23 23:38:04 2009 +0100"
      },
      "message": "MIPS: Fix oops in dma_unmap_page on not coherent mips platforms\n\ndma_cache_wback_inv() expects virtual address, but physical was provided\ndue to translation via plat_dma_addr_to_phys().\nIf replaced with dma_addr_to_virt(), page fault oops from dma_unmap_page()\nis gone on au1550 platform.\n\nSigned-off-by: Jan Nikitenko \u003cjan.nikitenko@gmail.com\u003e\nAcked-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "a644b2774d41409519bb33a16bd577cb41bb3095",
      "tree": "a0a8a574ac53e318dbf72306d6b752224ebdbc64",
      "parents": [
        "c189846ecf900cd6b3ad7d3cef5b45a746ce646b"
      ],
      "author": {
        "name": "Shinya Kuribayashi",
        "email": "shinya.kuribayashi@necel.com",
        "time": "Tue Mar 03 18:05:51 2009 +0900"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Wed Mar 11 21:11:07 2009 +0100"
      },
      "message": "MIPS: NEC VR5500 processor support fixup\n\nCurrent VR5500 processor support lacks of some functions which are\nexpected to be configured/synthesized on arch initialization.\n\nHere\u0027re some VR5500A spec notes:\n\n* All execution hazards are handled in hardware.\n\n* Once VR5500A stops the operation of the pipeline by WAIT instruction,\n  it could return from the standby mode only when either a reset, NMI\n  request, or all enabled interrupts is/are detected.  In other words,\n  if interrupts are disabled by Status.IE\u003d0, it keeps in standby mode\n  even when interrupts are internally asserted.\n\n  Notes on WAIT: The operation of the processor is undefined if WAIT\n  insn is in the branch delay slot.  The operation is also undefined\n  if WAIT insn is executed when Status.EXL and Status.ERL are set to 1.\n\n* VR5500A core only implements the Load prefetch.\n\nWith these changes, it boots fine.\n\nSigned-off-by: Shinya Kuribayashi \u003cshinya.kuribayashi@necel.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "dbda6ac0897603f6c6dfadbbc37f9882177ec7ac",
      "tree": "9b6c5c602acf4517e620834097f85f5545c9d343",
      "parents": [
        "4b0d3f5c28c631c1aeb1860993572ad8468a4c11"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Feb 08 16:00:26 2009 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Feb 27 17:56:35 2009 +0000"
      },
      "message": "MIPS: CVE-2009-0029: Enable syscall wrappers.\n\nThanks to David Daney helping with debugging and testing.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\n"
    },
    {
      "commit": "c7c1e3846bac1e4b8a8941f6a194812e28b0a519",
      "tree": "03d5341b460dee49e4aeafd1f1df73f68c5abbb1",
      "parents": [
        "a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Mon Jan 12 00:09:13 2009 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Jan 30 21:32:57 2009 +0000"
      },
      "message": "MIPS: Port \"mm: invoke oom-killer from page fault\" from UML / x86\n\nOriginal commit 1c0fe6e3bda0464728c23c8d84aa47567e8b716c.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d",
      "tree": "bdb505a02de52a85483c2cc049350c8d14f2d806",
      "parents": [
        "012703e0fc9fb1d6cdf778c49f45b796a85ef5bc"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jan 11 18:44:49 2009 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Fri Jan 30 21:32:57 2009 +0000"
      },
      "message": "MIPS: Avoid destructive invalidation on partial cachelines.\n\nSee discussion e9c3a7c20901051031y528d0d31r18d44c5096c59e0@mail.gmail.com.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "cde15b5927fea3e1b4de0b277008cf273d8b000b",
      "tree": "fe125225da41f69ffb920ef5b17d7e30c6b7a31c",
      "parents": [
        "61f9c58da57a80b0df1ced18a28cbbaebd4d417a"
      ],
      "author": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Tue Jan 06 23:07:20 2009 +0000"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jan 11 09:57:28 2009 +0000"
      },
      "message": "MIPS: Only write c0_framemask on CPUs which have this register.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "843aef4930b9953c9ca624a990b201440304b56f",
      "tree": "9debbaa7d9caa8c73db65ea2674e7ed26e285893",
      "parents": [
        "ec454d8c4fee3b2feb87e594d806c0987c5dd538"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Dec 11 15:33:36 2008 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jan 11 09:57:24 2009 +0000"
      },
      "message": "MIPS: Adjust the dma-common.c platform hooks.\n\nWe add a dev parameter to plat_unmap_dma_mem(), and hooks for\nplat_dma_supported() and plat_extra_sync_for_device() which should be\nnop changes for all existing targets.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "ec454d8c4fee3b2feb87e594d806c0987c5dd538",
      "tree": "4a20bf2833a369df74fc2345f0c0aba14a50870c",
      "parents": [
        "126336f065e5d80bd2f4c3199df8a573eb0abcf7"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Dec 11 15:33:35 2008 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jan 11 09:57:24 2009 +0000"
      },
      "message": "MIPS: Add Cavium OCTEON slot into proper tlb category.\n\nExpand the case statement for build_tlb_write_entry so that it does\nthe right thing on Cavium CPU variants.\n\nSigned-off-by: Tomaso Paoletti \u003ctpaoletti@caviumnetworks.com\u003e\nSigned-off-by: Paul Gortmaker \u003cPaul.Gortmaker@windriver.com\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "7e69deb83c9fffe75e8ea17fb40a63375e56ac9f",
      "tree": "ae0d12071602724a9bd9db367281b59ddcebf4b9",
      "parents": [
        "47d979eca33f8df49bfead2d5efa23a70b413882"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Dec 11 15:33:28 2008 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jan 11 09:57:22 2009 +0000"
      },
      "message": "MIPS: Hook up Cavium OCTEON in arch/mips.\n\nTake all the OCTEON specific files that were added, and hook them into\nthe build system for the arch/mips.  For versions of GCC that lack\nOCTEON support, override gas target architecture.\n\nSigned-off-by: Tomaso Paoletti \u003ctpaoletti@caviumnetworks.com\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    },
    {
      "commit": "47d979eca33f8df49bfead2d5efa23a70b413882",
      "tree": "e70554c6042ba2acf5c01df8e15a572ebf6e60d3",
      "parents": [
        "0dd4781bca56871434507ed35d5bb8ef92077907"
      ],
      "author": {
        "name": "David Daney",
        "email": "ddaney@caviumnetworks.com",
        "time": "Thu Dec 11 15:33:27 2008 -0800"
      },
      "committer": {
        "name": "Ralf Baechle",
        "email": "ralf@linux-mips.org",
        "time": "Sun Jan 11 09:57:22 2009 +0000"
      },
      "message": "MIPS: Hook Cavium OCTEON cache init into cache.c\n\nFollow precedent of other boards, and hook-up the CPU specific cache\ninit.\n\nSigned-off-by: Tomaso Paoletti \u003ctpaoletti@caviumnetworks.com\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n"
    }
  ],
  "next": "5b3b16880f404ca54126210ca86141cceeafc0cf"
}