)]}'
{
  "log": [
    {
      "commit": "b9033e682e86f3c6a66763f9b6a3935c5c64e145",
      "tree": "8aeeb08aeae97b12f0c6cb7338d8cbcf15e6f8ac",
      "parents": [
        "556ab45f9a775bfa4762bacc0a4afb5b44b067bc"
      ],
      "author": {
        "name": "Kulikov Vasiliy",
        "email": "segooon@gmail.com",
        "time": "Sat Jul 17 19:19:48 2010 +0400"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Aug 04 14:27:47 2010 -0700"
      },
      "message": "dma: dmatest: fix potential sign bug\n\n\u0027cnt\u0027 is unsigned, so this code may become wrong in future as\ndmatest_add_threads() can return error code:\n\n\tcnt \u003d dmatest_add_threads(dtc, DMA_MEMCPY);\n\tthread_count +\u003d cnt \u003e 0 ? cnt : 0;\n\t\t        ^^^^^^^\n\nNow it can return only -EINVAL if and only if second argument of\ndmatest_add_threads() is not one of DMA_MEMCPY, DMA_XOR, DMA_PQ.\nSo, now it is not wrong but may become wrong in future.\n\nThe semantic patch that finds this problem (many false-positive results):\n(http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@ r1 @\nidentifier f;\n@@\nint f(...) { ... }\n\n@@\nidentifier r1.f;\ntype T;\nunsigned T x;\n@@\n\n*x \u003d f(...)\n ...\n*x \u003e 0\n\nSigned-off-by: Kulikov Vasiliy \u003csegooon@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05",
      "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1",
      "parents": [
        "ed391f4ebf8f701d3566423ce8f17e614cde9806"
      ],
      "author": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Wed Mar 24 17:04:11 2010 +0900"
      },
      "committer": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Tue Mar 30 22:02:32 2010 +0900"
      },
      "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files.  percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed.  Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability.  As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n  http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n  only the necessary includes are there.  ie. if only gfp is used,\n  gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n  blocks and try to put the new include such that its order conforms\n  to its surrounding.  It\u0027s put in the include block which contains\n  core kernel includes, in the same order that the rest are ordered -\n  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n  doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n  because the file doesn\u0027t have fitting include block), it prints out\n  an error message indicating which .h file needs to be added to the\n  file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n   over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n   and ~3000 slab.h inclusions.  The script emitted errors for ~400\n   files.\n\n2. Each error was manually checked.  Some didn\u0027t need the inclusion,\n   some needed manual addition while adding it to implementation .h or\n   embedding .c file was more appropriate for others.  This step added\n   inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n   from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n   e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n   APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n   editing them as sprinkling gfp.h and slab.h inclusions around .h\n   files could easily lead to inclusion dependency hell.  Most gfp.h\n   inclusion directives were ignored as stuff from gfp.h was usually\n   wildly available and often used in preprocessor macros.  Each\n   slab.h inclusion directive was examined and added manually as\n   necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my\n   distributed build env didn\u0027t work with gcov compiles) and a few\n   more options had to be turned off depending on archs to make things\n   build (like ipr on powerpc/64 which failed due to missing writeq).\n\n   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n   * powerpc and powerpc64 SMP allmodconfig\n   * sparc and sparc64 SMP allmodconfig\n   * ia64 SMP allmodconfig\n   * s390 SMP allmodconfig\n   * alpha SMP allmodconfig\n   * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n   a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n"
    },
    {
      "commit": "dd58ffcf5a5352fc10820c8ffbcd5fed416a2c3a",
      "tree": "f36172b40f9f3fc2c646f70da40e01705399b6b8",
      "parents": [
        "aa4d72ae946a4fa40486b871717778734184fa29",
        "56a5d3cf21c71963c8fc506e9b9d3f71641d9c71"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 03 21:22:21 2010 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 03 21:22:21 2010 -0700"
      },
      "message": "Merge branch \u0027coh\u0027 into dmaengine\n"
    },
    {
      "commit": "67b9124f734b22b30d9adf18c39fe795e2901070",
      "tree": "209e80992ca7722a1ddc82dde8dda1a5e119c666",
      "parents": [
        "94de648d72c8bc833590523f22386d4babbea988"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Sun Feb 28 22:20:18 2010 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Sun Feb 28 22:20:18 2010 -0700"
      },
      "message": "dmatest: fix handling of an even number of xor_sources\n\nJust like commit ac5d73fc, we need to be careful to use \u0027src_cnt\u0027 as it\ncontains the fixed up number of xor sources (forced odd) to meet dmatest\u0027s\ndata verification scheme.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "94de648d72c8bc833590523f22386d4babbea988",
      "tree": "8507157200c687012e13da8a5ea5088528c0151f",
      "parents": [
        "76bd061f5c7b7550cdaed68ad6219ea7cee288fc"
      ],
      "author": {
        "name": "Anatolij Gustschin",
        "email": "agust@denx.de",
        "time": "Mon Feb 15 22:35:23 2010 +0100"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Sun Feb 28 22:18:36 2010 -0700"
      },
      "message": "dmatest: correct raid6 PQ test\n\nThe number of PQ sources specified by module parameter \"pq_sources\"\nis always forced odd to fit into dmatest\u0027s destination verificaton\nscheme. But number of PQ sources and coefficients as passed to the\ndriver\u0027s prep_dma_pq() is not adjusted accordingly.\n\nFix it now to get correct PQ testing results in the case passed\n\"pq_sources\" parameter is even.\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "b953df7c70740cd7593072ebec77a8f658505630",
      "tree": "3f831c33f2b1a0173e7142226869dababcd16422",
      "parents": [
        "7e55a70c5b9a57c12f49c44b0847c9343d4f54e4"
      ],
      "author": {
        "name": "Yong Zhang",
        "email": "yong.zhang0@gmail.com",
        "time": "Fri Feb 05 21:52:37 2010 +0800"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Fri Feb 05 15:35:53 2010 -0700"
      },
      "message": "dmaengine: correct onstack wait_queue_head declaration\n\nUse DECLARE_WAIT_QUEUE_HEAD_ONSTACK to make lockdep happy\n\nSigned-off-by: Yong Zhang \u003cyong.zhang0@gmail.com\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "cfe4f2751ef1a5390b56c5d263f90b6ff138ba31",
      "tree": "05eb71e6046cde60a728b792b9b44918e9b1c210",
      "parents": [
        "ddb4f0f0e05871c7ac540cc778993c06ff53b765"
      ],
      "author": {
        "name": "Guennadi Liakhovetski",
        "email": "g.liakhovetski@gmx.de",
        "time": "Fri Dec 04 19:44:48 2009 +0100"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Dec 10 23:27:51 2009 -0700"
      },
      "message": "dmaengine: fix dmatest to verify minimum transfer length and test buffer size\n\nTransfers and the test buffer have to be at least align bytes long.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "bbb20089a3275a19e475dbc21320c3742e3ca423",
      "tree": "216fdc1cbef450ca688135c5b8969169482d9a48",
      "parents": [
        "3e48e656903e9fd8bc805c6a2c4264d7808d315b",
        "657a77fa7284d8ae28dfa48f1dc5d919bf5b2843"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:55:21 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:55:21 2009 -0700"
      },
      "message": "Merge branch \u0027dmaengine\u0027 into async-tx-next\n\nConflicts:\n\tcrypto/async_tx/async_xor.c\n\tdrivers/dma/ioat/dma_v2.h\n\tdrivers/dma/ioat/pci.c\n\tdrivers/md/raid5.c\n"
    },
    {
      "commit": "83544ae9f3991bfc7d5e0fe9a3008cd05a8d57b7",
      "tree": "bc4b28c2e5bdae01a2c8a250176fcdac6ae7a8ce",
      "parents": [
        "9308add6ea4fedeba37b0d7c4630a542bd34f214"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:42:53 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:42:53 2009 -0700"
      },
      "message": "dmaengine, async_tx: support alignment checks\n\nSome engines have transfer size and address alignment restrictions.  Add\na per-operation alignment property to struct dma_device that the async\nroutines and dmatest can use to check alignment capabilities.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "f9dd2134374c8de6b911e2b8652c6c9622eaa658",
      "tree": "c1b8f8d622941606b9e7247ab31d811ba4295011",
      "parents": [
        "4b652f0db3be891c7b76b109c3b55003b920fc96",
        "07a3b417dc3d00802bd7b4874c3e811f0b015a7d"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:42:29 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:42:29 2009 -0700"
      },
      "message": "Merge branch \u0027md-raid6-accel\u0027 into ioat3.2\n\nConflicts:\n\tinclude/linux/dmaengine.h\n"
    },
    {
      "commit": "58691d64c44ae41ddf098ecb31e9a994026e3cff",
      "tree": "93c36b2d244648a9b5880dc97de3cb945fdebda7",
      "parents": [
        "0a82a6239beecc95db6e05fe43ee62d16b381d38"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Sat Aug 29 19:09:27 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Sat Aug 29 19:09:27 2009 -0700"
      },
      "message": "dmatest: add pq support\n\nTest raid6 p+q operations with a simple \"always multiply by 1\" q\ncalculation to fit into dmatest\u0027s current destination verification\nscheme.\n\nReviewed-by: Andre Noll \u003cmaan@systemlinux.org\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n"
    },
    {
      "commit": "f1aef8b6e6abf32a3a269542f95a19e2cb319f6c",
      "tree": "f364595263d6c99487bbbcfb4767326694bb2aff",
      "parents": [
        "0a2ff57d6fba92842272889b4bca447344cd9d36"
      ],
      "author": {
        "name": "Nicolas Ferre",
        "email": "nicolas.ferre@atmel.com",
        "time": "Mon Jul 06 18:19:44 2009 +0200"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Jul 22 22:11:28 2009 -0700"
      },
      "message": "dmaengine: dmatest: correct thread_count while using multiple thread per channel\n\nIt seems that thread_count is not properly calculated in dmatest.\nIn fact the thread count number that is returned from dmatest_add_threads() is\nnot correctly added to the thread_count and thus not properly printed.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "0a2ff57d6fba92842272889b4bca447344cd9d36",
      "tree": "91dbcb3d8a668f1aac6c2859921294e74df70b66",
      "parents": [
        "c019894efc9c9ba5939948caa78c133b1ec8ae63"
      ],
      "author": {
        "name": "Nicolas Ferre",
        "email": "nicolas.ferre@atmel.com",
        "time": "Fri Jul 03 19:26:51 2009 +0200"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Jul 22 22:05:26 2009 -0700"
      },
      "message": "dmaengine: dmatest: add a maximum number of test iterations\n\nThe dmatest usually waits for the killing of its kthreads to stop\nrunning tests.  This patch adds a parameter that sets a maximum\nnumber of test iterations.\n\nThis feature is quite interesting for debugging when you set a lot of\ntraces in your dmaengine controller driver.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "c019894efc9c9ba5939948caa78c133b1ec8ae63",
      "tree": "4ecec80e15bd9f50598aca7020b630e12a4a149d",
      "parents": [
        "e3d433040ee6077e33d4ad22e2f60a38b085786d"
      ],
      "author": {
        "name": "Joe Perches",
        "email": "joe@perches.com",
        "time": "Sun Jun 28 09:26:21 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Jul 22 21:29:16 2009 -0700"
      },
      "message": "drivers/dma: Remove unnecessary semicolons\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "c56c81abe7e684bc6203632d807303eb765690dc",
      "tree": "463d5d7a89c9627625070e4a829bae44243643d0",
      "parents": [
        "577c9c456f0e1371cbade38eaf91ae8e8a308555"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Apr 08 15:08:23 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Apr 08 15:08:23 2009 -0700"
      },
      "message": "dmatest: fix max channels handling\n\nThe check for reaching max_channels is short circuited by \u0027continuing\u0027\nafter successfully adding a channel.\n\n[ Impact: make the \u0027max_channels\u0027 module parameter actually have an effect ]\n\nCc: \u003cstable@kernel.org\u003e\nReported-by: Dan Carpenter \u003cerror27@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "e44e0aa3cfa97cddff01704751a4b25151830c72",
      "tree": "9d876e5e47813101a4fc125831e0188664c486e0",
      "parents": [
        "b54d5cb9156868fb4f27ccd46a3afb0bf3ef8e0c"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 25 09:13:25 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 25 09:13:25 2009 -0700"
      },
      "message": "dmatest: add dma interrupts and callbacks\n\nUse the callback infrastructure to report driver/hardware hangs or\nmissed interrupts.  Since this makes the test threads much more\naggressive (from: explicit 1ms sleep to: wait_for_completion) we set the\nnice value to 10 so as to not swamp legitimate tasks.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "b54d5cb9156868fb4f27ccd46a3afb0bf3ef8e0c",
      "tree": "e825eb374b73240180d33b34be8ab10d6dffbd1a",
      "parents": [
        "729b5d1b8ec72c28e99840b3f300ba67726e3ab9"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 25 09:13:25 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 25 09:13:25 2009 -0700"
      },
      "message": "dmatest: add xor test\n\nExtend dmatest to launch a thread per supported operation type and add\nan xor test.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "7cbd4877e5b167b56a3d6033b926a9f925186e12",
      "tree": "03dbe000fa5086d07df0fcae8d9ac1534bd3d239",
      "parents": [
        "c74ef1f867d18171c8617519ee5fe40b02903934"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 04 16:06:03 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Wed Mar 04 16:06:03 2009 -0700"
      },
      "message": "dmatest: fix use after free in dmatest_exit\n\ndmatest_cleanup_chanel will free dtc, so grab -\u003echan before it goes away\nand use it to do the release.\n\nReported-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "d86be86e9aab221089d72399072511f13fe2a771",
      "tree": "58da7322d8dfa58da5f03c117481df8ab93b7311",
      "parents": [
        "6527de6d6d25ebfae7c7572cb7a4ed768e2e20a5"
      ],
      "author": {
        "name": "Atsushi Nemoto",
        "email": "anemo@mba.ocn.ne.jp",
        "time": "Tue Jan 13 09:22:20 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 13 09:22:20 2009 -0700"
      },
      "message": "dmatest: Use custom map/unmap for destination buffer\n\nThe dmatest driver should use DMA_BIDIRECTIONAL on the destination buffer\nto ensure that the poison values are written to RAM and not just written\nto cache and discarded.\n\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "41d5e59c1299f27983977bcfe3b360600996051c",
      "tree": "f0e80b6fea3af04f266843af97f433198ad535c7",
      "parents": [
        "4fac7fa57cf8001be259688468c825f836daf739"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:21 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:21 2009 -0700"
      },
      "message": "dmaengine: add a release for dma class devices and dependent infrastructure\n\nResolves:\nWARNING: at drivers/base/core.c:122 device_release+0x4d/0x52()\nDevice \u0027dma0chan0\u0027 does not have a release() function, it is broken and must be fixed.\n\nThe dma_chan_dev object is introduced to gear-match sysfs kobject and\ndmaengine channel lifetimes.  When a channel is removed access to the\nsysfs entries return -ENODEV until the kobject can be released.\n\nThe bulk of the change is updates to existing code to handle the extra\nlayer of indirection between a dma_chan and its struct device.\n\nReported-by: Alexander Beregalov \u003ca.beregalov@gmail.com\u003e\nAcked-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n"
    },
    {
      "commit": "7dd602510128d7a64b11ff3b7d4f30ac8e3946ce",
      "tree": "6a87f942c72b0b02d24db7144cad435211178fcc",
      "parents": [
        "f27c580c3628d79b17f38976d842a6d7f3616e2e"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:19 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:19 2009 -0700"
      },
      "message": "dmaengine: kill enum dma_state_client\n\nDMA_NAK is now useless.  We can just use a bool instead.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n"
    },
    {
      "commit": "33df8ca068123457db56c316946a3c0e4ef787d6",
      "tree": "e594340e903ea3eb8af83906c649eeaf85cbc0b2",
      "parents": [
        "59b5ec21446b9239d706ab237fb261d525b75e81"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:15 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:15 2009 -0700"
      },
      "message": "dmatest: convert to dma_request_channel\n\nReplace the client registration infrastructure with a custom loop to\npoll for channels.  Once dma_request_channel returns NULL stop asking\nfor channels.  A userspace side effect of this change if that loading\nthe dmatest module before loading a dma driver will result in no\nchannels being found, previously dmatest would get a callback.  To\nfacilitate testing in the built-in case dmatest_init is marked as a\nlate_initcall.  Another side effect is that channels under test can not\nbe used for any other purpose.\n\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n"
    },
    {
      "commit": "6f49a57aa5a0c6d4e4e27c85f7af6c83325a12d1",
      "tree": "afba24357d1f4ff69ccb2b39a19542546590a50b",
      "parents": [
        "07f2211e4fbce6990722d78c4f04225da9c0e9cf"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:14 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jan 06 11:38:14 2009 -0700"
      },
      "message": "dmaengine: up-level reference counting to the module level\n\nSimply, if a client wants any dmaengine channel then prevent all dmaengine\nmodules from being removed.  Once the clients are done re-enable module\nremoval.\n\nWhy?, beyond reducing complication:\n1/ Tracking reference counts per-transaction in an efficient manner, as\n   is currently done, requires a complicated scheme to avoid cache-line\n   bouncing effects.\n2/ Per-transaction ref-counting gives the false impression that a\n   dma-driver can be gracefully removed ahead of its user (net, md, or\n   dma-slave)\n3/ None of the in-tree dma-drivers talk to hot pluggable hardware, but\n   if such an engine were built one day we still would not need to notify\n   clients of remove events.  The driver can simply return NULL to a\n   -\u003eprep() request, something that is much easier for a client to handle.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n"
    },
    {
      "commit": "06190d8415219d9eef7d8f04b52a109e34575a76",
      "tree": "f7ac0ca156f5a2341c08417020ebbfc544b0c59b",
      "parents": [
        "65e503814dec83c7b2ac955e75919d009109c919"
      ],
      "author": {
        "name": "Kay Sievers",
        "email": "kay.sievers@vrfy.org",
        "time": "Tue Nov 11 13:12:33 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Nov 11 13:12:33 2008 -0700"
      },
      "message": "dmaengine: struct device - replace bus_id with dev_name(), dev_set_name()\n\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "6fdb8bd47111d3f94be221082b725ec2dec1d5c7",
      "tree": "5a63f297bfa423f31c06e9d8d70c7efd6761a79a",
      "parents": [
        "6b3141962dc82cfe1c30afdf91d564b309859cbe"
      ],
      "author": {
        "name": "Andrew Morton",
        "email": "akpm@linux-foundation.org",
        "time": "Fri Sep 19 04:16:23 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Fri Sep 19 04:16:23 2008 -0700"
      },
      "message": "drivers/dma/dmatest.c: switch a GFP_ATOMIC to GFP_KERNEL\n\nIt was needlessly using the unreliable GFP_ATOMIC.\n\nCc: Timur Tabi \u003ctimur@freescale.com\u003e\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "6b3141962dc82cfe1c30afdf91d564b309859cbe",
      "tree": "51a0045ba900f44083fbd2693824414262534dbc",
      "parents": [
        "89f72a0633d1d4f28c4c5c8831ec814523d7671a"
      ],
      "author": {
        "name": "Timur Tabi",
        "email": "timur@freescale.com",
        "time": "Fri Sep 19 04:16:19 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Fri Sep 19 04:16:19 2008 -0700"
      },
      "message": "dmatest: properly handle duplicate DMA channels\n\nUpdate the the dmatest driver so that it handles duplicate DMA channels\nproperly.\n\nWhen a DMA client is notified of an available DMA channel, it must check if it\nhas already allocated resources for that channel.  If so, it should return\nDMA_DUP.  This can happen, for example, if a DMA driver calls\ndma_async_device_register() more than once.\n\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "4a776f0aa922a552460192c07b56f4fe9cd82632",
      "tree": "ae6c2fef63e40fcdcac22483f3aa35eab95e64de",
      "parents": [
        "ff7b04796d9866327ea76e1393f1e902ef032f84"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "hskinnemoen@atmel.com",
        "time": "Tue Jul 08 11:58:45 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jul 08 11:58:45 2008 -0700"
      },
      "message": "dmatest: Simple DMA memcpy test client\n\nThis client tests DMA memcpy using various lengths and various offsets\ninto the source and destination buffers. It will initialize both\nbuffers with a repeatable pattern and verify that the DMA engine copies\nthe requested region and nothing more. It will also verify that the\nbytes aren\u0027t swapped around, and that the source buffer isn\u0027t modified.\n\nThe dmatest module can be configured to test a specific device, a\nspecific channel. It can also test multiple channels at the same time,\nand it can start multiple threads competing for the same channel.\n\nChanges since v2:\n  * Support testing multiple channels at the same time\n  * Support testing with multiple threads competing for the same channel\n  * Use counting test patterns in order to catch byte ordering issues\n\nChanges since v1:\n  * Remove extra dashes around \"help\"\n  * Remove \"default n\" from Kconfig\n  * Turn TEST_BUF_SIZE into a module parameter\n  * Return DMA_NAK instead of DMA_DUP\n  * Print unhandled events\n  * Support testing specific channels and devices\n  * Move to the end of the Makefile\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    }
  ]
}