)]}' { "log": [ { "commit": "e46aca6f38aeb8e7a7c640f0e8a0a629fda7f9c7", "tree": "c9d9e43fcb0b7ef5c163dcad7f246619b8762783", "parents": [ "14ee37df2a31a2fb56b02a45a30e550936d02a21", "5f6d1af0462b9072a2be6868ca73cfb4cb3524c1" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 11 14:29:43 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 11 14:29:43 2012 -0700" }, "message": "Merge \"coresight: device tree support for coresight drivers\" into msm-3.4" }, { "commit": "5f6d1af0462b9072a2be6868ca73cfb4cb3524c1", "tree": "17319ced071c31baf3df5e1b123384e95dacddef", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Wed Jun 13 15:48:13 2012 -0700" }, "committer": { "name": "Pratik Patel", "email": "pratikp@codeaurora.org", "time": "Fri Aug 10 20:06:25 2012 -0700" }, "message": "coresight: device tree support for coresight drivers\n\nSupport for reading hardware data for CoreSight devices from device\ntree.\n\nChange-Id: I4d149991c89b458384465d163386084f500a4028\nSigned-off-by: Pratik Patel \u003cpratikp@codeaurora.org\u003e\n" }, { "commit": "9328e4907972ff0b95dc9e2ccd4a47911940f4ae", "tree": "d451a14720302a27a2c5aad83581f27dfa14c706", "parents": [ "16bc5cc386af0f9c6ff83f22381e8eb79b03ecd2" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Aug 09 11:37:36 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:02 2012 -0700" }, "message": "regulator: qpnp: Add property to override type registers\n\nOn some regulator hardware, the values read on SPMI offset 0x4 (type)\nand 0x5 (subtype) are incorrect. Add a new optional property called\nqcom,force-type that allows a user to override the hardware values\nwith values supplied in the Device Tree.\n\nChange-Id: Id73fe69873f5dc9d0f2623771872aa2eaddd66f1\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "16bc5cc386af0f9c6ff83f22381e8eb79b03ecd2", "tree": "08c96d563952a402cc0b1490497659fd890742a5", "parents": [ "41f49afeb872b851e8b2f4e078d47903e65a47bf" ], "author": { "name": "Matt Wagantall", "email": "mattw@codeaurora.org", "time": "Thu Aug 09 21:33:23 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Fri Aug 10 19:16:01 2012 -0700" }, "message": "msm: pil-q6v5-mss: Clear modem subsystem IO clamps prior to resetting Q6\n\nInterfacing with some modem subsystem peripherals is not possible\nunless the UNCLAMP_ALL bit is set in MSS_CLAMP_IO register. Set\nthis bit accordingly.\n\nChange-Id: I5685383c506b0bcb89d6b6f808021512079cc607\nSigned-off-by: Matt Wagantall \u003cmattw@codeaurora.org\u003e\n" }, { "commit": "962ebc8ecad1eb59dfce3fa782edf47049a0390b", "tree": "af97718d3cab1f9eb38a9b19caba5aacc8d7e894", "parents": [ "28148a5a8327a98d2726ede4e223a90dc23ab679", "725f849ff6e273e8bf5b818fdf53cee5290717af" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 10 15:14:46 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 10 15:14:46 2012 -0700" }, "message": "Merge \"msm: wcd9xxx: add device tree support for codec slimbus component\" into msm-3.4" }, { "commit": "b1cc493ae3745e18c025cddc51775c4ae8763751", "tree": "9a29148d118c822f398497f731f08baa5c5cdf60", "parents": [ "f1e82321db2e074e517a1192031a80060dddffc9" ], "author": { "name": "Rohit Vaswani", "email": "rvaswani@codeaurora.org", "time": "Mon Jul 23 21:30:11 2012 -0700" }, "committer": { "name": "Rohit Vaswani", "email": "rvaswani@codeaurora.org", "time": "Fri Aug 10 10:54:51 2012 -0700" }, "message": "gpio: msm: Make msmgpio a platform device\n\nThe gpio driver was not a true platform driver and hence wasn\u0027t\nsupported by device tree. This patch fixes that for non-DT targets\nby making sure the device gets added early on during board init.\nFor DT-targets, adding the gpio-controller property for the device\nmakes sure the msmgpio device gets probed.\nThis change is done for all TLMM_v2 targets (msm8660 and future)\nTLMM_V1 targets remain unaffected.\n\nChange-Id: I8a55ab1e2af0366b3e6893b334ba2396d2a83190\nSigned-off-by: Rohit Vaswani \u003crvaswani@codeaurora.org\u003e\n" }, { "commit": "725f849ff6e273e8bf5b818fdf53cee5290717af", "tree": "52b8ce10a3fff5fde270d8c5919be2e3cba770e6", "parents": [ "eb36ee3ea23a4cfc0bbf7289104bff881c516000" ], "author": { "name": "Kiran Kandi", "email": "kkandi@codeaurora.org", "time": "Mon Aug 06 13:45:16 2012 -0700" }, "committer": { "name": "Kiran Kandi", "email": "kkandi@codeaurora.org", "time": "Wed Aug 08 09:54:15 2012 -0700" }, "message": "msm: wcd9xxx: add device tree support for codec slimbus component\n\nRead the codec specific data from device tree instead of board file.\n\nChange-Id: Iad382b89692903d2434b63d34c7121fe0b4b9dda\nSigned-off-by: Kiran Kandi \u003ckkandi@codeaurora.org\u003e\n" }, { "commit": "a5588d347934b94b965a04334b0f7ce02ec1e9d0", "tree": "ddcd931daed2910bb6e1753e7c85536b9aa02b17", "parents": [ "18ccbe3a468f1e1cc68091e1dac562ed5279b898", "d1dabbd409cb5ff4a4f904576f1019d0d038bdc4" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Aug 08 08:30:16 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Aug 08 08:30:16 2012 -0700" }, "message": "Merge \"msm: 8974: Add qcom,msm-id entry to MSM8974-sim/rumi device trees\" into msm-3.4" }, { "commit": "d9416661ff4bfd01c8e555f58f2b987e37c963a1", "tree": "53bf4bf092557996346973988e3b6d00c551deac", "parents": [ "3449c35a8dd1240f762e986dc725a48998b74cb1", "b77b0c48e156f335006518c62f606f96967f4b17" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Aug 08 06:45:39 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Aug 08 06:45:39 2012 -0700" }, "message": "Merge \"thermal: msm_thermal: Define and implement device tree bindings\" into msm-3.4" }, { "commit": "d1dabbd409cb5ff4a4f904576f1019d0d038bdc4", "tree": "07168f60205a17dd3b0af1d95a40066ac7602ae3", "parents": [ "27ef0fad0010226c6a39cb318cdbccdb87a80c0c" ], "author": { "name": "David Ng", "email": "dave@codeaurora.org", "time": "Fri Jul 27 16:55:39 2012 -0700" }, "committer": { "name": "David Ng", "email": "dave@codeaurora.org", "time": "Tue Aug 07 14:51:57 2012 -0700" }, "message": "msm: 8974: Add qcom,msm-id entry to MSM8974-sim/rumi device trees\n\nThe qcom,msm-id entry specifies the MSM chipset, platform and\nhardware revision. This is used by the Android dtbtool utility\nto generate a table of device tree used in the boot.img.\n\nThe qcom,msm-id syntax is:\n qcom,msm-id \u003d \u003cchipset_id, platform_id, rev_id\u003e [, \u003c...\u003e];\n\nThe entry can optionally be an array with variable number of\ntriplets indicating the device tree supports more than one\nchipset/platform/hardware rev.\n\nNote that the id\u0027s are hardware ID\u0027s reported by the hardware\nand not commonly used literal ID\u0027s. E.g. MSM8974\u0027s chipset ID\nis 126, not 8974.\n\nChange-Id: If65b40d6e947504cb4b07a36aa895f8ec6f9d300\nSigned-off-by: David Ng \u003cdave@codeaurora.org\u003e\n" }, { "commit": "bd53fbaf5beb87733a666110e4485892d47fdc62", "tree": "653790b771b11ce3313ba749793443167ef9f4ab", "parents": [ "27ef0fad0010226c6a39cb318cdbccdb87a80c0c" ], "author": { "name": "Manu Gautam", "email": "mgautam@codeaurora.org", "time": "Tue Jul 31 16:13:06 2012 +0530" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Aug 07 11:17:37 2012 -0700" }, "message": "msm8974: Prevent USB h/w reset on every cable disconnect\n\nDue to some issue with older USB PHYs, USB h/w requires to be\nRESET everytime cable is diconnected. Avoid this on 8974\u0027s\nUSB core which doesn\u0027t have this issue.\n\nChange-Id: I918492032de6d65eaba7c9b656c700d4f443aa99\nSigned-off-by: Manu Gautam \u003cmgautam@codeaurora.org\u003e\n" }, { "commit": "b77b0c48e156f335006518c62f606f96967f4b17", "tree": "7fcea56c06214de3772002231e1bef9b23c6cb7a", "parents": [ "57ae1495163cf9ed66285c654bc9b6801c9b3a6f" ], "author": { "name": "Eugene Seah", "email": "eseah@codeaurora.org", "time": "Mon Jul 02 19:28:50 2012 -0600" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Aug 07 10:32:10 2012 -0700" }, "message": "thermal: msm_thermal: Define and implement device tree bindings\n\nDefine device tree bindings for MSM_THERMAL driver, and implement\nmatching code to make the driver abide to these bindings.\n\nChange-Id: I6ed08a09f45f8748841cf44db601f28659e49d9c\nSigned-off-by: Eugene Seah \u003ceseah@codeaurora.org\u003e\n" }, { "commit": "c4a6af1ad22940f1b7193e5b958ce983c40325d0", "tree": "fb09c863cd570f25450a982df9e60d754fb4d504", "parents": [ "1853bd1c96e34124d0c7bfa8875e147ced6afe51" ], "author": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Fri Jul 13 18:50:12 2012 -0700" }, "committer": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Mon Aug 06 11:06:44 2012 -0700" }, "message": "hwmon: qpnp-adc: Add PMIC QPNP IADC driver\n\nThe QPNP IADC driver supports the user bank\nperipheral of the current ADC(IADC).\n\nIADC is a 16 bit ADC used for measuring current.\nThe single measurement mode is supported to read\ncurrent from upto seven channel configuration.\n\nClients can read the internal/external Rsense,\nCSP_EX, CSN_RX along with gain and offset\ncalibraton channels.\n\nChange-Id: I7e5ae3fc70878d16827d33705853a36bb0aa04f6\nSigned-off-by: Siddartha Mohanadoss \u003csmohanad@codeaurora.org\u003e\n" }, { "commit": "2a018aac3ba9f1de3badac6fae0df0e1221ea8f7", "tree": "b0e2c842e8f359727b1d9a4870efaf6c4703f73f", "parents": [ "1504c47fe474188ddacb65ce6d6733cb12677d9a", "99b0756bd67afaa54a937c3145a27f972acde8fd" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Aug 06 05:14:19 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Aug 06 05:14:19 2012 -0700" }, "message": "Merge \"msm: ocmem: Add support for ocmem power control\" into msm-3.4" }, { "commit": "c58fcce723e54466b85981bafe7179b717ff2371", "tree": "a8f8e987145848fc71c88b0872d2052701323cd6", "parents": [ "74aebcec659d075ebbb21bfe7b90ffb138c87528" ], "author": { "name": "Chandan Uddaraju", "email": "chandanu@codeaurora.org", "time": "Mon Apr 23 20:39:17 2012 -0700" }, "committer": { "name": "Chandan Uddaraju", "email": "chandanu@codeaurora.org", "time": "Sun Aug 05 12:22:27 2012 -0700" }, "message": "msm_fb: MDSS: Add DSI driver support for MDSS\n\nAdd the dsi driver implementation for\nDSI version 3.0. Use the panel information\nretrieved from the \u0027dts\u0027 to configure the\ninterface parameters.\n\nAdd the device tree binding file to specify the\nbasic configuration and panel features.\n\nChange-Id: I6a3677401454ad1d2bc29b0b845b0366eb7842b7\nSigned-off-by: Chandan Uddaraju \u003cchandanu@codeaurora.org\u003e\n" }, { "commit": "99b0756bd67afaa54a937c3145a27f972acde8fd", "tree": "872972fd46c2351577e0d5a80a983579a7dd52bc", "parents": [ "74aebcec659d075ebbb21bfe7b90ffb138c87528" ], "author": { "name": "Naveen Ramaraj", "email": "nramaraj@codeaurora.org", "time": "Mon May 28 20:57:09 2012 -0700" }, "committer": { "name": "Naveen Ramaraj", "email": "nramaraj@codeaurora.org", "time": "Sun Aug 05 10:52:18 2012 -0700" }, "message": "msm: ocmem: Add support for ocmem power control\n\nAdd support for controlling the power state of ocmem memory\nmacros. Both local power control and RPM assisted power control\nare supported.\n\nAlso add required support for debugging power control operations.\n\nChange-Id: Ia02c3b90245e808085c3f92fdf5f23044fc04665\nSigned-off-by: Naveen Ramaraj \u003cnramaraj@codeaurora.org\u003e\n" }, { "commit": "b334e3e17301f37a8c79cbb3c04e91c62bd860ee", "tree": "44dbe2d738c36e96d627e684a3b987f1307cb0d2", "parents": [ "1a072b6b79ec3797b51736ac9580a00dd9a1b8cf", "1beb2209d55a9f84406be8c1a66d92be8c5a87ca" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 04 14:41:44 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 04 14:41:44 2012 -0700" }, "message": "Merge \"slim:msm: Change to register access for RX path if required\" into msm-3.4" }, { "commit": "199d18cbdd7aebefcbba6b0cb2c72c197d0bc905", "tree": "a6918e9f88dea86cedd26367ae2f19622b313956", "parents": [ "7a9933e86f09fa82d76f5f352167e5ed7a5b9319", "219fcfc88f16323b7c5a546f3877cf60be0b4def" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 04 11:00:45 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 04 11:00:45 2012 -0700" }, "message": "Merge \"platform: msm: qpnp-pwm: Define PWM devicetree bindings\" into msm-3.4" }, { "commit": "56a3a54fbf57ec9db2c31f69c1f32784f54bc1ab", "tree": "7285c8b7818a43ec859ec2ed7d960e9ac412b16f", "parents": [ "60a772f217a79a5d9b552e6bc7cb590c022298cf", "5b944716e33e373806dac0a0c2c42734c9b59896" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 04 03:53:22 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 04 03:53:22 2012 -0700" }, "message": "Merge \"usb: misc: Add kickstart bridge driver\" into msm-3.4" }, { "commit": "60a772f217a79a5d9b552e6bc7cb590c022298cf", "tree": "cc2697ec1e45c7bee2521b9254b6e6488e4c6444", "parents": [ "f627cdca0e7ec10f6d061081e986a66ce4d86f1e", "928629191fbe3762bd2f9a44ab3b7d99d4cfef4d" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 04 03:53:18 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 04 03:53:18 2012 -0700" }, "message": "Merge \"gpu: ion: Add support for device tree.\" into msm-3.4" }, { "commit": "38910d6321a0e13e4bbbb0c90a584c1145e386ca", "tree": "36445cf2e68744440fba22163f67d3fdd5b56b5f", "parents": [ "1a387d014b2df6088896ae1bd0142198bb94c958", "255b534c09247c13bb7fdbd08ccb31dcea033317" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Aug 04 01:45:09 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Sat Aug 04 01:45:09 2012 -0700" }, "message": "Merge \"msm: usb_bam : Add QDSS support for usb bam mode\" into msm-3.4" }, { "commit": "219fcfc88f16323b7c5a546f3877cf60be0b4def", "tree": "55739155281b7acc6391896c25a491d686e2fb03", "parents": [ "58f4369317c01a5b45d513c509569f85e368d42e" ], "author": { "name": "Jay Chokshi", "email": "jchokshi@codeaurora.org", "time": "Fri Jul 27 17:39:15 2012 -0700" }, "committer": { "name": "Jay Chokshi", "email": "jchokshi@codeaurora.org", "time": "Fri Aug 03 14:53:18 2012 -0700" }, "message": "platform: msm: qpnp-pwm: Define PWM devicetree bindings\n\nAdd the PWM devicetree bindings for the PWM/LPG device present in\nQualcomm PM8941 chipset. Also make the necessary changes to the driver\nto comply with the devicetree binding requirements.\n\nChange-Id: I8124e2541028719e5b747bc85ff548ac109a9735\nSigned-off-by: Jay Chokshi \u003cjchokshi@codeaurora.org\u003e\n" }, { "commit": "1beb2209d55a9f84406be8c1a66d92be8c5a87ca", "tree": "3295afbcf387222a3703a8a5fa8d37c45a3496a1", "parents": [ "b43e94bba8002b25afaeeb7fd885f25081af749d" ], "author": { "name": "Sagar Dharia", "email": "sdharia@codeaurora.org", "time": "Tue Jul 31 19:06:21 2012 -0600" }, "committer": { "name": "Sagar Dharia", "email": "sdharia@codeaurora.org", "time": "Fri Aug 03 12:00:38 2012 -0600" }, "message": "slim:msm: Change to register access for RX path if required\n\nMSM controller for slimbus usually uses a BAM pipe to receive control\ndata. However, some targets may not have a BAM pipe assinged for\nreceiving this data. In that case, RX data should be received using\ndirect register access instead.\nIntroduce a Device-Tree property to change this access.\n\nChange-Id: I9bb1502f25e0e855937bc6fb4131f55348d04794\nSigned-off-by: Sagar Dharia \u003csdharia@codeaurora.org\u003e\n" }, { "commit": "651afb13fee93c78bb126be59e89d8504d567c97", "tree": "fc61dc1ce36b01f814ddc7f662c3ef9079986616", "parents": [ "b22ff159971c561e56e46e4c0dde1dbd74fc219a", "472c7dd849cd539a43bcf75831fc82a04a3e8bdb" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Aug 03 10:23:46 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Aug 03 10:23:46 2012 -0700" }, "message": "Merge \"msm: camera: Add camera hardware DT bindings documentations\" into msm-3.4" }, { "commit": "1335e873690d168a071fbd32324e23072ba617ca", "tree": "c3e3a769bcdf5ce5155d326d052d38ad6d53d1f0", "parents": [ "028cab8afa2feb7f5aba75b13d8d13fbd540d57f" ], "author": { "name": "Pu Chen", "email": "puchen@codeaurora.org", "time": "Wed Aug 01 08:45:25 2012 -0600" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Aug 02 21:45:50 2012 -0600" }, "message": "arm/dt: msm8974: Add GPU device\n\nAdd devicetree properties for GPU on msm8974.\n\nChange-Id: I6c264decfb13b155f3a12dc3e662ab824cd70794\nSigned-off-by: Pu Chen \u003cpuchen@codeaurora.org\u003e\n" }, { "commit": "928629191fbe3762bd2f9a44ab3b7d99d4cfef4d", "tree": "7dc80c46c4300f5fc9f852ad597ef02a873220eb", "parents": [ "85107e0fdaa1fe7e7bea065a7195bd9a97b7a367" ], "author": { "name": "Olav Haugan", "email": "ohaugan@codeaurora.org", "time": "Wed Aug 01 11:32:48 2012 -0700" }, "committer": { "name": "Olav Haugan", "email": "ohaugan@codeaurora.org", "time": "Thu Aug 02 17:40:45 2012 -0700" }, "message": "gpu: ion: Add support for device tree.\n\nAdd device tree parsing to common msm ion code\nto allow new targets to specify ION heap configuration\nin device tree.\n\nDocument the device tree bindings for ION.\n\nChange-Id: I40b7f4b1fbb3ca4ad1d6dc06a33b647f6af1d669\nSigned-off-by: Olav Haugan \u003cohaugan@codeaurora.org\u003e\n" }, { "commit": "255b534c09247c13bb7fdbd08ccb31dcea033317", "tree": "8f373568696dee8485e9b9c40e7a4236b7908cfa", "parents": [ "ae8381a32ba8b9fc8e803a59cd7ff3a38d58d082" ], "author": { "name": "Shimrit Malichi", "email": "smalichi@codeaurora.org", "time": "Thu Aug 02 21:01:43 2012 +0300" }, "committer": { "name": "Shimrit Malichi", "email": "smalichi@codeaurora.org", "time": "Thu Aug 02 21:01:43 2012 +0300" }, "message": "msm: usb_bam : Add QDSS support for usb bam mode\n\nAdd USB bam changes to support QDSS in msm-8794.\n\nMain additions:\nSupport device-tree files.\nAdd disconnect bam pipe support.\nAdd new API to retrieve pipe connection: get_bam2bam_connection_info.\n\nChange-Id: I200d44dee319b8a9efda31b238c99202efddaa07\nSigned-off-by: Shimrit Malichi \u003csmalichi@codeaurora.org\u003e\n" }, { "commit": "472c7dd849cd539a43bcf75831fc82a04a3e8bdb", "tree": "fcb3c8d4a4443c786d8bc8f51c8a14e99e924d79", "parents": [ "4d9199e25ce829f93ec51b0597375dd04d194936" ], "author": { "name": "Kevin Chan", "email": "ktchan@codeaurora.org", "time": "Wed Aug 01 14:08:52 2012 -0700" }, "committer": { "name": "Kevin Chan", "email": "ktchan@codeaurora.org", "time": "Wed Aug 01 14:27:57 2012 -0700" }, "message": "msm: camera: Add camera hardware DT bindings documentations\n\nDocument required information for camera hardware blocks\nto support device tree.\n\nChange-Id: Ia0fceb1091ac5ae7867dcd83691ab7613eb71e42\nSigned-off-by: Kevin Chan \u003cktchan@codeaurora.org\u003e\n" }, { "commit": "8b3a1bbbc3403a457d4432541ca968bba0914ef1", "tree": "193c1987afb20a00357242b098b2f08914f2b480", "parents": [ "8b5ef61f12973dfff8ab5344ca799f2c832e7f32" ], "author": { "name": "Phani Kumar Uppalapati", "email": "phanik@codeaurora.org", "time": "Tue Jun 26 19:56:58 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sat Jul 28 18:11:11 2012 -0600" }, "message": "kernel/msm: 8974: Add audio OCMEM driver support\n\nAdd audio OCMEM driver support to exercise On-Chip\nMemory (OCMEM) for low power audio and voice. The\ndriver is implemented as standalone and it gets\nexercised based on the usecase. Also, this design\nreduces the latency associated with OCMEM handshaking\nprotocol. The audio OCMEM driver is enabled by default\nwith a Kconfig option using select. Add device tree node\nfor audio OCMEM to retrieve platform data.\n\nChange-Id: Iba46ce675fc03843d88cd7cf2aa9bc92fe70a955\nSigned-off-by: Phani Kumar Uppalapati \u003cphanik@codeaurora.org\u003e\n" }, { "commit": "6572ac56689f7cf68489b69548afac4dbe039ebc", "tree": "1097a8427adf49af27f9556f10a10f881bf351d6", "parents": [ "29f4b0c2dd17d1c2ebe2a2e0bef9bc783c245741" ], "author": { "name": "Joonwoo Park", "email": "joonwoop@codeaurora.org", "time": "Tue Jul 10 17:17:00 2012 -0700" }, "committer": { "name": "Joonwoo Park", "email": "joonwoop@codeaurora.org", "time": "Fri Jul 27 15:03:17 2012 -0700" }, "message": "msm: q6dspv2: Add slimbus data path support\n\nRegister slimbus CPU dai link to support slimbus data path.\n\nChange-Id: I3584306ac1e0ad6561a19cecfe71f2a63aadafa9\nSigned-off-by: Joonwoo Park \u003cjoonwoop@codeaurora.org\u003e\n" }, { "commit": "56cb2cb1bc223c0445b03173c2030135c0325647", "tree": "27b3b779680676310656163cffff1b7a04306c9e", "parents": [ "3f3ad2446345e00e21360df4ee689e0bec630fed", "f57ae88a7b2b16630a6c77ab9b02285956bd7b50" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Jul 27 12:30:57 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Jul 27 12:30:57 2012 -0700" }, "message": "Merge \"mtd: msm_qpic_nand: Initial driver for QPIC based NAND controller\" into msm-3.4" }, { "commit": "3f3ad2446345e00e21360df4ee689e0bec630fed", "tree": "d6fc4574a3be5af0ee607ee874b2479fb7ddfbff", "parents": [ "38d153bb8f5dfcbbfb8b4b14ce92b2050f24d7c9", "f61d2e7d4fdcd2c2c2d62e2e4825bc9a06bb26c0" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Jul 27 12:30:43 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Jul 27 12:30:43 2012 -0700" }, "message": "Merge \"mmc: msm_sdcc: Add support for card detect, write protect gpios\" into msm-3.4" }, { "commit": "180f6c42b4c4b401885abdb7a162345d9a3dcbd7", "tree": "3f5a129fef80dae6558e8b7a50685d92ff7ef62b", "parents": [ "762aad48e817d0c04e4ab80031c8b4b127188e86", "9ba4b2803c606370a015eb690be47adc9b7232d5" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Jul 27 10:23:57 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Jul 27 10:23:57 2012 -0700" }, "message": "Merge \"msm: 9625: Add device tree information for NAND\" into msm-3.4" }, { "commit": "1c8a4cbbdc053cdf68c0602676fcd3e19d5acdcc", "tree": "2764452975f798b93cb9b451624501d27a71098d", "parents": [ "867a895b4e81532d6249bf525c8f44c66a551a2e", "17ae71ed311107b3496102a99816a93242e0670c" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Jul 27 10:23:29 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Jul 27 10:23:29 2012 -0700" }, "message": "Merge \"msm: iommu: Support alternate core clocks\" into msm-3.4" }, { "commit": "54c62d1a55cd918cc15b7d35c6d6faa402c78430", "tree": "0bc7719e02a0b7d6ec554532c495a618e92c2705", "parents": [ "9419b2f318f283c867d9e43b19152ba9474ee2a2", "7b116e16148391c077f018e694e791520539e0b7" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Jul 27 03:43:24 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Jul 27 03:43:24 2012 -0700" }, "message": "Merge \"hwmon: qpnp-adc: Add PMIC QPNP VADC Driver\" into msm-3.4" }, { "commit": "f57ae88a7b2b16630a6c77ab9b02285956bd7b50", "tree": "ce04bc366c124a0bcc748d90c5775596db27c7d1", "parents": [ "f330512d2f143a667aeba4438b5a7b95cb82e470" ], "author": { "name": "Sahitya Tummala", "email": "stummala@codeaurora.org", "time": "Mon Apr 02 13:53:33 2012 +0530" }, "committer": { "name": "Sahitya Tummala", "email": "stummala@codeaurora.org", "time": "Fri Jul 27 13:10:38 2012 +0530" }, "message": "mtd: msm_qpic_nand: Initial driver for QPIC based NAND controller\n\nThis is an initial driver for the new QPIC based NAND controller(NANDc)\nthat is introduced in MDM9x25. This driver has been leveraged from the\ncurrent driver msm_nand.c and is modified for the new hardware changes\nin QPIC NANDc. Addition of SPS/BAM support is one of the major\nhardware changes in new controller. It also supports only BCH ECC and\nbased on the device capabilities either 4 bit or 8 bit BCH ECC will\nbe used. This driver is based on the device tree architecture.\n\nChange-Id: Ie9f782a796bd7c1506997e8eaa1e797310dc26a0\nSigned-off-by: Sahitya Tummala \u003cstummala@codeaurora.org\u003e\n" }, { "commit": "17ae71ed311107b3496102a99816a93242e0670c", "tree": "49ae9b6283736f10908c73cb8bc93ad3a27d1360", "parents": [ "a1424c712b118b548812b1b4f42098e14e4d3830" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Tue Jul 24 19:24:14 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Thu Jul 26 19:36:30 2012 -0700" }, "message": "msm: iommu: Support alternate core clocks\n\nRefactor the IOMMU clock control code to always require a\ncore clock as well as an interface clock. Add support for\nan optional alternate core clock and update device tree\nbindings accordingly. Clean up the probe function to remove\nneedless enabling / disabling of clocks.\n\nChange-Id: I4d744ffabc1e6fb123bacfda324f64408257cb25\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "ce78fc2fb144a869de747c44b174d4ab8ab7a72e", "tree": "b7a7376a726be435de3f8558ac4ba81cbe1852a9", "parents": [ "e14ca5ca54251e1087919b99dda0719cbeebac87" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Wed Jul 11 17:20:27 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Thu Jul 26 19:36:29 2012 -0700" }, "message": "msm: iommu: Use the generic label property\n\nUse the label property to specify device labels instead of\na vendor-specific property.\n\nChange-Id: I74f3b57db469781f738f0d52c785d992c1e88efb\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "9ba4b2803c606370a015eb690be47adc9b7232d5", "tree": "603b61d100bfc02afb45cf98c22fcec70cf77752", "parents": [ "f330512d2f143a667aeba4438b5a7b95cb82e470" ], "author": { "name": "Sahitya Tummala", "email": "stummala@codeaurora.org", "time": "Tue Jun 19 11:41:51 2012 +0530" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Jul 26 20:26:44 2012 -0600" }, "message": "msm: 9625: Add device tree information for NAND\n\nAdd device tree information for NAND controller. Also, add\ndocumentation defining bindings for NAND controller and MTD\nflash partition layout for NAND devices.\n\nChange-Id: I6eaf949a54a19aacd3249711033563efd7fd90c2\nSigned-off-by: Sahitya Tummala \u003cstummala@codeaurora.org\u003e\n" }, { "commit": "5b944716e33e373806dac0a0c2c42734c9b59896", "tree": "7c9e361a2405241843fa408e29f1385f3a02c4de", "parents": [ "dadf2c4ef14a0c80884e3fe9e26acc7089989b5f" ], "author": { "name": "Vamsi Krishna", "email": "vskrishn@codeaurora.org", "time": "Fri Jun 29 18:36:23 2012 -0700" }, "committer": { "name": "Vamsi Krishna", "email": "vskrishn@codeaurora.org", "time": "Wed Jul 25 18:11:40 2012 -0700" }, "message": "usb: misc: Add kickstart bridge driver\n\nkickstart bridge driver will be used to download boot images\nto mdm, ram-dumps and efs sync.\n\nChange-Id: Id35e2da664ebf4a16c84d6fb67fbf38a2855356a\nSigned-off-by: Vamsi Krishna \u003cvskrishn@codeaurora.org\u003e\n" }, { "commit": "94b221b88d8274f1d04839e52ad3b09fc5aa5fe1", "tree": "3ecf6b97da181351da391132754dcbe098ccf695", "parents": [ "dadf2c4ef14a0c80884e3fe9e26acc7089989b5f" ], "author": { "name": "Vinay Kalia", "email": "vkalia@codeaurora.org", "time": "Mon Jun 25 18:50:13 2012 -0700" }, "committer": { "name": "Praneeth Paladugu", "email": "ppaladug@codeaurora.org", "time": "Wed Jul 25 13:00:21 2012 -0700" }, "message": "msm: vidc: Adds clock scaling\n\nVideo driver manages clock rate according\nto the increase in load on video core. Clock\nis scaled as per number of macroblocks\ndecoded/encoded per second. This makes sure\nthat the power consumption and performance is\noptimal.\n\nChange-Id: If8aede0e3048cdc9bcdf14ce0c239a58bdd5d263\nSigned-off-by: Vinay Kalia \u003cvkalia@codeaurora.org\u003e\n" }, { "commit": "7b116e16148391c077f018e694e791520539e0b7", "tree": "b2add29adab9f7d0cfd6a70b4db6a127b4976910", "parents": [ "a0e51df06ec6d5462ac04b043442e28cef7c56f4" ], "author": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Tue Jun 05 23:27:46 2012 -0700" }, "committer": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Tue Jul 24 16:40:11 2012 -0700" }, "message": "hwmon: qpnp-adc: Add PMIC QPNP VADC Driver\n\nThe QPNP VADC driver supports the User Bank Peripheral of\nthe voltage ADC(VADC).\n\nVADC is a 15 bit ADC that measures signals through the\nMain analog multiplexer (AMUX) and PREMUX. The driver\narbitrates the request to issue ADC read requests.\n\nVADC driver includes support for the conversion sequencer.\nThe conversion sequencer is a HW triggered signal to start\nADC measurement on trigger events for PA ON,\ncamera flash and TX threshold.\n\nThe AMUX supports external pull-ups simultaneously. Clients\ncan select the appropriate AMUX input channel to measure the\nADC for the intended pull up configuration.\n\nChange-Id: I8886968ccec54ad03334b113b4516d4d200e0da8\nSigned-off-by: Siddartha Mohanadoss \u003csmohanad@codeaurora.org\u003e\n" }, { "commit": "102e596d9b5fefc6bebd0fee8970a7730414f01b", "tree": "9a522cfdaf1de101f9f87a3409e3ad603bf2e30b", "parents": [ "86a9cf113310fff2f5e8b854329f0047b51b7d48" ], "author": { "name": "Mahesh Sivasubramanian", "email": "msivasub@codeaurora.org", "time": "Wed Jun 20 13:12:11 2012 -0600" }, "committer": { "name": "Mahesh Sivasubramanian", "email": "msivasub@codeaurora.org", "time": "Tue Jul 24 16:24:06 2012 -0600" }, "message": "msm: mpm: MPM driver support for devicetree/irqdomain\n\nThe current MPM driver works for targets where the interrupt controllers\noperate in a legacy mode, where the linux irqs are at a constant offset\nfrom the hardware irqs. On newer targets, the mapping within the\ninterrupt controllers are no longer restricted to legacy mode.\n\nThe change also address the interface changes in the MPM hardware\nstarting with 8974 chipsets.\n\nChange-Id: Ide9b5bf7e29c94a85e37d04cd0064864b89f7c5c\nSigned-off-by: Mahesh Sivasubramanian \u003cmsivasub@codeaurora.org\u003e\n" }, { "commit": "f61d2e7d4fdcd2c2c2d62e2e4825bc9a06bb26c0", "tree": "51d6a9520f560b239e0c90d93dec263f32c0a9eb", "parents": [ "eec28e96a42079c6802a1cfdb2b41f27a85317e4" ], "author": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Fri Jun 22 15:56:39 2012 +0530" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 24 13:18:35 2012 -0600" }, "message": "mmc: msm_sdcc: Add support for card detect, write protect gpios\n\nAdd support for SD card insertion/removal detection and\nwrite protect switch detection using gpio numbers passed\nthrough device tree.\n\nChange-Id: I63aed72f38f912b33de4b8eaedf72e52bbaeb4a0\nSigned-off-by: Sujit Reddy Thumma \u003csthumma@codeaurora.org\u003e\n" }, { "commit": "092e50b39aa62d3763beb8ae3771cc1918fd28f2", "tree": "5342417a4ba2954bf7854a915a3dd4a133609492", "parents": [ "e2e178fa0c3429b305820932493e365d65342b31", "72977ed7fbf2bfe3ef877f164d7fd306ddfa270a" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 24 02:29:47 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Jul 24 02:29:47 2012 -0700" }, "message": "Merge \"msm: cache_erp: Add device tree support\" into msm-3.4" }, { "commit": "33fe201ab6f8cfdac9314516352aa3be552dfcc4", "tree": "b31dc71285ea96907e43895b2ef03d78db7d066c", "parents": [ "55b63ed5803c2828ea0b6686750b03bdd85b94aa", "a9964a5a8e05c301302e950f678098bfbf6fdecf" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Jul 23 20:07:44 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Jul 23 20:07:44 2012 -0700" }, "message": "Merge \"msm: lpm: lpm resources bug fixes\" into msm-3.4" }, { "commit": "72977ed7fbf2bfe3ef877f164d7fd306ddfa270a", "tree": "b0221b49728c210320f4108749d31e3b56b42cfe", "parents": [ "f546a88189f2c3a28d47c2067144f4f3af1bce7a" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Mon Jul 02 12:36:23 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Mon Jul 23 14:23:44 2012 -0700" }, "message": "msm: cache_erp: Add device tree support\n\nAdd device tree bindings and driver support for the cache\nerror reporting devices on 8974. Remove leftover\nopportunistic debug info from the L1 error handler, since\nwe can no longer get away with this on all targets.\n\nChange-Id: Iac88915a6b40a40ec3157027048f4daf6369dc42\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "a3453a79d64854d680721eef2de31683337db1ee", "tree": "b2997981d35b79c33d7cf1e3e4034d3de7ae2443", "parents": [ "f546a88189f2c3a28d47c2067144f4f3af1bce7a" ], "author": { "name": "Harmandeep Singh", "email": "hsingh@codeaurora.org", "time": "Tue Jul 03 12:31:09 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Jul 23 15:02:46 2012 -0600" }, "message": "ASOC: msm: Add device tree specific changes in compressed driver\n\n- Add a front end DAI link for compressed audio driver.\n- Add device tree specific changes to sound soc compressed\n drivers which will help the detection of sound card.\n\nChange-Id: I4a8076df8c82cd4e444fc0d68e8f7a228bd1dc02\nSigned-off-by: Harmandeep Singh \u003chsingh@codeaurora.org\u003e\n" }, { "commit": "384591539d0f0642e336650e7c8879bdb3f048bb", "tree": "56ff207eac6d21ae23d5fd628f35bf411c5acd5a", "parents": [ "0aa979798d897bd71d03a07f8c97daafa2937ae9" ], "author": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Tue Jun 26 00:07:59 2012 +0530" }, "committer": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Mon Jul 23 14:11:43 2012 +0530" }, "message": "arm/dt: msmcopper: Add TLMM/GPIO support for SDC slots\n\nSDC1 and SDC2 interfaces on copper target has dedicated\nTLMM pins and SDC3, SDC4 have GPIOs muxed with other\nsubsystems.\n\nChange-Id: I6f924ccb0c27e8ecde95c0a7d8beb6614c25378d\nSigned-off-by: Sujit Reddy Thumma \u003csthumma@codeaurora.org\u003e\n" }, { "commit": "68398a4f0e87aa7285ccf55d1e087f15c32aedca", "tree": "e39f43466cb0abad01a6e74d34798e2796d4a459", "parents": [ "897b93c1294afea5a7d26612067b0dbd2ab1d744" ], "author": { "name": "Vinay Kalia", "email": "vkalia@codeaurora.org", "time": "Fri Jun 22 18:36:12 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Sun Jul 22 09:51:21 2012 -0600" }, "message": "msm: vidc: Download firmware using PIL.\n\nVideo driver uses PIL and IOMMU to download video\nfirmware.Video firmware is downloaded during the\nstart of video session using PIL apis.\n\nChange-Id: If285e9b6df57ecdfa379fa82b9eef542e6aa9bba\nSigned-off-by: Vinay Kalia \u003cvkalia@codeaurora.org\u003e\n" }, { "commit": "94455a4f099cc13b899ada59f71e6e88c6980514", "tree": "db01dc05d98ff7ea01f1840943cf51d79680264c", "parents": [ "14a7ab7259980e15ead9940a3345f4b2abf45ca5" ], "author": { "name": "Naveen Ramaraj", "email": "nramaraj@codeaurora.org", "time": "Thu Jul 05 16:01:40 2012 -0700" }, "committer": { "name": "Naveen Ramaraj", "email": "nramaraj@codeaurora.org", "time": "Fri Jul 20 14:51:06 2012 -0700" }, "message": "arm/dt: msm8974: Add On-chip memory device\n\nAdd the On-chip memory(OCMEM) device to the msm8974 device tree.\nOCMEM is a high speed memory device used by various subsystems.\n\nChange-Id: I08da5b088e5f48e6ed935a38da5a708fcdbaf670\nSigned-off-by: Naveen Ramaraj \u003cnramaraj@codeaurora.org\u003e\n" }, { "commit": "227bd3b1371a44fb88cff09927acfc05c9ef9b1f", "tree": "d1f1f18cba694aaca299c5beac4e52660b2f691f", "parents": [ "938cc0123fe6356d5948717ec3f9a5d8d0a46ec2", "85b719922aca63e5e12db0cb9403fa8a3dee5efc" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Jul 19 23:49:02 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Thu Jul 19 23:49:02 2012 -0700" }, "message": "Merge changes I34fdcdb8,I951384c2,I34b4285f into msm-3.4\n\n* changes:\n msm: rpm-regulator-smd: Add support for LDO bypass mode disable\n arm/dt: msm8974: Update the max corner limit for VDD_CX voltage regulator\n msm: rpm-regulator-smd: Update voltage corner mapping to match RPM\n" }, { "commit": "938cc0123fe6356d5948717ec3f9a5d8d0a46ec2", "tree": "f289099d44a0e4f127fda7868be32b1d8d64ac4b", "parents": [ "1a346c721514881566ec88f97ba71303f2ab2318", "e52314434bf6dd34e5d4fcfe488d1907ec691a97" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Jul 19 23:48:42 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Thu Jul 19 23:48:42 2012 -0700" }, "message": "Merge changes I0bea3325,Iafd2cbca,Icc51aef5 into msm-3.4\n\n* changes:\n dt/flattree: Add stub defintions for flat device tree function\n msm: 8974: Add bindings for register trace buffer\n msm: Add bindings for memory reservations\n" }, { "commit": "a21b983508044be32d4b55977e2131a6c8f582e8", "tree": "295d314349335668b6ccfbf8f085733d86c3f7a8", "parents": [ "ec8561ccc1f52dd721b359372b9108b6332a7abe", "19cf498be1f28594b9011eb63b49775c7ca7edd4" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Jul 19 23:48:26 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Thu Jul 19 23:48:26 2012 -0700" }, "message": "Merge changes I1b449119,If7d42ce3 into msm-3.4\n\n* changes:\n arm/dt: msmcopper: Add PON device for PM8941\n msm: qpnp-power-on: Add QPNP PMIC power-on(PON) driver\n" }, { "commit": "a9964a5a8e05c301302e950f678098bfbf6fdecf", "tree": "e835f4c1f15cd833c166ec25bd4e77fd75ab7ef1", "parents": [ "08790720bd5cf0940dddda805eb5b2661e682f96" ], "author": { "name": "Girish Mahadevan", "email": "girishm@codeaurora.org", "time": "Fri Jun 29 10:14:09 2012 -0600" }, "committer": { "name": "Girish Mahadevan", "email": "girishm@codeaurora.org", "time": "Thu Jul 19 15:29:57 2012 -0600" }, "message": "msm: lpm: lpm resources bug fixes\n\nBug fixes to get RPM assisted power collapse working.\nUnstable behavior was seen because L2 SPM state wasn\u0027t\nbeing reset as part of exiting power collapse.\nRPM driver callbacks were being missed because the\nresource type comparison from the callback with the\nresource type maintained at lpm_resources was failing\ndue to endian related issues.RPM sleep set processing\nfails because vdd-dig resource doesn\u0027t use absolute\nvoltage values but voltage corner values.\n\nChange-Id: I5b7218ba87574f2e7296378ded5e86fcac085203\nSigned-off-by: Girish Mahadevan \u003cgirishm@codeaurora.org\u003e\n" }, { "commit": "ae8342e8c6dfebf1ff228768afad504b68b14175", "tree": "b7bc8a6da779a31cec6173792873d252002e4ee9", "parents": [ "23c63e879e2993261fa995ef3cfa13f111978919", "4b8f795dd9dd01116de848268a271239847b1fff" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Jul 19 06:05:17 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Thu Jul 19 06:05:17 2012 -0700" }, "message": "Merge \"RTC: Add QPNP rtc driver\" into msm-3.4" }, { "commit": "963b5124762a3b867c941361e934e160fdc42692", "tree": "b04f5926b856cb45a995f38cc865875668fbf997", "parents": [ "08790720bd5cf0940dddda805eb5b2661e682f96" ], "author": { "name": "Anirudh Ghayal", "email": "aghayal@codeaurora.org", "time": "Wed May 23 18:53:59 2012 +0530" }, "committer": { "name": "Anirudh Ghayal", "email": "aghayal@codeaurora.org", "time": "Thu Jul 19 08:53:37 2012 +0530" }, "message": "msm: qpnp-power-on: Add QPNP PMIC power-on(PON) driver\n\nThe power-on module of the PMIC provides support for\npower-key, reset and power on/off reasons and other\npower-on related functionality.\nThe driver currently supports only the power-key detection.\n\nChange-Id: If7d42ce38fba6e9a590d0953daadcd43ab746112\nSigned-off-by: Anirudh Ghayal \u003caghayal@codeaurora.org\u003e\n" }, { "commit": "85b719922aca63e5e12db0cb9403fa8a3dee5efc", "tree": "4393c514e01eeefe89b4e5af2a28d7c713d6a39e", "parents": [ "f3d8232eb779f0c965eb24f6f817b7ffa4eb6d1c" ], "author": { "name": "David Collins", "email": "collinsd@codeaurora.org", "time": "Wed Jul 18 12:00:14 2012 -0700" }, "committer": { "name": "David Collins", "email": "collinsd@codeaurora.org", "time": "Wed Jul 18 14:27:45 2012 -0700" }, "message": "msm: rpm-regulator-smd: Add support for LDO bypass mode disable\n\nAdd support in the rpm-regulator-smd driver for the \"bypa\"\nbypass mode disallow parameter. This parameter can be used to\ninstruct the RPM that a given LDO should never be put into\nbypass mode because its load is sensitive to voltage supply\nnoise.\n\nChange-Id: I34fdcdb88107f94b78f2ace4a0512fe4ca94779c\nSigned-off-by: David Collins \u003ccollinsd@codeaurora.org\u003e\n" }, { "commit": "71c18993b6210f13b7b7fa69a396bc1b62d77de1", "tree": "d401daf6cdd1fb6907be7a02512f6d62d6662c3c", "parents": [ "08790720bd5cf0940dddda805eb5b2661e682f96" ], "author": { "name": "David Collins", "email": "collinsd@codeaurora.org", "time": "Wed Jul 18 11:25:24 2012 -0700" }, "committer": { "name": "David Collins", "email": "collinsd@codeaurora.org", "time": "Wed Jul 18 13:58:50 2012 -0700" }, "message": "msm: rpm-regulator-smd: Update voltage corner mapping to match RPM\n\nUpdate the voltage corner mapping used by the rpm-regulator-smd\ndriver to match what is being used inside of the RPM.\n\nIn particular, an explicit \"none\" corner value has been inserted\nwith value 0 which pushes all of the other corners up by 1.\n\nChange-Id: I34b4285f88e7e9d23d7accf4ccbf9cebff591754\nSigned-off-by: David Collins \u003ccollinsd@codeaurora.org\u003e\n" }, { "commit": "3593b3bb7a87c29ae4b70b47f142001c6b74db71", "tree": "2c1946a26e21f134d401700b921708accb6657ae", "parents": [ "bc08c3289ecd0d85f4738d874093e8d2a0e12c28" ], "author": { "name": "Laura Abbott", "email": "lauraa@codeaurora.org", "time": "Wed Jun 27 16:37:33 2012 -0700" }, "committer": { "name": "Laura Abbott", "email": "lauraa@codeaurora.org", "time": "Wed Jul 18 13:39:50 2012 -0700" }, "message": "msm: 8974: Add bindings for register trace buffer\n\nDocument the appropriate bindings so the register trace buffer (RTB)\ncan be used on targets that support device tree.\n\nChange-Id: Iafd2cbca20489fb27ada0b982e012ee74f7b07c1\nSigned-off-by: Laura Abbott \u003clauraa@codeaurora.org\u003e\n" }, { "commit": "bc08c3289ecd0d85f4738d874093e8d2a0e12c28", "tree": "3572b23f4bef71335383ce457d1e677b5e4295b6", "parents": [ "08790720bd5cf0940dddda805eb5b2661e682f96" ], "author": { "name": "Laura Abbott", "email": "lauraa@codeaurora.org", "time": "Tue Jun 26 11:09:07 2012 -0700" }, "committer": { "name": "Laura Abbott", "email": "lauraa@codeaurora.org", "time": "Wed Jul 18 13:39:50 2012 -0700" }, "message": "msm: Add bindings for memory reservations\n\nTo get large contiguous memory allocations, a dedicated carved out\nmemory pool is created. The size of this pool is determined by the\nsizes declared by devices. Add size bindings so drivers can increase\nthe size needed for reservations. Also add bindings to allow drivers\nto reserve memory with memblock_reserve to reserve specific memory\nregions.\n\nChange-Id: Icc51aef5069a7964c03c5c52f24e40b96f4b2781\nSigned-off-by: Laura Abbott \u003clauraa@codeaurora.org\u003e\n" }, { "commit": "2978154eb82a68434970d4362028bd27fa2c5cd5", "tree": "5959cd3dffd64f41e6675d26ed4b784c91c1d0d3", "parents": [ "f7bb1238eef2ac6a1b07eaf856f157ffda225dd7", "05a6e38b0dcac12b9d97d24438f7e4aa90e34329" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jul 18 11:48:03 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Jul 18 11:48:03 2012 -0700" }, "message": "Merge \"thermal: tsens: Add 8974 TSENS driver\" into msm-3.4" }, { "commit": "6eb148395b9707d0a049957f2d0d25f71bf19b8c", "tree": "bfb9920daf9134b6f4c68b974bf9437b84780ac8", "parents": [ "758f90dc7dde0f7a2618a1d062132a37a8ae7771", "ceb4269948bedfe2af1aae1d15b6fde60ac7d6b9" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jul 18 06:35:43 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Jul 18 06:35:43 2012 -0700" }, "message": "Merge changes I006dbbcf,Ib2bbdc83 into msm-3.4\n\n* changes:\n msm: iommu: Update DTS documentation\n iommu/msm: Refactor device tree parsing\n" }, { "commit": "6353ac3aa32975fe74f2cbe0595eefa0fcff38b3", "tree": "cd1b1276129cfb81400ea11eb0a67ce86f3e7405", "parents": [ "12d061ad7d4f7a554eb64ae957cad8da29bffdc9", "92c2ef99c0c3dee3e1c9d244afd6b746d340cd8c" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jul 18 06:35:38 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Jul 18 06:35:38 2012 -0700" }, "message": "Merge \"crypto: Add device tree support for crypto drivers\" into msm-3.4" }, { "commit": "05a6e38b0dcac12b9d97d24438f7e4aa90e34329", "tree": "fa9ac012411b5eb16623c32921fabf2fe18a2606", "parents": [ "133125eae49a8d88157b92856f80be1d1ce3dde8" ], "author": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Mon May 14 15:13:37 2012 -0700" }, "committer": { "name": "Siddartha Mohanadoss", "email": "smohanad@codeaurora.org", "time": "Tue Jul 17 19:04:46 2012 -0700" }, "message": "thermal: tsens: Add 8974 TSENS driver\n\nMSM8974 TSENS block supports 11 temperature\nsensors that are used for thermal mitigation.\n\nThe TSENS driver is part of the thermal sysfs\nframework that allows clients to set thresholds\nand receive notification on temperature thresholds\nbeing crossed through thermal sysfs.\n\nThe driver provides ability to thermal clients\nto set upper/lower thresholds for each sensor\nand receive individual notification for each\nsensor once the threshold is crossed.\n\nAll sensors are enabled by default during\ndriver initialization.\n\nThe driver is initialized early during kernel\ninitialization to provide capability to the\nthermal kernel driver to read temperature\nfrom the TSENS sensors. To support this feature\na kernel API is provide to read the TSENS\ntemperature.\n\nChange-Id: If17daae81cfb522a9cea786b5db0c920adb5ed2d\nSigned-off-by: Siddartha Mohanadoss \u003csmohanad@codeaurora.org\u003e\n" }, { "commit": "4b8f795dd9dd01116de848268a271239847b1fff", "tree": "300301ad18f567e6c72049fad48b409101bdeef3", "parents": [ "e1c55616605962e6881547c34e83f94c02e36160" ], "author": { "name": "Ashay Jaiswal", "email": "ashayj@codeaurora.org", "time": "Wed May 02 14:55:38 2012 +0530" }, "committer": { "name": "Ashay Jaiswal", "email": "ashayj@codeaurora.org", "time": "Tue Jul 17 14:28:34 2012 +0530" }, "message": "RTC: Add QPNP rtc driver\n\nA 32 bit RTC is housed inside PMIC. The RTC driver\nuses SPMI interface to communicate with the RTC module.\n\nRTC device is divided into two sub-peripherals:\n1. RTC read-write peripheral having basic RTC registers.\n2. Alarm peripheral for controlling alarm.\n\nRTC peripherals are children of SPMI device and driver\nreceives it\u0027s configuration parameters (such as alarm\npowerup feature to powerup phone using alarm interrupt)\nfrom device tree.\n\nChange-Id: I46a2ffc0f6c9c5ee174cf803de19e656da7ce088\nSigned-off-by: Ashay Jaiswal \u003cashayj@codeaurora.org\u003e\n" }, { "commit": "92c2ef99c0c3dee3e1c9d244afd6b746d340cd8c", "tree": "450175d8424a454775265c8504e3a036a83b6fde", "parents": [ "eacd79f11834b4e21a578b0bfb6af8c3f3c513d0" ], "author": { "name": "Mona Hossain", "email": "mhossain@codeaurora.org", "time": "Thu Jul 05 09:38:17 2012 -0700" }, "committer": { "name": "Mona Hossain", "email": "mhossain@codeaurora.org", "time": "Thu Jul 12 16:49:28 2012 -0700" }, "message": "crypto: Add device tree support for crypto drivers\n\nAdd device tree support for qcedev and qcrypto device drivers.\nAdd documentations for associated bindings.\n\nChange-Id: Ib76986af5d9e30263a559329acbca401ec3304d2\nSigned-off-by: Mona Hossain \u003cmhossain@codeaurora.org\u003e\n" }, { "commit": "ceb4269948bedfe2af1aae1d15b6fde60ac7d6b9", "tree": "f4ad61f6e7cb7a0e949f9e652c23ac0caf9d4b1c", "parents": [ "4575bdd618900ece76a9b38e923c0bda2030310b" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Wed Jun 27 16:02:27 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Tue Jul 10 19:22:41 2012 -0700" }, "message": "msm: iommu: Update DTS documentation\n\nUpdate the DTS bindings documentation to include the\nvdd-supply regulator property.\n\nChange-Id: I006dbbcf55cfdf07604c64380ce227f30f6cc75a\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "518ca103fd536dd9f747b21cceb218b7905728d4", "tree": "fbac6b34c146a4ef63cf2c02ecfe4de2efa3fc92", "parents": [ "d4bc8a1fe524a93c62f45d37907ae8510467153a" ], "author": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Wed Jun 27 15:15:26 2012 -0700" }, "committer": { "name": "Stepan Moskovchenko", "email": "stepanm@codeaurora.org", "time": "Tue Jul 10 19:22:41 2012 -0700" }, "message": "msm: iommu: Specify SMT sizes in device tree\n\nSince the IOMMU ID registers are only accessible by the\nsecure environment, specify the SMT sizes in device tree\nso that the IOMMU driver knows how many SMRs to initialize.\n\nChange-Id: I614a51069c0304f71b0c7d061d97aca0289c17ea\nSigned-off-by: Stepan Moskovchenko \u003cstepanm@codeaurora.org\u003e\n" }, { "commit": "828798d2da3342623b6def9af31988ce0d46acca", "tree": "22f83bfa76b2df4803603928f7c64a59749af071", "parents": [ "8c2f26899d9956f933a0478a9ca4530ddf53451b" ], "author": { "name": "Tianyi Gou", "email": "tgou@codeaurora.org", "time": "Wed May 02 21:12:38 2012 -0700" }, "committer": { "name": "Tianyi Gou", "email": "tgou@codeaurora.org", "time": "Fri Jul 06 14:42:55 2012 -0700" }, "message": "msm: pil-venus: Add Venus PIL driver for 8974\n\nVenus PIL platform driver is used to bring Venus Video subsystem\nout of the reset and start executing code. It also supports\nshutting down the subsystem to save power when it is not in use.\n\nChange-Id: I6e305efe548524fc71ee2fa2fba05b6b2b783ff7\nSigned-off-by: Tianyi Gou \u003ctgou@codeaurora.org\u003e\n" }, { "commit": "d5fef23bde77e16e0a0954054e34b9a40918bfe0", "tree": "bbd390a3ed36fd758366d499a7b64a2f5a8c73eb", "parents": [ "b7d0c5741b93f052a4d0ddb1c3280dad3df6248f", "d4398dfb9e4aefdcc6ef93adf9a5e67527e1d6c8" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Thu Jul 05 19:55:24 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Thu Jul 05 19:55:24 2012 -0700" }, "message": "Merge \"ARM: integrate CMA with DMA-mapping subsystem\" into msm-3.4" }, { "commit": "17206c2e40764a6a8d7623150f865405aae21dfd", "tree": "cc31423530b675abbaf00ad491ca6de76d53f355", "parents": [ "e48c2408900ed8abdce034882c90ca596f725bce" ], "author": { "name": "Manu Gautam", "email": "mgautam@codeaurora.org", "time": "Thu Jun 21 10:17:53 2012 +0530" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 03 17:10:17 2012 -0600" }, "message": "usb: dwc3-msm: Request for otg_interrupt irq\n\nDWC3 has separate irq line for OTG interrupts (e.g. ID / BSV).\nThese interrupts are needed to detect cable connect and disconnect\nevents. Hence, request for this interrupt line from OTG driver.\nAlso, update device tree binding documentation for DWC3 core.\n\nChange-Id: Ie97e4b3b5dcf840eabeb01b5c5d6531a8a70a3c9\nSigned-off-by: Manu Gautam \u003cmgautam@codeaurora.org\u003e\n" }, { "commit": "e48c2408900ed8abdce034882c90ca596f725bce", "tree": "83d8432da20f2fd5add9669339f310a77dc5cab2", "parents": [ "33e912cd0170b3b028701d20a498330bdbd90937", "87841c8cd8d00e55659e380f0b19ce61c4b6b7ad" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 03 11:32:49 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Jul 03 11:32:49 2012 -0700" }, "message": "Merge \"msm: Add device tree support for audio drivers\" into msm-3.4" }, { "commit": "5daaf686c37dddc8b0b2ca4f9b484998b236ad89", "tree": "a68055b47bc0ea138db03f3b9de31fd90c548ba9", "parents": [ "d3890376670fe5449d6691c3c89760974fadb017", "71b536ff1a4ad2cb2f6a3a398fb6023b790fb65c" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 03 09:24:59 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Jul 03 09:24:59 2012 -0700" }, "message": "Merge \"tzlog: Add Device Tree support\" into msm-3.4" }, { "commit": "87841c8cd8d00e55659e380f0b19ce61c4b6b7ad", "tree": "dc199731533889635bef0cf84d93f31a5480606b", "parents": [ "1dd15a41a850a4c959b8f46336d1dd5ebe2a1686" ], "author": { "name": "Phani Kumar Uppalapati", "email": "phanik@codeaurora.org", "time": "Thu Jun 14 21:28:43 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 03 07:51:03 2012 -0600" }, "message": "msm: Add device tree support for audio drivers\n\nAdd device tree support to sound soc audio drivers.\nThese drivers get registered to the alsa framework\nand thus aid detection of soundcard.\n\nChange the device tree entries to follow the new\ndesign approach of having individual probe functions\nfor each audio interface.\n\nChange-Id: Ie8f0bddd5ba6e2cfb66c6a23efdcb434c5082d7d\nSigned-off-by: Phani Kumar Uppalapati \u003cphanik@codeaurora.org\u003e\n" }, { "commit": "22d8bf0ffbe23bfd808ed375c8379d120f1983ec", "tree": "011f236135fc1b6b431eeb255d6f4e9f0bbf69fe", "parents": [ "5b17dcfd1126e147c0c4f0acbddeac4b049ee5e1", "824b752edbef5adebbf3db94cb2a1b792d25e2e6" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 03 05:04:35 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Jul 03 05:04:35 2012 -0700" }, "message": "Merge \"arm/dt: msm8974: add support for SD/eMMC bus speed modes\" into msm-3.4" }, { "commit": "da10f9626e33428f8c2d17b786eab1720ae73222", "tree": "57c599a235512d2fbf6cf2e37151fb31090d015a", "parents": [ "3a2325989cadf80af74ad0f7b6067ab87468a9f3", "b9ff7f0d6a09bf70d357746b9c212b99ea40932d" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jul 03 02:10:08 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Jul 03 02:10:08 2012 -0700" }, "message": "Merge \"arm/dt: msm8974: Add regulator support for SDC controllers\" into msm-3.4" }, { "commit": "9ef6e99245ce025573941615121996dca415e408", "tree": "ff442218bef3b5f191b0a624e34143884596dd0f", "parents": [ "6d593667a97b3587a1be0be1dcce536e12dc59a0", "a9f11565a15ded0fac8964162d6866a8f217e2f7" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Jul 02 21:01:55 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Mon Jul 02 21:01:55 2012 -0700" }, "message": "Merge changes I8c826faa,I8a04c58b into msm-3.4\n\n* changes:\n X86: integrate CMA with DMA-mapping subsystem\n drivers: add Contiguous Memory Allocator\n" }, { "commit": "824b752edbef5adebbf3db94cb2a1b792d25e2e6", "tree": "2e9b1dabe12f8d686cb09595a2657fb47d20d95d", "parents": [ "b9ff7f0d6a09bf70d357746b9c212b99ea40932d" ], "author": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Wed May 30 13:04:34 2012 +0530" }, "committer": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Tue Jul 03 08:29:03 2012 +0530" }, "message": "arm/dt: msm8974: add support for SD/eMMC bus speed modes\n\nSDC1 supports following bus speed modes:\n\t- HS200 at 1.8V\n\t- DDR at 1.8V\nSDC2 supports following bus speed modes:\n\t- SDR12, SDR25, SDR50, SDR104, DDR50\n\nChange-Id: I648435fc00f6b11634cb3d0c41106ecb0868143f\nSigned-off-by: Sujit Reddy Thumma \u003csthumma@codeaurora.org\u003e\n" }, { "commit": "b9ff7f0d6a09bf70d357746b9c212b99ea40932d", "tree": "822d1569319999fd83db73fd575207c68c24983f", "parents": [ "d1af26b2d9cbcb90249f348fa895d7669ef27c41" ], "author": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Fri May 04 09:57:49 2012 +0530" }, "committer": { "name": "Sujit Reddy Thumma", "email": "sthumma@codeaurora.org", "time": "Tue Jul 03 08:27:54 2012 +0530" }, "message": "arm/dt: msm8974: Add regulator support for SDC controllers\n\nSDC controllers need two types of power supply:\n- vdd (SD/eMMC flash core power supply)\n- vdd_io (SD/eMMC I/O pad power supply)\n\nAdd support for enable, disable, low power mode setting\nfor these regulators.\n\nChange-Id: Ifd0ef0d4dd9732893f49700fe86b1dad24497f71\nSigned-off-by: Sujit Reddy Thumma \u003csthumma@codeaurora.org\u003e\n" }, { "commit": "d4398dfb9e4aefdcc6ef93adf9a5e67527e1d6c8", "tree": "b83d45b61255205051fa96dac3fe7e18a1258737", "parents": [ "a9f11565a15ded0fac8964162d6866a8f217e2f7" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Dec 29 13:09:51 2011 +0100" }, "committer": { "name": "Laura Abbott", "email": "lauraa@codeaurora.org", "time": "Fri Jun 29 16:06:51 2012 -0700" }, "message": "ARM: integrate CMA with DMA-mapping subsystem\n\nThis patch adds support for CMA to dma-mapping subsystem for ARM\narchitecture. By default a global CMA area is used, but specific devices\nare allowed to have their private memory areas if required (they can be\ncreated with dma_declare_contiguous() function during board\ninitialisation).\n\nContiguous memory areas reserved for DMA are remapped with 2-level page\ntables on boot. Once a buffer is requested, a low memory kernel mapping\nis updated to to match requested memory access type.\n\nGFP_ATOMIC allocations are performed from special pool which is created\nearly during boot. This way remapping page attributes is not needed on\nallocation time.\n\nCMA has been enabled unconditionally for ARMv6+ systems.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nCC: Michal Nazarewicz \u003cmina86@mina86.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nTested-by: Rob Clark \u003crob.clark@linaro.org\u003e\nTested-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nTested-by: Benjamin Gaignard \u003cbenjamin.gaignard@linaro.org\u003e\nTested-by: Robert Nelson \u003crobertcnelson@gmail.com\u003e\nTested-by: Barry Song \u003cBaohua.Song@csr.com\u003e\n\nConflicts:\n\n\tarch/arm/include/asm/mach/map.h\n\tarch/arm/mm/init.c\n\tarch/arm/mm/mm.h\n\tarch/arm/mm/mmu.c\n\nChange-Id: I85e3b43a9fa1e3c4d33cbc85fff6dee1b815041d\nSigned-off-by: Laura Abbott \u003clauraa@codeaurora.org\u003e\n" }, { "commit": "55bb033f625acb7776cabadc9de7699669a8cdd6", "tree": "5acf977f21b55bc1e88d2a6d0fb6e86f5793980b", "parents": [ "f1f63887812a871f4a37842008bab4bdb7560011" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Dec 29 13:09:51 2011 +0100" }, "committer": { "name": "Laura Abbott", "email": "lauraa@codeaurora.org", "time": "Fri Jun 29 16:06:50 2012 -0700" }, "message": "drivers: add Contiguous Memory Allocator\n\nThe Contiguous Memory Allocator is a set of helper functions for DMA\nmapping framework that improves allocations of contiguous memory chunks.\n\nCMA grabs memory on system boot, marks it with MIGRATE_CMA migrate type\nand gives back to the system. Kernel is allowed to allocate only movable\npages within CMA\u0027s managed memory so that it can be used for example for\npage cache when DMA mapping do not use it. On\ndma_alloc_from_contiguous() request such pages are migrated out of CMA\narea to free required contiguous block and fulfill the request. This\nallows to allocate large contiguous chunks of memory at any time\nassuming that there is enough free memory available in the system.\n\nThis code is heavily based on earlier works by Michal Nazarewicz.\n\nChange-Id: I8a04c58b0d39ee7343ac0b58b6dad9d57912c91d\n[lauraa: fixed Kconfig conflict]\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Michal Nazarewicz \u003cmina86@mina86.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nTested-by: Rob Clark \u003crob.clark@linaro.org\u003e\nTested-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nTested-by: Benjamin Gaignard \u003cbenjamin.gaignard@linaro.org\u003e\nTested-by: Robert Nelson \u003crobertcnelson@gmail.com\u003e\nTested-by: Barry Song \u003cBaohua.Song@csr.com\u003e\nSigned-off-by: Laura Abbott \u003clauraa@codeaurora.org\u003e\n" }, { "commit": "71b536ff1a4ad2cb2f6a3a398fb6023b790fb65c", "tree": "0a53b7d4ac94e5cb283f4f061115e0c6505f8792", "parents": [ "1d22dfa0b050d09fc589af90b8d35f32a5dc3056" ], "author": { "name": "Hariprasad Dhalinarasimha", "email": "hnamgund@codeaurora.org", "time": "Thu Jun 28 17:39:35 2012 -0700" }, "committer": { "name": "Hariprasad Dhalinarasimha", "email": "hnamgund@codeaurora.org", "time": "Fri Jun 29 14:35:15 2012 -0700" }, "message": "tzlog: Add Device Tree support\n\nAdd necessary match table so this driver can be used in\n Device Tree configurations\n\nChange-Id: I4e7fd0c1bb1d9f22296f70cf5710016b10046cd5\nSigned-off-by: Hariprasad Dhalinarasimha \u003chnamgund@codeaurora.org\u003e\n" }, { "commit": "90ced6e40066e6ed681b78d1689ef9b8e552f0ab", "tree": "05df89580057b67d3ffa6b340c12fb6a004cfde9", "parents": [ "1d22dfa0b050d09fc589af90b8d35f32a5dc3056" ], "author": { "name": "Abhimanyu Kapur", "email": "abhimany@codeaurora.org", "time": "Tue Jun 26 17:41:25 2012 -0700" }, "committer": { "name": "David Ng", "email": "dave@codeaurora.org", "time": "Fri Jun 29 12:43:08 2012 -0700" }, "message": "msm: 8974: rename copper to 8974\n\nThe official name for copper is MSM8974.\nSwitch to it.\n\nChange-Id: Ifb241232111139912477bf7b5f2e9cf5d38d0f9e\nSigned-off-by: Abhimanyu Kapur \u003cabhimany@codeaurora.org\u003e\n" }, { "commit": "4208ce3044709dd34d1f7fe9afbba26704b9b833", "tree": "f8856678bea64b4ef4baecc5855f312a1d9567c1", "parents": [ "2d574694a6fd3f7cb2014105f00524f9da71459c" ], "author": { "name": "David Collins", "email": "collinsd@codeaurora.org", "time": "Fri Jun 15 13:33:13 2012 -0700" }, "committer": { "name": "David Collins", "email": "collinsd@codeaurora.org", "time": "Thu Jun 28 13:45:08 2012 -0700" }, "message": "msm: rpm-regulator-smd: Add support for voltage corner resource parameter\n\nAdd support in the rpm-regulator-smd driver for the \"corn\"\nvoltage corner parameter. It can be used with some regulators in\norder to specify voltage performance corners instead of discrete\nvoltages.\n\nInitial support is provided for MSM8974 SMPS 2 (VDD_Dig).\n\nChange-Id: Icac67a1e5594d0aa54f3f6bd8aa8ac1edacc36d9\nSigned-off-by: David Collins \u003ccollinsd@codeaurora.org\u003e\n" }, { "commit": "c69047a9b936e665a58f407f0ec6d5ac5eaf342f", "tree": "b38d5d6fd557bcb2649ddd0b14d492308ed8cda9", "parents": [ "3595cb5571a69f7ad5fe0cae5a3bfcf9b9b6c502", "72aec70a1ea59ba1a098a94ee0a957f95957469e" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jun 27 16:22:54 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Jun 27 16:22:54 2012 -0700" }, "message": "Merge \"msm: Add support for watchdog on msm8974\" into msm-3.4" }, { "commit": "3595cb5571a69f7ad5fe0cae5a3bfcf9b9b6c502", "tree": "110a5f10c1f0f307504fe6ce01e59c4939c45db6", "parents": [ "ce07e75b88fc88edb78b68d3c0d82fe57a920e9f", "6018155a6fc3ac65f929cecf04708f48f4af6aba" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jun 27 16:22:53 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Jun 27 16:22:53 2012 -0700" }, "message": "Merge \"block: Add test-iosched scheduler\" into msm-3.4" }, { "commit": "72aec70a1ea59ba1a098a94ee0a957f95957469e", "tree": "e3da06b88b5530900c569f77b0c69327f2140a93", "parents": [ "721c0852922066d8fc76b2dbf9bf2558dd0d3885" ], "author": { "name": "Hanumant", "email": "hanumant@codeaurora.org", "time": "Mon Jun 25 11:51:07 2012 -0700" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jun 27 06:36:49 2012 -0600" }, "message": "msm: Add support for watchdog on msm8974\n\nIn case of a watchdog bark time out, dump\nthe cpu alive mask and last pet time, to determine cpu\nhangs or deadlock scenarios as cause of the timeout.\nIn case of a kernel panic, adjust bark and bite\ntimeouts based on panic timeout, to allow for completion\nof panic handling prior to watchdog bark or bite.\n\nChange-Id: I4401db681cbad54abb0f14ae84550fc63663fb04\nSigned-off-by: Hanumant Singh \u003chanumant@codeaurora.org\u003e\n" }, { "commit": "6018155a6fc3ac65f929cecf04708f48f4af6aba", "tree": "0137bac74c256816a372adce2e8d534b4a2329b6", "parents": [ "378288489d0b6cca782429154872a6dd070ae5e5" ], "author": { "name": "Maya Erez", "email": "merez@codeaurora.org", "time": "Wed Jun 27 11:25:26 2012 +0300" }, "committer": { "name": "Lee Susman", "email": "lsusman@codeaurora.org", "time": "Wed Jun 27 14:11:12 2012 +0300" }, "message": "block: Add test-iosched scheduler\n\nThe test scheduler allows testing a block device by dispatching\nspecific requests according to the test case and declare PASS/FAIL\naccording to the requests completion error code\n\nChange-Id: Ief91f9fed6e3c3c75627d27264d5252ea14f10ad\nSigned-off-by: Maya Erez \u003cmerez@codeaurora.org\u003e\n" }, { "commit": "6b901571a6c0700f5a40666a3972dbaee67964f1", "tree": "d7680a47786b8840e462cbdc17151f040a6203ec", "parents": [ "58d07801a47643e162168ff362cf23d0de86171b" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Wed May 30 13:32:24 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:19 2012 -0700" }, "message": "gpio: qpnp-pin: Add support for MPP devices\n\nAdd mpp support to the qpnp-pin driver. MPP support allows for\nadditional devices to be specified in the Device Tree topology.\nThis support is implemented in the same driver as the GPIO\nsupport since the address map is very close between them.\nThe addition of this support does not change the existing gpio\nsupport.\n\nDefault MPP configuration can be specified in the Device Tree\nusing the three new bindings for mpp. Any attribute not specified\nin the Device Tree will assume its default configuration.\n\nIt\u0027s also possible to configure an MPP at runtime using the\nexisting qpnp_pin_config() API. If a given configuration feature\nis not supported by the underlying hardware pin, then that\nparticular request is silently dropped with no error. This allows\nfor gpio users to continue specifying only a subset of the full\nqpnp_pin_cfg structure.\n\nChange-Id: I2b72768647de2a371edfa05c52fc1ed776c215c0\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "6ea2cd264228d9eeea8396b046db00a416fbba2e", "tree": "286f3a06cba3b7fbadc90964c164f7d35d8b653e", "parents": [ "978d335cee5541033ce66d6ec63a70535b523600" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue May 29 15:40:18 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:18 2012 -0700" }, "message": "gpio: qpnp-gpio: Issue lookups based on device name\n\nqpnp-gpio manages gpio_chip queries based on the slave\nID. This has a limitation in that it restricts the number of\ngpio_chips per slave ID to one. However, some PMICs have both MPP\nand GPIO on the same slave, and thus the slave ID is not a\nmeaningful unit to search for.\n\nInstead, make use of the \u0027label\u0027 binding to give the\nprimary dev-container node a name. This name will serve as the\ngpio_chip label, which can be used in lookups.\n\nChange-Id: Ic20caeb4622d73449a983992275446c733ddd89a\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "a05f455aee64cc006c5c26c210c3620ed7f2d660", "tree": "19295ca6c518452566fea24e1698703d8e6cd519", "parents": [ "8d6aae33e4f6ebe7627acb7f589f56e02dc775bc" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu May 24 15:58:11 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:17 2012 -0700" }, "message": "gpio: qpnp-gpio: Rename driver to qpnp-pin\n\nSince QPNP PMICs also include support for MPP, and since we\nintend to support MPPs in the same code base, it\u0027s not\nappropriate to limit this the scope of this driver to \u0027gpio\u0027.\nChange the driver name to \u0027pin\u0027 since it more accurately\ndescribes the potential for this driver.\n\nAlso update the Device Tree include files for the name changes.\nRemove a superflous \u0027gpio-pin\u0027 definition in the msmcopper\nspecific include file, since such configuration shall never\nchange. This binding should be defined in the PMIC specific\ninclude only.\n\nChange-Id: Id1d6407039908e3cf44dfc19af71f0cdc7aff8e6\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "8d6aae33e4f6ebe7627acb7f589f56e02dc775bc", "tree": "b5af90e4a7c571f52a16ed2894112c807786b3be", "parents": [ "a6a354dd3d5bfbbefb9fc09295be5e31bc67b48b" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue May 22 15:41:06 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:17 2012 -0700" }, "message": "of: spmi: Add support for device naming and lookups\n\nSince we support multiple device_nodes per spmi_device when used\nwith the spmi-dev-container flag, it\u0027s often unclear how a driver\nshould make reference to a particular device. Therefore,\nintroduce the spmi specific binding spmi-dev-name that specifies\nthe device name for the device_node.\n\nAlso introduce an API that can be used from\nthe driver to lookup the specific device node associated with a\nparticular device name.\n\nNote that it may seem at first glance that the binding \u0027label\u0027 is\nredundant with device_node-\u003ename. However, per the ePAPR,\ndevice_node-\u003ename is intended to be as generic as possible,\nrepresenting the function of the device and not the precise\nprogramming model. \u0027label\u0027 is used to give a platform\nspecific name that can be queried from device drivers.\n\nChange-Id: I28eca35d0b625372c26a6d8ad81e7679f200d14b\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "a6a354dd3d5bfbbefb9fc09295be5e31bc67b48b", "tree": "399509d12fe0c6bc2c4574fcc8c354b0b99f9271", "parents": [ "0e5534d92f03c76de4c15736729101520c4f0c3a" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Mon May 21 17:47:11 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:16 2012 -0700" }, "message": "of: spmi: Support resource naming\n\nreg-names and interrupt-names are standard bindings to map device\ntree reg and interrupt indices to particular names. This way the\ndriver does not need to be concerned with hard coded assignments.\nTherefore, add spmi support for these bindings.\n\nExplicit support for reg-names is required since the\nimplementation does not make use of of_address_to_resource(),\nwhich happens to already support this.\nThis is because of_address_to_resource() mandates address\ntranslation, which is not relevant to spmi.\n\ninterrupt-names is already implicitly handled by\nof_irq_to_resource(), which is used in the spmi implementation.\nAdd additional documentation to state clearly that this binding\nis also supported.\n\nAlso add supporting routines to easily lookup a resource by name\nfor both registers and interrupts.\n\nChange-Id: I94faf950da5106ecd4ff36f47e5b46102d9bd426\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "40abbe1c2cfff87a5586c99dd005e74f7175ac03", "tree": "ad773f6f957cc2dc95eddfe69f2b5628dba8e638", "parents": [ "d6ac8940d66f2c69f467ab7630bdc79d5bebcf69" ], "author": { "name": "Girish Mahadevan", "email": "girishm@codeaurora.org", "time": "Wed Apr 25 14:58:13 2012 -0600" }, "committer": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Mon Jun 25 20:49:08 2012 -0600" }, "message": "msm: copper: Low Power Resource manager driver\n\nCode changes to add support for Low Power Resource Manager Driver.\nThis code will manage PXO, VDD dig and Vdd mem based on the idle\nmode the kernel chooses and updates the RPM sleep vote accordingly.\n\nChange-Id: If3af14920e17c010c8e77b550ab57d532b32e6cd\nSigned-off-by: Girish Mahadevan \u003cgirishm@codeaurora.org\u003e\n" }, { "commit": "01edc2c4a90795f61fa36dba908a1929b51b0f86", "tree": "8f76edb786ec76a480a0b6e40c0d49c66ea500b5", "parents": [ "c19ace8e0cf056cc3f78abdd9cfb96c829cc521f", "113733246ee117a36e08f622835c73423dc8ebb1" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Wed Jun 20 05:18:56 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Wed Jun 20 05:18:56 2012 -0700" }, "message": "Merge \"msm: spm: Update spm device tree for L2 command sequences\" into msm-3.4" }, { "commit": "42ee5a0abd135cba16295138663d33919a3ce4c0", "tree": "30bc293be6ef680c3be267543b715b539d2d3453", "parents": [ "b6fa5cb0b5dd99cdb33539531c6500deba97d00f", "48abc4029872e732ea099958c63e6c6ee72fd850" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Tue Jun 19 06:18:35 2012 -0700" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Tue Jun 19 06:18:35 2012 -0700" }, "message": "Merge \"tzcom: Remove tzcom driver components.\" into msm-3.4" }, { "commit": "48abc4029872e732ea099958c63e6c6ee72fd850", "tree": "f98f6db5df9eb6ab824c1f5ee4d195e6b5a5c6cd", "parents": [ "c6a4ccdbeb4184b79e5f1ca3f68a19cacdcf8d59" ], "author": { "name": "Ramesh Masavarapu", "email": "rameshm@codeaurora.org", "time": "Tue Jun 12 08:08:23 2012 -0700" }, "committer": { "name": "Ramesh Masavarapu", "email": "rameshm@codeaurora.org", "time": "Fri Jun 15 14:48:55 2012 -0700" }, "message": "tzcom: Remove tzcom driver components.\n\nRemove tzcom driver components that includes files,\nclock definitions. Currently tzcom driver has been replaced\nby qseecom driver.\n\nChange-Id: I1832d921a7b949057b84a7e0aa9afaa445be5194\nSigned-off-by: Ramesh Masavarapu \u003crameshm@codeaurora.org\u003e\n" }, { "commit": "113733246ee117a36e08f622835c73423dc8ebb1", "tree": "7587df98d46c914de56dfd66513e7321bdfcadc6", "parents": [ "c6a4ccdbeb4184b79e5f1ca3f68a19cacdcf8d59" ], "author": { "name": "Mahesh Sivasubramanian", "email": "msivasub@codeaurora.org", "time": "Thu Jun 14 11:17:20 2012 -0600" }, "committer": { "name": "Mahesh Sivasubramanian", "email": "msivasub@codeaurora.org", "time": "Fri Jun 15 12:09:13 2012 -0600" }, "message": "msm: spm: Update spm device tree for L2 command sequences\n\nThe SPM device tree entry to configure L2 SAW doesn\u0027t distinguish\nbetween Krait and L2 SAW low power modes. Update the device tree to\ndifferentiate between L2 and Krait low power modes.\n\nChange-Id: I6c7cf6f8dd10478fd53826e22b17ed98d46b68b4\nSigned-off-by: Mahesh Sivasubramanian \u003cmsivasub@codeaurora.org\u003e\n" }, { "commit": "fb1f01ec3d0c5ce9c5e2cdd6965d4ce666ae9be0", "tree": "81df1b4442736aecd6330a0e37ba3bc8e6b660ac", "parents": [ "c6a4ccdbeb4184b79e5f1ca3f68a19cacdcf8d59" ], "author": { "name": "Ramesh Masavarapu", "email": "rameshm@codeaurora.org", "time": "Thu Jun 14 09:40:40 2012 -0700" }, "committer": { "name": "Ramesh Masavarapu", "email": "rameshm@codeaurora.org", "time": "Fri Jun 15 09:27:28 2012 -0700" }, "message": "qseecom: Add device tree entry for copper.\n\nAdd device tree entry for qseecom driver on copper targets.\n\nChange-Id: Icb8d5f41c2cad098419dbee9b8e4d99ab20b0dff\nSigned-off-by: Ramesh Masavarapu \u003crameshm@codeaurora.org\u003e\n" } ], "next": "75c34ca1b4e69e96921e4153dfa9d399e5b9d2e8" }