)]}' { "log": [ { "commit": "24420760c3701ff422b344e047a20ca09b76fc64", "tree": "0dabf46c0825c632775705185244c31b821cdd4a", "parents": [ "343cde51b3b856470eea24a89f00166b8e2d7272" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Thu Jan 11 01:52:44 2007 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Jan 11 01:52:44 2007 +0100" }, "message": "[PATCH] x86-64: Use different constraint for gcc \u003c 4.1 in bitops.h\n\n+m is really correct for a RMW instruction, but some older gccs\nerror out. I finally gave in and ifdefed it.\n\nThis fixes compilation errors with some compiler version.\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "9774f3384125912eb491ca77f77907324db3ed05", "tree": "0bdc7486e911dd9e955b41283ee19ac74521f7bd", "parents": [ "3be11c8f4f2fa194834c2e83540f34da442b8977", "f238085415c56618e042252894f2fcc971add645" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Wed Dec 20 02:53:13 2006 -0500" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Wed Dec 20 02:53:13 2006 -0500" }, "message": "merge linus into test branch\n" }, { "commit": "463e7c7cf9aaf95dd05e97e1a47854fdf5454cdc", "tree": "1b9171c109496b7f4991fcae0a2e08ed3bbea10d", "parents": [ "25c68a33b7b74b37793b1250007e5e21d621a7fc", "7d63c6759188b9b35c789159f6e02cd02d49ec7d" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Dec 16 00:45:07 2006 -0500" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Dec 16 00:45:07 2006 -0500" }, "message": "Pull trivial into test branch\n\nConflicts:\n\n\tdrivers/acpi/ec.c\n" }, { "commit": "d1526e2cda64d5a1de56aef50bad9e5df14245c2", "tree": "d7b490b1a11dd9720c9918733ca0c06e0e82cfba", "parents": [ "d1998ef38a13c4e74c69df55ccd38b0440c429b2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Fri Dec 15 08:43:13 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Fri Dec 15 08:47:51 2006 -0800" }, "message": "Remove stack unwinder for now\n\nIt has caused more problems than it ever really solved, and is\napparently not getting cleaned up and fixed. We can put it back when\nit\u0027s stable and isn\u0027t likely to make warning or bug events worse.\n\nIn the meantime, enable frame pointers for more readable stack traces.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "ec8c0446b6e2b67b5c8813eb517f4bf00efa99a9", "tree": "e7c12d7c486c958a5e38888b41cfcd6a558f1aff", "parents": [ "bcd022801ee514e28c32837f0b3ce18c775f1a7b" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Dec 12 17:14:57 2006 +0000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Wed Dec 13 09:27:08 2006 -0800" }, "message": "[PATCH] Optimize D-cache alias handling on fork\n\nVirtually index, physically tagged cache architectures can get away\nwithout cache flushing when forking. This patch adds a new cache\nflushing function flush_cache_dup_mm(struct mm_struct *) which for the\nmoment I\u0027ve implemented to do the same thing on all architectures\nexcept on MIPS where it\u0027s a no-op.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8a102eed9c4e1d21bad07a8fd97bd4fbf125d966", "tree": "9ec99f046b94971db46b08a87d7eab3e84c4acd4", "parents": [ "3df494a32b936aef76d893f5065f962ebd9b9437" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Wed Dec 13 00:34:30 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Wed Dec 13 09:05:49 2006 -0800" }, "message": "[PATCH] PM: Fix SMP races in the freezer\n\nCurrently, to tell a task that it should go to the refrigerator, we set the\nPF_FREEZE flag for it and send a fake signal to it. Unfortunately there\nare two SMP-related problems with this approach. First, a task running on\nanother CPU may be updating its flags while the freezer attempts to set\nPF_FREEZE for it and this may leave the task\u0027s flags in an inconsistent\nstate. Second, there is a potential race between freeze_process() and\nrefrigerator() in which freeze_process() running on one CPU is reading a\ntask\u0027s PF_FREEZE flag while refrigerator() running on another CPU has just\nset PF_FROZEN for the same task and attempts to reset PF_FREEZE for it. If\nthe refrigerator wins the race, freeze_process() will state that PF_FREEZE\nhasn\u0027t been set for the task and will set it unnecessarily, so the task\nwill go to the refrigerator once again after it\u0027s been thawed.\n\nTo solve first of these problems we need to stop using PF_FREEZE to tell\ntasks that they should go to the refrigerator. Instead, we can introduce a\nspecial TIF_*** flag and use it for this purpose, since it is allowed to\nchange the other tasks\u0027 TIF_*** flags and there are special calls for it.\n\nTo avoid the freeze_process()-refrigerator() race we can make\nfreeze_process() to always check the task\u0027s PF_FROZEN flag after it\u0027s read\nits \"freeze\" flag. We should also make sure that refrigerator() will\nalways reset the task\u0027s \"freeze\" flag after it\u0027s set PF_FROZEN for it.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nAcked-by: Pavel Machek \u003cpavel@ucw.cz\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "c4366889dda8110247be59ca41fddb82951a8c26", "tree": "705c1a996bed8fd48ce94ff33ec9fd00f9b94875", "parents": [ "db2fb9db5735cc532fd4fc55e94b9a3c3750378e", "e1036502e5263851259d147771226161e5ccc85a" ], "author": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Tue Dec 12 17:41:41 2006 -0500" }, "committer": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Tue Dec 12 17:41:41 2006 -0500" }, "message": "Merge ../linus\n\nConflicts:\n\n\tdrivers/cpufreq/cpufreq.c\n" }, { "commit": "e11952b971ee729a8fdc2bfb1252f5760c0287b0", "tree": "38ef26ec277daebf98af6abf64b5c32b28a4d32c", "parents": [ "7531a0b56f6211a5407c8cda4968c3b7ca9496ab" ], "author": { "name": "Dominik Brodowski", "email": "linux@dominikbrodowski.net", "time": "Mon Dec 04 20:39:16 2006 -0500" }, "committer": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Tue Dec 12 17:29:04 2006 -0500" }, "message": "[CPUFREQ] p4-clockmod: fix support for Core\n\nSupport for Core CPUs was broken in two ways in speedstep-lib: for x86_64,\nwe missed a MSR definition; for both x86_64 and i386, the FSB calculation\nwas wrong by four (it\u0027s a quad-pumped bus). Also increase the accuracy\nof the calculation.\n\nSigned-off-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Dave Jones \u003cdavej@redhat.com\u003e\n" }, { "commit": "08c183f31bdbb709f177f6d3110d5f288ea33933", "tree": "be7b84c07f3b0bf29473bad2b7b788fa189f948e", "parents": [ "1bd77f2da58e9cdd1f159217887343dadd9af417" ], "author": { "name": "Christoph Lameter", "email": "clameter@sgi.com", "time": "Sun Dec 10 02:20:29 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Sun Dec 10 09:55:43 2006 -0800" }, "message": "[PATCH] sched: add option to serialize load balancing\n\nLarge sched domains can be very expensive to scan. Add an option SD_SERIALIZE\nto the sched domain flags. If that flag is set then we make sure that no\nother such domain is being balanced.\n\n[akpm@osdl.org: build fix]\nSigned-off-by: Christoph Lameter \u003cclameter@sgi.com\u003e\nCc: Peter Williams \u003cpwil3058@bigpond.net.au\u003e\nCc: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nCc: Christoph Lameter \u003cclameter@sgi.com\u003e\nCc: \"Siddha, Suresh B\" \u003csuresh.b.siddha@intel.com\u003e\nCc: \"Chen, Kenneth W\" \u003ckenneth.w.chen@intel.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "592ee3a5e5e2a981ef2829a0380093006d045661", "tree": "78fee67dc74a138a2edbc51247f6ec752071f488", "parents": [ "64bb6c5e1ddcd47c951740485026ef08975ee2e6" ], "author": { "name": "Alan Cox", "email": "alan@lxorguk.ukuu.org.uk", "time": "Fri Dec 08 02:38:48 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Fri Dec 08 08:28:57 2006 -0800" }, "message": "[PATCH] termios: Enable new style termios ioctls on x86-64\n\nThis turns on the split input/output speed features and arbitary baud rate\nhandling for the x86-64 platform. Nothing should break if you use existing\nstandard speeds. If you use the new speed stuff then you may see some\ndrivers failing to report the speed changes properly in error cases. This\nwill be worked on further. For the working cases this all seems happy.\nI\u0027ll post a test suite used to test the basic stuff as well.\n\nPatches for i386 will follow when I get a moment but are basically the\nsame. If people could patch/test-suite other architectures and submit them\nthat would be great.\n\nSigned-off-by: Alan Cox \u003calan@redhat.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "be90038a24c814dc98bc5a813f41855779000018", "tree": "6ed4585714f0a90e0de6627c403adc3fc42644d2", "parents": [ "96b066b85c8e5b28fa7f25a7f0644f70f46b8881" ], "author": { "name": "Alan Cox", "email": "alan@lxorguk.ukuu.org.uk", "time": "Fri Dec 08 02:38:43 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Fri Dec 08 08:28:56 2006 -0800" }, "message": "[PATCH] tty: preparatory structures for termios revamp\n\nIn order to sort out our struct termios and add proper speed control we need\nto separate the kernel and user termios structures. Glibc is fine but the\nother libraries rely on the kernel exported struct termios and we need to\nextend this without breaking the ABI/API\n\nTo do so we add a struct ktermios which is the kernel view of a termios\nstructure and overlaps the struct termios with extra fields on the end for\nnow. (That limitation will go away in later patches). Some platforms (eg\nalpha) planned ahead and thus use the same struct for both, others did not.\n\nThis just adds the structures but does not use them, it seems a sensible\nsplitting point for bisect if there are compile failures (not that I expect\nthem)\n\nSigned-off-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "c31a0bf3e1bc581676618db7492f18798fd0a73f", "tree": "68eb38dbc58d647c3b20cd73fb812cafe93eb663", "parents": [ "91768d6c2bad0d2766a166f13f2f57e197de3458" ], "author": { "name": "Jeremy Fitzhardinge", "email": "jeremy@goop.org", "time": "Fri Dec 08 02:36:22 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Fri Dec 08 08:28:39 2006 -0800" }, "message": "[PATCH] Generic BUG for x86-64\n\nThis makes x86-64 use the generic BUG machinery.\n\nThe main advantage in using the generic BUG machinery for x86-64 is that\nthe inlined overhead of BUG is just the ud2a instruction; the file+line\ninformation are no longer inlined into the instruction stream. This\nreduces cache pollution.\n\nSigned-off-by: Jeremy Fitzhardinge \u003cjeremy@goop.org\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Hugh Dickens \u003chugh@veritas.com\u003e\nCc: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "4522d58275f124105819723e24e912c8e5bf3cdd", "tree": "b92c29014fadffe049c1925676037f0092b8d112", "parents": [ "6cf24f031bc97cb5a7c9df3b6e73c45b628b2b28", "64a26a731235b59c9d73bbe82c1f896d57400d37" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:59:11 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:59:11 2006 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://one.firstfloor.org/home/andi/git/linux-2.6\n\n* \u0027for-linus\u0027 of git://one.firstfloor.org/home/andi/git/linux-2.6: (156 commits)\n [PATCH] x86-64: Export smp_call_function_single\n [PATCH] i386: Clean up smp_tune_scheduling()\n [PATCH] unwinder: move .eh_frame to RODATA\n [PATCH] unwinder: fully support linker generated .eh_frame_hdr section\n [PATCH] x86-64: don\u0027t use set_irq_regs()\n [PATCH] x86-64: check vector in setup_ioapic_dest to verify if need setup_IO_APIC_irq\n [PATCH] x86-64: Make ix86 default to HIGHMEM4G instead of NOHIGHMEM\n [PATCH] i386: replace kmalloc+memset with kzalloc\n [PATCH] x86-64: remove remaining pc98 code\n [PATCH] x86-64: remove unused variable\n [PATCH] x86-64: Fix constraints in atomic_add_return()\n [PATCH] x86-64: fix asm constraints in i386 atomic_add_return\n [PATCH] x86-64: Correct documentation for bzImage protocol v2.05\n [PATCH] x86-64: replace kmalloc+memset with kzalloc in MTRR code\n [PATCH] x86-64: Fix numaq build error\n [PATCH] x86-64: include/asm-x86_64/cpufeature.h isn\u0027t a userspace header\n [PATCH] unwinder: Add debugging output to the Dwarf2 unwinder\n [PATCH] x86-64: Clarify error message in GART code\n [PATCH] x86-64: Fix interrupt race in idle callback (3rd try)\n [PATCH] x86-64: Remove unwind stack pointer alignment forcing again\n ...\n\nFixed conflict in include/linux/uaccess.h manually\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "7d1362c0d05b8543807ab403ac8ce813cab41fa4", "tree": "78f4f97229af02e4a8e3d1851b003b296db6dcda", "parents": [ "f46ba2235feab5e686b1234c328a0577cde86e21" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Wed Dec 06 20:40:38 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:46 2006 -0800" }, "message": "[PATCH] cleanup asm/setup.h userspace visibility\n\nMake the contents of the userspace asm/setup.h header consistent on all\narchitectures:\n\n - export setup.h to userspace on all architectures\n - export only COMMAND_LINE_SIZE to userspace\n - frv: move COMMAND_LINE_SIZE from param.h\n - i386: remove duplicate COMMAND_LINE_SIZE from param.h\n - arm:\n - export ATAGs to userspace\n - change u8/u16/u32 to __u8/__u16/__u32\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nAcked-by: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "d3fa72e4556ec1f04e46a0d561d9e785ecaa173d", "tree": "9c9b51dbecc27e977135b4e4793ea3dc99e8ba66", "parents": [ "f67637ee4b5d90d41160d755b9a8cca18c394586" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 06 20:38:56 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:41 2006 -0800" }, "message": "[PATCH] Pass struct dev pointer to dma_cache_sync()\n\nPass struct dev pointer to dma_cache_sync()\n\ndma_cache_sync() is ill-designed in that it does not have a struct device\npointer argument which makes proper support for systems that consist of a\nmix of coherent and non-coherent DMA devices hard. Change dma_cache_sync\nto take a struct device pointer as first argument and fix all its callers\nto pass it.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: James Bottomley \u003cJames.Bottomley@steeleye.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f67637ee4b5d90d41160d755b9a8cca18c394586", "tree": "dffa1fa32f8e0462c8e46c4f8fefa058be349d6a", "parents": [ "83b7b44e1c1e9e493ccd4146558481ab5af0116a" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 06 20:38:54 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:41 2006 -0800" }, "message": "[PATCH] Add struct dev pointer to dma_is_consistent()\n\ndma_is_consistent() is ill-designed in that it does not have a struct\ndevice pointer argument which makes proper support for systems that consist\nof a mix of coherent and non-coherent DMA devices hard. Change\ndma_is_consistent to take a struct device pointer as first argument and fix\nthe sole caller to pass it.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: James Bottomley \u003cJames.Bottomley@steeleye.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "83df8db9e62129975fab6d800fb381faf0dfee74", "tree": "0590a90ac51ab2df40210dc3d2001fb9f6f271e9", "parents": [ "b4c6c34a530b4d1c626f4ac0a884e0a9b849378c" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Wed Dec 06 20:38:14 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:38 2006 -0800" }, "message": "[PATCH] declare smp_call_function_single in generic code\n\nsmp_call_function_single() needs to be visible in non-SMP builds, to fix:\n\narch/x86_64/kernel/vsyscall.c:283: warning: implicit declaration of function \u0027smp_call_function_single\u0027\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f5738ceed46782aea7663d62cb6398eb05fc4ce0", "tree": "156ebf498bc1d892d6f9e33d2751869417e30eb4", "parents": [ "28ec24e23229ae3d333f8d7f0e6b31fa8ea7bf46" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Wed Dec 06 20:37:29 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:37 2006 -0800" }, "message": "[PATCH] remove kernel syscalls\n\nThe last thing we agreed on was to remove the macros entirely for 2.6.19,\non all architectures. Unfortunately, I think nobody actually _did_ that,\nso they are still there.\n\n[akpm@osdl.org: x86_64 fix]\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: Greg Schafer \u003cgschafer@zip.com.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a866374aecc90c7d90619727ccd851ac096b2fc7", "tree": "eabae0b36b5281dcef20563470c7f05549689b8c", "parents": [ "6edaf68a87d17570790fd55f0c451a29ec1d6703" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Wed Dec 06 20:32:20 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:21 2006 -0800" }, "message": "[PATCH] mm: pagefault_{disable,enable}()\n\nIntroduce pagefault_{disable,enable}() and use these where previously we did\nmanual preempt increments/decrements to make the pagefault handler do the\natomic thing.\n\nCurrently they still rely on the increased preempt count, but do not rely on\nthe disabled preemption, this might go away in the future.\n\n(NOTE: the extra barrier() in pagefault_disable might fix some holes on\n machines which have too many registers for their own good)\n\n[heiko.carstens@de.ibm.com: s390 fix]\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nAcked-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nSigned-off-by: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9dc452ba2d47f376987a99c0819833af0b46cc3f", "tree": "d7290dbf4ee715f7e7ae28b874deedbbea6d9862", "parents": [ "e4b522d7ef144fb2ad6a4cb23d9cb5ec154be8bc" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "message": "[PATCH] x86-64: Fix constraints in atomic_add_return()\n\nFollowing i386 from Duncan Sands\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "9ee4016888f1b226d7bb9a10ddb782868f658b31", "tree": "132867a2d124deb6bf75b78e8cda2a3e56b619c7", "parents": [ "6d0185ea611276fdf81991d7774d396bdc1ae392" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "message": "[PATCH] x86-64: include/asm-x86_64/cpufeature.h isn\u0027t a userspace header\n\nNothing in include/asm-x86_64/cpufeature.h is part of the\nuserspace\u003c-\u003ekernel interface.\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "d331e739f5ad2aaa9d8553891ba6ca823bdbce37", "tree": "5da7042a022dd119c9b920ceb4101e7203bccb44", "parents": [ "a0429d0d7a6116dedcb71d9128da904bf135f189" ], "author": { "name": "Venkatesh Pallipadi", "email": "venkatesh.pallipadi@intel.com", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "message": "[PATCH] x86-64: Fix interrupt race in idle callback (3rd try)\n\nIdle callbacks has some races when enter_idle() sets isidle and subsequent\ninterrupts that can happen on that CPU, before CPU goes to idle. Due to this,\nan IDLE_END can get called before IDLE_START. To avoid these races, disable\ninterrupts before enter_idle and make sure that all idle routines do not\nenable interrupts before entering idle.\n\nNote that poll_idle() still has a this race as it has to enable interrupts\nbefore going to idle. But, all other idle routines have the race fixed.\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "359ad0d4015a9ab39243f2ebc4eb07915bd618b2", "tree": "90f05d8d9ab048029bfe1e451a012b4d5896aafe", "parents": [ "eef5e0d185fc049bda11fa14ba286fbd357da896" ], "author": { "name": "Jan Beulich", "email": "jbeulich@novell.com", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:13 2006 +0100" }, "message": "[PATCH] unwinder: more sanity checks in Dwarf2 unwinder\n\nTighten the requirements on both input to and output from the Dwarf2\nunwinder.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "0741f4d207a644482d7a040f05cd264c98cf7ee8", "tree": "787f2fffc12871d0f19e492fc4258cda254aa42d", "parents": [ "c7a3392e9e53e43c44a971de3dd480a8e2788e75" ], "author": { "name": "Chuck Ebbert", "email": "76306.1226@compuserve.com", "time": "Thu Dec 07 02:14:11 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:11 2006 +0100" }, "message": "[PATCH] x86: add sysctl for kstack_depth_to_print\n\nAdd sysctl for kstack_depth_to_print. This lets users change\nthe amount of raw stack data printed in dump_stack() without\nhaving to reboot.\n\nSigned-off-by: Chuck Ebbert \u003c76306.1226@compuserve.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "c7a3392e9e53e43c44a971de3dd480a8e2788e75", "tree": "fc3f232e723eb29dcb48f5e6b9568af58fac0c25", "parents": [ "86bd58bf4c383fde4e99b83ce917b091a072040d" ], "author": { "name": "Wink Saville", "email": "wink@saville.com", "time": "Thu Dec 07 02:14:11 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:11 2006 +0100" }, "message": "[PATCH] x86-64: Fix comments for MSR_FS_BASE and MSR_GS_BASE.\n\nThe comments for MSR_FS_BASE \u0026 MSR_GS_BASE were transposed.\n\nSigned-off-by: Wink Saville \u003cwink@saville.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "ee58fad51a2a767cb2567706ace967705233d881", "tree": "b87f182688a0ffb3b60f78637f391e69c59d1e59", "parents": [ "7e95b593a1aeb6fe1d3904e799d23a45261f2c19" ], "author": { "name": "Stephane Eranian", "email": "eranian@hpl.hp.com", "time": "Thu Dec 07 02:14:11 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:11 2006 +0100" }, "message": "[PATCH] x86-64: x86-64 add Intel BTS cpufeature bit and detection (take 2)\n\nHere is a small patch for x86-64 which adds a cpufeature flag and\ndetection code for Intel\u0027s Branch Trace Store (BTS) feature. This\nfeature can be found on Intel P4 and Core 2 processors among others.\nIt can also be used by perfmon.\n\nchangelog:\n\t- add CPU_FEATURE_BTS\n\t- add Branch Trace Store detection\n\nsigned-off-by: stephane eranian \u003ceranian@hpl.hp.com\u003e\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "b0d0a4ba45760b10ecee9035ed45b442c1a6cc84", "tree": "9fbdab9d6cc010b415d38ffccc89ccf03398a89c", "parents": [ "9899f826fc90beba4f78083f6230e06cbe1050c9" ], "author": { "name": "Siddha, Suresh B", "email": "suresh.b.siddha@intel.com", "time": "Thu Dec 07 02:14:10 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:10 2006 +0100" }, "message": "[PATCH] x86: fix the irqbalance quirk for E7320/E7520/E7525\n\nMove the irqbalance quirks for E7320/E7520/E7525(Errata 23 in\nhttp://download.intel.com/design/chipsets/specupdt/30304203.pdf) to early\nquirks.\n\nAnd add a PCI quirk for these platforms to check(which happens very late\nduring the boot) if the APIC routing is indeed set to default flat mode.\n\nThis fixes the breakage(in x86_64) of this quirk due to cpu hotplug which\nselects physical mode instead of the logical flat(as needed for this errata\nworkaround).\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: \"Li, Shaohua\" \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\n" }, { "commit": "9899f826fc90beba4f78083f6230e06cbe1050c9", "tree": "5d493eaa17da85c57746ffcc2e01a8a6f484fa5f", "parents": [ "72486f1f8f0a2bc828b9d30cf4690cf2dd6807fc" ], "author": { "name": "Siddha, Suresh B", "email": "suresh.b.siddha@intel.com", "time": "Thu Dec 07 02:14:10 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:10 2006 +0100" }, "message": "[PATCH] x86-64: add genapic_force\n\nAdd genapic_force. Used by the next Intel quirks patch.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: \"Li, Shaohua\" \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\n" }, { "commit": "274e1bbdeeaf16e71418f11f5f305ab26061f2c2", "tree": "c3be672dde01817b34137d0b8d0dea563fdffabb", "parents": [ "79929fd1c1887d2a057cbb80d487a2e2f1c01a02" ], "author": { "name": "Siddha, Suresh B", "email": "suresh.b.siddha@intel.com", "time": "Thu Dec 07 02:14:10 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:10 2006 +0100" }, "message": "[PATCH] x86: add write_pci_config_byte() to direct PCI access routines\n\nMechanism of selecting physical mode in genapic when cpu hotplug is enabled on\nx86_64, broke the quirk(quirk_intel_irqbalance()) introduced for working\naround the transposing interrupt message errata in E7520/E7320/E7525 (revision\nID 0x9 and below. errata #23 in\nhttp://download.intel.com/design/chipsets/specupdt/30304203.pdf).\n\nThis errata requires the mode to be in logical flat, so that interrupts can be\ndirected to more than one cpu(and thus use hardware IRQ balancing enabled by\nBIOS on these platforms).\n\nFollowing four patches fixes this by moving the quirk to early quirk and\nforcing the x86_64 genapic selection to logical flat on these platforms.\n\nThanks to Shaohua for pointing out the breakage.\n\nThis patch:\n\nAdd write_pci_config_byte() to direct PCI access routines\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: \"Li, Shaohua\" \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\n" }, { "commit": "eab724e5df17af0ed0dac03da8f75aa336c31206", "tree": "6758a9c17a99c6bbe3b21b9f2bf78ebf26529698", "parents": [ "475850c86b908ae026d5a4be02a1b1e9c408c75a" ], "author": { "name": "Jan Beulich", "email": "jbeulich@novell.com", "time": "Thu Dec 07 02:14:09 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:09 2006 +0100" }, "message": "[PATCH] x86-64: adjust pmd_bad()\n\nMake pmd_bad() symmetrical to pgd_bad() and pud_bad(). At once,\nsimplify them all.\n\nTBD: tighten down the checks again as suggested by Hugh D.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "4a1c42275078f48b90428cdb062f5220d79ec9da", "tree": "631326d75f2627b95c5d49675d6d47fabbee5b66", "parents": [ "c6ea396de6836bdeb2d2433368130642bf0f6e15" ], "author": { "name": "Jan Beulich", "email": "jbeulich@novell.com", "time": "Thu Dec 07 02:14:09 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:09 2006 +0100" }, "message": "[PATCH] x86-64: remove prototype of free_bootmem_generic()\n\nThe function doesn\u0027t exist (anymore).\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "103efcd9aac1de4da6a1477f2f3b9fcf35273a18", "tree": "ac8e8a1f379a35cfaa96992fb3f8c69e1c88195e", "parents": [ "c55d92d141b9c40c67db249de91f5c224eb49859" ], "author": { "name": "Ernie Petrides", "email": "petrides@redhat.com", "time": "Thu Dec 07 02:14:09 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:09 2006 +0100" }, "message": "[PATCH] x86-64: fix perms/range of vsyscall vma in /proc/*/maps\n\nThe final line of /proc/\u003cpid\u003e/maps on x86_64 for native 64-bit\ntasks shows an incorrect ending address and incorrect permissions. There\nis only a single page mapped in this vsyscall region, and it is accessible\nfor both read and execute.\n\nThe patch below fixes this. (Since 32-bit-compat tasks have a real vma\nwith correct perms/range, no change is necessary for that scenario.)\n\nBefore the patch, a \"cat /proc/self/maps | tail -1\" shows this:\n\n ffffffffff600000-ffffffffffe00000 ---p 00000000 [...]\n\nAfter the patch, this is the output:\n\n ffffffffff600000-ffffffffff601000 r-xp 00000000 [...]\n\nSigned-off-by: Ernie Petrides \u003cpetrides@redhat.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "139ec7c416248b9ea227d21839235344edfee1e0", "tree": "54c396848b08367c0352c77f4633be6380a8eb16", "parents": [ "d3561b7fa0fb0fc583bab0eeda32bec9e4c4056d" ], "author": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Thu Dec 07 02:14:08 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:08 2006 +0100" }, "message": "[PATCH] paravirt: Patch inline replacements for paravirt intercepts\n\nIt turns out that the most called ops, by several orders of magnitude,\nare the interrupt manipulation ops. These are obvious candidates for\npatching, so mark them up and create infrastructure for it.\n\nThe method used is that the ops structure has a patch function, which\nis called for each place which needs to be patched: this returns a\nnumber of instructions (the rest are NOP-padded).\n\nUsually we can spare a register (%eax) for the binary patched code to\nuse, but in a couple of critical places in entry.S we can\u0027t: we make\nthe clobbers explicit at the call site, and manually clobber the\nallowed registers in debug mode as an extra check.\n\nAnd:\n\nDon\u0027t abuse CONFIG_DEBUG_KERNEL, add CONFIG_DEBUG_PARAVIRT.\n\nAnd:\n\nAK: Fix warnings in x86-64 alternative.c build\n\nAnd:\n\nAK: Fix compilation with defconfig\n\nAnd:\n\n^From: Andrew Morton \u003cakpm@osdl.org\u003e\n\nSome binutlises still like to emit references to __stop_parainstructions and\n__start_parainstructions.\n\nAnd:\n\nAK: Fix warnings about unused variables when PARAVIRT is disabled.\n\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nSigned-off-by: Jeremy Fitzhardinge \u003cjeremy@xensource.com\u003e\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: Zachary Amsden \u003czach@vmware.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\n" }, { "commit": "e6536c1262c56d302e749ab1b44fdb0b9786327d", "tree": "6463b5c2eb8b156a6fcfffa283a803c0f8a8949b", "parents": [ "b9a8d94a47f8a41766f6f7944adfb1d641349903" ], "author": { "name": "Paolo \u0027Blaisorblade\u0027 Giarrusso", "email": "blaisorblade@yahoo.it", "time": "Thu Dec 07 02:14:07 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:07 2006 +0100" }, "message": "[PATCH] x86: comment magic constants in delay.h\n\nFor both i386 and x86_64, copy from arch/$ARCH/lib/delay.c comments about the\nused magic constants, plus a few other niceties.\n\nSigned-off-by: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n\n include/asm-i386/delay.h | 5 ++++-\n include/asm-x86_64/delay.h | 5 ++++-\n 2 files changed, 8 insertions(+), 2 deletions(-)\n" }, { "commit": "b9a8d94a47f8a41766f6f7944adfb1d641349903", "tree": "906fa09322f59c60132ff898e212f49a7d9a555e", "parents": [ "bff6547bb6a4e82c399d74e7fba78b12d2f162ed" ], "author": { "name": "Paolo \u0027Blaisorblade\u0027 Giarrusso", "email": "blaisorblade@yahoo.it", "time": "Thu Dec 07 02:14:07 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:07 2006 +0100" }, "message": "[PATCH] x86-64: Make x86_64 udelay() round up instead of down.\n\nPort two patches from i386 to x86_64 delay.c to make sure all rounding is done\nupward instead of downward.\n\nThere is no sign in commit messages that the mismatch was done on purpose, and\n\"delay() guarantees sleeping at least for the specified time\" is still a valid\nrule IMHO.\n\nThe original x86 patches are both from pre-GIT era, i.e.:\n\n\"[PATCH] round up in __udelay()\" in commit\n54c7e1f5cc6771ff644d7bc21a2b829308bd126f\n\n\"[PATCH] add 1 in __const_udelay()\" in commit\n42c77a9801b8877d8b90f65f75db758822a0bccc\n\n(both commits are from converted BK repository to x86_64).\n\nAK: fixed gcc warning\n\nlinux/arch/x86_64/lib/delay.c:43: warning: suggest parentheses around + or - inside shift\n(did this actually work?)\n\nSigned-off-by: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "bff6547bb6a4e82c399d74e7fba78b12d2f162ed", "tree": "faeb4e95d243b0eb5cd6337739e4c14d154b282f", "parents": [ "eae93755540bae18aff46b8a0e621b5d65bd5380" ], "author": { "name": "Muli Ben-Yehuda", "email": "muli@il.ibm.com", "time": "Thu Dec 07 02:14:07 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:07 2006 +0100" }, "message": "[PATCH] Calgary: allow compiling Calgary in but not using it by default\n\nThis patch makes it possible to compile Calgary in but not use it by\ndefault. In this mode, use \u0027iommu\u003dcalgary\u0027 to activate it.\n\nSigned-off-by: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nSigned-off-by: Jon Mason \u003cjdmason@kudzu.us\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "eae93755540bae18aff46b8a0e621b5d65bd5380", "tree": "e1228183341e2a80200c256ccaac33493444fc5d", "parents": [ "b34e90b8f0f30151349134f87b5dc6ef75a5218c" ], "author": { "name": "Muli Ben-Yehuda", "email": "muli@il.ibm.com", "time": "Thu Dec 07 02:14:06 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:06 2006 +0100" }, "message": "[PATCH] Calgary: check BBAR ioremap success when ioremapping\n\nThis patch cleans up the previous \"Use BIOS supplied BBAR information\"\npatch. Mostly stylistic clenaups, but also check for ioremap failure\nwhen we ioremap the BBAR rather than when trying to use it.\n\nSigned-off-by: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nSigned-off-by: Jon Mason \u003cjdmason@kudzu.us\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nAcked-by: Laurent Vivier \u003cLaurent.Vivier@bull.net\u003e\n" }, { "commit": "b34e90b8f0f30151349134f87b5dc6ef75a5218c", "tree": "201c7cb4e3303dcf00547748c9c86a48d4cf45cb", "parents": [ "58db85482743f5e3495d168c641c60ce1d3dfb06" ], "author": { "name": "Laurent Vivier", "email": "Laurent.Vivier@bull.net", "time": "Thu Dec 07 02:14:06 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:06 2006 +0100" }, "message": "[PATCH] Calgary: use BIOS supplied BBARs and topology information\n\nFind the BBAR register address of each Calgary using the \"Extended\nBIOS Data Area\" rather than calculating it ourselves. Also get the bus\ntopology (what PHB each bus is on) from Calgary rather than\ncalculating it ourselves.\n\nThis patch fixes http://bugzilla.kernel.org/show_bug.cgi?id\u003d7407.\n\nSigned-off-by: Laurent Vivier \u003cLaurent.Vivier@bull.net\u003e\nSigned-off-by: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nSigned-off-by: Jon Mason \u003cjdmason@kudzu.us\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "249e83fe839a13b5dc94285daeeaf70f6e54d930", "tree": "3bd37f33160916b6eef50624b795748737e2f03d", "parents": [ "4c7aa6c3b25ef96bc1b723238041195e3d8bf047" ], "author": { "name": "Avi Kivity", "email": "avi@qumranet.com", "time": "Thu Dec 07 02:14:04 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:04 2006 +0100" }, "message": "[PATCH] x86-64: Extract segment descriptor definitions for use outside\n\nCode that wants to use struct desc_struct cannot do so on i386 because\ndesc.h contains other code that will only compile on x86_64.\n\nSo extract the structure definitions into a asm-x86_64/desc_defs.h.\n\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n\n include/asm-x86_64/desc.h | 53 -------------------------------\n include/asm-x86_64/desc_defs.h | 69 +++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 70 insertions(+), 52 deletions(-)\n" }, { "commit": "86efef50cfff9905c4e4ec64f3d3d3b299226674", "tree": "e60029ca0b888b1f01a049d9e512ef524b2279e3", "parents": [ "fa5cecd111d235819a1d807d43216ae459a0dd6f" ], "author": { "name": "Stephane Eranian", "email": "eranian@hpl.hp.com", "time": "Thu Dec 07 02:14:02 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:02 2006 +0100" }, "message": "[PATCH] x86-64: x86-64 add Intel Core related PMU MSRs definitions\n\nAdd o the x86-64 tree a bunch of MSRs related to performance\nmonitoring for the processors based on Intel Core microarchitecture.\nIt also adds some architectural MSRs for PEBS. A similar patch for i386 will\nfollow.\n\nchangelog:\n\t- add Intel Precise-Event Based sampling (PEBS) related MSR\n\t- add Intel Data Save (DS) Area related MSR\n\t- add Intel Core microarchitecure performance counter MSRs\n\nSigned-off-by: stephane eranian \u003ceranian@hpl.hp.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "bb81a09e55eaf7e5f798468ab971469b6f66a259", "tree": "cf1ed6b0ad75137361228955535044fd4630a57b", "parents": [ "e5e3a0428968dcc1f9318ce1c941a918e99f8b84" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Thu Dec 07 02:14:01 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:01 2006 +0100" }, "message": "[PATCH] x86: all cpu backtrace\n\nWhen a spinlock lockup occurs, arrange for the NMI code to emit an all-cpu\nbacktrace, so we get to see which CPU is holding the lock, and where.\n\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Badari Pulavarty \u003cpbadari@us.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "d8cebe65ea5179e3293c38427d71f4d73c795d39", "tree": "a1a7c41cf22c96cc2ba74c45554f416eef36ed79", "parents": [ "36b2a8d5aff4cb3ee83d5e40447a8f073bcfe2fb" ], "author": { "name": "Yinghai Lu", "email": "yinghai.lu@amd.com", "time": "Thu Dec 07 02:14:01 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:01 2006 +0100" }, "message": "[PATCH] x86-64: remove duplicated cpu_mask_to_apicid in x86_64 smp.h\n\ninline function cpu_mask_to_apicid in smp.h is duplicated with macro\nin mach_apic.h.\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@amd.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "36b2a8d5aff4cb3ee83d5e40447a8f073bcfe2fb", "tree": "a7883c46dcc89ac79474ff4717ec923043adfd2f", "parents": [ "bd1d599518bf11992cc6d5b0df08da4a2b7b0db5" ], "author": { "name": "Stephane Eranian", "email": "eranian@hpl.hp.com", "time": "Thu Dec 07 02:14:01 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:01 2006 +0100" }, "message": "[PATCH] x86-64: add X86_FEATURE_PEBS and detection\n\nHere is a patch (used by perfmon2) to detect the presence of the\nPrecise Event Based Sampling (PEBS) feature for Intel 64-bit processors.\nThe patch also adds the cpu_has_pebs macro.\n\nchangelog:\n\t- adds X86_FEATURE_PEBS\n\t- adds cpu_has_pebs to test for X86_FEATURE_PEBS\n\nSigned-off-by: stephane eranian \u003ceranian@hpl.hp.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "bd1d599518bf11992cc6d5b0df08da4a2b7b0db5", "tree": "214b6a571c6a77b5b58e9019c3e166ff10e76032", "parents": [ "87e1652c7863b9ae406ff37f33c7ec2bb494d7b1" ], "author": { "name": "Stephane Eranian", "email": "eranian@hpl.hp.com", "time": "Thu Dec 07 02:14:00 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:00 2006 +0100" }, "message": "[PATCH] x86-64: x86_64 rename X86_FEATURE_DTES to X86_FEATURE_DS\n\nHere is a patch (used by perfmon2) that renamed X86_FEATURE_DTES\nto X86_FEATURE_DS to match Intel\u0027s documentation for the Debug Store\nsave area. The patch also adds cpu_has_ds.\n\nchangelog:\n\t- rename X86_FEATURE_DTES to X86_FEATURE_DS to match documentation\n\t- adds cpu_has_ds to test for X86_FEATURE_DS\n\nSigned-off-by: stephane eranian \u003ceranian@hpl.hp.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "87e1652c7863b9ae406ff37f33c7ec2bb494d7b1", "tree": "a87d98504d20aaf6e7dba583f11c730be02ce3d5", "parents": [ "a63954b5cad5765e52870bb649992bf636f32a6b" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Thu Dec 07 02:14:00 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Thu Dec 07 02:14:00 2006 +0100" }, "message": "[PATCH] x86-64: Don\u0027t keep interrupts disabled while spinning in spinlocks\n\nFollows i386.\n\nBased on patch from some folks at Google (MikeW, Edward G.?), but\ncompletely redone by AK.\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "f9e9dcb38f5106fa8cdac04a9e967d5487f1cd20", "tree": "8d1cbf17b9b54eacde5a7bf7adf4d5ba6cb119dc", "parents": [ "16afea0255cf6963eb924d4334cdb5acb9074581" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Wed Dec 06 14:42:57 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Wed Dec 06 14:42:57 2006 -0800" }, "message": "x86[-64]:Remove \u0027volatile\u0027 from atomic_t\n\nAny code that relies on the volatile would be a bug waiting to happen\nanyway.\n\nDon\u0027t encourage people to think that putting \u0027volatile\u0027 on data\nstructures somehow fixes problems. We should always use proper locking\n(and other serialization) techniques.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "16afea0255cf6963eb924d4334cdb5acb9074581", "tree": "c86f8130cd07e441b81df1d3489de3d1e32838bb", "parents": [ "3e577a80ea85e2557831fd44064f809646f260b4" ], "author": { "name": "Art Haas", "email": "ahaas@airmail.net", "time": "Wed Dec 06 14:45:53 2006 -0600" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Wed Dec 06 14:39:53 2006 -0800" }, "message": "[PATCH] Remove \u0027volatile\u0027 from spinlock_types\n\nThis is a resubmission of patches originally created by Ingo Molnar.\nThe link below is the initial (?) posting of the patch.\n\n http://marc.theaimsgroup.com/?l\u003dlinux-kernel\u0026m\u003d115217423929806\u0026w\u003d2\n\nRemove \u0027volatile\u0027 from spinlock_types as it causes GCC to generate bad\ncode (see link) and locking should be used on kernel data.\n\nSigned-off-by: Art Haas \u003cahaas@airmail.net\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "e62438630ca37539c8cc1553710bbfaa3cf960a7", "tree": "83d3e0e016facfee73afba23d306034d60d87495", "parents": [ "2d941e99dfa2f58f4cf294943274a4f8e264aab7" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Mon Dec 04 03:38:31 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Mon Dec 04 19:41:15 2006 -0800" }, "message": "[PATCH] Centralise definitions of sector_t and blkcnt_t\n\nCONFIG_LBD and CONFIG_LSF are spread into asm/types.h for no particularly\ngood reason.\n\nCentralising the definition in linux/types.h means that arch maintainers\ndon\u0027t need to bother adding it, as well as fixing the problem with\nx86-64 users being asked to make a decision that has absolutely no\neffect.\n\nThe H8/300 porters seem particularly confused since I\u0027m not aware of any\nmicrocontrollers that need to support 2TB filesystems.\n\nSigned-off-by: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b07e4ecd4d380ad697c54d729cb653d027077c99", "tree": "554173ec145474c52377c45299b4c5962f0d05ce", "parents": [ "914e26379decf1fd984b22e51fd2e4209b7a7f1b" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Thu Oct 19 10:29:02 2006 -0400" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Mon Dec 04 02:00:26 2006 -0500" }, "message": "[PATCH] severing uaccess.h -\u003e sched.h\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "f6a570333e554b48ad589e7137c77c57809eee81", "tree": "68dd6d5c8fe537a19a84a4189202f5cf70925c17", "parents": [ "2b5f6dcce5bf94b9b119e9ed8d537098ec61c3d2" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Wed Oct 18 01:47:25 2006 -0400" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Mon Dec 04 02:00:22 2006 -0500" }, "message": "[PATCH] severing module.h-\u003esched.h\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "a4f89fb7c072b8592b296c2ba216269c0c96db43", "tree": "81ed700573ed0bcf23b99e82ae0b538ac16e62e9", "parents": [ "9d3d41955845939cb41b87affb039db0bae03b65" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Tue Nov 14 21:20:08 2006 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Dec 02 21:23:14 2006 -0800" }, "message": "[NET]: X86_64 checksum annotations and cleanups.\n\n* sanitize prototypes, annotate\n* usual ntohs-\u003eshift\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "465ae641e4a3e5028aa9c85d3843259aa28a22ce", "tree": "a8f20c576d03dc40d67ad8b5ee5f9dec4f114a81", "parents": [ "c6dbaef22a2f78700e242915a13218dd780c89ff" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Sat Nov 11 17:18:42 2006 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Dec 01 14:52:01 2006 -0800" }, "message": "ACPI: Change ACPI to use dev_archdata instead of firmware_data\n\nChange ACPI to use dev_archdata instead of firmware_data\n\nThis patch changes ACPI to use the new dev_archdata on i386, x86_64\nand ia64 (is there any other arch using ACPI ?) to store it\u0027s\nacpi_handle.\n\nIt also removes the firmware_data field from struct device as this\nwas the only user.\n\nOnly build-tested on x86\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "c6dbaef22a2f78700e242915a13218dd780c89ff", "tree": "57167ca04a79f0d0aecf82523c8d8f3918312d8d", "parents": [ "d80f19fab89cba8a6d16193154c8ff3edab00942" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Sat Nov 11 17:18:39 2006 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Dec 01 14:52:01 2006 -0800" }, "message": "Driver core: add dev_archdata to struct device\n\nAdd arch specific dev_archdata to struct device\n\nAdds an arch specific struct dev_arch to struct device. This enables\narchitecture to add specific fields to every device in the system, like\nDMA operation pointers, NUMA node ID, firmware specific data, etc...\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Andi Kleen \u003cak@suse.de\u003e\nAcked-By: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "9446868b5383eb87f76b2d4389dea4bb968a6657", "tree": "d253d9a0ae99c77f43ca271019fcbdbfd349b665", "parents": [ "8c131af1db510793f87dc43edbc8950a35370df3" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Tue Nov 14 16:57:46 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Tue Nov 14 16:57:46 2006 +0100" }, "message": "[PATCH] x86-64: Fix race in exit_idle\n\nWhen another interrupt happens in exit_idle the exit idle notifier\ncould be called an incorrect number of times.\n\nAdd a test_and_clear_bit_pda and use it handle the bit\natomically against interrupts to avoid this.\n\nPointed out by Stephane Eranian\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "8c131af1db510793f87dc43edbc8950a35370df3", "tree": "6d28e2cb1a645ecced3c9973b2573a0c2cdbdb48", "parents": [ "fa18f477d0987c011cce047a7c3cd1284f547a14" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Tue Nov 14 16:57:46 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Tue Nov 14 16:57:46 2006 +0100" }, "message": "[PATCH] x86-64: Fix vgetcpu when CONFIG_HOTPLUG_CPU is disabled\n\nThe vgetcpu per CPU initialization previously relied on CPU hotplug\nevents for all CPUs to initialize the per CPU state. That only\nworked only on kernels with CONFIG_HOTPLUG_CPU enabled. On the\nothers some CPUs didn\u0027t get their state initialized properly\nand vgetcpu wouldn\u0027t work.\n\nChange the initialization sequence to instead run in a normal\ninitcall (which runs after the normal CPU bootup) and initialize\nall running CPUs there. Later hotplug CPUs are still handled\nwith an hotplug notifier.\n\nThis actually simplifies the code somewhat.\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "fa18f477d0987c011cce047a7c3cd1284f547a14", "tree": "4910e79c9cb33fe3982daacf1757c51d6d53e8f7", "parents": [ "15803a43288da434d34d41c4ed650c3c1728d42c" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Tue Nov 14 16:57:46 2006 +0100" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Tue Nov 14 16:57:46 2006 +0100" }, "message": "[PATCH] x86: Add acpi_user_timer_override option for Asus boards\n\nTimer overrides are normally disabled on Nvidia board because\nthey are commonly wrong, except on new ones with HPET support.\nUnfortunately there are quite some Asus boards around that\ndon\u0027t have HPET, but need a timer override.\n\nWe don\u0027t know yet how to handle this transparently,\nbut at least add a command line option to force the timer override\nand let them boot.\n\nCc: len.brown@intel.com\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a", "tree": "ae135f5fcc6ab29f3fc0d057f4a9c10e5be58cbf", "parents": [ "464908d7e2a9f77cb50ee905cda8a59e5b4e50e4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@merom.osdl.org", "time": "Wed Nov 08 10:23:03 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@merom.osdl.org", "time": "Wed Nov 08 10:23:03 2006 -0800" }, "message": "x86-64: clean up io-apic accesses\n\nThis is just commit 130fe05dbc0114609cfef9815c0c5580b42decfa ported to\nx86-64, for all the same reasons. It cleans up the IO-APIC accesses in\norder to then fix the ordering issues.\n\nWe move the accessor functions (that were only used by io_apic.c) out of\na header file, and use proper memory-mapped accesses rather than making\nup our own \"volatile\" pointers.\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "70a0a5357db20c291d46c04011d646d5d84c868c", "tree": "fb82087c685b2f3018172a5956f86cc36fc833d1", "parents": [ "d1752aa884ec0ac3027c1a3d456bf69bf765c8b8" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 25 01:00:23 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@one.(none)", "time": "Wed Oct 25 01:00:23 2006 +0200" }, "message": "[PATCH] x86-64: Only look at per_cpu data for online cpus.\n\nWhen I generalized __assign_irq_vector I failed to pay attention\nto what happens when you access a per cpu data structure for\na cpu that is not online. It is an undefined case making any\ncode that does it have undefined behavior as well.\n\nThe code still needs to be able to allocate a vector across cpus\nthat are not online to properly handle combinations like lowest\npriority interrupt delivery and cpu_hotplug. Not that we can do\nthat today but the infrastructure shouldn\u0027t prevent it.\n\nSo this patch updates the places where we touch per cpu data\nto only touch online cpus, it makes cpu vector allocation\nan atomic operation with respect to cpu hotplug, and it updates\nthe cpu start code to properly initialize vector_irq so we\ndon\u0027t have inconsistencies.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "e70ea8c09db0e25ab58f84ba7f393e5c9125a8ee", "tree": "1fd86bdf586880e059181b153873617cee58f9ab", "parents": [ "dbaab49f92ff6ae6255762a948375e4036cbdbd2" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Sat Oct 21 18:37:03 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Sat Oct 21 18:37:03 2006 +0200" }, "message": "[PATCH] x86-64: Revert timer routing behaviour back to 2.6.16 state\n\nBy default route the 8254 over the 8259 and only disable\nit on ATI boards where this causes double timer interrupts.\n\nThis should unbreak some Nvidia boards where the timer doesn\u0027t\nseem to tick of it isn\u0027t enabled in the 8259. At least one\nVIA board also seemed to have a little trouble with the disabled\n8259.\n\nFor 2.6.20 we\u0027ll try both dynamically without black listing, but I think\nfor .19 this is the safer approach because it has been already well tested\nin earlier kernels. This also makes the x86-64 behaviour the same\nas i386.\n\nCommand line options can change all this of course.\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "7a71cef780404e8c90d23b1131142e158d94354b", "tree": "7e961918153726f031fabd40f2bf695c24cd8c90", "parents": [ "690a973f48b6ba2954465992c08e65059c8374fe" ], "author": { "name": "bibo,mao", "email": "bibo.mao@intel.com", "time": "Sat Oct 21 18:37:02 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Sat Oct 21 18:37:02 2006 +0200" }, "message": "[PATCH] x86-64: x86_64 add NX mask for PTE entry\n\n If function change_page_attr_addr calls revert_page to revert\nto original pte value, mk_pte_phys does not mask NX bit. If NX bit\nis set on no NX hardware supported x86_64 machine, there is will\nbe RSVD type page fault and system will crash. This patch adds NX\nmask bit for PTE entry.\n\nSigned-off-by: bibo,mao \u003cbibo.mao@intel.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "d0a9081b1e75ba62bb4450c5b8e8299a41d25278", "tree": "abed939f2d35a78621206b50d2b4c9b4fd923dab", "parents": [ "965a3d447276491b7ed053b25679c062beb04194" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Fri Oct 20 14:30:27 2006 -0700" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Oct 21 01:22:43 2006 -0400" }, "message": "ACPI: uninline ACPI global locking functions\n\n- Fixes a build problem with CONFIG_M386\u003dy (include file dependencies get\n messy).\n\n- Share the implementation between x86 and x86_64\n\n- These are too big to inline anyway.\n\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "dfde5d62ed9b28b0bda676c16e8cb635df244ef2", "tree": "12c690189fcc7155389860beae554199456b7d3e", "parents": [ "a6f6e6e6ab464c9d1dff66570b78be2f66d8ba3d" ], "author": { "name": "Venkatesh Pallipadi", "email": "venkatesh.pallipadi@intel.com", "time": "Tue Oct 03 12:38:45 2006 -0700" }, "committer": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Sun Oct 15 19:57:11 2006 -0400" }, "message": "[CPUFREQ][8/8] acpi-cpufreq: Add support for freq feedback from hardware\n\nEnable ondemand governor and acpi-cpufreq to use IA32_APERF and IA32_MPERF MSR\nto get active frequency feedback for the last sampling interval. This will\nmake ondemand take right frequency decisions when hardware coordination of\nfrequency is going on.\n\nWithout APERF/MPERF, ondemand can take wrong decision at times due\nto underlying hardware coordination or TM2.\nExample:\n* CPU 0 and CPU 1 are hardware cooridnated.\n* CPU 1 running at highest frequency.\n* CPU 0 was running at highest freq. Now ondemand reduces it to\n some intermediate frequency based on utilization.\n* Due to underlying hardware coordination with other CPU 1, CPU 0 continues to\n run at highest frequency (as long as other CPU is at highest).\n* When ondemand samples CPU 0 again next time, without actual frequency\n feedback from APERF/MPERF, it will think that previous frequency change\n was successful and can go to wrong target frequency. This is because it\n thinks that utilization it has got this sampling interval is when running at\n intermediate frequency, rather than actual highest frequency.\n\nMore information about IA32_APERF IA32_MPERF MSR:\nRefer to IA-32 Intel® Architecture Software Developer\u0027s Manual at\nhttp://developer.intel.com\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Dave Jones \u003cdavej@redhat.com\u003e\n" }, { "commit": "991528d7348667924176f3e29addea0675298944", "tree": "ed8552bd4c696700a95ae37b26c4197923207ae7", "parents": [ "b4bd8c66435a8cdf8c90334fb3b517a23ff2ab95" ], "author": { "name": "Venkatesh Pallipadi", "email": "venkatesh.pallipadi@intel.com", "time": "Mon Sep 25 16:28:13 2006 -0700" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Oct 14 00:35:39 2006 -0400" }, "message": "ACPI: Processor native C-states using MWAIT\n\nIntel processors starting with the Core Duo support\nsupport processor native C-state using the MWAIT instruction.\nRefer: Intel Architecture Software Developer\u0027s Manual\nhttp://www.intel.com/design/Pentium4/manuals/253668.htm\n\nPlatform firmware exports the support for Native C-state to OS using\nACPI _PDC and _CST methods.\nRefer: Intel Processor Vendor-Specific ACPI: Interface Specification\nhttp://www.intel.com/technology/iapc/acpi/downloads/302223.htm\n\nWith Processor Native C-state, we use \u0027MWAIT\u0027 instruction on the processor\nto enter different C-states (C1, C2, C3). We won\u0027t use the special IO\nports to enter C-state and no SMM mode etc required to enter C-state.\nOverall this will mean better C-state support.\n\nOne major advantage of using MWAIT for all C-states is, with this and\n\"treat interrupt as break event\" feature of MWAIT, we can now get accurate\ntiming for the time spent in C1, C2, .. states.\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "e50190a8341485b413f599033cb74649f849d939", "tree": "c45e165f8167dd95f3b5d4163433b91c8b7afd55", "parents": [ "53d5ed627df852ba8bab7f70df25290bd733792c" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Wed Oct 11 01:22:02 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 11 11:14:23 2006 -0700" }, "message": "[PATCH] Consolidate check_signature\n\nThere\u0027s nothing arch-specific about check_signature(), so move it to\n\u003clinux/io.h\u003e. Use a cross between the Alpha and i386 implementations as\nthe generic one.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@parisc-linux.org\u003e\nAcked-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "c7111c1318ee8890f385813f232fdb32643e2653", "tree": "e21f8ee81f45f0c127a6233ed77d8052615d1fc8", "parents": [ "b940d22d58c41b2ae491dca9232850f6f38f3653" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Oct 08 07:47:55 2006 -0600" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 08 12:24:02 2006 -0700" }, "message": "[PATCH] x86_64 irq: Allocate a vector across all cpus for genapic_flat.\n\nThe problem we can\u0027t take advantage of lowest priority delivery mode if\nthe vectors are allocated for only one cpu at a time. Nor can we work\naround hardware that assumes lowest priority delivery mode is always\nused with several cpus.\n\nSo this patch introduces the concept of a vector_allocation_domain. A\nset of cpus that will receive an irq on the same vector. Currently the\ncode for implementing this is placed in the genapic structure so we can\nvary this depending on how we are using the io_apics.\n\nThis allows us to restore the previous behaviour of genapic_flat without\nremoving the benefits of having separate vector allocation for large\nmachines.\n\nThis should also fix the problem report where a hyperthreaded cpu was\nreceving the irq on the wrong hyperthread when in logical delivery mode\nbecause the previous behaviour is restored.\n\nThis patch properly records our allocation of the first 16 irqs to the\nfirst 16 available vectors on all cpus. This should be fine but it may\nrun into problems with multiple interrupts at the same interrupt level.\nExcept for some badly maintained comments in the code and the behaviour\nof the interrupt allocator I have no real understanding of that problem.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b940d22d58c41b2ae491dca9232850f6f38f3653", "tree": "86a6a44c791ac55f1ea0f76f61248df55d20cf6a", "parents": [ "7da5d406792eedb5341a8c20296470b2e67743e7" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Oct 08 07:43:46 2006 -0600" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 08 12:24:02 2006 -0700" }, "message": "[PATCH] i386/x86_64: Remove global IO_APIC_VECTOR\n\nWhich vector an irq is assigned to now varies dynamically and is\nnot needed outside of io_apic.c. So remove the possibility\nof accessing the information outside of io_apic.c and remove\nthe silly macro that makes looking for users of irq_vector\ndifficult.\n\nThe fact this compiles ensures there aren\u0027t any more pieces\nof the old CONFIG_PCI_MSI weirdness that I failed to remove.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a666ecfbf512dbd63a60f65d2ad6733a9a1b12ee", "tree": "670d0bd90f424101a8f05639ff517e464c4005c6", "parents": [ "dc366708b3b022050f139347a44c65a102e4835d" ], "author": { "name": "Jan Blunck", "email": "jblunck@suse.de", "time": "Fri Oct 06 00:43:58 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Oct 06 08:53:41 2006 -0700" }, "message": "[PATCH] Fix typo in \"syntax error if percpu macros are incorrectly used\" patch\n\nTrivial typo fix in the \"syntax error if percpu macros are incorrectly\nused\" patch. I misspelled \"identifier\" in all places. D\u0027Oh!\n\nThanks to Dirk Mueller to point this out.\n\nSigned-off-by: Jan Blunck \u003cjblunck@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "7d12e780e003f93433d49ce78cfedf4b4c52adc5", "tree": "6748550400445c11a306b132009f3001e3525df8", "parents": [ "da482792a6d1a3fbaaa25fae867b343fb4db3246" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Oct 05 14:55:46 2006 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@warthog.cambridge.redhat.com", "time": "Thu Oct 05 15:10:12 2006 +0100" }, "message": "IRQ: Maintain regs pointer globally rather than passing to IRQ handlers\n\nMaintain a per-CPU global \"struct pt_regs *\" variable which can be used instead\nof passing regs around manually through all ~1800 interrupt handlers in the\nLinux kernel.\n\nThe regs pointer is used in few places, but it potentially costs both stack\nspace and code to pass it around. On the FRV arch, removing the regs parameter\nfrom all the genirq function results in a 20% speed up of the IRQ exit path\n(ie: from leaving timer_interrupt() to leaving do_IRQ()).\n\nWhere appropriate, an arch may override the generic storage facility and do\nsomething different with the variable. On FRV, for instance, the address is\nmaintained in GR28 at all times inside the kernel as part of general exception\nhandling.\n\nHaving looked over the code, it appears that the parameter may be handed down\nthrough up to twenty or so layers of functions. Consider a USB character\ndevice attached to a USB hub, attached to a USB controller that posts its\ninterrupts through a cascaded auxiliary interrupt controller. A character\ndevice driver may want to pass regs to the sysrq handler through the input\nlayer which adds another few layers of parameter passing.\n\nI\u0027ve build this code with allyesconfig for x86_64 and i386. I\u0027ve runtested the\nmain part of the code on FRV and i386, though I can\u0027t test most of the drivers.\nI\u0027ve also done partial conversion for powerpc and MIPS - these at least compile\nwith minimal configurations.\n\nThis will affect all archs. Mostly the changes should be relatively easy.\nTake do_IRQ(), store the regs pointer at the beginning, saving the old one:\n\n\tstruct pt_regs *old_regs \u003d set_irq_regs(regs);\n\nAnd put the old one back at the end:\n\n\tset_irq_regs(old_regs);\n\nDon\u0027t pass regs through to generic_handle_irq() or __do_IRQ().\n\nIn timer_interrupt(), this sort of change will be necessary:\n\n\t-\tupdate_process_times(user_mode(regs));\n\t-\tprofile_tick(CPU_PROFILING, regs);\n\t+\tupdate_process_times(user_mode(get_irq_regs()));\n\t+\tprofile_tick(CPU_PROFILING);\n\nI\u0027d like to move update_process_times()\u0027s use of get_irq_regs() into itself,\nexcept that i386, alone of the archs, uses something other than user_mode().\n\nSome notes on the interrupt handling in the drivers:\n\n (*) input_dev() is now gone entirely. The regs pointer is no longer stored in\n the input_dev struct.\n\n (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does\n something different depending on whether it\u0027s been supplied with a regs\n pointer or not.\n\n (*) Various IRQ handler function pointers have been moved to type\n irq_handler_t.\n\nSigned-Off-By: David Howells \u003cdhowells@redhat.com\u003e\n(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)\n" }, { "commit": "fefd26b3b8597a11a422d950c0d4424ff33a70ad", "tree": "6794a36072635e71e5b33aec47c616bafdca65c1", "parents": [ "4a61f17378c2cdd9bd8f34ef8bd7422861d0c1f1", "038b0a6d8d32db934bba6a24e74e76e4e327a94f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 09:59:57 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 09:59:57 2006 -0700" }, "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/configh\n\n* master.kernel.org:/pub/scm/linux/kernel/git/davej/configh:\n Remove all inclusions of \u003clinux/config.h\u003e\n\nManually resolved trivial path conflicts due to removed files in\nthe sound/oss/ subdirectory.\n" }, { "commit": "3b7d1921f4cdd6d6ddb7899ae7a8d413991c5cf4", "tree": "5f809e0c4310f60dfa6f65d54fbaf9f01e2ebff9", "parents": [ "277bc33bc2479707e88b0b2ae6fe56e8e4aabe81" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:59 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] msi: refactor and move the msi irq_chip into the arch code\n\nIt turns out msi_ops was simply not enough to abstract the architecture\nspecific details of msi. So I have moved the resposibility of constructing\nthe struct irq_chip to the architectures, and have two architecture specific\nfunctions arch_setup_msi_irq, and arch_teardown_msi_irq.\n\nFor simple architectures those functions can do all of the work. For\narchitectures with platform dependencies they can call into the appropriate\nplatform code.\n\nWith this msi.c is finally free of assuming you have an apic, and this\nactually takes less code.\n\nThe helpers for the architecture specific code are declared in the linux/msi.h\nto keep them separate from the msi functions used by drivers in linux/pci.h\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8b955b0dddb35e398b07e217a81f8bd49400796f", "tree": "6fc307371b6889ac08fa5a7187cde1c137c8d765", "parents": [ "e78d01693be38bf93dd6bb49b86e143da450de86" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:55 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] Initial generic hypertransport interrupt support\n\nThis patch implements two functions ht_create_irq and ht_destroy_irq for\nuse by drivers. Several other functions are implemented as helpers for\narch specific irq_chip handlers.\n\nThe driver for the card I tested this on isn\u0027t yet ready to be merged.\nHowever this code is and hypertransport irqs are in use in a few other\nplaces in the kernel. Not that any of this will get merged before 2.6.19\n\nBecause the ipath-ht400 is slightly out of spec this code will need to be\ngeneralized to work there.\n\nI think all of the powerpc uses are for a plain interrupt controller in a\nchipset so support for native hypertransport devices is a little less\ninteresting.\n\nHowever I think this is a half way decent model on how to separate arch\nspecific and generic helper code, and I think this is a functional model of\nhow to get the architecture dependencies out of the msi code.\n\n[akpm@osdl.org: Kconfig fix]\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "cd1182f56a064d42d10e289ef4018f9c2230247d", "tree": "9412734daf8cc98cf94447815ec99655dd2a77fe", "parents": [ "f023d764cc6165eb4f1cad6b2b0882ce0660764a" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:53 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] genirq: x86_64 irq: Kill irq compression\n\nWith more irqs in the system we don\u0027t need this.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "550f2299ac8ffaba943cf211380d3a8d3fa75301", "tree": "9a8cb7b0d62f48f581f66ab4951aa6c9793131c0", "parents": [ "e500f57436b9056a245216c53113613928155eba" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:51 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] genirq: x86_64 irq: make vector_irq per cpu\n\nThis refactors the irq handling code to make the vectors a per cpu resource so\nthe same vector number can be simultaneously used on multiple cpus for\ndifferent irqs.\n\nThis should make systems that were hitting limits on the total number of irqs\nmuch more livable.\n\n[akpm@osdl.org: build fix]\n[akpm@osdl.org: __target_IO_APIC_irq is unneeded on UP]\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "e500f57436b9056a245216c53113613928155eba", "tree": "2b93aae3dfbe82fd5387ec7e0cb5945951655d07", "parents": [ "23d0b8b053391afe15c9667d80de77ca88e18b8b" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:50 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:28 2006 -0700" }, "message": "[PATCH] genirq: x86_64 irq: Make the external irq handlers report their vector, not the irq number\n\nThis is a small pessimization but it paves the way for making this information\nper cpu. Which allows the the maximum number of IRQS to become NR_CPUS*224.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "23d0b8b053391afe15c9667d80de77ca88e18b8b", "tree": "8ee6dd027581f794bcbffaa9022a3635ba59b04a", "parents": [ "323a01c50832749d23664954f91df6fc43e73975" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:49 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:28 2006 -0700" }, "message": "[PATCH] genirq: irq: generalize the check for HARDIRQ_BITS\n\nThis patch adds support for systems that cannot receive every interrupt on a\nsingle cpu simultaneously, in the check to see if we have enough HARDIRQ_BITS.\n\nMAX_HARDIRQS_PER_CPU becomes the count of the maximum number of hardare\ngenerated interrupts per cpu.\n\nOn architectures that support per cpu interrupt delivery this can be a\nsignificant space savings and scalability bonus.\n\nThis patch adds support for systems that cannot receive every interrupt on\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "ace80ab796ae30d2c9ee8a84ab6f608a61f8b87b", "tree": "05eb2c68e534af4982ad82c459b1a65e3e712faf", "parents": [ "04b9267b15206fc902a18de1f78de6c82ca47716" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:47 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:28 2006 -0700" }, "message": "[PATCH] genirq: i386 irq: Remove the msi assumption that irq \u003d\u003d vector\n\nThis patch removes the change in behavior of the irq allocation code when\nCONFIG_PCI_MSI is defined. Removing all instances of the assumption that irq\n\u003d\u003d vector.\n\ncreate_irq is rewritten to first allocate a free irq and then to assign that\nirq a vector.\n\nassign_irq_vector is made static and the AUTO_ASSIGN case which allocates an\nvector not bound to an irq is removed.\n\nThe ioapic vector methods are removed, and everything now works with irqs.\n\nThe definition of NR_IRQS no longer depends on CONFIG_PCI_MSI\n\n[akpm@osdl.org: cleanup]\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "04b9267b15206fc902a18de1f78de6c82ca47716", "tree": "02cd5fdc44f3ec188af41ec7188d8239badf24c3", "parents": [ "4b2fabb9ec9b3b1cf5cf848a678058fb20c4d552" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:46 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:28 2006 -0700" }, "message": "[PATCH] genirq: x86_64 irq: Remove the msi assumption that irq \u003d\u003d vector\n\nThis patch removes the change in behavior of the irq allocation code when\nCONFIG_PCI_MSI is defined. Removing all instances of the assumption that irq\n\u003d\u003d vector.\n\ncreate_irq is rewritten to first allocate a free irq and then to assign that\nirq a vector.\n\nassign_irq_vector is made static and the AUTO_ASSIGN case which allocates an\nvector not bound to an irq is removed.\n\nThe ioapic vector methods are removed, and everything now works with irqs.\n\nThe definition of NR_IRQS no longer depends on CONFIG_PCI_MSI\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "589e367f9b9117b3412da0d4e10ea6882db8da84", "tree": "3ad393830c94a146553b459468f0f3a72702b4d6", "parents": [ "1ce03373a7f4b5fa8ca5be02ff35229800a6e12b" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:42 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:28 2006 -0700" }, "message": "[PATCH] genirq: x86_64 irq: Move msi message composition into io_apic.c\n\nThis removes the hardcoded assumption that irq \u003d\u003d vector in the msi\ncomposition code, and it allows the msi message composition to setup logical\nmode, or lowest priorirty delivery mode as we do for other apic interrupts,\nand with the same selection criteria.\n\nBasically this moves the problem of what is in the msi message into the\narchitecture irq management code where it belongs. Not in a generic layer\nthat doesn\u0027t have enough information to compose msi messages properly.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f29bd1ba68c8c6a0f50bd678bbd5a26674018f7c", "tree": "5a2f6086397b94e9094fa065a344bcb7e6a05ac0", "parents": [ "0271eb947db2704a0ff8be68d72915ab021d1ead" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Oct 04 02:16:25 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:25 2006 -0700" }, "message": "[PATCH] genirq: convert the x86_64 architecture to irq-chips\n\nThis patch converts all the x86_64 PIC controllers layers to the new and\nsimpler irq-chip interrupt handling layer.\n\n[mingo@elte.hu: The patch also enables the fasteoi handler for x86_64]\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Roland Dreier \u003crolandd@cisco.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "038b0a6d8d32db934bba6a24e74e76e4e327a94f", "tree": "5fbeb3e8f140e20f8ce0e33e12b32ec5b0724cd6", "parents": [ "78b656b8bf933101b42409b4492734b23427bfc3" ], "author": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Wed Oct 04 03:38:54 2006 -0400" }, "committer": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Wed Oct 04 03:38:54 2006 -0400" }, "message": "Remove all inclusions of \u003clinux/config.h\u003e\nkbuild explicitly includes this at build time.\n\nSigned-off-by: Dave Jones \u003cdavej@redhat.com\u003e\n" }, { "commit": "f30c2269544bffc7bf1b0d7c0abe5be1be83b8cb", "tree": "2f6140d8a555af6a133690ed6b42599e78a43c54", "parents": [ "670e9f34ee3c7e052514c85014d2fdd99b672cdc" ], "author": { "name": "Uwe Zeisberger", "email": "Uwe_Zeisberger@digi.com", "time": "Tue Oct 03 23:01:26 2006 +0200" }, "committer": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Tue Oct 03 23:01:26 2006 +0200" }, "message": "fix file specification in comments\n\nMany files include the filename at the beginning, serveral used a wrong one.\n\nSigned-off-by: Uwe Zeisberger \u003cUwe_Zeisberger@digi.com\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\n" }, { "commit": "1a84887080dc15f048db7c3a643e98f1435790d6", "tree": "7cd335fee247c0b60f8562c82806b49435b5fb9d", "parents": [ "74732646431a1bb7e23e6b564127a8881cfef900" ], "author": { "name": "Siddha, Suresh B", "email": "suresh.b.siddha@intel.com", "time": "Tue Oct 03 01:14:08 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Oct 03 08:04:06 2006 -0700" }, "message": "[PATCH] sched: introduce child field in sched_domain\n\nIntroduce the child field in sched_domain struct and use it in\nsched_balance_self().\n\nWe will also use this field in cleaning up the sched group cpu_power\nsetup(done in a different patch) code.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nAcked-by: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nCc: Paul Jackson \u003cpj@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3db03b4afb3ecd66a0399b8ba57742ca953b0ecd", "tree": "fe0bd5c3663c58583f0181e2673d569c2df664e7", "parents": [ "6760856791c6e527da678021ee6a67896549d4da" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Mon Oct 02 02:18:31 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Oct 02 07:57:23 2006 -0700" }, "message": "[PATCH] rename the provided execve functions to kernel_execve\n\nSome architectures provide an execve function that does not set errno, but\ninstead returns the result code directly. Rename these to kernel_execve to\nget the right semantics there. Moreover, there is no reasone for any of these\narchitectures to still provide __KERNEL_SYSCALLS__ or _syscallN macros, so\nremove these right away.\n\n[akpm@osdl.org: build fix]\n[bunk@stusta.de: build fix]\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nAcked-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Ian Molton \u003cspyro@f2s.com\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Yoshinori Sato \u003cysato@users.sourceforge.jp\u003e\nCc: Hirokazu Takata \u003ctakata.hirokazu@renesas.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Kazumoto Kojima \u003ckkojima@rr.iij4u.or.jp\u003e\nCc: Richard Curnow \u003crc@rc0.org.uk\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nCc: Miles Bader \u003cuclinux-v850@lsi.nec.co.jp\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nCc: Roman Zippel \u003czippel@linux-m68k.org\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b3f827cb0fe0660c2eacea2c2f9bdb1f225ff768", "tree": "ae912b3b929526184eeca0519550635dc39b5362", "parents": [ "412998cf6bce78b8dc5f68660e09bf3b4fcbb210" ], "author": { "name": "Ananth N Mavinakayanahalli", "email": "ananth@in.ibm.com", "time": "Mon Oct 02 02:17:31 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Oct 02 07:57:16 2006 -0700" }, "message": "[PATCH] Add regs_return_value() helper\n\nAdd the regs_return_value() macro to extract the return value in an\narchitecture agnostic manner, given the pt_regs.\n\nOther architecture maintainers may want to add similar helpers.\n\nSigned-off-by: Ananth N Mavinakayanahalli \u003cananth@in.ibm.com\u003e\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8ef386092d7c2891bd7acefb2a87f878f7e9a0d6", "tree": "b149f0c63f9b9bb3f43e82097f1ae5972662288f", "parents": [ "70bc42f90a3f4721c89dbe865e6c95da8565b41c" ], "author": { "name": "Atsushi Nemoto", "email": "anemo@mba.ocn.ne.jp", "time": "Sat Sep 30 23:28:31 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 01 00:39:27 2006 -0700" }, "message": "[PATCH] kill wall_jiffies\n\nWith 2.6.18-rc4-mm2, now wall_jiffies will always be the same as jiffies.\nSo we can kill wall_jiffies completely.\n\nThis is just a cleanup and logically should not change any real behavior\nexcept for one thing: RTC updating code in (old) ppc and xtensa use a\ncondition \"jiffies - wall_jiffies \u003d\u003d 1\". This condition is never met so I\nsuppose it is just a bug. I just remove that condition only instead of\nkill the whole \"if\" block.\n\n[heiko.carstens@de.ibm.com: s390 build fix and cleanup]\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Ian Molton \u003cspyro@f2s.com\u003e\nCc: Mikael Starvik \u003cstarvik@axis.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Yoshinori Sato \u003cysato@users.sourceforge.jp\u003e\nCc: Hirokazu Takata \u003ctakata.hirokazu@renesas.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Kazumoto Kojima \u003ckkojima@rr.iij4u.or.jp\u003e\nCc: Richard Curnow \u003crc@rc0.org.uk\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nCc: Miles Bader \u003cuclinux-v850@lsi.nec.co.jp\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nCc: Roman Zippel \u003czippel@linux-m68k.org\u003e\nSigned-off-by: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "ef6edc9746dc2bfdacf44eefd5f881179971c478", "tree": "e8670e918a852978b2e93e189936f327be072284", "parents": [ "e3e5fc91d9828a9b94a3992de47d47d2d2e34ec6" ], "author": { "name": "Martin Schwidefsky", "email": "schwidefsky@de.ibm.com", "time": "Sat Sep 30 23:27:43 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 01 00:39:21 2006 -0700" }, "message": "[PATCH] Directed yield: cpu_relax variants for spinlocks and rw-locks\n\nOn systems running with virtual cpus there is optimization potential in\nregard to spinlocks and rw-locks. If the virtual cpu that has taken a lock\nis known to a cpu that wants to acquire the same lock it is beneficial to\nyield the timeslice of the virtual cpu in favour of the cpu that has the\nlock (directed yield).\n\nWith CONFIG_PREEMPT\u003d\"n\" this can be implemented by the architecture without\ncommon code changes. Powerpc already does this.\n\nWith CONFIG_PREEMPT\u003d\"y\" the lock loops are coded with _raw_spin_trylock,\n_raw_read_trylock and _raw_write_trylock in kernel/spinlock.c. If the lock\ncould not be taken cpu_relax is called. A directed yield is not possible\nbecause cpu_relax doesn\u0027t know anything about the lock. To be able to\nyield the lock in favour of the current lock holder variants of cpu_relax\nfor spinlocks and rw-locks are needed. The new _raw_spin_relax,\n_raw_read_relax and _raw_write_relax primitives differ from cpu_relax\ninsofar that they have an argument: a pointer to the lock structure.\n\nSigned-off-by: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "c84ef5305930d19bdd6cd576b3a3a73786a82e57", "tree": "26f9b94efa67ce79cf89dee251ac519804cab793", "parents": [ "34596dc9e59d7bece16fe5aba08116b49465da26" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Sat Sep 30 01:47:55 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Sat Sep 30 01:47:55 2006 +0200" }, "message": "[PATCH] Use early clobber in semaphores\n\nNew code clobbers the result always early, so tell gcc about it\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "29cbc78b90a73ad80f2f58ba2927956cf663abed", "tree": "e72fdb9c1c055da47b4cd8834bc944af8efc1ed8", "parents": [ "013bf2c50ed943e9c23a2145d3ea7c4d88cda310" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Sat Sep 30 01:47:55 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Sat Sep 30 01:47:55 2006 +0200" }, "message": "[PATCH] x86: Clean up x86 NMI sysctls\n\nUse prototypes in headers\nDon\u0027t define panic_on_unrecovered_nmi for all architectures\n\nCc: dzickus@redhat.com\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "b885808e185a4ec2dfe16c84434f79e95f0245b0", "tree": "275c7fbed3b7de20a18ee220e6b05a1862ae8af1", "parents": [ "ae853e79faa27ca1a08c8ae3b5aee71ea98482f9" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Sat Sep 30 01:47:55 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Sat Sep 30 01:47:55 2006 +0200" }, "message": "[PATCH] Add proper sparse __user casts to __copy_to_user_inatomic\n\nNoticed by Al Viro\n\nCc: viro@ftp.linux.org.uk\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" }, { "commit": "d6bd3a39f7c6ebad49c261c3d458df974c880758", "tree": "a5cf6054a8ff276f8d84ba94bb5df89ed5646332", "parents": [ "d09d7ddf3018b4c6efa76dce72f6dec6054fa22b" ], "author": { "name": "Rolf Eike Beer", "email": "eike-kernel@sf-tec.de", "time": "Fri Sep 29 01:59:48 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Sep 29 09:18:10 2006 -0700" }, "message": "[PATCH] Move valid_dma_direction() from x86_64 to generic code\n\nAs suggested by Muli Ben-Yehuda this function is moved to generic code as\nmay be useful for all archs.\n\n[akpm@osdl.org: fix]\nSigned-off-by: Rolf Eike Beer \u003ceike-kernel@sf-tec.de\u003e\nCc: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "ebba5f9fcb882306bef7175dee987342ec6fcf2f", "tree": "a947175a24a3261ab3ffb5d9244e40939dd5495d", "parents": [ "bd8e39f9e4c0960541c8c69e1f7cb321574d7c90" ], "author": { "name": "Randy Dunlap", "email": "rdunlap@xenotime.net", "time": "Wed Sep 27 01:50:55 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Sep 27 08:26:18 2006 -0700" }, "message": "[PATCH] consistently use MAX_ERRNO in __syscall_return\n\nConsistently use MAX_ERRNO when checking for errors in __syscall_return().\n\n[ralf@linux-mips.org: build fix]\nSigned-off-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "5cb248abf5ab65ab543b2d5fc16c738b28031fc0", "tree": "e9af2f7f86000e36f11f1091cb675c1738d69ca3", "parents": [ "4cfee88ad30acc47f02b8b7ba3db8556262dce1e" ], "author": { "name": "Mel Gorman", "email": "mel@csn.ul.ie", "time": "Wed Sep 27 01:49:52 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Sep 27 08:26:11 2006 -0700" }, "message": "[PATCH] Have x86_64 use add_active_range() and free_area_init_nodes\n\nSize zones and holes in an architecture independent manner for x86_64.\n\nSigned-off-by: Mel Gorman \u003cmel@csn.ul.ie\u003e\nCc: Dave Hansen \u003chaveblue@us.ibm.com\u003e\nCc: Andy Whitcroft \u003capw@shadowen.org\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: \"Keith Mannthey\" \u003ckmannth@gmail.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: Yasunori Goto \u003cy-goto@jp.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "2bd0cfbde2c0a74e209acbf045f1298cc2f61e01", "tree": "2efb7fb6e574c0cbb6e4d93975a5b519d5c6a190", "parents": [ "133d205a18b7a4d8cb52959c5310f6664277cf61" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Wed Sep 27 01:49:42 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Sep 27 08:26:11 2006 -0700" }, "message": "[PATCH] fix x86_64-mm-spinlock-cleanup\n\nWe need processor.h for cpu_relax().\n\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b278240839e20fa9384ea430df463b367b90e04e", "tree": "f99f0c8cdd4cc7f177cd75440e6bd181cded7fb3", "parents": [ "dd77a4ee0f3981693d4229aa1d57cea9e526ff47", "3f75f42d7733e73aca5c78326489efd4189e0111" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 13:07:55 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 13:07:55 2006 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://one.firstfloor.org/home/andi/git/linux-2.6\n\n* \u0027for-linus\u0027 of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits)\n [PATCH] Don\u0027t set calgary iommu as default y\n [PATCH] i386/x86-64: New Intel feature flags\n [PATCH] x86: Add a cumulative thermal throttle event counter.\n [PATCH] i386: Make the jiffies compares use the 64bit safe macros.\n [PATCH] x86: Refactor thermal throttle processing\n [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64)\n [PATCH] Fix unwinder warning in traps.c\n [PATCH] x86: Allow disabling early pci scans with pci\u003dnoearly or disallowing conf1\n [PATCH] x86: Move direct PCI scanning functions out of line\n [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI\n [PATCH] Don\u0027t leak NT bit into next task\n [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder\n [PATCH] Fix some broken white space in ia32_signal.c\n [PATCH] Initialize argument registers for 32bit signal handlers.\n [PATCH] Remove all traces of signal number conversion\n [PATCH] Don\u0027t synchronize time reading on single core AMD systems\n [PATCH] Remove outdated comment in x86-64 mmconfig code\n [PATCH] Use string instructions for Core2 copy/clear\n [PATCH] x86: - restore i8259A eoi status on resume\n [PATCH] i386: Split multi-line printk in oops output.\n ...\n" }, { "commit": "70e0eb8ef143f3729065c504177413ffe165af22", "tree": "9bf2f94b51dcf2ab8a0cd0b8df775d3452ea1b74", "parents": [ "b1fc0b1f21c4082d24d1f456a846b4fa7d16a70b" ], "author": { "name": "Jeff Dike", "email": "jdike@addtoit.com", "time": "Mon Sep 25 23:33:09 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 08:49:10 2006 -0700" }, "message": "[PATCH] Split i386 and x86_64 ptrace.h\n\nThe use of SEGMENT_RPL_MASK in the i386 ptrace.h introduced by\nx86-allow-a-kernel-to-not-be-in-ring-0.patch broke the UML build, as UML\nincludes the underlying architecture\u0027s ptrace.h, but has no easy access to the\nx86 segment definitions.\n\nRather than kludging around this, as in the past, this patch splits the\nuserspace-usable parts, which are the bits that UML needs, of ptrace.h into\nptrace-abi.h, which is included back into ptrace.h. Thus, there is no net\neffect on i386.\n\nAs a side-effect, this creates a ptrace header which is close to being usable\nin /usr/include.\n\nx86_64 is also treated in this way for consistency. There was some trailing\nwhitespace there, which is cleaned up.\n\nSigned-off-by: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "e8eff5ac294e12531c4195e0c15a222d3c9015e5", "tree": "d63a3f26e506c3468e071377fec7aa9944f24764", "parents": [ "fb13a28b0f5ada60861868c4fa48a12bd0cb8dea" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Sep 25 23:32:46 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 08:48:58 2006 -0700" }, "message": "[PATCH] Make swsusp avoid memory holes and reserved memory regions on x86_64\n\nOn x86_64 machines with more than 2 GB of RAM there are large memory gaps\n(with no corresponding kernel virtual addresses) and reserved memory\nregions between areas of usable physical RAM. Moreover, if CONFIG_FLATMEM\nis set, they appear within the normal zone. swsusp should not try to save\nthem, so the corresponding page structs have to be marked as \u0027nosave\u0027.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nCc: Mel Gorman \u003cmel@csn.ul.ie\u003e\nAcked-by: Pavel Machek \u003cpavel@ucw.cz\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a3bc0dbc81d36fd38991b4373f6de8e1a507605a", "tree": "fc7f926365fbdd86fa80b633add01ee4d2f71e18", "parents": [ "eaa70773e750cc09d60938bceacd028bc76b8e3a" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Mon Sep 25 23:32:33 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 08:48:56 2006 -0700" }, "message": "[PATCH] smp_call_function_single() cleanup\n\nIf we\u0027re going to implement smp_call_function_single() on three architecture\nwith the same prototype then it should have a declaration in a\nnon-arch-specific header file.\n\nMove it into \u003clinux/smp.h\u003e.\n\nCc: Stephane Eranian \u003ceranian@hpl.hp.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "46a82b2d5591335277ed2930611f6acb4ce654ed", "tree": "e90bc1843701af2012bae92564f7109027a8244f", "parents": [ "d2e7b7d0aa021847c59f882b066e7d3812902870" ], "author": { "name": "Dave McCracken", "email": "dmccr@us.ibm.com", "time": "Mon Sep 25 23:31:48 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 08:48:51 2006 -0700" }, "message": "[PATCH] Standardize pxx_page macros\n\nOne of the changes necessary for shared page tables is to standardize the\npxx_page macros. pte_page and pmd_page have always returned the struct\npage associated with their entry, while pte_page_kernel and pmd_page_kernel\nhave returned the kernel virtual address. pud_page and pgd_page, on the\nother hand, return the kernel virtual address.\n\nShared page tables needs pud_page and pgd_page to return the actual page\nstructures. There are very few actual users of these functions, so it is\nsimple to standardize their usage.\n\nSince this is basic cleanup, I am submitting these changes as a standalone\npatch. Per Hugh Dickins\u0027 comments about it, I am also changing the\npxx_page_kernel macros to pxx_page_vaddr to clarify their meaning.\n\nSigned-off-by: Dave McCracken \u003cdmccr@us.ibm.com\u003e\nCc: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "632bbfeee4f042c05bc65150b4433a297d3fe387", "tree": "ce67b5fa4bec38610fc0ecb9b20be6aa69763bb3", "parents": [ "0a2966b48fb784e437520e400ddc94874ddbd4e8" ], "author": { "name": "Jan Blunck", "email": "jblunck@suse.de", "time": "Mon Sep 25 23:30:53 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 08:48:44 2006 -0700" }, "message": "[PATCH] trigger a syntax error if percpu macros are incorrectly used\n\nget_cpu_var()/per_cpu()/__get_cpu_var() arguments must be simple\nidentifiers. Otherwise the arch dependent implementations might break.\n\nThis patch enforces the correct usage of the macros by producing a syntax\nerror if the variable is not a simple identifier.\n\nSigned-off-by: Jan Blunck \u003cjblunck@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "15d5f8398311f565682959daaca30e3ca7aea600", "tree": "ba38e77782832191dd38e182e99525870f83c085", "parents": [ "3b171672831b9633c2ed8fa94805255cd4d5af19" ], "author": { "name": "Dmitriy Zavin", "email": "dmitriyz@google.com", "time": "Tue Sep 26 10:52:42 2006 +0200" }, "committer": { "name": "Andi Kleen", "email": "andi@basil.nowhere.org", "time": "Tue Sep 26 10:52:42 2006 +0200" }, "message": "[PATCH] x86: Refactor thermal throttle processing\n\nRefactor the event processing (syslog messaging and rate limiting)\ninto separate file therm_throt.c. This allows consistent reporting\nof CPU thermal throttle events.\n\nAfter ACK\u0027ing the interrupt, if the event is current, the user\n(p4.c/mce_intel.c) calls therm_throt_process to log (and rate limit)\nthe event. If that function returns 1, the user has the option to log\nthings further (such as to mce_log in x86_64).\n\nAK: minor cleanup\n\nSigned-off-by: Dmitriy Zavin \u003cdmitriyz@google.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n" } ], "next": "b89ebd0b0a65d5371aa9ad98e873c4616056ca68" }