)]}' { "log": [ { "commit": "57ed609d4b64139b4d2cf5f3b4880a573a7905d2", "tree": "d824e1ebd33b28c4ccc53e9074064db479b17dc7", "parents": [ "a74d70b63f1a0230831bcca3145d85ae016f9d4c", "f133ecca9cbb31b5e6e9bda27cbe3034fbf656df" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun May 29 11:29:28 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun May 29 11:29:28 2011 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n arch/tile: more /proc and /sys file support\n" }, { "commit": "f133ecca9cbb31b5e6e9bda27cbe3034fbf656df", "tree": "1887377b71ee9fc73d4e1226d1d9776ae5a5d7ad", "parents": [ "7a0287df3e83a0012dfc496d4a8af9c1c5b126ef" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 26 12:40:09 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 27 10:39:05 2011 -0400" }, "message": "arch/tile: more /proc and /sys file support\n\nThis change introduces a few of the less controversial /proc and\n/proc/sys interfaces for tile, along with sysfs attributes for\nvarious things that were originally proposed as /proc/tile files.\nIt also adjusts the \"hardwall\" proc API.\n\nArnd Bergmann reviewed the initial arch/tile submission, which\nincluded a complete set of all the /proc/tile and /proc/sys/tile\nknobs that we had added in a somewhat ad hoc way during initial\ndevelopment, and provided feedback on where most of them should go.\n\nOne knob turned out to be similar enough to the existing\n/proc/sys/debug/exception-trace that it was re-implemented to use\nthat model instead.\n\nAnother knob was /proc/tile/grid, which reported the \"grid\" dimensions\nof a tile chip (e.g. 8x8 processors \u003d 64-core chip). Arnd suggested\nlooking at sysfs for that, so this change moves that information\nto a pair of sysfs attributes (chip_width and chip_height) in the\n/sys/devices/system/cpu directory. We also put the \"chip_serial\"\nand \"chip_revision\" information from our old /proc/tile/board file\nas attributes in /sys/devices/system/cpu.\n\nOther information collected via hypervisor APIs is now placed in\n/sys/hypervisor. We create a /sys/hypervisor/type file (holding the\nconstant string \"tilera\") to be parallel with the Xen use of\n/sys/hypervisor/type holding \"xen\". We create three top-level files,\n\"version\" (the hypervisor\u0027s own version), \"config_version\" (the\nversion of the configuration file), and \"hvconfig\" (the contents of\nthe configuration file). The remaining information from our old\n/proc/tile/board and /proc/tile/switch files becomes an attribute\ngroup appearing under /sys/hypervisor/board/.\n\nFinally, after some feedback from Arnd Bergmann for the previous\nversion of this patch, the /proc/tile/hardwall file is split up into\ntwo conceptual parts. First, a directory /proc/tile/hardwall/ which\ncontains one file per active hardwall, each file named after the\nhardwall\u0027s ID and holding a cpulist that says which cpus are enclosed by\nthe hardwall. Second, a /proc/PID file \"hardwall\" that is either\nempty (for non-hardwall-using processes) or contains the hardwall ID.\n\nFinally, this change pushes the /proc/sys/tile/unaligned_fixup/\ndirectory, with knobs controlling the kernel code for handling the\nfixup of unaligned exceptions.\n\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "0798b1dbfbd9ff2a370c5968c5f0621ef0075fe0", "tree": "c7f61ab9683786a070da0933b9981fc74a4d865f", "parents": [ "ad363e0916423b2e6cdfcdc30ae707ec709f0a65", "6738d3210aabe3016a1b03cd98a7fc479c229197" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 25 15:35:32 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 25 15:35:32 2011 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (26 commits)\n arch/tile: prefer \"tilepro\" as the name of the 32-bit architecture\n compat: include aio_abi.h for aio_context_t\n arch/tile: cleanups for tilegx compat mode\n arch/tile: allocate PCI IRQs later in boot\n arch/tile: support signal \"exception-trace\" hook\n arch/tile: use better definitions of xchg() and cmpxchg()\n include/linux/compat.h: coding-style fixes\n tile: add an RTC driver for the Tilera hypervisor\n arch/tile: finish enabling support for TILE-Gx 64-bit chip\n compat: fixes to allow working with tile arch\n arch/tile: update defconfig file to something more useful\n tile: do_hardwall_trap: do not play with task-\u003esighand\n tile: replace mm-\u003ecpu_vm_mask with mm_cpumask()\n tile,mn10300: add device parameter to dma_cache_sync()\n audit: support the \"standard\" \u003casm-generic/unistd.h\u003e\n arch/tile: clarify flush_buffer()/finv_buffer() function names\n arch/tile: kernel-related cleanups from removing static page size\n arch/tile: various header improvements for building drivers\n arch/tile: disable GX prefetcher during cache flush\n arch/tile: tolerate disabling CONFIG_BLK_DEV_INITRD\n ...\n" }, { "commit": "5129df03d0c44b2d5a5f9d7d52f3b079706b9a8f", "tree": "799e309a7db032cb7abe9f0fa910c2989c3fdab5", "parents": [ "4d429480352c63db2228489f0db9fd381cdc3c9c", "6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 24 11:53:42 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 24 11:53:42 2011 -0700" }, "message": "Merge branch \u0027for-2.6.40\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu\n\n* \u0027for-2.6.40\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:\n percpu: Unify input section names\n percpu: Avoid extra NOP in percpu_cmpxchg16b_double\n percpu: Cast away printk format warning\n percpu: Always align percpu output section to PAGE_SIZE\n\nFix up fairly trivial conflict in arch/x86/include/asm/percpu.h as per Tejun\n" }, { "commit": "818d8462bb7c717706bcfe994258e2c3710d1fd0", "tree": "d597fe6369a03fdf0b8fc0c940579cbe1efab35e", "parents": [ "f4de51de2edcd26ec77bfc71b1f00b1de5a5dc20" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue May 17 15:52:22 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 19 22:56:13 2011 -0400" }, "message": "arch/tile: cleanups for tilegx compat mode\n\nThese changes make the syscall table line up correctly for\ntilegx compat mode, and remove the stale sys32_fadvise64() function,\nwhich isn\u0027t actually used by any syscall table.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "f4de51de2edcd26ec77bfc71b1f00b1de5a5dc20", "tree": "5d565f18fbb0b0edc82af64d7d98e342a0c1c6d8", "parents": [ "571d76acdab95876aeff869ab6449f826c23aa43" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue May 17 15:25:21 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 19 22:56:05 2011 -0400" }, "message": "arch/tile: allocate PCI IRQs later in boot\n\nThis change became required due to some recent reworking in the\nplatform-independent IRQ code. It is required for 2.6.38 and later.\n\nCc: stable@kernel.org\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "571d76acdab95876aeff869ab6449f826c23aa43", "tree": "b52ceacfa83b1ab4c5a6950007ce8be03cec192e", "parents": [ "8aaf1dda42576b0f8dffb004065baa806f4df9b6" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 16 14:23:44 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 19 22:55:59 2011 -0400" }, "message": "arch/tile: support signal \"exception-trace\" hook\n\nThis change adds support for /proc/sys/debug/exception-trace to tile.\nLike x86 and sparc, by default it is set to \"1\", generating a one-line\nprintk whenever a user process crashes. By setting it to \"2\", we get\na much more complete userspace diagnostic at crash time, including\na user-space backtrace, register dump, and memory dump around the\naddress of the crash.\n\nSome vestiges of the Tilera-internal version of this support are\nremoved with this patch (the show_crashinfo variable and the\narch_coredump_signal function). We retain a \"crashinfo\" boot parameter\nwhich allows you to set the boot-time value of exception-trace.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "18aecc2b645bbb07851b196452a2af314222069b", "tree": "959f765f69af01046c6e26db12b45c3390799d3e", "parents": [ "be84cb43833ee40a42e08f5425d20310f16229c7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:38:26 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 12 15:52:12 2011 -0400" }, "message": "arch/tile: finish enabling support for TILE-Gx 64-bit chip\n\nThis support was partially present in the existing code (look for\n\"__tilegx__\" ifdefs) but with this change you can build a working\nkernel using the TILE-Gx toolchain and ARCH\u003dtilegx.\n\nMost of these files are new, generally adding a foo_64.c file\nwhere previously there was just a foo_32.c file.\n\nThe ARCH\u003dtilegx directive redirects to arch/tile, not arch/tilegx,\nusing the existing SRCARCH mechanism in the top-level Makefile.\n\nChanges to existing files:\n\n- \u003casm/bitops.h\u003e and \u003casm/bitops_32.h\u003e changed to factor the\n include of \u003casm-generic/bitops/non-atomic.h\u003e in the common header.\n\n- \u003casm/compat.h\u003e and arch/tile/kernel/compat.c changed to remove\n the \"const\" markers I had put on compat_sys_execve() when trying\n to match some recent similar changes to the non-compat execve.\n It turns out the compat version wasn\u0027t \"upgraded\" to use const.\n\n- \u003casm/opcode-tile_64.h\u003e and \u003casm/opcode_constants_64.h\u003e were\n previously included accidentally, with the 32-bit contents. Now\n they have the proper 64-bit contents.\n\nFinally, I had to hack the existing hacky drivers/input/input-compat.h\nto add yet another \"#ifdef\" for INPUT_COMPAT_TEST (same as x86_64).\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Dmitry Torokhov \u003cdmitry.torokhov@gmail.com\u003e [drivers/input]\n" }, { "commit": "be84cb43833ee40a42e08f5425d20310f16229c7", "tree": "0d5ddbaac88aa99ab5dbd0925ec525d399405fd5", "parents": [ "d2e48c1d4184a0baa4bf09920b63661e0b860b8c" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 09 13:12:30 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu May 12 15:51:36 2011 -0400" }, "message": "compat: fixes to allow working with tile arch\n\nThe existing \u003casm-generic/unistd.h\u003e mechanism doesn\u0027t really provide\nenough to create the 64-bit \"compat\" ABI properly in a generic way,\nsince the compat ABI is a mix of things were you can re-use the 64-bit\nversions of syscalls and things where you need a compat wrapper.\n\nTo provide this in the most direct way possible, I added two new macros\nto go along with the existing __SYSCALL and __SC_3264 macros: __SC_COMP\nand SC_COMP_3264. These macros take an additional argument, typically a\n\"compat_sys_xxx\" function, which is passed to __SYSCALL if you define\n__SYSCALL_COMPAT when including the header, resulting in a pointer to\nthe compat function being placed in the generated syscall table.\n\nThe change also adds some missing definitions to \u003clinux/compat.h\u003e so that\nit actually has declarations for all the compat syscalls, since the\n\"[nr] \u003d ##call\" approach requires proper C declarations for all the\nfunctions included in the syscall table.\n\nFinally, compat.c defines compat_sys_sigpending() and\ncompat_sys_sigprocmask() even if the underlying architecture doesn\u0027t\nrequest it, which tries to pull in undefined compat_old_sigset_t defines.\nWe need to guard those compat syscall definitions with appropriate\n__ARCH_WANT_SYS_xxx ifdefs.\n\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "ceca3c193e73bb409d093515fae9e5ef02ffa2de", "tree": "b29f24fb0c280dd04bc4cdd0d68ffdec06e48ad7", "parents": [ "dc0b124d8edc6c2f95fc3a689cd40ec05ad85108" ], "author": { "name": "Oleg Nesterov", "email": "oleg@redhat.com", "time": "Tue Apr 26 22:37:11 2011 +0200" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:53 2011 -0400" }, "message": "tile: do_hardwall_trap: do not play with task-\u003esighand\n\n1. do_hardwall_trap() checks -\u003esighand !\u003d NULL and then takes -\u003esiglock.\n\n This is unsafe even if the task can\u0027t run (I assume it is pinned to\n the same CPU), its parent can reap the task and set -\u003esighand \u003d NULL\n right after this check. Even if the compiler dosn\u0027t read -\u003esighand\n twice and this memory can\u0027t to away __group_send_sig_info() is wrong\n after that. Use do_send_sig_info().\n\n2. Send SIGILL to the thread, not to the whole process. Unless it has\n the handler or blocked this kills the whole thread-group as before.\n IIUC, different threads can be bound to different rect\u0027s.\n\n3. Check PF_EXITING instead of -\u003esighand. A zombie thread can go away\n but its -\u003esighand can be !NULL.\n\nReported-by: Matt Fleming \u003cmatt@console-pimps.org\u003e\nSigned-off-by: Oleg Nesterov \u003coleg@redhat.com\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "dc0b124d8edc6c2f95fc3a689cd40ec05ad85108", "tree": "1a64b5a0e4761c0fc3fb454d0385be52e69f0970", "parents": [ "ef0aaf873ebadd7576f4fb2085ec4557a9df8bf5" ], "author": { "name": "KOSAKI Motohiro", "email": "kosaki.motohiro@jp.fujitsu.com", "time": "Mon Apr 18 21:18:11 2011 +0900" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:44 2011 -0400" }, "message": "tile: replace mm-\u003ecpu_vm_mask with mm_cpumask()\n\nWe plan to change mm-\u003ecpu_vm_mask definition later. Thus, this patch convert\nit into proper macro.\n\nSigned-off-by: KOSAKI Motohiro \u003ckosaki.motohiro@jp.fujitsu.com\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "ef0aaf873ebadd7576f4fb2085ec4557a9df8bf5", "tree": "5915716fb8aaacb0226b18df9ea49a22258d30e4", "parents": [ "aaeb012fe4700cb808562c2daf7ccc464e7f18cf" ], "author": { "name": "James Hogan", "email": "james.hogan@imgtec.com", "time": "Mon Apr 04 16:21:47 2011 +0100" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:41:36 2011 -0400" }, "message": "tile,mn10300: add device parameter to dma_cache_sync()\n\nSince v2.6.20 \"Pass struct dev pointer to dma_cache_sync()\"\n(d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a\nstruct dev pointer, but these appear to be missing from the tile and\nmn10300 implementations, so add them.\n\nSigned-off-by: James Hogan \u003cjames.hogan@imgtec.com\u003e\n[cmetcalf@tilera.com: took only the \"tile\" portion as I don\u0027t maintain mn10300]\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "28d717411badb78df71ecf087a07b93caf418f59", "tree": "9ad835c19009726acecfa4c114e8a70ca10d5cd0", "parents": [ "dbb434214e34014dc7acb0e7811c37471df26a72" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 16:06:42 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:40:54 2011 -0400" }, "message": "arch/tile: various header improvements for building drivers\n\nThis change adds a number of missing headers in asm (fb.h, parport.h,\nserial.h, and vga.h) using the minimal generic versions.\n\nIt also adds a number of missing interfaces that showed up as build\nfailures when trying to build various drivers not normally included in the\n\"tile\" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(),\nvirt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(),\nand __pmd(). I also added a cast in virt_to_page() since not all callers\npass a pointer.\n\nI fixed \u003casm/stat.h\u003e to properly include a __KERNEL__ guard for the\n__ARCH_WANT_STAT64 symbol, and \u003casm/swab.h\u003e to use __builtin_bswap32()\neven for our 64-bit architecture, since the same code is produced.\n\nI added an export for get_cycles(), since it\u0027s used in some modules.\n\nAnd I made \u003carch/spr_def.h\u003e properly include the __KERNEL__ guard,\neven though it\u0027s not yet exported, since it likely will be soon.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "43d9ebba93b4e775f89efc1eeeed3075a4ab4741", "tree": "2b09b6ccbb1346aa64574cbebfbdc7b3017ef00e", "parents": [ "229f4df1fb84e5d3306b4fc49b41f7847340092d" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 15:51:32 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:40:36 2011 -0400" }, "message": "arch/tile: tolerate disabling CONFIG_BLK_DEV_INITRD\n\nThe code accidentally was relying on this configuration option\nbeing selected.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "229f4df1fb84e5d3306b4fc49b41f7847340092d", "tree": "1e7bbb5c6af2d5a2891910492469df876e2885d6", "parents": [ "7194988fb5add6341b95f4501f6778bf27b4d3de" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 15:35:06 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:40:25 2011 -0400" }, "message": "arch/tile: properly flush the I$ when unloading kernel modules\n\nOtherwise, in principle, there could be stale I$ data present\nnext time the page that previously held the kernel module code was\nused to run some new code.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "df29ccb6c06dcb65867d4fd3c2fa473017f60ecc", "tree": "dd05474f47c908f4167cbcd29f5cd41d66e6eb2f", "parents": [ "398fa5a9319797e43f67b215337afe62e39475ef" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 15:13:13 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:40:07 2011 -0400" }, "message": "arch/tile: allow nonatomic stores to interoperate with fast atomic syscalls\n\nThis semantic was already true for atomic operations within the kernel,\nand this change makes it true for the fast atomic syscalls (__NR_cmpxchg\nand __NR_atomic_update) as well. Previously, user-space had to use\nthe fast atomic syscalls exclusively to update memory, since raw stores\ncould lose a race with the atomic update code even when the atomic update\nhadn\u0027t actually modified the value.\n\nWith this change, we no longer write back the value to memory if it\nhasn\u0027t changed. This allows certain types of idioms in user space to\nwork as expected, e.g. \"atomic exchange\" to acquire a spinlock, followed\nby a raw store of zero to release the lock.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "398fa5a9319797e43f67b215337afe62e39475ef", "tree": "44d966997a6baa6b75a176526d981e3ffb32e471", "parents": [ "313ce674d3cbc2d48ed34a9462427920ac54f4ad" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 15:09:42 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed May 04 14:39:53 2011 -0400" }, "message": "arch/tile: improve support for PCI hotplug\n\nNote that this is not complete hot-plug support; hot-unplug is not included.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "313ce674d3cbc2d48ed34a9462427920ac54f4ad", "tree": "7478150a1268c79851f1a366158c59606330e700", "parents": [ "93013a0f533fb3dd6875ca670d8e0bb4166a796e" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 14:50:06 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 18:53:35 2011 -0400" }, "message": "arch/tile: support TIF_NOTIFY_RESUME\n\nThis support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc.\nThe change is slightly more complex than the minimal thing, since\nI took advantage of having to go into the assembly code to just\nmove a bunch of stuff into C code: specifically, the schedule(),\ndo_async_page_fault(), do_signal(), and single_step_once() support,\nin addition to the TIF_NOTIFY_RESUME support.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "93013a0f533fb3dd6875ca670d8e0bb4166a796e", "tree": "b3967c2853ca9b8a6322d16d70400b10bb25ac53", "parents": [ "8e10cd74342c7f5ce259cceca36f6eba084f5d58" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 13:49:14 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon May 02 13:49:14 2011 -0400" }, "message": "arch/tile: refactor backtracing code\n\nThis change is the result of some work to make the backtrace code more\nshareable between kernel, libc, and gdb.\n\nFor the kernel, some good effects are to eliminate the hacky\n\"VirtualAddress\" typedef in favor of \"unsigned long\", to eliminate a\nbunch of spurious kernel doc comments, to remove the dead \"bt_read_memory\"\nfunction, and to use \"__tilegx__\" in #ifdefs instead of \"TILE_CHIP\".\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "184748cc50b2dceb8287f9fb657eda48ff8fcfe7", "tree": "da32494cf29e5ec9f80b17dc8590bdc450ea545a", "parents": [ "a4c98f8bbeafee12c979c90743f6fda94f7515c7" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Tue Apr 05 17:23:39 2011 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Apr 14 08:52:32 2011 +0200" }, "message": "sched: Provide scheduler_ipi() callback in response to smp_send_reschedule()\n\nFor future rework of try_to_wake_up() we\u0027d like to push part of that\nfunction onto the CPU the task is actually going to run on.\n\nIn order to do so we need a generic callback from the existing scheduler IPI.\n\nThis patch introduces such a generic callback: scheduler_ipi() and\nimplements it as a NOP.\n\nBenH notes: PowerPC might use this IPI on offline CPUs under rare conditions!\n\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Jesper Nilsson \u003cjesper.nilsson@axis.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nReviewed-by: Frank Rowand \u003cfrank.rowand@am.sony.com\u003e\nCc: Mike Galbraith \u003cefault@gmx.de\u003e\nCc: Nick Piggin \u003cnpiggin@kernel.dk\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLink: http://lkml.kernel.org/r/20110405152728.744338123@chello.nl\n" }, { "commit": "25985edcedea6396277003854657b5f3cb31a628", "tree": "f026e810210a2ee7290caeb737c23cb6472b7c38", "parents": [ "6aba74f2791287ec407e0f92487a725a25908067" ], "author": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Wed Mar 30 22:57:33 2011 -0300" }, "committer": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Thu Mar 31 11:26:23 2011 -0300" }, "message": "Fix common misspellings\n\nFixes generated by \u0027codespell\u0027 and manually reviewed.\n\nSigned-off-by: Lucas De Marchi \u003clucas.demarchi@profusion.mobi\u003e\n" }, { "commit": "61a167419b318373d414d0edf109fe02b4f96d49", "tree": "3ce107b97a585e728ee48ea0f2fc046654ef18a7", "parents": [ "1919d641e69eff2d1443e1ca9430f394f2e78699" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 25 14:21:17 2011 +0000" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 25 23:06:34 2011 +0100" }, "message": "tile: Use generic show_interupts()\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nLKML-Reference: \u003c20110325142049.536190130@linutronix.de\u003e\n" }, { "commit": "1919d641e69eff2d1443e1ca9430f394f2e78699", "tree": "9a1e633a9b0ad662cd5d8ada4ead23cf50ced87f", "parents": [ "6a03513825db4db57fa93821a0c04dbbb39a68e6" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 25 14:21:16 2011 +0000" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Fri Mar 25 23:06:33 2011 +0100" }, "message": "tile: Convert to new irq function names\n\nConverted with coccinelle.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nLKML-Reference: \u003c20110325142049.441954268@linutronix.de\u003e\n" }, { "commit": "0415b00d175e0d8945e6785aad21b5f157976ce0", "tree": "cf6f9286a47a22bf57766a3f17eaf4190bc9c242", "parents": [ "6c5103890057b1bb781b26b7aae38d33e4c517d8" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Mar 24 18:50:09 2011 +0100" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Mar 24 18:50:09 2011 +0100" }, "message": "percpu: Always align percpu output section to PAGE_SIZE\n\nPercpu allocator honors alignment request upto PAGE_SIZE and both the\npercpu addresses in the percpu address space and the translated kernel\naddresses should be aligned accordingly. The calculation of the\nformer depends on the alignment of percpu output section in the kernel\nimage.\n\nThe linker script macros PERCPU_VADDR() and PERCPU() are used to\ndefine this output section and the latter takes @align parameter.\nSeveral architectures are using @align smaller than PAGE_SIZE breaking\npercpu memory alignment.\n\nThis patch removes @align parameter from PERCPU(), renames it to\nPERCPU_SECTION() and makes it always align to PAGE_SIZE. While at it,\nadd PCPU_SETUP_BUG_ON() checks such that alignment problems are\nreliably detected and remove percpu alignment comment recently added\nin workqueue.c as the condition would trigger BUG way before reaching\nthere.\n\nFor um, this patch raises the alignment of percpu area. As the area\nis in .init, there shouldn\u0027t be any noticeable difference.\n\nThis problem was discovered by David Howells while debugging boot\nfailure on mn10300.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nAcked-by: Mike Frysinger \u003cvapier@gentoo.org\u003e\nCc: uclinux-dist-devel@blackfin.uclinux.org\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: user-mode-linux-devel@lists.sourceforge.net\n" }, { "commit": "b6a84016bd2598e35ead635147fa53619982648d", "tree": "a73dc0ef4e353723bf123898f0fc143e587c16d8", "parents": [ "504f52b5439aaf26d3e2c1d45ec10fce38c8dd27" ], "author": { "name": "Eric Dumazet", "email": "eric.dumazet@gmail.com", "time": "Tue Mar 22 16:30:42 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 22 17:44:01 2011 -0700" }, "message": "mm: NUMA aware alloc_thread_info_node()\n\nAdd a node parameter to alloc_thread_info(), and change its name to\nalloc_thread_info_node()\n\nThis change is needed to allow NUMA aware kthread_create_on_cpu()\n\nSigned-off-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nReviewed-by: Andi Kleen \u003cak@linux.intel.com\u003e\nAcked-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: \u003clinux-arch@vger.kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "08351fc6a75731226e1112fc7254542bd3a2912e", "tree": "8b25bd168e0663c766f0332c8be082aa7d6ed265", "parents": [ "0df0914d414a504b975f3cc66ace0c16ef55b7f3", "0dccb0489f9a5a13a33e828ab965aa49685d12f8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 17 19:34:12 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 17 19:34:12 2011 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (27 commits)\n arch/tile: support newer binutils assembler shift semantics\n arch/tile: fix deadlock bugs in rwlock implementation\n drivers/edac: provide support for tile architecture\n tile on-chip network driver: sync up with latest fixes\n arch/tile: support 4KB page size as well as 64KB\n arch/tile: add some more VMSPLIT options and use consistent naming\n arch/tile: fix some comments and whitespace\n arch/tile: export some additional module symbols\n arch/tile: enhance existing finv_buffer_remote() routine\n arch/tile: fix two bugs in the backtracer code\n arch/tile: use extended assembly to inline __mb_incoherent()\n arch/tile: use a cleaner technique to enable interrupt for cpu_idle()\n arch/tile: sync up with \u003carch/sim.h\u003e and \u003carch/sim_def.h\u003e changes\n arch/tile: fix reversed test of strict_strtol() return value\n arch/tile: avoid a simulator warning during bootup\n arch/tile: export \u003casm/hardwall.h\u003e to userspace\n arch/tile: warn and retry if an IPI is not accepted by the target cpu\n arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls\n arch/tile: fix __ndelay etc to work better\n arch/tile: bug fix: exec\u0027ed task thought it was still single-stepping\n ...\n\nFix up trivial conflict in arch/tile/kernel/vmlinux.lds.S (percpu\nalignment vs section naming convention fix)\n" }, { "commit": "0dccb0489f9a5a13a33e828ab965aa49685d12f8", "tree": "0d6b96c5071982ee510abfc1cca9787b550270ed", "parents": [ "325d1605542960903c88409b199734a3d8fc6612" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 17 14:32:06 2011 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 17 14:32:06 2011 -0400" }, "message": "arch/tile: support newer binutils assembler shift semantics\n\nThis change supports building the kernel with newer binutils where\na shift of greater than the word size is no longer interpreted\nsilently as modulo the word size, but instead generates a warning.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "76c567fbba50c3da2f4d40e2e551bab26cfd4381", "tree": "6e3c92a266d0ec255e1930adf5ba5268cd71dee9", "parents": [ "09c17eab075ceeafb53935d858c575b6776394d1" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 16:37:34 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 10 13:17:53 2011 -0500" }, "message": "arch/tile: support 4KB page size as well as 64KB\n\nThe Tilera architecture traditionally supports 64KB page sizes\nto improve TLB utilization and improve performance when the\nhardware is being used primarily to run a single application.\n\nFor more generic server scenarios, it can be beneficial to run\nwith 4KB page sizes, so this commit allows that to be specified\n(by modifying the arch/tile/include/hv/pagesize.h header).\n\nAs part of this change, we also re-worked the PTE management\nslightly so that PTE writes all go through a __set_pte() function\nwhere we can do some additional validation. The set_pte_order()\nfunction was eliminated since the \"order\" argument wasn\u0027t being used.\n\nOne bug uncovered was in the PCI DMA code, which wasn\u0027t properly\nflushing the specified range. This was benign with 64KB pages,\nbut with 4KB pages we were getting some larger flushes wrong.\n\nThe per-cpu memory reservation code also needed updating to\nconform with the newer percpu stuff; before it always chose 64KB,\nand that was always correct, but with 4KB granularity we now have\nto pay closer attention and reserve the amount of memory that will\nbe requested when the percpu code starts allocating.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5fb682b0644cd20015d9b0e3ca6921ad5533f4ba", "tree": "0a2520197ebf92b6a27e69241bd4f242d1b39be3", "parents": [ "00dce03134689a257120ae2aa18ba7d1a736bef7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:58:39 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Mar 10 13:14:03 2011 -0500" }, "message": "arch/tile: fix some comments and whitespace\n\nThis is a grab bag of changes with no actual change to generated code.\nThis includes whitespace and comment typos, plus a couple of stale\ncomments being removed.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "3cebbafd28e6f91677f3becffcdf9150b74a4e0c", "tree": "e744b9970878141fea0bd9e6f868cc5b6bae5d31", "parents": [ "6c4d11268819d9c920c7befd8e8e9aad456bb067" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:30:16 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:21:00 2011 -0500" }, "message": "arch/tile: fix two bugs in the backtracer code\n\nThe first is that we were using an incorrect hand-rolled variant\nof __kernel_text_address() which didn\u0027t handle module PCs. We now\njust use the standard API.\n\nThe second was that we weren\u0027t accounting for the three-level\npage table when we were trying to pre-verify the addresses on\nthe 64-bit TILE-Gx processor; we now do that correctly.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "0b989cac90144565b8780ddde36e6a927f8ca7ba", "tree": "5867cd253d019b8e23e9e581482c87551b32accb", "parents": [ "a5c149c8a00b247749d0f18c13b130069dcc36e3" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 15:22:40 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:48 2011 -0500" }, "message": "arch/tile: use a cleaner technique to enable interrupt for cpu_idle()\n\nPreviously we used iret to atomically return to kernel PL with\ninterrupts enabled. However, it turns out that we are architecturally\nguaranteed that we can just set and clear the \"interrupt critical\nsection\" and only interrupt on the following instruction, so we\nnow do that instead, since it\u0027s cleaner.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "bbeee4b2815dd318e9ec9d092d7f79061cc8ba36", "tree": "303698ddc85ff93272bc9ef923f472edeb3f9d0d", "parents": [ "b2ce2bdaf942172914a9a39b26065ff7aacdf962" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:32:14 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:16 2011 -0500" }, "message": "arch/tile: warn and retry if an IPI is not accepted by the target cpu\n\nPreviously we assumed this was impossible, but in fact it can happen.\nHandle it gracefully by retrying after issuing a warning.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "b2ce2bdaf942172914a9a39b26065ff7aacdf962", "tree": "b91ee72c1bd0b4586ebf69ee7889b82c9c5963b3", "parents": [ "13371731487896a6ef158b1cd74297f40a3da4bb" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:24:37 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:10 2011 -0500" }, "message": "arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls\n\nThe problem was that this could lead to IPIs being disabled during\nthe softirq processing after a hypervisor downcall (e.g. for I/O),\nsince both IPI and device interrupts use the INCTRL_1 downcall mechanism.\nWhen this happened at the wrong time, it could lead to deadlock.\n\nLuckily, we were already maintaining the per-interrupt state we need,\nand using it in the proper way in the hypervisor, so all we had to do\nwas to change Linux to stop blocking downcall interrupts for the entire\nlength of the downcall. (Now they\u0027re blocked while we\u0027re executing the\ndowncall routine itself, but not while we\u0027re executing any subsequent\nsoftirq routines.) The hypervisor is doing a very small amount of\nwork it no longer needs to do (masking INTCTRL_1 on entry to the client\ninterrupt routine), but doing so means that older versions of Tile Linux\nwill continue to work with a current hypervisor, so that seems reasonable.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "13371731487896a6ef158b1cd74297f40a3da4bb", "tree": "af09fca3fd8811340b373faaddcdb528f8a07669", "parents": [ "04f7a3f12e10032ee3d44df1a509dbf5b2001fce" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:21:52 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:20:04 2011 -0500" }, "message": "arch/tile: fix __ndelay etc to work better\n\nThe current implementations of __ndelay and __udelay call a hypervisor\nservice to delay, but the hypervisor service isn\u0027t actually implemented\nvery well, and the consensus is that Linux should handle figuring this\nout natively and not use a hypervisor service.\n\nBy converting nanoseconds to cycles, and then spinning until the\ncycle counter reaches the desired cycle, we get several benefits:\nfirst, we are sensitive to the actual clock speed; second, we use\nless power by issuing a slow SPR read once every six cycles while\nwe delay; and third, we properly handle the case of an interrupt by\nexiting at the target time rather than after some number of cycles.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "04f7a3f12e10032ee3d44df1a509dbf5b2001fce", "tree": "2e9281f10f1dffc9fc6b470e823b02bb720ecc4c", "parents": [ "2cb82400719e085a3c226cf7cce8950208f09a06" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Feb 28 13:08:32 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:19:58 2011 -0500" }, "message": "arch/tile: bug fix: exec\u0027ed task thought it was still single-stepping\n\nTo handle single-step, tile mmap\u0027s a page of memory in the process\nspace for each thread and uses it to construct a version of the\ninstruction that we want to single step. If the process exec\u0027s,\nthough, we lose that mapping, and the kernel needs to be aware that\nit will need to recreate it if the exec\u0027ed process than tries to\nsingle-step as well.\n\nAlso correct some int32_t to s32 for better kernel style.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "2cb82400719e085a3c226cf7cce8950208f09a06", "tree": "f37f00fb93625da933d271d4260a3ea4e7ec9f9c", "parents": [ "d356b595e5a95c0c2305ec0a7d1cdb3e26f57716" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sun Feb 27 18:52:24 2011 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Mar 01 16:18:52 2011 -0500" }, "message": "arch/tile: catch up with section naming convention in 2.6.35\n\nThe convention changed to, e.g., \".data..page_aligned\". This commit\nfixes the places in the tile architecture that were still using the\nold convention. One tile-specific section (.init.page) was dropped\nin favor of just using an \"aligned\" attribute.\n\nSam Ravnborg \u003csam@ravnborg.org\u003e pointed out __PAGE_ALIGNED_BSS, etc.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "14536076dfa382a4b302709ffd3041ae10107144", "tree": "5deab8e53f34c317f41105d5932ae764aebe529d", "parents": [ "f5b42c93d891cc9e6528b4e1ab11160ce670e67d" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Sun Feb 06 23:04:42 2011 +0000" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Feb 23 16:07:34 2011 -0500" }, "message": "tile: Use proper accessor functions in show_interrupt()\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "f5b42c93d891cc9e6528b4e1ab11160ce670e67d", "tree": "ce477d7dae703829807e9c8ec339266a146ac149", "parents": [ "342d87ef21cef81b5af973c52bc1ab4e70c8b877" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Sun Feb 06 23:04:40 2011 +0000" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Feb 23 16:07:33 2011 -0500" }, "message": "tile: Convert irq_chip to new functions\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "19df0c2fef010e94e90df514aaf4e73f6b80145c", "tree": "4b0b9c10622aead0d8b658cca6c49090149a91a8", "parents": [ "c723fdab8aa728dc2bf0da6a0de8bb9c3f588d84" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Jan 25 14:26:50 2011 +0100" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Jan 25 14:26:50 2011 +0100" }, "message": "percpu: align percpu readmostly subsection to cacheline\n\nCurrently percpu readmostly subsection may share cachelines with other\npercpu subsections which may result in unnecessary cacheline bounce\nand performance degradation.\n\nThis patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()\nlinker macros, makes each arch linker scripts specify its cacheline\nsize and use it to align percpu subsections.\n\nThis is based on Shaohua\u0027s x86 only patch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Shaohua Li \u003cshaohua.li@intel.com\u003e\n" }, { "commit": "81711cee933599fa114abb0d258d8bbabef8adfb", "tree": "cef17c099689b15b3b8bb29b0eae84acd474ed8a", "parents": [ "bc4cf2bb271b2d557fc510426755da786fc985be" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Dec 14 16:07:25 2010 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Dec 17 16:59:29 2010 -0500" }, "message": "arch/tile: handle rt_sigreturn() more cleanly\n\nThe current tile rt_sigreturn() syscall pattern uses the common idiom\nof loading up pt_regs with all the saved registers from the time of\nthe signal, then anticipating the fact that we will clobber the ABI\n\"return value\" register (r0) as we return from the syscall by setting\nthe rt_sigreturn return value to whatever random value was in the pt_regs\nfor r0.\n\nHowever, this breaks in our 64-bit kernel when running \"compat\" tasks,\nsince we always sign-extend the \"return value\" register to properly\nhandle returned pointers that are in the upper 2GB of the 32-bit compat\naddress space. Doing this to the sigreturn path then causes occasional\nrandom corruption of the 64-bit r0 register.\n\nInstead, we stop doing the crazy \"load the return-value register\"\nhack in sigreturn. We already have some sigreturn-specific assembly\ncode that we use to pass the pt_regs pointer to C code. We extend that\ncode to also set the link register to point to a spot a few instructions\nafter the usual syscall return address so we don\u0027t clobber the saved r0.\nNow it no longer matters what the rt_sigreturn syscall returns, and the\npt_regs structure can be cleanly and completely reloaded.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "bc4cf2bb271b2d557fc510426755da786fc985be", "tree": "25fa4e868d810603da82d1a7c800cf1b0eb0d100", "parents": [ "5111711d3ed8f4f1012cac3ec3f2b463b549fbfd" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Dec 14 15:57:49 2010 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Dec 17 16:56:50 2010 -0500" }, "message": "arch/tile: handle CLONE_SETTLS in copy_thread(), not user space\n\nPreviously we were just setting up the \"tp\" register in the\nnew task as started by clone() in libc. However, this is not\nquite right, since in principle a signal might be delivered to\nthe new task before it had its TLS set up. (Of course, this race\nwindow still exists for resetting the libc getpid() cached value\nin the new task, in principle. But in any case, we are now doing\nthis exactly the way all other architectures do it.)\n\nThis change is important for 2.6.37 since the tile glibc we will\nbe submitting upstream will not set TLS in user space any more,\nso it will only work on a kernel that has this fix. It should\nalso be taken for 2.6.36.x in the stable tree if possible.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: stable \u003cstable@kernel.org\u003e\n" }, { "commit": "c12ae95ccc2dc80b4bd57363240cdb6eab2adcbc", "tree": "af3312bda2b0740278767867dadcf9c6223dc377", "parents": [ "47143b094d4700842e42b0a7cc2548d7ae292690", "3edabee2ed22ee4f98f4b4bb38a41059226a8446" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Nov 25 07:42:32 2010 +0900" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Nov 25 07:42:32 2010 +0900" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n arch/tile: fix memchr() not to dereference memory for zero length\n arch/tile: make glibc\u0027s sysconf(_SC_NPROCESSORS_CONF) work correctly\n arch/tile: fix rwlock so would-be write lockers don\u0027t block new readers\n" }, { "commit": "47143b094d4700842e42b0a7cc2548d7ae292690", "tree": "ab1e7fb7cdedd29c8a9b953e58110ff3870946e4", "parents": [ "0b9466ccea3c4ec363737288dd9467bf978c9c2d", "f02cbbe657939489347cbda598401a56913ffcbd" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Nov 25 07:42:03 2010 +0900" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Nov 25 07:42:03 2010 +0900" }, "message": "Merge branch \u0027drivers\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* \u0027drivers\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n pci root complex: support for tile architecture\n drivers/net/tile/: on-chip network drivers for the tile architecture\n MAINTAINERS: add drivers/char/hvc_tile.c as maintained by tile\n" }, { "commit": "4d658d13c90f14cf3510ca15cafe2f4aa9e23d64", "tree": "77cf85314ed34c6246edd2a1e4fee4277de8169d", "parents": [ "b03a6c4c7d8ebd8118d668eafdb85f5f76b5437f" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Nov 24 13:42:15 2010 -0500" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Nov 24 13:42:15 2010 -0500" }, "message": "arch/tile: make glibc\u0027s sysconf(_SC_NPROCESSORS_CONF) work correctly\n\nglibc assumes that it can count /sys/devices/system/cpu/cpu* to get\nthe number of configured cpus. For this to be valid on tile, we need\nto generate a \"cpu\" entry for all cpus, including the ones that are\nnot currently allocated for Linux\u0027s use.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "f02cbbe657939489347cbda598401a56913ffcbd", "tree": "0d21e68d899958e6549f908b0c715c6f37200027", "parents": [ "e5a06939736277c54a68ae275433db55b99d187c" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Nov 02 12:05:10 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Nov 24 13:13:49 2010 -0500" }, "message": "pci root complex: support for tile architecture\n\nThis change enables PCI root complex support for TILEPro. Unlike\nTILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI\nsupport consists of hypervisor upcalls for PIO, DMA, etc. However,\nthe performance is fine for the devices we have tested with so far\n(1Gb Ethernet, SATA, etc.).\n\nThe \u003casm/io.h\u003e header was tweaked to be a little bit more aggressive\nabout disabling attempts to map/unmap IO port space. The hacky\n\u003casm/pci-bridge.h\u003e header was rolled into the \u003casm/pci.h\u003e header\nand the result was simplified. Both of the latter two headers were\npreliminary versions not meant for release before now - oh well.\n\nThere is one quirk for our TILEmpower platform, which accidentally\nnegotiates up to 5GT and needs to be kicked down to 2.5GT.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "451a3c24b0135bce54542009b5fde43846c7cf67", "tree": "f0fbbcc155aef2a1ffcb8aa593fe7a966d0e6900", "parents": [ "55f6561c6941713ab5ae9180525b026dd40b7d14" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Wed Nov 17 16:26:55 2010 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Nov 17 08:59:32 2010 -0800" }, "message": "BKL: remove extraneous #include \u003csmp_lock.h\u003e\n\nThe big kernel lock has been removed from all these files at some point,\nleaving only the #include.\n\nRemove this too as a cleanup.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "d02db4f8d79c5841ba32b326edb75ea6acd081ca", "tree": "ee753e0f72929c143b16ba4723ff2c1b4eaefade", "parents": [ "2c7387ef9969bb073c25ecbdcc5be30770267b16" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 12:46:10 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:42 2010 -0400" }, "message": "arch/tile: mark \"hardwall\" device as non-seekable\n\nArnd\u0027s recent patch series tagged this device with noop_llseek,\nconservatively. In fact, it should be no_llseek, which we arrange\nfor by opening the device with nonseekable_open().\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "2c7387ef9969bb073c25ecbdcc5be30770267b16", "tree": "21025658ae17a84b0df346b589eb6c986c6f599d", "parents": [ "1deb9c5dfb179819ecdbf80a1d121e26c63caab3" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 28 16:07:07 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:29 2010 -0400" }, "message": "asm-generic/stat.h: support 64-bit file time_t for stat()\n\nThe existing asm-generic/stat.h specifies st_mtime, etc., as a 32-value,\nand works well for 32-bit architectures (currently microblaze, score,\nand 32-bit tile). However, for 64-bit architectures it isn\u0027t sufficient\nto return 32 bits of time_t; this isn\u0027t good insurance against the 2037\nrollover. (It also makes glibc support less convenient, since we can\u0027t\nuse glibc\u0027s handy STAT_IS_KERNEL_STAT mode.)\n\nThis change extends the two \"timespec\" fields for each of the three atime,\nmtime, and ctime fields from \"int\" to \"long\". As a result, on 32-bit\nplatforms nothing changes, and 64-bit platforms will now work as expected.\n\nThe only wrinkle is 32-bit userspace under 64-bit kernels taking advantage\nof COMPAT mode. For these, we leave the \"struct stat64\" definitions with\nthe \"int\" versions of the time_t and nsec fields, so that architectures\ncan implement compat_sys_stat64() and friends with sys_stat64(), etc.,\nand get the expected 32-bit structure layout. This requires a\nfield-by-field copy in the kernel, implemented by the code guarded\nunder __ARCH_WANT_STAT64.\n\nThis does mean that the shape of the \"struct stat\" and \"struct stat64\"\nstructures is different on a 64-bit kernel, but only one of the two\nstructures should ever be used by any given process: \"struct stat\"\nis meant for 64-bit userspace only, and \"struct stat64\" for 32-bit\nuserspace only. (On a 32-bit kernel the two structures continue to have\nthe same shape, since \"long\" is 32 bits.)\n\nThe alternative is keeping the two structures the same shape on 64-bit\nkernels, which means a 64-bit time_t in \"struct stat64\" for 32-bit\nprocesses. This is a little unnatural since 32-bit userspace can\u0027t\ndo anything with 64 bits of time_t information, since time_t is just\n\"long\", not \"int64_t\"; and in any case 32-bit userspace might expect\nto be running under a 32-bit kernel, which can\u0027t provide the high 32\nbits anyway. In the case of a 32-bit kernel we\u0027d then be extending the\nkernel\u0027s 32-bit time_t to 64 bits, then truncating it back to 32 bits\nagain in userspace, for no particular reason. And, as mentioned above,\nif we have 64-bit time_t for 32-bit processes we can\u0027t easily use glibc\u0027s\nSTAT_IS_KERNEL_STAT, since glibc\u0027s stat structure requires an embedded\n\"struct timespec\", which is a pair of \"long\" (32-bit) values in a 32-bit\nuserspace. \"Inventive\" solutions are possible, but are pretty hacky.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "1deb9c5dfb179819ecdbf80a1d121e26c63caab3", "tree": "c6f6ec6030eb22f094a65c07e63312758d079794", "parents": [ "34a89d26bdc4ba46a406fa3842239e921c493d44" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 28 15:47:06 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:17 2010 -0400" }, "message": "arch/tile: don\u0027t allow user code to set the PL via ptrace or signal return\n\nThe kernel was allowing any component of the pt_regs to be updated either\nby signal handlers writing to the stack, or by processes writing via\nPTRACE_POKEUSR or PTRACE_SETREGS, which meant they could set their PL\nup from 0 to 1 and get access to kernel code and data (or, in practice,\ncause a kernel panic). We now always reset the ex1 field, allowing the\nuser to set their ICS bit only.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "34a89d26bdc4ba46a406fa3842239e921c493d44", "tree": "bbfc0dcd4376f6f6337cc199fa785f53243b36cb", "parents": [ "d59e609d6568ba5ab23c256f412ac5ec360722c1" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 28 15:03:30 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:31:04 2010 -0400" }, "message": "arch/tile: correct double syscall restart for nested signals\n\nThis change is modelled on similar fixes for other architectures.\nThe pt_regs \"faultnum\" member is set to the trap (fault) number that\ncaused us to enter the kernel, and is INT_SWINT_1 for the syscall software\ninterrupt. We already supported a pseudo value, INT_SWINT_1_SIGRETURN,\nthat we used for the rt_sigreturn syscall; it avoided the case where\none signal was handled, then we \"tail-called\" to another handler.\n\nThis change avoids the similar case where we start to call one handler,\nthen are preempted into another handler when we start trying to run\nthe first handler. We clear -\u003efaultnum after calling handle_signal(),\nand to be paranoid also in the case where there was no signal to deliver.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "5d966115de84c22cd4df029cb00be0e51fab6c10", "tree": "85095d93900f7f76a7591620651c5480065cacfb", "parents": [ "38a6f4266989c4dae68eccb1a5cb4580a48003e4" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:24:29 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:30:42 2010 -0400" }, "message": "arch/tile: bomb raw_local_irq_ to arch_local_irq_\n\nThis completes the tile migration to the new naming scheme for\nthe architecture-specific irq management code.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "38a6f4266989c4dae68eccb1a5cb4580a48003e4", "tree": "dba1fecb1c0631f4d9b3dfb9f56d11f92d905a4f", "parents": [ "c8ddb2713c624f432fa5fe3c7ecffcdda46ea0d4" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:21:35 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Nov 01 15:30:36 2010 -0400" }, "message": "arch/tile: complete migration to new kmap_atomic scheme\n\nThis change makes KM_TYPE_NR independent of the actual deprecated\nlist of km_type values, which are no longer used in tile code anywhere.\nFor now we leave it set to 8, allowing that many nested mappings,\nand thus reserving 32MB of address space.\n\nA few remaining places using KM_* values were cleaned up as well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "61d8e11e519ee7912ab59610fba1aaf08e3c1d84", "tree": "f06e035c88cbf508eb6e24875b878ee78d581cf8", "parents": [ "c3b92ce9e75f6353104fc7f8e32fb9fdb2550ad0" ], "author": { "name": "Zimny Lech", "email": "napohybelskurwysynom2010@gmail.com", "time": "Wed Oct 27 15:34:53 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 27 18:03:18 2010 -0700" }, "message": "Remove duplicate includes from many files\n\nSigned-off-by: Zimny Lech \u003cnapohybelskurwysynom2010@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "8c0acac3676103113a2e259291a07c073ac07879", "tree": "dd54dbe6d01be0f1afb1f06fc0eff51518fc39a0", "parents": [ "a9384e23ab19eba0dedb861ebcba805b98a3b7a5" ], "author": { "name": "Namhyung Kim", "email": "namhyung@gmail.com", "time": "Wed Oct 27 15:34:04 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 27 18:03:12 2010 -0700" }, "message": "ptrace: cleanup arch_ptrace() on tile\n\nRemove checking @addr less than 0 because @addr is now unsigned.\n\nSigned-off-by: Namhyung Kim \u003cnamhyung@gmail.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "9b05a69e0534ec70bc94921936ffa05b330507cb", "tree": "4116a7b7db286edf9486a29a7742d47fa67baa68", "parents": [ "9fed81dc40f5a1ac2783bcc78d4029873be72894" ], "author": { "name": "Namhyung Kim", "email": "namhyung@gmail.com", "time": "Wed Oct 27 15:33:47 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 27 18:03:10 2010 -0700" }, "message": "ptrace: change signature of arch_ptrace()\n\nFix up the arguments to arch_ptrace() to take account of the fact that\n@addr and @data are now unsigned long rather than long as of a preceding\npatch in this series.\n\nSigned-off-by: Namhyung Kim \u003cnamhyung@gmail.com\u003e\nCc: \u003clinux-arch@vger.kernel.org\u003e\nAcked-by: Roland McGrath \u003croland@redhat.com\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e404f91ed2180dfecbab15dd4d39c543353385fb", "tree": "c256e29b1c738d5e5b5478f19b369b1fd90bd1e2", "parents": [ "18a043f9413277523cf5011e594caa1747db4948", "e18105c128734b1671739ad4d85e216ebec28c61" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Oct 26 17:25:38 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Oct 26 17:25:38 2010 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:\n arch/tile: convert a BUG_ON to BUILD_BUG_ON\n arch/tile: make ptrace() work properly for TILE-Gx COMPAT mode\n arch/tile: support new info op generated by compiler\n arch/tile: minor whitespace/naming changes for string support files\n arch/tile: enable single-step support for TILE-Gx\n arch/tile: parameterize system PLs to support KVM port\n arch/tile: add Tilera\u0027s \u003carch/sim.h\u003e header as an open-source header\n arch/tile: Bomb C99 comments to C89 comments in tile\u0027s \u003carch/sim_def.h\u003e\n arch/tile: prevent corrupt top frame from causing backtracer runaway\n arch/tile: various top-level Makefile cleanups\n arch/tile: change lower bound on syscall error return to -4095\n arch/tile: properly export __mb_incoherent for modules\n arch/tile: provide a definition of MAP_STACK\n kmemleak: add TILE to the list of supported architectures.\n char: hvc: check for error case\n arch/tile: Add a warning if we try to allocate too much vmalloc memory.\n arch/tile: update some comments to clarify register usage.\n arch/tile: use better \"punctuation\" for VMSPLIT_3_5G and friends\n arch/tile: Use \u003casm-generic/syscalls.h\u003e\n tile: replace some BUG_ON checks with BUILD_BUG_ON checks\n" }, { "commit": "092e0e7e520a1fca03e13c9f2d157432a8657ff2", "tree": "451897252c4c08c4b5a8ef535da156f1e817e80b", "parents": [ "79f14b7c56d3b3ba58f8b43d1f70b9b71477a800", "776c163b1b93c8dfa5edba885bc2bfbc2d228a5f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 22 10:52:56 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 22 10:52:56 2010 -0700" }, "message": "Merge branch \u0027llseek\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl\n\n* \u0027llseek\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl:\n vfs: make no_llseek the default\n vfs: don\u0027t use BKL in default_llseek\n llseek: automatically add .llseek fop\n libfs: use generic_file_llseek for simple_attr\n mac80211: disallow seeks in minstrel debug code\n lirc: make chardev nonseekable\n viotape: use noop_llseek\n raw: use explicit llseek file operations\n ibmasmfs: use generic_file_llseek\n spufs: use llseek in all file operations\n arm/omap: use generic_file_llseek in iommu_debug\n lkdtm: use generic_file_llseek in debugfs\n net/wireless: use generic_file_llseek in debugfs\n drm: use noop_llseek\n" }, { "commit": "e18105c128734b1671739ad4d85e216ebec28c61", "tree": "66846afddb58b824b3146a1ea10cbffcb6f2d206", "parents": [ "ce7f2a39675ea5e8e27b3f3bb03e5041c7d10412" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 16:50:26 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Oct 15 15:40:03 2010 -0400" }, "message": "arch/tile: convert a BUG_ON to BUILD_BUG_ON\n\nInspired by Akinobu Mita\u0027s cleanup work.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "ce7f2a39675ea5e8e27b3f3bb03e5041c7d10412", "tree": "5552e14b279cac5acc56c2b9cd3114d8e612a078", "parents": [ "c569cac8b69397d8bc80f95bc6edf13ed902e28b" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 16:48:00 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Oct 15 15:39:44 2010 -0400" }, "message": "arch/tile: make ptrace() work properly for TILE-Gx COMPAT mode\n\nPreviously, we tried to pass 64-bit arguments through the\n\"COMPAT\" mode 32-bit syscall API, which turned out not to work\nwell. Now we just use straight 32-bit arguments in COMPAT mode,\nthus requiring individual registers to be read/written with\ntwo syscalls. Of course this is uncommon, since usually all\nthe registers are read or written at once.\n\nThe restructuring applies to all the tile platforms, but is\nplausibly better than the original code in any case.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "c569cac8b69397d8bc80f95bc6edf13ed902e28b", "tree": "9a51659777f876f401189fe17d35c69430a91797", "parents": [ "29507663dfa2590647a1ef66f3652a0cac033eca" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 16:46:22 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Oct 15 15:39:25 2010 -0400" }, "message": "arch/tile: support new info op generated by compiler\n\nThis just syncs the backtracing support in the kernel to the\nupstream backtrace library.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "233325b94999d4bb8df227bb39904a57509e4995", "tree": "1f195bded03ce5aa483b41531e739a8cc61ce392", "parents": [ "a78c942df64ef4cf495fd4d8715e48501bd7f8a4" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 16:32:41 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Oct 15 15:38:26 2010 -0400" }, "message": "arch/tile: enable single-step support for TILE-Gx\n\nThis is not quite the complete support, since we\u0027re not yet shipping\nintvec_64.S, but it is the support relevant to the set of files we are\ncurrently shipping, and makes it easier to track changes between\nour internal sources and our public GIT repository.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "a78c942df64ef4cf495fd4d8715e48501bd7f8a4", "tree": "fe44212d36e6ca23dbe9f2c633824389216a3d1d", "parents": [ "bf65e440e8248f22b2eacf8d47961bb9d52260f7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 16:23:03 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Oct 15 15:38:09 2010 -0400" }, "message": "arch/tile: parameterize system PLs to support KVM port\n\nWhile not a port to KVM (yet), this change modifies the kernel\nto be able to build either at PL1 or at PL2 with a suitable\nconfig switch. Pushing up this change avoids handling branch\nmerge issues going forward with the KVM work.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "bf65e440e8248f22b2eacf8d47961bb9d52260f7", "tree": "49189dfa1bc90732caedc1e872baed9fb360adf0", "parents": [ "4fe938c5134fce1f25e1261eef6252fb47634962" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 16:00:11 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Oct 15 15:36:54 2010 -0400" }, "message": "arch/tile: add Tilera\u0027s \u003carch/sim.h\u003e header as an open-source header\n\nThis change adds one of the Tilera standard \u003carch\u003e headers to the set\nof headers shipped with Linux. The \u003carch/sim.h\u003e header provides\nmethods for programmatically interacting with the Tilera simulator.\n\nThe current \u003carch/sim.h\u003e provides inline assembly for the _sim_syscall\nfunction, so the declaration and definition previously provided\nmanually in Linux are no longer needed. We now use the standard\nsim_validate_lines_evicted() method from \u003carch/sim.h\u003e rather than\nrolling our own direct call to sim_syscall().\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "6038f373a3dc1f1c26496e60b6c40b164716f07e", "tree": "a0d3bbd026eea41b9fc36b8c722cbaf56cd9f825", "parents": [ "1ec5584e3edf9c4bf2c88c846534d19cf986ba11" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Sun Aug 15 18:52:59 2010 +0200" }, "committer": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Fri Oct 15 15:53:27 2010 +0200" }, "message": "llseek: automatically add .llseek fop\n\nAll file_operations should get a .llseek operation so we can make\nnonseekable_open the default for future file operations without a\n.llseek pointer.\n\nThe three cases that we can automatically detect are no_llseek, seq_lseek\nand default_llseek. For cases where we can we can automatically prove that\nthe file offset is always ignored, we use noop_llseek, which maintains\nthe current behavior of not returning an error from a seek.\n\nNew drivers should normally not use noop_llseek but instead use no_llseek\nand call nonseekable_open at open time. Existing drivers can be converted\nto do the same when the maintainer knows for certain that no user code\nrelies on calling seek on the device file.\n\nThe generated code is often incorrectly indented and right now contains\ncomments that clarify for each added line why a specific variant was\nchosen. In the version that gets submitted upstream, the comments will\nbe gone and I will manually fix the indentation, because there does not\nseem to be a way to do that using coccinelle.\n\nSome amount of new code is currently sitting in linux-next that should get\nthe same modifications, which I will do at the end of the merge window.\n\nMany thanks to Julia Lawall for helping me learn to write a semantic\npatch that does all this.\n\n\u003d\u003d\u003d\u003d\u003d begin semantic patch \u003d\u003d\u003d\u003d\u003d\n// This adds an llseek\u003d method to all file operations,\n// as a preparation for making no_llseek the default.\n//\n// The rules are\n// - use no_llseek explicitly if we do nonseekable_open\n// - use seq_lseek for sequential files\n// - use default_llseek if we know we access f_pos\n// - use noop_llseek if we know we don\u0027t access f_pos,\n// but we still want to allow users to call lseek\n//\n@ open1 exists @\nidentifier nested_open;\n@@\nnested_open(...)\n{\n\u003c+...\nnonseekable_open(...)\n...+\u003e\n}\n\n@ open exists@\nidentifier open_f;\nidentifier i, f;\nidentifier open1.nested_open;\n@@\nint open_f(struct inode *i, struct file *f)\n{\n\u003c+...\n(\nnonseekable_open(...)\n|\nnested_open(...)\n)\n...+\u003e\n}\n\n@ read disable optional_qualifier exists @\nidentifier read_f;\nidentifier f, p, s, off;\ntype ssize_t, size_t, loff_t;\nexpression E;\nidentifier func;\n@@\nssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)\n{\n\u003c+...\n(\n *off \u003d E\n|\n *off +\u003d E\n|\n func(..., off, ...)\n|\n E \u003d *off\n)\n...+\u003e\n}\n\n@ read_no_fpos disable optional_qualifier exists @\nidentifier read_f;\nidentifier f, p, s, off;\ntype ssize_t, size_t, loff_t;\n@@\nssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)\n{\n... when !\u003d off\n}\n\n@ write @\nidentifier write_f;\nidentifier f, p, s, off;\ntype ssize_t, size_t, loff_t;\nexpression E;\nidentifier func;\n@@\nssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)\n{\n\u003c+...\n(\n *off \u003d E\n|\n *off +\u003d E\n|\n func(..., off, ...)\n|\n E \u003d *off\n)\n...+\u003e\n}\n\n@ write_no_fpos @\nidentifier write_f;\nidentifier f, p, s, off;\ntype ssize_t, size_t, loff_t;\n@@\nssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)\n{\n... when !\u003d off\n}\n\n@ fops0 @\nidentifier fops;\n@@\nstruct file_operations fops \u003d {\n ...\n};\n\n@ has_llseek depends on fops0 @\nidentifier fops0.fops;\nidentifier llseek_f;\n@@\nstruct file_operations fops \u003d {\n...\n .llseek \u003d llseek_f,\n...\n};\n\n@ has_read depends on fops0 @\nidentifier fops0.fops;\nidentifier read_f;\n@@\nstruct file_operations fops \u003d {\n...\n .read \u003d read_f,\n...\n};\n\n@ has_write depends on fops0 @\nidentifier fops0.fops;\nidentifier write_f;\n@@\nstruct file_operations fops \u003d {\n...\n .write \u003d write_f,\n...\n};\n\n@ has_open depends on fops0 @\nidentifier fops0.fops;\nidentifier open_f;\n@@\nstruct file_operations fops \u003d {\n...\n .open \u003d open_f,\n...\n};\n\n// use no_llseek if we call nonseekable_open\n////////////////////////////////////////////\n@ nonseekable1 depends on !has_llseek \u0026\u0026 has_open @\nidentifier fops0.fops;\nidentifier nso ~\u003d \"nonseekable_open\";\n@@\nstruct file_operations fops \u003d {\n... .open \u003d nso, ...\n+.llseek \u003d no_llseek, /* nonseekable */\n};\n\n@ nonseekable2 depends on !has_llseek @\nidentifier fops0.fops;\nidentifier open.open_f;\n@@\nstruct file_operations fops \u003d {\n... .open \u003d open_f, ...\n+.llseek \u003d no_llseek, /* open uses nonseekable */\n};\n\n// use seq_lseek for sequential files\n/////////////////////////////////////\n@ seq depends on !has_llseek @\nidentifier fops0.fops;\nidentifier sr ~\u003d \"seq_read\";\n@@\nstruct file_operations fops \u003d {\n... .read \u003d sr, ...\n+.llseek \u003d seq_lseek, /* we have seq_read */\n};\n\n// use default_llseek if there is a readdir\n///////////////////////////////////////////\n@ fops1 depends on !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\nidentifier readdir_e;\n@@\n// any other fop is used that changes pos\nstruct file_operations fops \u003d {\n... .readdir \u003d readdir_e, ...\n+.llseek \u003d default_llseek, /* readdir is present */\n};\n\n// use default_llseek if at least one of read/write touches f_pos\n/////////////////////////////////////////////////////////////////\n@ fops2 depends on !fops1 \u0026\u0026 !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\nidentifier read.read_f;\n@@\n// read fops use offset\nstruct file_operations fops \u003d {\n... .read \u003d read_f, ...\n+.llseek \u003d default_llseek, /* read accesses f_pos */\n};\n\n@ fops3 depends on !fops1 \u0026\u0026 !fops2 \u0026\u0026 !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\nidentifier write.write_f;\n@@\n// write fops use offset\nstruct file_operations fops \u003d {\n... .write \u003d write_f, ...\n+\t.llseek \u003d default_llseek, /* write accesses f_pos */\n};\n\n// Use noop_llseek if neither read nor write accesses f_pos\n///////////////////////////////////////////////////////////\n\n@ fops4 depends on !fops1 \u0026\u0026 !fops2 \u0026\u0026 !fops3 \u0026\u0026 !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\nidentifier read_no_fpos.read_f;\nidentifier write_no_fpos.write_f;\n@@\n// write fops use offset\nstruct file_operations fops \u003d {\n...\n .write \u003d write_f,\n .read \u003d read_f,\n...\n+.llseek \u003d noop_llseek, /* read and write both use no f_pos */\n};\n\n@ depends on has_write \u0026\u0026 !has_read \u0026\u0026 !fops1 \u0026\u0026 !fops2 \u0026\u0026 !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\nidentifier write_no_fpos.write_f;\n@@\nstruct file_operations fops \u003d {\n... .write \u003d write_f, ...\n+.llseek \u003d noop_llseek, /* write uses no f_pos */\n};\n\n@ depends on has_read \u0026\u0026 !has_write \u0026\u0026 !fops1 \u0026\u0026 !fops2 \u0026\u0026 !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\nidentifier read_no_fpos.read_f;\n@@\nstruct file_operations fops \u003d {\n... .read \u003d read_f, ...\n+.llseek \u003d noop_llseek, /* read uses no f_pos */\n};\n\n@ depends on !has_read \u0026\u0026 !has_write \u0026\u0026 !fops1 \u0026\u0026 !fops2 \u0026\u0026 !has_llseek \u0026\u0026 !nonseekable1 \u0026\u0026 !nonseekable2 \u0026\u0026 !seq @\nidentifier fops0.fops;\n@@\nstruct file_operations fops \u003d {\n...\n+.llseek \u003d noop_llseek, /* no read or write fn */\n};\n\u003d\u003d\u003d\u003d\u003d End semantic patch \u003d\u003d\u003d\u003d\u003d\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Julia Lawall \u003cjulia@diku.dk\u003e\nCc: Christoph Hellwig \u003chch@infradead.org\u003e\n" }, { "commit": "dabe98c972091818762e02841ab1f982e573e7d0", "tree": "3770c66ab60cc34225158e87a6532afa5704806c", "parents": [ "45123f7e74e004848da765f3182cd401a38d354d" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 15:19:04 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 15:19:04 2010 -0400" }, "message": "arch/tile: prevent corrupt top frame from causing backtracer runaway\n\nThe backtracer will normally cut itself off after 100 frames anyway,\nbut it\u0027s messy. With this change we notice that the frame being\nreported is the same as the last one, and cut off the dump with a\nmessage similar to what gdb displays in the same circumstance.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "a4dbc5ee52e8741522a2f87067b80116c6c7a934", "tree": "fc746caaac94740c81efb3ac5316fa01ab88cbed", "parents": [ "13c9d5a6309763a494f7c3ed5aa45fb473985fd7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 15:14:29 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 15:14:29 2010 -0400" }, "message": "arch/tile: change lower bound on syscall error return to -4095\n\nPreviously we were using -1023, which is fine for normal syscall\nerror returns, but the common value in use for other platforms\nis -4095, and one Tilera-specific driver does use values in the\n-1100 range, so tickled this bug.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "77d233036ea886398770f208aa22235acf0d011c", "tree": "f3edb38ea286885b65cd1e615fddb796d0799c6a", "parents": [ "d6f0f22c3c409f9ed88e64f881f8308730be76f0" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 14:47:35 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 14:47:35 2010 -0400" }, "message": "arch/tile: Add a warning if we try to allocate too much vmalloc memory.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d6f0f22c3c409f9ed88e64f881f8308730be76f0", "tree": "5521d78679fd3441cecdfe5a273eeca81aee922f", "parents": [ "5592840ba83c281b4df45345863b224bb290020c" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 14:42:58 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 14:42:58 2010 -0400" }, "message": "arch/tile: update some comments to clarify register usage.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d929b6aeaacbe78cbfef4a80e3eed1bf0464d984", "tree": "5f121a845d616a3926768c2fa1b25c4ae417d9c2", "parents": [ "ce0ecc8abfa9904e27a5f3ac4dd83398b134278d" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 14:34:33 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Thu Oct 14 14:34:33 2010 -0400" }, "message": "arch/tile: Use \u003casm-generic/syscalls.h\u003e\n\nWith this change we now include \u003casm-generic/syscalls.h\u003e into the \"tile\"\nversion of the header. To take full advantage of the prototypes there,\nwe also change our naming convention for \"struct pt_regs *\" syscalls so\nthat, e.g., _sys_execve() is the \"true\" syscall entry, which sets the\nappropriate register to point to the pt_regs before calling sys_execve().\n\nWhile doing this I realized I no longer needed the fork and vfork\nentry point stubs, since those functions aren\u0027t in the generic\nsyscall ABI, so I removed them as well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "7c5f13519a67aa7ba3a99155f128d4bdef87d087", "tree": "e4d0537092930a53a85932de83a7861990c58607", "parents": [ "5e62feabcc3e4127a084701ec54ffe891985b7e8", "021989622810b02aab4b24f91e1f5ada2b654579" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Oct 12 16:41:22 2010 +0200" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Oct 12 16:41:26 2010 +0200" }, "message": "Merge branch \u0027x86/urgent\u0027 of into irq/sparseirq\n\nReason: Pull in the latest io_apic bugfixes\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "ea44e06e79a393fb577272399ef7521a143b6b59", "tree": "0bd32a6dd55a82966a51fbb190afa5fadfa2d4c9", "parents": [ "7040dea4d2a0609241c7a98a944b7c432c69db2e" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Sep 24 17:19:20 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Sep 24 17:19:20 2010 -0400" }, "message": "arch/tile: remove dead code from intvec_32.S\n\nThis \"bpt_code\" instruction was killed off in our development line a while\nago (the actual definition of bpt_code that is used is in kernel/traps.c)\nbut I didn\u0027t push it for 2.6.36 because it seemed harmless and I didn\u0027t\nwant to try to push more than absolutely necessary.\n\nHowever, we recently fixed a bug in our gcc that had been causing\n\"-gdwarf2\" not to be passed to the assembler, and passing this flag causes\nan erroneous assembler failure in the presence of code in a data section,\nsometimes. While we\u0027d like to track down the bug in the assembler,\nwe\u0027d also like to make sure 2.6.36 builds with the current toolchain,\nso I\u0027m removing this dead code as well.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d1ea13c6e2cce0106531852daaa93dd97aec9580", "tree": "9a49b1029af4e63e08267d2b4d6e2f66396be0aa", "parents": [ "a800c7cc5380fbb6b4f2f3bd89f6776eb3da2242" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Thu Sep 23 18:40:07 2010 +0200" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Thu Sep 23 19:12:26 2010 +0200" }, "message": "genirq: Cleanup irq_chip-\u003etypename leftovers\n\n3 years transition phase is enough. Cleanup the last users and remove\nthe cruft.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Leo Chen \u003cleochen@broadcom.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Chris Zankel \u003cchris@zankel.net\u003e\n" }, { "commit": "7040dea4d2a0609241c7a98a944b7c432c69db2e", "tree": "dc333496a8cdb0b1a5e96f92995a8c09002d262e", "parents": [ "0fab59e5ddb4e0557825e9ab8e41b66b5f336941" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:17:05 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:17:05 2010 -0400" }, "message": "arch/tile: fix formatting bug in register dumps\n\nThis cut-and-paste bug was caused by rewriting the register dump\ncode to use only a single printk per line of output.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "a802fc685426303ab627b7ad3fd5c97b5dea7e00", "tree": "29a4ae60405318129efc0897f311a6ac4b1328d2", "parents": [ "74fca9da097b74117ae2cef9e5f0d9b0e28ccbb7" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:16:10 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:16:10 2010 -0400" }, "message": "arch/tile: Save and restore extra user state for tilegx\n\nDuring context switch, save and restore a couple of additional bits of\ntilegx user state that can be persistently modified by userspace.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "74fca9da097b74117ae2cef9e5f0d9b0e28ccbb7", "tree": "cbdb9e9b760429016a31e1dca3b115548dbebc0a", "parents": [ "e6e6c46d759cd013cb57eba112a4129a3a353c4b" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:16:08 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:16:08 2010 -0400" }, "message": "arch/tile: Change struct sigcontext to be more useful\n\nRather than just using pt_regs, it now contains the actual saved\nstate explicitly, similar to pt_regs. By doing it this way, we\nprovide a cleaner API for userspace (or equivalently, we avoid the\nneed for libc to provide its own definition of sigcontext).\n\nWhile we\u0027re at it, move PT_FLAGS_xxx to where they are not visible\nfrom userspace. And always pass siginfo and mcontext to signal\nhandlers, even if they claim they don\u0027t need it, since sometimes\nthey actually try to use it anyway in practice.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "e6e6c46d759cd013cb57eba112a4129a3a353c4b", "tree": "12dbe6085c713832d0df037efc709e2b0b08ad2b", "parents": [ "49553c2ef88749dd502687f4eb9c258bb10a4f44" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:16:05 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Wed Sep 15 11:16:05 2010 -0400" }, "message": "arch/tile: finish const-ifying sys_execve()\n\nThe sys_execve() implementation was properly const-ified but not\nthe declaration, the syscall wrappers, or the compat version.\nThis change completes the constification process.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "d7627467b7a8dd6944885290a03a07ceb28c10eb", "tree": "a18c83468418e878cfb2d44e4310d81b8db84ad7", "parents": [ "da5cabf80e2433131bf0ed8993abc0f7ea618c73" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Tue Aug 17 23:52:56 2010 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Aug 17 18:07:43 2010 -0700" }, "message": "Make do_execve() take a const filename pointer\n\nMake do_execve() take a const filename pointer so that kernel_execve() compiles\ncorrectly on ARM:\n\narch/arm/kernel/sys_arm.c:88: warning: passing argument 1 of \u0027do_execve\u0027 discards qualifiers from pointer target type\n\nThis also requires the argv and envp arguments to be consted twice, once for\nthe pointer array and once for the strings the array points to. This is\nbecause do_execve() passes a pointer to the filename (now const) to\ncopy_strings_kernel(). A simpler alternative would be to cast the filename\npointer in do_execve() when it\u0027s passed to copy_strings_kernel().\n\ndo_execve() may not change any of the strings it is passed as part of the argv\nor envp lists as they are some of them in .rodata, so marking these strings as\nconst should be fine.\n\nFurther kernel_execve() and sys_execve() need to be changed to match.\n\nThis has been test built on x86_64, frv, arm and mips.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nTested-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "ba00376b0b13f234d839541a7b36a5bf5c2a4036", "tree": "9f74c7d7933d969484859365f055b5a77cfc4fd1", "parents": [ "c745a8a11fa1df6078bfc61fc29492ed43f71c2b" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 16:37:00 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 16:37:00 2010 -0400" }, "message": "arch/tile: extend syscall ABI to set r1 on return as well.\n\nUntil now, the tile architecture ABI for syscall return has just been\nthat r0 holds the return value, and an error is only signalled like it is\nfor kernel code, with a negative small number.\n\nHowever, this means that in multiple places in userspace we end up writing\nthe same three-cycle idiom that tests for a small negative number for\nerror. It seems cleaner to instead move that code into the kernel, and\nset r1 to hold zero on success or errno on failure; previously, r1 was\njust zeroed on return from the kernel (to avoid leaking kernel state).\nThis way a single conditional branch after the syscall is sufficient\nto test for the failure case. The number of cycles taken is the same,\nbut the error-checking code is in just one place, so total code size is\nsmaller, and random userspace syscall code is easier to understand.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "1fcbe027b5d29ec9cd0eeb753c14fb366ae852ac", "tree": "b0d80646567ac71238cf2ffb33e29ad33d758816", "parents": [ "32020effaf713c0c669864301bcd5dac6b9bb9e0" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:40:57 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:40:57 2010 -0400" }, "message": "arch/tile: support backtracing on TILE-Gx\n\nThis functionality was stubbed out until recently. Now we support our\nnormal backtracing API on TILE-Gx as well as on TILE64/TILEPro.\nThis change includes a tweak to the instruction encoding caused by\nadding addxli for compat mode.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "32020effaf713c0c669864301bcd5dac6b9bb9e0", "tree": "86bca127e785fe2170bfec548ebc6be549a842b8", "parents": [ "749dc6f252b57d5cb9c1f4c1c4aafe4c92a28207" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:32:21 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:32:21 2010 -0400" }, "message": "arch/tile: Fix a couple of issues with the COMPAT code for TILE-Gx.\n\nFirst, the siginfo preamble wasn\u0027t quite right; we need to indicate\nthat we are padding up to 4 ints of preamble for 64-bit code, and\nthen for compat mode we need to pad differently, using only 3 ints.\n\nSecond, the C ABI requires a save area of two registers, not two\npointers, since in compat mode we have 64-bit registers all of which\nwe need to save, even though we only have 32-bit VAs.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "749dc6f252b57d5cb9c1f4c1c4aafe4c92a28207", "tree": "1728f62b00935ecf9ac16bd9e3871f9d0e7ad75c", "parents": [ "bc63de7c5bcc44b0098d09931f69a19e93d8a7ba" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:24:22 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:24:22 2010 -0400" }, "message": "arch/tile: Use separate, better minsec values for clocksource and sched_clock.\n\nWe were using the same 5-sec minsec for the clocksource and sched_clock\nthat we were using for the clock_event_device. For the clock_event_device\nthat\u0027s exactly right since it has a short maximum countdown time.\nBut for sched_clock we want to avoid wraparound when converting from\nticks to nsec over a much longer window, so we force a shift of 10.\nAnd for clocksource it seems dodgy to use a 5-sec minsec as well, so we\ncopy some other platforms and force a shift of 22.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "bc63de7c5bcc44b0098d09931f69a19e93d8a7ba", "tree": "7763679472e08b56a403bbcb9dffbc4b53620dcc", "parents": [ "c45c1cd7bf4e997c74407dd29268d41d7adbb257" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:23:07 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:23:07 2010 -0400" }, "message": "arch/tile: correct a bug in freeing bootmem by VA for the optional second initrd.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "a6fb72f1e9e9f1905746646fd1e40932336291da", "tree": "883428344ac594e4ca9f2e55d33ff0dc0348fb4c", "parents": [ "fad9e93e5490e1f2c54f5e7c8418952bc55200a1" ], "author": { "name": "Andrea Gelmini", "email": "andrea.gelmini@gelma.net", "time": "Wed Aug 11 21:07:34 2010 +0200" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Aug 13 08:10:16 2010 -0400" }, "message": "arch: tile: kernel/proc.c Removed duplicated #include\n\nSigned-off-by: Andrea Gelmini \u003candrea.gelmini@gelma.net\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "1c689cbcf2c2b7a35cd237abddd9206bb1b6fee1", "tree": "c8c8cf60bf54e6e0c57488fcdc7f86e9e3aacd6c", "parents": [ "a2262d8a231e92742651859a10c9a4430a5e899a" ], "author": { "name": "Kulikov Vasiliy", "email": "segooon@gmail.com", "time": "Fri Jul 16 20:13:02 2010 +0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jul 16 13:37:14 2010 -0400" }, "message": "arch/tile: check kmalloc() result\n\nIf kmalloc() fails exit with -ENOMEM.\n\nSigned-off-by: Kulikov Vasiliy \u003csegooon@gmail.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "bcd97c3f9a385e8e658a416cd72dd65ca0eeb544", "tree": "2398b89fa6edee2a81c99efd5c4e53feb18dceac", "parents": [ "c6673cb54d191dd42935a61fcb0c452a4753fb23" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jul 02 14:17:52 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Jul 06 13:42:10 2010 -0400" }, "message": "arch/tile: avoid erroneous error return for PTRACE_POKEUSR.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "0707ad30d10110aebc01a5a64fb63f4b32d20b73", "tree": "64d8ba73e605ac26e56808d1d77701b3f83cf8b2", "parents": [ "c78095bd8c77fca2619769ff8efb639fd100e373" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 25 17:04:17 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Jul 06 13:41:51 2010 -0400" }, "message": "arch/tile: Miscellaneous cleanup changes.\n\nThis commit is primarily changes caused by reviewing \"sparse\"\nand \"checkpatch\" output on our sources, so is somewhat noisy, since\nthings like \"printk() -\u003e pr_err()\" (or whatever) throughout the\ncodebase tend to get tedious to read. Rather than trying to tease\napart precisely which things changed due to which type of code\nreview, this commit includes various cleanups in the code:\n\n- sparse: Add declarations in headers for globals.\n- sparse: Fix __user annotations.\n- sparse: Using gfp_t consistently instead of int.\n- sparse: removing functions not actually used.\n- checkpatch: Clean up printk() warnings by using pr_info(), etc.;\n also avoid partial-line printks except in bootup code.\n - checkpatch: Use exposed structs rather than typedefs.\n - checkpatch: Change some C99 comments to C89 comments.\n\nIn addition, a couple of minor other changes are rolled in\nto this commit:\n\n- Add support for a \"raise\" instruction to cause SIGFPE, etc., to be raised.\n- Remove some compat code that is unnecessary when we fully eliminate\n some of the deprecated syscalls from the generic syscall ABI.\n- Update the tile_defconfig to reflect current config contents.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "863fbac67138882b99fc60fcb0ec568bbad9a44f", "tree": "1457799a6258d9502111f1da45f55b917ace56db", "parents": [ "9f9c0382cda2334b35b40b00f4ed9d6f89f37a7b" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 25 17:02:05 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Jul 06 13:40:56 2010 -0400" }, "message": "arch/tile: Shrink the tile-opcode files considerably.\n\nThe C file (tile-desc_{32,64}.c) was about 300KB before this change,\nand is now shrunk down to 100K. The original file included support\nfor BFD in the binutils toolchain, which is not necessary in the\nkernel; the kernel version only needs to include enough support to\nenable the single-stepper and backtracer.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "9f9c0382cda2334b35b40b00f4ed9d6f89f37a7b", "tree": "8d862fd0883343e8788f86b8f7d37823db0e19a5", "parents": [ "fb702b942bf638baa6cbbbda9f76794db62921ef" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 25 17:00:56 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Jul 06 13:34:15 2010 -0400" }, "message": "arch/tile: Add driver to enable access to the user dynamic network.\n\nThis network (the \"UDN\") connects all the cpus on the chip in a\nwormhole-routed dynamic network. Subrectangles of the chip can\nbe allocated by a \"create\" ioctl on /dev/hardwall, and then to access the\nUDN in that rectangle, tasks must perform an \"activate\" ioctl on that\nsame file object after affinitizing themselves to a single cpu in\nthe region. Sending a wormhole-routed message that tries to leave\nthat subrectangle causes all activated tasks to receive a SIGILL\n(just as they would if they tried to access the UDN without first\nactivating themselves to a hardwall rectangle).\n\nThe original submission of this code to LKML had the driver\ninstantiated under /proc/tile/hardwall. Now we just use a character\ndevice for this, conventionally /dev/hardwall. Some futures planning\nfor the TILE-Gx chip suggests that we may want to have other types of\ndevices that share the general model of \"bind a task to a cpu, then\n\u0027activate\u0027 a file descriptor on a pseudo-device that gives access to\nsome hardware resource\". As such, we are using a device rather\nthan, for example, a syscall, to set up and activate this code.\n\nAs part of this change, the compat_ptr() declaration was fixed and used\nto pass the compat_ioctl argument to the normal ioctl. So far we limit\ncompat code to 2GB, so the difference between zero-extend and sign-extend\n(the latter being correct, eventually) had been overlooked.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "fb702b942bf638baa6cbbbda9f76794db62921ef", "tree": "c065b0ab61cbb80b6209c725836a6864624b3c46", "parents": [ "de5d9bf6541736dc7ad264d2b5cc99bc1b2ad958" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 25 16:41:11 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Tue Jul 06 13:34:01 2010 -0400" }, "message": "arch/tile: Enable more sophisticated IRQ model for 32-bit chips.\n\nThis model is based on the on-chip interrupt model used by the\nTILE-Gx next-generation hardware, and interacts much more cleanly\nwith the Linux generic IRQ layer.\n\nThe change includes modifications to the Tilera hypervisor, which\nare reflected in the hypervisor headers in arch/tile/include/arch/.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "139ef32b0e6b88b00b5e3e74d052d938f178dc9b", "tree": "0d3af3832ada74f2dae87de971bbd46fcbabf106", "parents": [ "cc44826a26b12b2489bc7dbb597fcdf107f2cc01" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Jun 07 08:48:13 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Mon Jun 07 09:29:59 2010 -0400" }, "message": "Revert adding some arch-specific signal syscalls to \u003clinux/syscalls.h\u003e.\n\nIt turns out there is some variance on the calling conventions for\nthese syscalls, and \u003casm-generic/syscalls.h\u003e is already the mechanism\nused to handle this. Switch arch/tile over to using that mechanism and\ntweak the calling conventions for a couple of tile syscalls to match\n\u003casm-generic/syscalls.h\u003e.\n\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "482e6f8466ab1066f1a969bcdbe916b56439622c", "tree": "52848e31bfc699437430d586b68e732250cbaf03", "parents": [ "867e359b97c970a60626d5d76bbe2a8fadbf38fb" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sat Jun 05 09:05:47 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Sat Jun 05 10:26:55 2010 -0400" }, "message": "arch/tile: Do not use GFP_KERNEL for dma_alloc_coherent().\nFeedback from fujita.tomonori@lab.ntt.co.jp.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\n" }, { "commit": "867e359b97c970a60626d5d76bbe2a8fadbf38fb", "tree": "c5ccbb7f5172e8555977119608ecb1eee3cc37e3", "parents": [ "5360bd776f73d0a7da571d72a09a03f237e99900" ], "author": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri May 28 23:09:12 2010 -0400" }, "committer": { "name": "Chris Metcalf", "email": "cmetcalf@tilera.com", "time": "Fri Jun 04 17:11:18 2010 -0400" }, "message": "arch/tile: core support for Tilera 32-bit chips.\n\nThis change is the core kernel support for TILEPro and TILE64 chips.\nNo driver support (except the console driver) is included yet.\n\nThis includes the relevant Linux headers in asm/; the low-level\nlow-level \"Tile architecture\" headers in arch/, which are\nshared with the hypervisor, etc., and are build-system agnostic;\nand the relevant hypervisor headers in hv/.\n\nSigned-off-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nAcked-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nReviewed-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" } ] }