)]}'
{
  "log": [
    {
      "commit": "0918472ceeffad234df5589e45b646a94476f835",
      "tree": "3afd05b7710a56056cdf8273545990949dd553fa",
      "parents": [
        "0aba496fc820d7c36775f2fd0ef81994e1af67a8"
      ],
      "author": {
        "name": "Huang Ying",
        "email": "ying.huang@intel.com",
        "time": "Tue May 17 16:08:37 2011 +0800"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Fri Jul 22 08:25:37 2011 -0700"
      },
      "message": "PCI: PCIe AER: add aer_recover_queue\n\nIn addition to native PCIe AER, now APEI (ACPI Platform Error\nInterface) GHES (Generic Hardware Error Source) can be used to report\nPCIe AER errors too.  To add support to APEI GHES PCIe AER recovery,\naer_recover_queue is added to export the recovery function in native\nPCIe AER driver.\n\nRecoverable PCIe AER errors are reported via NMI in APEI GHES.  Then\nAPEI GHES uses irq_work to delay the error processing into an IRQ\nhandler.  But PCIe AER recovery can be very time-consuming, so\naer_recover_queue, which can be used in IRQ handler, delays the real\nrecovery action into the process context, that is, work queue.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "c413d7682020a127f54744a1b30f597692aea1fd",
      "tree": "b495af23b2f81b6ab0080925aa988ea9a8068e4e",
      "parents": [
        "b64a44146540a4761bb1cf8047fffd9dbf0c3090"
      ],
      "author": {
        "name": "Huang Ying",
        "email": "ying.huang@intel.com",
        "time": "Mon Feb 21 13:54:43 2011 +0800"
      },
      "committer": {
        "name": "Len Brown",
        "email": "len.brown@intel.com",
        "time": "Mon Mar 21 22:59:08 2011 -0400"
      },
      "message": "ACPI, APEI, Add PCIe AER error information printing support\n\nThe AER error information printing support is implemented in\ndrivers/pci/pcie/aer/aer_print.c.  So some string constants, functions\nand macros definitions can be re-used without being exported.\n\nThe original PCIe AER error information printing function is not\nre-used directly because the overall format is quite different.  And\nchanging the original printing format may make some original users\u0027\nscripts broken.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nCC: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCC: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n"
    },
    {
      "commit": "270c66be9b4a6f2be53ef3aec5dc8e7b07782ec9",
      "tree": "241fa7549d1b4500325130e3f632b6ac7a19f0b3",
      "parents": [
        "0927678f55c9a50c296f7e6dae85e87b8236e155"
      ],
      "author": {
        "name": "Yu Zhao",
        "email": "yu.zhao@intel.com",
        "time": "Sun Oct 19 20:35:20 2008 +0800"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Mon Oct 20 11:01:52 2008 -0700"
      },
      "message": "PCI: fix AER capability check\n\nThe \u0027use pci_find_ext_capability everywhere\u0027 cleanup brought a new bug,\nwhich makes the AER stop working.  Fix it by actually using find_ext_cap\ninstead of just find_cap.  Drop the unused config space size define while\nwe\u0027re at it.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "0927678f55c9a50c296f7e6dae85e87b8236e155",
      "tree": "480bec05ca6b31329eac8533243e1295749d3e46",
      "parents": [
        "1543c90c39360df333a21bfbbdfe812ae23b8167"
      ],
      "author": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Sat Oct 18 17:33:19 2008 -0700"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Mon Oct 20 11:01:51 2008 -0700"
      },
      "message": "PCI: use pci_find_ext_capability everywhere\n\nRemove some open coded (and buggy) versions of pci_find_ext_capability\nin favor of the real routine in the PCI core.\n\nTested-by: Tomasz Czernecki \u003cczernecki@gmail.com\u003e\nAcked-by: Andrew Vasquez \u003candrew.vasquez@qlogic.com\u003e\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "21c6847406784fde73ad5ea47c2c3434714d58d1",
      "tree": "9098d9b7dc15a44c4c367c7d51e5536d5ab0925e",
      "parents": [
        "4c44bac8645e0ce0249c53cc154f56b5543af232"
      ],
      "author": {
        "name": "Adrian Bunk",
        "email": "bunk@kernel.org",
        "time": "Mon Feb 04 23:50:11 2008 -0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Sun Apr 20 21:47:02 2008 -0700"
      },
      "message": "PCI: #if 0 pci_cleanup_aer_correct_error_status()\n\n#if 0 the no longer used pci_cleanup_aer_correct_error_status().\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nCc: Stephen Hemminger \u003cshemminger@linux-foundation.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    },
    {
      "commit": "5547bbeed37f7ab64942ffcce9293681101577ef",
      "tree": "cf2701536824634564e4a27329f9396e1248e321",
      "parents": [
        "0d4cbb5e7f60b2f1a4d8b7f6ea4cc264262c7a01"
      ],
      "author": {
        "name": "Randy Dunlap",
        "email": "randy.dunlap@oracle.com",
        "time": "Thu Aug 23 10:37:53 2007 -0700"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Tue Sep 11 04:22:16 2007 -0700"
      },
      "message": "PCI AER: fix warnings when PCIEAER\u003dn\n\nFix warnings when CONFIG_PCIEAER\u003dn:\n\ndrivers/pci/pcie/portdrv_pci.c:105: warning: statement with no effect\ndrivers/pci/pcie/portdrv_pci.c:226: warning: statement with no effect\ndrivers/scsi/arcmsr/arcmsr_hba.c:352: warning: statement with no effect\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nAcked-by: Linas Vepstas \u003clinas@austin.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    },
    {
      "commit": "f0dce411930d16a678173e534594bca160f5eaff",
      "tree": "52d7c4d6d4e374ac3b808f4f7a9b0ba7be729234",
      "parents": [
        "65b3bc358a3195ebe459761a248cf33a61539947"
      ],
      "author": {
        "name": "Stephen Hemminger",
        "email": "shemminger@linux-foundation.org",
        "time": "Wed Jun 06 11:50:34 2007 +0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Wed Jul 11 16:02:08 2007 -0700"
      },
      "message": "PCI aer: add pci_cleanup_aer_correct_aer_status\n\nFunction to clear bogus correctable errors. Analog to pci_aer_uncorrect_are_status.\nThe Marvell chips seem to start out with a bogus value that needs to be\ncleared.\n\nYanmin ported it to 2.6.22-rc4 by fixing a fuzz patch applying info.\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@linux-foundation.org\u003e\nAcked-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    },
    {
      "commit": "65b3bc358a3195ebe459761a248cf33a61539947",
      "tree": "1d0a19af0319393a1517a6e3f6922a3be2caecd0",
      "parents": [
        "8d29bfb79e632fe318f4c01c9c2e8faacb89b800"
      ],
      "author": {
        "name": "Stephen Hemminger",
        "email": "shemminger@linux-foundation.org",
        "time": "Wed Jun 06 11:46:49 2007 +0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Wed Jul 11 16:02:08 2007 -0700"
      },
      "message": "PCI aer: fix stub return values\n\nThe stubs used when advanced error reporting is not enabled\nmust have same return type as real functions.\n\nSigned-off-by: Stephen Hemminger \u003cshemminger@linux-foundation.org\u003e\nAcked-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n"
    },
    {
      "commit": "6c2b374d74857e892080ee726184ec1d15e7d4e4",
      "tree": "c107532c288bcede80e45ebc3e46292bfaf0cea2",
      "parents": [
        "48408157ebf5b2c6dc1e04ba5d258012f6a7f356"
      ],
      "author": {
        "name": "Zhang, Yanmin",
        "email": "yanmin.zhang@intel.com",
        "time": "Mon Jul 31 15:21:33 2006 +0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Tue Sep 26 17:43:53 2006 -0700"
      },
      "message": "PCI-Express AER implemetation: AER core and aerdriver\n\nPatch 3 implements the core part of PCI-Express AER and aerdrv\nport service driver.\n\nWhen a root port service device is probed, the aerdrv will call\nrequest_irq to register irq handler for AER error interrupt.\n\nWhen a device sends an PCI-Express error message to the root port,\nthe root port will trigger an interrupt, by either MSI or IO-APIC,\nthen kernel would run the irq handler. The handler collects root\nerror status register and schedules a work. The work will call\nthe core part to process the error based on its type\n(Correctable/non-fatal/fatal).\n\nAs for Correctable errors, the patch chooses to just clear the correctable\nerror status register of the device.\n\nAs for the non-fatal error, the patch follows generic PCI error handler\nrules to call the error callback functions of the endpoint\u0027s driver. If\nthe device is a bridge, the patch chooses to broadcast the error to\ndownstream devices.\n\nAs for the fatal error, the patch resets the pci-express link and\nfollows generic PCI error handler rules to call the error callback\nfunctions of the endpoint\u0027s driver. If the device is a bridge, the patch\nchooses to broadcast the error to downstream devices.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    }
  ]
}