)]}' { "log": [ { "commit": "a93cb055a23f3172c1e6a22ac1dc4f1c07929b08", "tree": "b2118140583912c78d42a3ba950be39815addc14", "parents": [ "d6d861e3c963b4077c83e078e3e300c4b81f93e7" ], "author": { "name": "Zachary Amsden", "email": "zach@vmware.com", "time": "Sat Sep 30 23:29:37 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 01 00:39:34 2006 -0700" }, "message": "[PATCH] paravirt: remove set pte atomic\n\nNow that ptep_establish has a definition in PAE i386 3-level paging code, the\nonly paging model which is insane enough to have multi-word hardware PTEs\nwhich are not efficient to set atomically, we can remove the ghost of\nset_pte_atomic from other architectures which falesly duplicated it, and\nremove all knowledge of it from the generic pgtable code.\n\nset_pte_atomic is now a private pte operator which is specific to i386\n\nSigned-off-by: Zachary Amsden \u003czach@vmware.com\u003e\nCc: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: Jeremy Fitzhardinge \u003cjeremy@xensource.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "6606c3e0da5360799e07ae24b05080cc85c68e72", "tree": "5072acfc3b36e48ec84fe28805d160cbc9b28900", "parents": [ "9888a1cae3f859db38b9604e3df1c02177161bb0" ], "author": { "name": "Zachary Amsden", "email": "zach@vmware.com", "time": "Sat Sep 30 23:29:33 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 01 00:39:33 2006 -0700" }, "message": "[PATCH] paravirt: lazy mmu mode hooks.patch\n\nImplement lazy MMU update hooks which are SMP safe for both direct and shadow\npage tables. The idea is that PTE updates and page invalidations while in\nlazy mode can be batched into a single hypercall. We use this in VMI for\nshadow page table synchronization, and it is a win. It also can be used by\nPPC and for direct page tables on Xen.\n\nFor SMP, the enter / leave must happen under protection of the page table\nlocks for page tables which are being modified. This is because otherwise,\nyou end up with stale state in the batched hypercall, which other CPUs can\nrace ahead of. Doing this under the protection of the locks guarantees the\nsynchronization is correct, and also means that spurious faults which are\ngenerated during this window by remote CPUs are properly handled, as the page\nfault handler must re-check the PTE under protection of the same lock.\n\nSigned-off-by: Zachary Amsden \u003czach@vmware.com\u003e\nSigned-off-by: Jeremy Fitzhardinge \u003cjeremy@xensource.com\u003e\nCc: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9888a1cae3f859db38b9604e3df1c02177161bb0", "tree": "5954dc5e1a2dc1251a57a41aa15b7776a530f230", "parents": [ "3dc907951446b9317b1887223caa4e083390de9f" ], "author": { "name": "Zachary Amsden", "email": "zach@vmware.com", "time": "Sat Sep 30 23:29:31 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Oct 01 00:39:33 2006 -0700" }, "message": "[PATCH] paravirt: pte clear not present\n\nChange pte_clear_full to a more appropriately named pte_clear_not_present,\nallowing optimizations when not-present mapping changes need not be reflected\nin the hardware TLB for protected page table modes. There is also another\ncase that can use it in the fremap code.\n\nSigned-off-by: Zachary Amsden \u003czach@vmware.com\u003e\nSigned-off-by: Jeremy Fitzhardinge \u003cjeremy@xensource.com\u003e\nCc: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "673eae8230a192f07b8715b872d6925521e9738d", "tree": "2917c765594015ebfad00bb4fc1feef41286ca1a", "parents": [ "753b9f86e7aef76c2beda32668ce528f90cb1733" ], "author": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Mon Sep 25 23:32:29 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Sep 26 08:48:56 2006 -0700" }, "message": "[PATCH] x86: trivial pgtable.h __ASSEMBLY__ move\n\nParsing generic pgtable.h in assembler is simply crazy. None of this file is\nneeded in assembler code, and C inline functions and structures routine break\none or more different compiles.\n\nSigned-off-by: Zachary Amsden \u003czach@vmware.com\u003e\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0b0968a3e691771bf87e1ce747b2c7d23b5526c8", "tree": "71787e376b7aef54b48e99d15a0fc11c7cf7ee8d", "parents": [ "951bc82c53f30ec6b4c2d04a051e74ea9a89b669" ], "author": { "name": "David S. Miller", "email": "davem@sunset.sfo1.dsl.speakeasy.net", "time": "Thu Jun 01 17:47:25 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.sfo1.dsl.speakeasy.net", "time": "Thu Jun 01 17:47:25 2006 -0700" }, "message": "[SPARC64]: Fix D-cache corruption in mremap\n\nIf we move a mapping from one virtual address to another,\nand this changes the virtual color of the mapping to those\npages, we can see corrupt data due to D-cache aliasing.\n\nCheck for and deal with this by overriding the move_pte()\nmacro. Set things up so that other platforms can cleanly\noverride the move_pte() macro too.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "8c65b4a60450590e79a28e9717ceffa9e4debb3f", "tree": "e0e42b5faee0a1c44746a36d9df7a8fbb2a2c24c", "parents": [ "6fdcc2162285a8fc96ab12ff85086c37bceaa494" ], "author": { "name": "Tim Schmielau", "email": "tim@physik3.uni-rostock.de", "time": "Mon Nov 07 00:59:43 2005 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Nov 07 07:53:41 2005 -0800" }, "message": "[PATCH] fix remaining missing includes\n\nFix more include file problems that surfaced since I submitted the previous\nfix-missing-includes.patch. This should now allow not to include sched.h\nfrom module.h, which is done by a followup patch.\n\nSigned-off-by: Tim Schmielau \u003ctim@physik3.uni-rostock.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b8072f099b7829a6ff3eba618e1d079a81f753f8", "tree": "80bf801b68ecf5f29a61f0f4fd5976b4daa91c6a", "parents": [ "f412ac08c9861b4791af0145934c22f1458686da" ], "author": { "name": "Hugh Dickins", "email": "hugh@veritas.com", "time": "Sat Oct 29 18:16:41 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Oct 29 21:40:42 2005 -0700" }, "message": "[PATCH] mm: update comments to pte lock\n\nUpdated several references to page_table_lock in common code comments.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8b1f3124618b54cf125dea3a074b9cf469117723", "tree": "19ef8a7fe9cc5b1c46dc973ea151edab4aba2b8a", "parents": [ "95001ee9256df846e374f116c92ca8e0beec1527" ], "author": { "name": "Nick Piggin", "email": "nickpiggin@yahoo.com.au", "time": "Tue Sep 27 21:45:18 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Sep 28 07:46:40 2005 -0700" }, "message": "[PATCH] mm: move_pte to remap ZERO_PAGE\n\nMove the ZERO_PAGE remapping complexity to the move_pte macro in\nasm-generic, have it conditionally depend on\n__HAVE_ARCH_MULTIPLE_ZERO_PAGE, which gets defined for MIPS.\n\nFor architectures without __HAVE_ARCH_MULTIPLE_ZERO_PAGE, move_pte becomes\na noop.\n\nFrom: Hugh Dickins \u003chugh@veritas.com\u003e\n\nFix nasty little bug we\u0027ve missed in Nick\u0027s mremap move ZERO_PAGE patch.\nThe \"pte\" at that point may be a swap entry or a pte_file entry: we must\ncheck pte_present before perhaps corrupting such an entry.\n\nPatch below against 2.6.14-rc2-mm1, but the same bug is in 2.6.14-rc2\u0027s\nmm/mremap.c, and more dangerous there since it\u0027s affecting all arches: I\nthink the safest course is to send Nick\u0027s patch and Yoichi\u0027s build fix and\nthis fix (build tested) on to Linus - so only MIPS can be affected.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a600388d28419305aad3c4c0af52c223cf6fa0af", "tree": "c70d3d80275f189c49311183472367f45d1a1ef2", "parents": [ "fa5b08d5f818063d18433194f20359ef2ae50254" ], "author": { "name": "Zachary Amsden", "email": "zach@vmware.com", "time": "Sat Sep 03 15:55:04 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@evo.osdl.org", "time": "Mon Sep 05 00:05:48 2005 -0700" }, "message": "[PATCH] x86: ptep_clear optimization\n\nAdd a new accessor for PTEs, which passes the full hint from the mmu_gather\nstruct; this allows architectures with hardware pagetables to optimize away\natomic PTE operations when destroying an address space. Removing the\nlocked operation should allow better pipelining of memory access in this\nloop. I measured an average savings of 30-35 cycles per zap_pte_range on\nthe first 500 destructions on Pentium-M, but I believe the optimization\nwould win more on older processors which still assert the bus lock on xchg\nfor an exclusive cacheline.\n\nUpdate: I made some new measurements, and this saves exactly 26 cycles over\nptep_get_and_clear on Pentium M. On P4, with a PAE kernel, this saves 180\ncycles per ptep_get_and_clear, for a whopping 92160 cycles savings for a\nfull address space destruction.\n\npte_clear_full is not yet used, but is provided for future optimizations\n(in particular, when running inside of a hypervisor that queues page table\nupdates, the full hint allows us to avoid queueing unnecessary page table\nupdate for an address space in the process of being destroyed.\n\nThis is not a huge win, but it does help a bit, and sets the stage for\nfurther hypervisor optimization of the mm layer on all architectures.\n\nSigned-off-by: Zachary Amsden \u003czach@vmware.com\u003e\nCc: Christoph Lameter \u003cchristoph@lameter.com\u003e\nCc: \u003clinux-mm@kvack.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b4955ce3dd0818b56da532a16c9a4a3804a558ee", "tree": "6e01667181bfc495b56e39748783ad2235a4f56e", "parents": [ "c475a8ab625d567eacf5e30ec35d6d8704558062" ], "author": { "name": "Abhijit Karmarkar", "email": "abhijitk@veritas.com", "time": "Tue Jun 21 17:15:13 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Tue Jun 21 18:46:21 2005 -0700" }, "message": "[PATCH] msync: check pte dirty earlier\n\nIt\u0027s common practice to msync a large address range regularly, in which\noften only a few ptes have actually been dirtied since the previous pass.\n\nsync_pte_range then goes much faster if it tests whether pte is dirty\nbefore locating and accessing each struct page cacheline; and it is hardly\nslowed by ptep_clear_flush_dirty repeating that test in the opposite case,\nwhen every pte actually is dirty.\n\nBut beware, s390\u0027s pte_dirty always says false, since its dirty bit is kept\nin the storage key, located via the struct page address. So skip this\noptimization in its case: use a pte_maybe_dirty macro which just says true\nif page_test_and_clear_dirty is implemented.\n\nSigned-off-by: Abhijit Karmarkar \u003cabhijitk@veritas.com\u003e\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8f6c99c11ae63ce887686f3e51c412cc4d8d8a7d", "tree": "4c3f29ce21f2a69f9105581c95e07de5bc5bb7aa", "parents": [ "3bf5ee95648c694bac4d13529563c230cd4fe5f2" ], "author": { "name": "Hugh Dickins", "email": "hugh@veritas.com", "time": "Tue Apr 19 13:29:17 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org.(none)", "time": "Tue Apr 19 13:29:17 2005 -0700" }, "message": "[PATCH] freepgt: remove arch pgd_addr_end\n\nia64 and sparc64 hurriedly had to introduce their own variants of\npgd_addr_end, to leapfrog over the holes in their virtual address spaces which\nthe final clear_page_range suddenly presented when converted from pgd_index to\npgd_addr_end. But now that free_pgtables respects the vma list, those holes\nare never presented, and the arch variants can go.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2", "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d", "parents": [], "author": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n" } ] }