Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/ppc64/kernel/traps.c |
| 3 | * |
| 4 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * Modified by Cort Dougan (cort@cs.nmt.edu) |
| 12 | * and Paul Mackerras (paulus@cs.anu.edu.au) |
| 13 | */ |
| 14 | |
| 15 | /* |
| 16 | * This file handles the architecture-dependent parts of hardware exceptions |
| 17 | */ |
| 18 | |
| 19 | #include <linux/config.h> |
| 20 | #include <linux/errno.h> |
| 21 | #include <linux/sched.h> |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/mm.h> |
| 24 | #include <linux/stddef.h> |
| 25 | #include <linux/unistd.h> |
| 26 | #include <linux/slab.h> |
| 27 | #include <linux/user.h> |
| 28 | #include <linux/a.out.h> |
| 29 | #include <linux/interrupt.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/module.h> |
| 32 | #include <linux/delay.h> |
| 33 | #include <asm/kdebug.h> |
| 34 | |
| 35 | #include <asm/pgtable.h> |
| 36 | #include <asm/uaccess.h> |
| 37 | #include <asm/system.h> |
| 38 | #include <asm/io.h> |
| 39 | #include <asm/processor.h> |
| 40 | #include <asm/ppcdebug.h> |
| 41 | #include <asm/rtas.h> |
| 42 | #include <asm/systemcfg.h> |
| 43 | #include <asm/machdep.h> |
| 44 | #include <asm/pmc.h> |
| 45 | |
| 46 | #ifdef CONFIG_DEBUGGER |
| 47 | int (*__debugger)(struct pt_regs *regs); |
| 48 | int (*__debugger_ipi)(struct pt_regs *regs); |
| 49 | int (*__debugger_bpt)(struct pt_regs *regs); |
| 50 | int (*__debugger_sstep)(struct pt_regs *regs); |
| 51 | int (*__debugger_iabr_match)(struct pt_regs *regs); |
| 52 | int (*__debugger_dabr_match)(struct pt_regs *regs); |
| 53 | int (*__debugger_fault_handler)(struct pt_regs *regs); |
| 54 | |
| 55 | EXPORT_SYMBOL(__debugger); |
| 56 | EXPORT_SYMBOL(__debugger_ipi); |
| 57 | EXPORT_SYMBOL(__debugger_bpt); |
| 58 | EXPORT_SYMBOL(__debugger_sstep); |
| 59 | EXPORT_SYMBOL(__debugger_iabr_match); |
| 60 | EXPORT_SYMBOL(__debugger_dabr_match); |
| 61 | EXPORT_SYMBOL(__debugger_fault_handler); |
| 62 | #endif |
| 63 | |
| 64 | struct notifier_block *ppc64_die_chain; |
| 65 | static DEFINE_SPINLOCK(die_notifier_lock); |
| 66 | |
| 67 | int register_die_notifier(struct notifier_block *nb) |
| 68 | { |
| 69 | int err = 0; |
| 70 | unsigned long flags; |
| 71 | |
| 72 | spin_lock_irqsave(&die_notifier_lock, flags); |
| 73 | err = notifier_chain_register(&ppc64_die_chain, nb); |
| 74 | spin_unlock_irqrestore(&die_notifier_lock, flags); |
| 75 | return err; |
| 76 | } |
| 77 | |
| 78 | /* |
| 79 | * Trap & Exception support |
| 80 | */ |
| 81 | |
| 82 | static DEFINE_SPINLOCK(die_lock); |
| 83 | |
| 84 | int die(const char *str, struct pt_regs *regs, long err) |
| 85 | { |
| 86 | static int die_counter; |
| 87 | int nl = 0; |
| 88 | |
| 89 | if (debugger(regs)) |
| 90 | return 1; |
| 91 | |
| 92 | console_verbose(); |
| 93 | spin_lock_irq(&die_lock); |
| 94 | bust_spinlocks(1); |
| 95 | printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); |
| 96 | #ifdef CONFIG_PREEMPT |
| 97 | printk("PREEMPT "); |
| 98 | nl = 1; |
| 99 | #endif |
| 100 | #ifdef CONFIG_SMP |
| 101 | printk("SMP NR_CPUS=%d ", NR_CPUS); |
| 102 | nl = 1; |
| 103 | #endif |
| 104 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 105 | printk("DEBUG_PAGEALLOC "); |
| 106 | nl = 1; |
| 107 | #endif |
| 108 | #ifdef CONFIG_NUMA |
| 109 | printk("NUMA "); |
| 110 | nl = 1; |
| 111 | #endif |
| 112 | switch(systemcfg->platform) { |
| 113 | case PLATFORM_PSERIES: |
| 114 | printk("PSERIES "); |
| 115 | nl = 1; |
| 116 | break; |
| 117 | case PLATFORM_PSERIES_LPAR: |
| 118 | printk("PSERIES LPAR "); |
| 119 | nl = 1; |
| 120 | break; |
| 121 | case PLATFORM_ISERIES_LPAR: |
| 122 | printk("ISERIES LPAR "); |
| 123 | nl = 1; |
| 124 | break; |
| 125 | case PLATFORM_POWERMAC: |
| 126 | printk("POWERMAC "); |
| 127 | nl = 1; |
| 128 | break; |
| 129 | } |
| 130 | if (nl) |
| 131 | printk("\n"); |
| 132 | print_modules(); |
| 133 | show_regs(regs); |
| 134 | bust_spinlocks(0); |
| 135 | spin_unlock_irq(&die_lock); |
| 136 | |
| 137 | if (in_interrupt()) |
| 138 | panic("Fatal exception in interrupt"); |
| 139 | |
| 140 | if (panic_on_oops) { |
| 141 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); |
| 142 | ssleep(5); |
| 143 | panic("Fatal exception"); |
| 144 | } |
| 145 | do_exit(SIGSEGV); |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) |
| 151 | { |
| 152 | siginfo_t info; |
| 153 | |
| 154 | if (!user_mode(regs)) { |
| 155 | if (die("Exception in kernel mode", regs, signr)) |
| 156 | return; |
| 157 | } |
| 158 | |
| 159 | memset(&info, 0, sizeof(info)); |
| 160 | info.si_signo = signr; |
| 161 | info.si_code = code; |
| 162 | info.si_addr = (void __user *) addr; |
| 163 | force_sig_info(signr, &info, current); |
| 164 | } |
| 165 | |
| 166 | void system_reset_exception(struct pt_regs *regs) |
| 167 | { |
| 168 | /* See if any machine dependent calls */ |
| 169 | if (ppc_md.system_reset_exception) |
| 170 | ppc_md.system_reset_exception(regs); |
| 171 | |
| 172 | die("System Reset", regs, 0); |
| 173 | |
| 174 | /* Must die if the interrupt is not recoverable */ |
| 175 | if (!(regs->msr & MSR_RI)) |
| 176 | panic("Unrecoverable System Reset"); |
| 177 | |
| 178 | /* What should we do here? We could issue a shutdown or hard reset. */ |
| 179 | } |
| 180 | |
| 181 | void machine_check_exception(struct pt_regs *regs) |
| 182 | { |
| 183 | int recover = 0; |
| 184 | |
| 185 | /* See if any machine dependent calls */ |
| 186 | if (ppc_md.machine_check_exception) |
| 187 | recover = ppc_md.machine_check_exception(regs); |
| 188 | |
| 189 | if (recover) |
| 190 | return; |
| 191 | |
| 192 | if (debugger_fault_handler(regs)) |
| 193 | return; |
| 194 | die("Machine check", regs, 0); |
| 195 | |
| 196 | /* Must die if the interrupt is not recoverable */ |
| 197 | if (!(regs->msr & MSR_RI)) |
| 198 | panic("Unrecoverable Machine check"); |
| 199 | } |
| 200 | |
| 201 | void unknown_exception(struct pt_regs *regs) |
| 202 | { |
| 203 | printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", |
| 204 | regs->nip, regs->msr, regs->trap); |
| 205 | |
| 206 | _exception(SIGTRAP, regs, 0, 0); |
| 207 | } |
| 208 | |
| 209 | void instruction_breakpoint_exception(struct pt_regs *regs) |
| 210 | { |
| 211 | if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, |
| 212 | 5, SIGTRAP) == NOTIFY_STOP) |
| 213 | return; |
| 214 | if (debugger_iabr_match(regs)) |
| 215 | return; |
| 216 | _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); |
| 217 | } |
| 218 | |
| 219 | void single_step_exception(struct pt_regs *regs) |
| 220 | { |
| 221 | regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */ |
| 222 | |
| 223 | if (notify_die(DIE_SSTEP, "single_step", regs, 5, |
| 224 | 5, SIGTRAP) == NOTIFY_STOP) |
| 225 | return; |
| 226 | if (debugger_sstep(regs)) |
| 227 | return; |
| 228 | |
| 229 | _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); |
| 230 | } |
| 231 | |
| 232 | /* |
| 233 | * After we have successfully emulated an instruction, we have to |
| 234 | * check if the instruction was being single-stepped, and if so, |
| 235 | * pretend we got a single-step exception. This was pointed out |
| 236 | * by Kumar Gala. -- paulus |
| 237 | */ |
| 238 | static inline void emulate_single_step(struct pt_regs *regs) |
| 239 | { |
| 240 | if (regs->msr & MSR_SE) |
| 241 | single_step_exception(regs); |
| 242 | } |
| 243 | |
| 244 | static void parse_fpe(struct pt_regs *regs) |
| 245 | { |
| 246 | int code = 0; |
| 247 | unsigned long fpscr; |
| 248 | |
| 249 | flush_fp_to_thread(current); |
| 250 | |
| 251 | fpscr = current->thread.fpscr; |
| 252 | |
| 253 | /* Invalid operation */ |
| 254 | if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) |
| 255 | code = FPE_FLTINV; |
| 256 | |
| 257 | /* Overflow */ |
| 258 | else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) |
| 259 | code = FPE_FLTOVF; |
| 260 | |
| 261 | /* Underflow */ |
| 262 | else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) |
| 263 | code = FPE_FLTUND; |
| 264 | |
| 265 | /* Divide by zero */ |
| 266 | else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) |
| 267 | code = FPE_FLTDIV; |
| 268 | |
| 269 | /* Inexact result */ |
| 270 | else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) |
| 271 | code = FPE_FLTRES; |
| 272 | |
| 273 | _exception(SIGFPE, regs, code, regs->nip); |
| 274 | } |
| 275 | |
| 276 | /* |
| 277 | * Illegal instruction emulation support. Return non-zero if we can't |
| 278 | * emulate, or -EFAULT if the associated memory access caused an access |
| 279 | * fault. Return zero on success. |
| 280 | */ |
| 281 | |
| 282 | #define INST_MFSPR_PVR 0x7c1f42a6 |
| 283 | #define INST_MFSPR_PVR_MASK 0xfc1fffff |
| 284 | |
| 285 | #define INST_DCBA 0x7c0005ec |
| 286 | #define INST_DCBA_MASK 0x7c0007fe |
| 287 | |
| 288 | #define INST_MCRXR 0x7c000400 |
| 289 | #define INST_MCRXR_MASK 0x7c0007fe |
| 290 | |
| 291 | static int emulate_instruction(struct pt_regs *regs) |
| 292 | { |
| 293 | unsigned int instword; |
| 294 | |
| 295 | if (!user_mode(regs)) |
| 296 | return -EINVAL; |
| 297 | |
| 298 | CHECK_FULL_REGS(regs); |
| 299 | |
| 300 | if (get_user(instword, (unsigned int __user *)(regs->nip))) |
| 301 | return -EFAULT; |
| 302 | |
| 303 | /* Emulate the mfspr rD, PVR. */ |
| 304 | if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { |
| 305 | unsigned int rd; |
| 306 | |
| 307 | rd = (instword >> 21) & 0x1f; |
| 308 | regs->gpr[rd] = mfspr(SPRN_PVR); |
| 309 | return 0; |
| 310 | } |
| 311 | |
| 312 | /* Emulating the dcba insn is just a no-op. */ |
| 313 | if ((instword & INST_DCBA_MASK) == INST_DCBA) { |
| 314 | static int warned; |
| 315 | |
| 316 | if (!warned) { |
| 317 | printk(KERN_WARNING |
| 318 | "process %d (%s) uses obsolete 'dcba' insn\n", |
| 319 | current->pid, current->comm); |
| 320 | warned = 1; |
| 321 | } |
| 322 | return 0; |
| 323 | } |
| 324 | |
| 325 | /* Emulate the mcrxr insn. */ |
| 326 | if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { |
| 327 | static int warned; |
| 328 | unsigned int shift; |
| 329 | |
| 330 | if (!warned) { |
| 331 | printk(KERN_WARNING |
| 332 | "process %d (%s) uses obsolete 'mcrxr' insn\n", |
| 333 | current->pid, current->comm); |
| 334 | warned = 1; |
| 335 | } |
| 336 | |
| 337 | shift = (instword >> 21) & 0x1c; |
| 338 | regs->ccr &= ~(0xf0000000 >> shift); |
| 339 | regs->ccr |= (regs->xer & 0xf0000000) >> shift; |
| 340 | regs->xer &= ~0xf0000000; |
| 341 | return 0; |
| 342 | } |
| 343 | |
| 344 | return -EINVAL; |
| 345 | } |
| 346 | |
| 347 | /* |
| 348 | * Look through the list of trap instructions that are used for BUG(), |
| 349 | * BUG_ON() and WARN_ON() and see if we hit one. At this point we know |
| 350 | * that the exception was caused by a trap instruction of some kind. |
| 351 | * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0 |
| 352 | * otherwise. |
| 353 | */ |
| 354 | extern struct bug_entry __start___bug_table[], __stop___bug_table[]; |
| 355 | |
| 356 | #ifndef CONFIG_MODULES |
| 357 | #define module_find_bug(x) NULL |
| 358 | #endif |
| 359 | |
| 360 | struct bug_entry *find_bug(unsigned long bugaddr) |
| 361 | { |
| 362 | struct bug_entry *bug; |
| 363 | |
| 364 | for (bug = __start___bug_table; bug < __stop___bug_table; ++bug) |
| 365 | if (bugaddr == bug->bug_addr) |
| 366 | return bug; |
| 367 | return module_find_bug(bugaddr); |
| 368 | } |
| 369 | |
| 370 | static int |
| 371 | check_bug_trap(struct pt_regs *regs) |
| 372 | { |
| 373 | struct bug_entry *bug; |
| 374 | unsigned long addr; |
| 375 | |
| 376 | if (regs->msr & MSR_PR) |
| 377 | return 0; /* not in kernel */ |
| 378 | addr = regs->nip; /* address of trap instruction */ |
| 379 | if (addr < PAGE_OFFSET) |
| 380 | return 0; |
| 381 | bug = find_bug(regs->nip); |
| 382 | if (bug == NULL) |
| 383 | return 0; |
| 384 | if (bug->line & BUG_WARNING_TRAP) { |
| 385 | /* this is a WARN_ON rather than BUG/BUG_ON */ |
| 386 | printk(KERN_ERR "Badness in %s at %s:%d\n", |
| 387 | bug->function, bug->file, |
| 388 | (unsigned int)bug->line & ~BUG_WARNING_TRAP); |
| 389 | show_stack(current, (void *)regs->gpr[1]); |
| 390 | return 1; |
| 391 | } |
| 392 | printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n", |
| 393 | bug->function, bug->file, (unsigned int)bug->line); |
| 394 | return 0; |
| 395 | } |
| 396 | |
| 397 | void program_check_exception(struct pt_regs *regs) |
| 398 | { |
| 399 | if (debugger_fault_handler(regs)) |
| 400 | return; |
| 401 | |
| 402 | if (regs->msr & 0x100000) { |
| 403 | /* IEEE FP exception */ |
| 404 | parse_fpe(regs); |
| 405 | } else if (regs->msr & 0x20000) { |
| 406 | /* trap exception */ |
| 407 | |
| 408 | if (notify_die(DIE_BPT, "breakpoint", regs, 5, |
| 409 | 5, SIGTRAP) == NOTIFY_STOP) |
| 410 | return; |
| 411 | if (debugger_bpt(regs)) |
| 412 | return; |
| 413 | |
| 414 | if (check_bug_trap(regs)) { |
| 415 | regs->nip += 4; |
| 416 | return; |
| 417 | } |
| 418 | _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); |
| 419 | |
| 420 | } else { |
| 421 | /* Privileged or illegal instruction; try to emulate it. */ |
| 422 | switch (emulate_instruction(regs)) { |
| 423 | case 0: |
| 424 | regs->nip += 4; |
| 425 | emulate_single_step(regs); |
| 426 | break; |
| 427 | |
| 428 | case -EFAULT: |
| 429 | _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); |
| 430 | break; |
| 431 | |
| 432 | default: |
| 433 | if (regs->msr & 0x40000) |
| 434 | /* priveleged */ |
| 435 | _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); |
| 436 | else |
| 437 | /* illegal */ |
| 438 | _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); |
| 439 | break; |
| 440 | } |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | void kernel_fp_unavailable_exception(struct pt_regs *regs) |
| 445 | { |
| 446 | printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " |
| 447 | "%lx at %lx\n", regs->trap, regs->nip); |
| 448 | die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); |
| 449 | } |
| 450 | |
| 451 | void altivec_unavailable_exception(struct pt_regs *regs) |
| 452 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | if (user_mode(regs)) { |
| 454 | /* A user program has executed an altivec instruction, |
| 455 | but this kernel doesn't support altivec. */ |
| 456 | _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); |
| 457 | return; |
| 458 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 459 | printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " |
| 460 | "%lx at %lx\n", regs->trap, regs->nip); |
| 461 | die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); |
| 462 | } |
| 463 | |
| 464 | extern perf_irq_t perf_irq; |
| 465 | |
| 466 | void performance_monitor_exception(struct pt_regs *regs) |
| 467 | { |
| 468 | perf_irq(regs); |
| 469 | } |
| 470 | |
| 471 | void alignment_exception(struct pt_regs *regs) |
| 472 | { |
| 473 | int fixed; |
| 474 | |
| 475 | fixed = fix_alignment(regs); |
| 476 | |
| 477 | if (fixed == 1) { |
| 478 | regs->nip += 4; /* skip over emulated instruction */ |
| 479 | emulate_single_step(regs); |
| 480 | return; |
| 481 | } |
| 482 | |
| 483 | /* Operand address was bad */ |
| 484 | if (fixed == -EFAULT) { |
| 485 | if (user_mode(regs)) { |
| 486 | _exception(SIGSEGV, regs, SEGV_MAPERR, regs->dar); |
| 487 | } else { |
| 488 | /* Search exception table */ |
| 489 | bad_page_fault(regs, regs->dar, SIGSEGV); |
| 490 | } |
| 491 | |
| 492 | return; |
| 493 | } |
| 494 | |
| 495 | _exception(SIGBUS, regs, BUS_ADRALN, regs->nip); |
| 496 | } |
| 497 | |
| 498 | #ifdef CONFIG_ALTIVEC |
| 499 | void altivec_assist_exception(struct pt_regs *regs) |
| 500 | { |
| 501 | int err; |
| 502 | siginfo_t info; |
| 503 | |
| 504 | if (!user_mode(regs)) { |
| 505 | printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" |
| 506 | " at %lx\n", regs->nip); |
| 507 | die("Kernel VMX/Altivec assist exception", regs, SIGILL); |
| 508 | } |
| 509 | |
| 510 | flush_altivec_to_thread(current); |
| 511 | |
| 512 | err = emulate_altivec(regs); |
| 513 | if (err == 0) { |
| 514 | regs->nip += 4; /* skip emulated instruction */ |
| 515 | emulate_single_step(regs); |
| 516 | return; |
| 517 | } |
| 518 | |
| 519 | if (err == -EFAULT) { |
| 520 | /* got an error reading the instruction */ |
| 521 | info.si_signo = SIGSEGV; |
| 522 | info.si_errno = 0; |
| 523 | info.si_code = SEGV_MAPERR; |
| 524 | info.si_addr = (void __user *) regs->nip; |
| 525 | force_sig_info(SIGSEGV, &info, current); |
| 526 | } else { |
| 527 | /* didn't recognize the instruction */ |
| 528 | /* XXX quick hack for now: set the non-Java bit in the VSCR */ |
| 529 | if (printk_ratelimit()) |
| 530 | printk(KERN_ERR "Unrecognized altivec instruction " |
| 531 | "in %s at %lx\n", current->comm, regs->nip); |
| 532 | current->thread.vscr.u[3] |= 0x10000; |
| 533 | } |
| 534 | } |
| 535 | #endif /* CONFIG_ALTIVEC */ |
| 536 | |
| 537 | /* |
| 538 | * We enter here if we get an unrecoverable exception, that is, one |
| 539 | * that happened at a point where the RI (recoverable interrupt) bit |
| 540 | * in the MSR is 0. This indicates that SRR0/1 are live, and that |
| 541 | * we therefore lost state by taking this exception. |
| 542 | */ |
| 543 | void unrecoverable_exception(struct pt_regs *regs) |
| 544 | { |
| 545 | printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", |
| 546 | regs->trap, regs->nip); |
| 547 | die("Unrecoverable exception", regs, SIGABRT); |
| 548 | } |
| 549 | |
| 550 | /* |
| 551 | * We enter here if we discover during exception entry that we are |
| 552 | * running in supervisor mode with a userspace value in the stack pointer. |
| 553 | */ |
| 554 | void kernel_bad_stack(struct pt_regs *regs) |
| 555 | { |
| 556 | printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", |
| 557 | regs->gpr[1], regs->nip); |
| 558 | die("Bad kernel stack pointer", regs, SIGABRT); |
| 559 | } |
| 560 | |
| 561 | void __init trap_init(void) |
| 562 | { |
| 563 | } |