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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999,2001-2004 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/delay.h>
13#include <linux/kernel.h>
14#include <linux/kdev_t.h>
15#include <linux/string.h>
16#include <linux/tty.h>
17#include <linux/console.h>
18#include <linux/timex.h>
19#include <linux/sched.h>
20#include <linux/ioport.h>
21#include <linux/mm.h>
22#include <linux/serial.h>
23#include <linux/irq.h>
24#include <linux/bootmem.h>
25#include <linux/mmzone.h>
26#include <linux/interrupt.h>
27#include <linux/acpi.h>
28#include <linux/compiler.h>
29#include <linux/sched.h>
30#include <linux/root_dev.h>
31#include <linux/nodemask.h>
Aaron J Youngc1298c52005-04-25 13:11:14 -070032#include <linux/pm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
34#include <asm/io.h>
35#include <asm/sal.h>
36#include <asm/machvec.h>
37#include <asm/system.h>
38#include <asm/processor.h>
39#include <asm/sn/arch.h>
40#include <asm/sn/addrs.h>
41#include <asm/sn/pda.h>
42#include <asm/sn/nodepda.h>
43#include <asm/sn/sn_cpuid.h>
44#include <asm/sn/simulator.h>
45#include <asm/sn/leds.h>
46#include <asm/sn/bte.h>
47#include <asm/sn/shub_mmr.h>
48#include <asm/sn/clksupport.h>
49#include <asm/sn/sn_sal.h>
50#include <asm/sn/geo.h>
51#include "xtalk/xwidgetdev.h"
52#include "xtalk/hubdev.h"
53#include <asm/sn/klconfig.h>
54
55
56DEFINE_PER_CPU(struct pda_s, pda_percpu);
57
58#define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
59
60lboard_t *root_lboard[MAX_COMPACT_NODES];
61
62extern void bte_init_node(nodepda_t *, cnodeid_t);
63
64extern void sn_timer_init(void);
65extern unsigned long last_time_offset;
66extern void (*ia64_mark_idle) (int);
67extern void snidle(int);
68extern unsigned char acpi_kbd_controller_present;
69
70unsigned long sn_rtc_cycles_per_second;
71EXPORT_SYMBOL(sn_rtc_cycles_per_second);
72
73DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
74EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
75
76partid_t sn_partid = -1;
77EXPORT_SYMBOL(sn_partid);
78char sn_system_serial_number_string[128];
79EXPORT_SYMBOL(sn_system_serial_number_string);
80u64 sn_partition_serial_number;
81EXPORT_SYMBOL(sn_partition_serial_number);
82u8 sn_partition_id;
83EXPORT_SYMBOL(sn_partition_id);
84u8 sn_system_size;
85EXPORT_SYMBOL(sn_system_size);
86u8 sn_sharing_domain_size;
87EXPORT_SYMBOL(sn_sharing_domain_size);
88u8 sn_coherency_id;
89EXPORT_SYMBOL(sn_coherency_id);
90u8 sn_region_size;
91EXPORT_SYMBOL(sn_region_size);
92
93short physical_node_map[MAX_PHYSNODE_ID];
94
95EXPORT_SYMBOL(physical_node_map);
96
97int numionodes;
98
99static void sn_init_pdas(char **);
100static void scan_for_ionodes(void);
101
102static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
103
104/*
105 * The format of "screen_info" is strange, and due to early i386-setup
106 * code. This is just enough to make the console code think we're on a
107 * VGA color display.
108 */
109struct screen_info sn_screen_info = {
110 .orig_x = 0,
111 .orig_y = 0,
112 .orig_video_mode = 3,
113 .orig_video_cols = 80,
114 .orig_video_ega_bx = 3,
115 .orig_video_lines = 25,
116 .orig_video_isVGA = 1,
117 .orig_video_points = 16
118};
119
120/*
121 * This is here so we can use the CMOS detection in ide-probe.c to
122 * determine what drives are present. In theory, we don't need this
123 * as the auto-detection could be done via ide-probe.c:do_probe() but
124 * in practice that would be much slower, which is painful when
125 * running in the simulator. Note that passing zeroes in DRIVE_INFO
126 * is sufficient (the IDE driver will autodetect the drive geometry).
127 */
128#ifdef CONFIG_IA64_GENERIC
129extern char drive_info[4 * 16];
130#else
131char drive_info[4 * 16];
132#endif
133
134/*
135 * Get nasid of current cpu early in boot before nodepda is initialized
136 */
137static int
138boot_get_nasid(void)
139{
140 int nasid;
141
142 if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
143 BUG();
144 return nasid;
145}
146
147/*
148 * This routine can only be used during init, since
149 * smp_boot_data is an init data structure.
150 * We have to use smp_boot_data.cpu_phys_id to find
151 * the physical id of the processor because the normal
152 * cpu_physical_id() relies on data structures that
153 * may not be initialized yet.
154 */
155
156static int __init pxm_to_nasid(int pxm)
157{
158 int i;
159 int nid;
160
161 nid = pxm_to_nid_map[pxm];
162 for (i = 0; i < num_node_memblks; i++) {
163 if (node_memblk[i].nid == nid) {
164 return NASID_GET(node_memblk[i].start_paddr);
165 }
166 }
167 return -1;
168}
169
170/**
171 * early_sn_setup - early setup routine for SN platforms
172 *
173 * Sets up an initial console to aid debugging. Intended primarily
174 * for bringup. See start_kernel() in init/main.c.
175 */
176
177void __init early_sn_setup(void)
178{
179 efi_system_table_t *efi_systab;
180 efi_config_table_t *config_tables;
181 struct ia64_sal_systab *sal_systab;
182 struct ia64_sal_desc_entry_point *ep;
183 char *p;
184 int i, j;
185
186 /*
187 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
188 * IO on SN2 is done via SAL calls, early_printk won't work without this.
189 *
190 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
191 * Any changes to those file may have to be made hereas well.
192 */
193 efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
194 config_tables = __va(efi_systab->tables);
195 for (i = 0; i < efi_systab->nr_tables; i++) {
196 if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
197 0) {
198 sal_systab = __va(config_tables[i].table);
199 p = (char *)(sal_systab + 1);
200 for (j = 0; j < sal_systab->entry_count; j++) {
201 if (*p == SAL_DESC_ENTRY_POINT) {
202 ep = (struct ia64_sal_desc_entry_point
203 *)p;
204 ia64_sal_handler_init(__va
205 (ep->sal_proc),
206 __va(ep->gp));
207 return;
208 }
209 p += SAL_DESC_SIZE(*p);
210 }
211 }
212 }
213 /* Uh-oh, SAL not available?? */
214 printk(KERN_ERR "failed to find SAL entry point\n");
215}
216
217extern int platform_intr_list[];
218extern nasid_t master_nasid;
219static int shub_1_1_found __initdata;
220
221/*
222 * sn_check_for_wars
223 *
224 * Set flag for enabling shub specific wars
225 */
226
227static inline int __init is_shub_1_1(int nasid)
228{
229 unsigned long id;
230 int rev;
231
232 if (is_shub2())
233 return 0;
234 id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
235 rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
236 return rev <= 2;
237}
238
239static void __init sn_check_for_wars(void)
240{
241 int cnode;
242
243 if (is_shub2()) {
244 /* none yet */
245 } else {
246 for_each_online_node(cnode) {
247 if (is_shub_1_1(cnodeid_to_nasid(cnode)))
248 sn_hub_info->shub_1_1_found = 1;
249 }
250 }
251}
252
253/**
254 * sn_setup - SN platform setup routine
255 * @cmdline_p: kernel command line
256 *
257 * Handles platform setup for SN machines. This includes determining
258 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
259 * setting up per-node data areas. The console is also initialized here.
260 */
261void __init sn_setup(char **cmdline_p)
262{
263 long status, ticks_per_sec, drift;
264 int pxm;
265 int major = sn_sal_rev_major(), minor = sn_sal_rev_minor();
266 extern void sn_cpu_init(void);
267
268 /*
269 * If the generic code has enabled vga console support - lets
270 * get rid of it again. This is a kludge for the fact that ACPI
271 * currtently has no way of informing us if legacy VGA is available
272 * or not.
273 */
274#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
275 if (conswitchp == &vga_con) {
276 printk(KERN_DEBUG "SGI: Disabling VGA console\n");
277#ifdef CONFIG_DUMMY_CONSOLE
278 conswitchp = &dummy_con;
279#else
280 conswitchp = NULL;
281#endif /* CONFIG_DUMMY_CONSOLE */
282 }
283#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
284
285 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
286
287 memset(physical_node_map, -1, sizeof(physical_node_map));
288 for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
289 if (pxm_to_nid_map[pxm] != -1)
290 physical_node_map[pxm_to_nasid(pxm)] =
291 pxm_to_nid_map[pxm];
292
293 /*
294 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
295 * support here so we don't have to listen to failed keyboard probe
296 * messages.
297 */
298 if ((major < 2 || (major == 2 && minor <= 9)) &&
299 acpi_kbd_controller_present) {
300 printk(KERN_INFO "Disabling legacy keyboard support as prom "
301 "is too old and doesn't provide FADT\n");
302 acpi_kbd_controller_present = 0;
303 }
304
305 printk("SGI SAL version %x.%02x\n", major, minor);
306
307 /*
308 * Confirm the SAL we're running on is recent enough...
309 */
310 if ((major < SN_SAL_MIN_MAJOR) || (major == SN_SAL_MIN_MAJOR &&
311 minor < SN_SAL_MIN_MINOR)) {
312 printk(KERN_ERR "This kernel needs SGI SAL version >= "
313 "%x.%02x\n", SN_SAL_MIN_MAJOR, SN_SAL_MIN_MINOR);
314 panic("PROM version too old\n");
315 }
316
317 master_nasid = boot_get_nasid();
318
319 status =
320 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
321 &drift);
322 if (status != 0 || ticks_per_sec < 100000) {
323 printk(KERN_WARNING
324 "unable to determine platform RTC clock frequency, guessing.\n");
325 /* PROM gives wrong value for clock freq. so guess */
326 sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
327 } else
328 sn_rtc_cycles_per_second = ticks_per_sec;
329
330 platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
331
332 /*
333 * we set the default root device to /dev/hda
334 * to make simulation easy
335 */
336 ROOT_DEV = Root_HDA1;
337
338 /*
339 * Create the PDAs and NODEPDAs for all the cpus.
340 */
341 sn_init_pdas(cmdline_p);
342
343 ia64_mark_idle = &snidle;
344
345 /*
346 * For the bootcpu, we do this here. All other cpus will make the
347 * call as part of cpu_init in slave cpu initialization.
348 */
349 sn_cpu_init();
350
351#ifdef CONFIG_SMP
352 init_smp_config();
353#endif
354 screen_info = sn_screen_info;
355
356 sn_timer_init();
Aaron J Youngc1298c52005-04-25 13:11:14 -0700357
358 /*
359 * set pm_power_off to a SAL call to allow
360 * sn machines to power off. The SAL call can be replaced
361 * by an ACPI interface call when ACPI is fully implemented
362 * for sn.
363 */
364 pm_power_off = ia64_sn_power_down;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365}
366
367/**
368 * sn_init_pdas - setup node data areas
369 *
370 * One time setup for Node Data Area. Called by sn_setup().
371 */
372static void __init sn_init_pdas(char **cmdline_p)
373{
374 cnodeid_t cnode;
375
376 memset(pda->cnodeid_to_nasid_table, -1,
377 sizeof(pda->cnodeid_to_nasid_table));
378 for_each_online_node(cnode)
379 pda->cnodeid_to_nasid_table[cnode] =
380 pxm_to_nasid(nid_to_pxm_map[cnode]);
381
382 numionodes = num_online_nodes();
383 scan_for_ionodes();
384
385 /*
386 * Allocate & initalize the nodepda for each node.
387 */
388 for_each_online_node(cnode) {
389 nodepdaindr[cnode] =
390 alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
391 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
392 memset(nodepdaindr[cnode]->phys_cpuid, -1,
393 sizeof(nodepdaindr[cnode]->phys_cpuid));
394 }
395
396 /*
397 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
398 */
399 for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
400 nodepdaindr[cnode] =
401 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
402 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
403 }
404
405 /*
406 * Now copy the array of nodepda pointers to each nodepda.
407 */
408 for (cnode = 0; cnode < numionodes; cnode++)
409 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
410 sizeof(nodepdaindr));
411
412 /*
413 * Set up IO related platform-dependent nodepda fields.
414 * The following routine actually sets up the hubinfo struct
415 * in nodepda.
416 */
417 for_each_online_node(cnode) {
418 bte_init_node(nodepdaindr[cnode], cnode);
419 }
420
421 /*
422 * Initialize the per node hubdev. This includes IO Nodes and
423 * headless/memless nodes.
424 */
425 for (cnode = 0; cnode < numionodes; cnode++) {
426 hubdev_init_node(nodepdaindr[cnode], cnode);
427 }
428}
429
430/**
431 * sn_cpu_init - initialize per-cpu data areas
432 * @cpuid: cpuid of the caller
433 *
434 * Called during cpu initialization on each cpu as it starts.
435 * Currently, initializes the per-cpu data area for SNIA.
436 * Also sets up a few fields in the nodepda. Also known as
437 * platform_cpu_init() by the ia64 machvec code.
438 */
439void __init sn_cpu_init(void)
440{
441 int cpuid;
442 int cpuphyid;
443 int nasid;
444 int subnode;
445 int slice;
446 int cnode;
447 int i;
448 static int wars_have_been_checked;
449
450 memset(pda, 0, sizeof(pda));
451 if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
452 &sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
453 &sn_coherency_id, &sn_region_size))
454 BUG();
455 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
456
457 /*
458 * The boot cpu makes this call again after platform initialization is
459 * complete.
460 */
461 if (nodepdaindr[0] == NULL)
462 return;
463
464 cpuid = smp_processor_id();
465 cpuphyid = get_sapicid();
466
467 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
468 BUG();
469
470 for (i=0; i < MAX_NUMNODES; i++) {
471 if (nodepdaindr[i]) {
472 nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
473 nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
474 nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
475 }
476 }
477
478 cnode = nasid_to_cnodeid(nasid);
479
480 pda->p_nodepda = nodepdaindr[cnode];
481 pda->led_address =
482 (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
483 pda->led_state = LED_ALWAYS_SET;
484 pda->hb_count = HZ / 2;
485 pda->hb_state = 0;
486 pda->idle_flag = 0;
487
488 if (cpuid != 0) {
489 memcpy(pda->cnodeid_to_nasid_table,
490 pdacpu(0)->cnodeid_to_nasid_table,
491 sizeof(pda->cnodeid_to_nasid_table));
492 }
493
494 /*
495 * Check for WARs.
496 * Only needs to be done once, on BSP.
497 * Has to be done after loop above, because it uses pda.cnodeid_to_nasid_table[i].
498 * Has to be done before assignment below.
499 */
500 if (!wars_have_been_checked) {
501 sn_check_for_wars();
502 wars_have_been_checked = 1;
503 }
504 sn_hub_info->shub_1_1_found = shub_1_1_found;
505
506 /*
507 * Set up addresses of PIO/MEM write status registers.
508 */
509 {
510 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
511 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
512 SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
513 u64 *pio;
514 pio = is_shub1() ? pio1 : pio2;
515 pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
516 pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
517 }
518
519 /*
520 * WAR addresses for SHUB 1.x.
521 */
522 if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
523 int buddy_nasid;
524 buddy_nasid =
525 cnodeid_to_nasid(numa_node_id() ==
526 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
527 pda->pio_shub_war_cam_addr =
528 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
529 SH1_PI_CAM_CONTROL);
530 }
531}
532
533/*
534 * Scan klconfig for ionodes. Add the nasids to the
535 * physical_node_map and the pda and increment numionodes.
536 */
537
538static void __init scan_for_ionodes(void)
539{
540 int nasid = 0;
541 lboard_t *brd;
542
543 /* Setup ionodes with memory */
544 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
545 char *klgraph_header;
546 cnodeid_t cnodeid;
547
548 if (physical_node_map[nasid] == -1)
549 continue;
550
551 cnodeid = -1;
552 klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
553 if (!klgraph_header) {
554 if (IS_RUNNING_ON_SIMULATOR())
555 continue;
556 BUG(); /* All nodes must have klconfig tables! */
557 }
558 cnodeid = nasid_to_cnodeid(nasid);
559 root_lboard[cnodeid] = (lboard_t *)
560 NODE_OFFSET_TO_LBOARD((nasid),
561 ((kl_config_hdr_t
562 *) (klgraph_header))->
563 ch_board_info);
564 }
565
566 /* Scan headless/memless IO Nodes. */
567 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
568 /* if there's no nasid, don't try to read the klconfig on the node */
569 if (physical_node_map[nasid] == -1)
570 continue;
571 brd = find_lboard_any((lboard_t *)
572 root_lboard[nasid_to_cnodeid(nasid)],
573 KLTYPE_SNIA);
574 if (brd) {
575 brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
576 if (!brd)
577 continue;
578 }
579
580 brd = find_lboard_any(brd, KLTYPE_SNIA);
581
582 while (brd) {
583 pda->cnodeid_to_nasid_table[numionodes] =
584 brd->brd_nasid;
585 physical_node_map[brd->brd_nasid] = numionodes;
586 root_lboard[numionodes] = brd;
587 numionodes++;
588 brd = KLCF_NEXT_ANY(brd);
589 if (!brd)
590 break;
591
592 brd = find_lboard_any(brd, KLTYPE_SNIA);
593 }
594 }
595
596 /* Scan for TIO nodes. */
597 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
598 /* if there's no nasid, don't try to read the klconfig on the node */
599 if (physical_node_map[nasid] == -1)
600 continue;
601 brd = find_lboard_any((lboard_t *)
602 root_lboard[nasid_to_cnodeid(nasid)],
603 KLTYPE_TIO);
604 while (brd) {
605 pda->cnodeid_to_nasid_table[numionodes] =
606 brd->brd_nasid;
607 physical_node_map[brd->brd_nasid] = numionodes;
608 root_lboard[numionodes] = brd;
609 numionodes++;
610 brd = KLCF_NEXT_ANY(brd);
611 if (!brd)
612 break;
613
614 brd = find_lboard_any(brd, KLTYPE_TIO);
615 }
616 }
617
618}
619
620int
621nasid_slice_to_cpuid(int nasid, int slice)
622{
623 long cpu;
624
625 for (cpu=0; cpu < NR_CPUS; cpu++)
626 if (nodepda->phys_cpuid[cpu].nasid == nasid && nodepda->phys_cpuid[cpu].slice == slice)
627 return cpu;
628
629 return -1;
630}