Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/mips/kernel/proc.c |
| 3 | * |
| 4 | * Copyright (C) 1995, 1996, 2001 Ralf Baechle |
| 5 | * Copyright (C) 2001 MIPS Technologies, Inc. |
| 6 | */ |
| 7 | #include <linux/config.h> |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/sched.h> |
| 11 | #include <linux/seq_file.h> |
| 12 | #include <asm/bootinfo.h> |
| 13 | #include <asm/cpu.h> |
| 14 | #include <asm/cpu-features.h> |
| 15 | #include <asm/mipsregs.h> |
| 16 | #include <asm/processor.h> |
| 17 | #include <asm/watch.h> |
| 18 | |
| 19 | unsigned int vced_count, vcei_count; |
| 20 | |
| 21 | static const char *cpu_name[] = { |
| 22 | [CPU_UNKNOWN] "unknown", |
| 23 | [CPU_R2000] "R2000", |
| 24 | [CPU_R3000] "R3000", |
| 25 | [CPU_R3000A] "R3000A", |
| 26 | [CPU_R3041] "R3041", |
| 27 | [CPU_R3051] "R3051", |
| 28 | [CPU_R3052] "R3052", |
| 29 | [CPU_R3081] "R3081", |
| 30 | [CPU_R3081E] "R3081E", |
| 31 | [CPU_R4000PC] "R4000PC", |
| 32 | [CPU_R4000SC] "R4000SC", |
| 33 | [CPU_R4000MC] "R4000MC", |
| 34 | [CPU_R4200] "R4200", |
| 35 | [CPU_R4400PC] "R4400PC", |
| 36 | [CPU_R4400SC] "R4400SC", |
| 37 | [CPU_R4400MC] "R4400MC", |
| 38 | [CPU_R4600] "R4600", |
| 39 | [CPU_R6000] "R6000", |
| 40 | [CPU_R6000A] "R6000A", |
| 41 | [CPU_R8000] "R8000", |
| 42 | [CPU_R10000] "R10000", |
| 43 | [CPU_R12000] "R12000", |
| 44 | [CPU_R4300] "R4300", |
| 45 | [CPU_R4650] "R4650", |
| 46 | [CPU_R4700] "R4700", |
| 47 | [CPU_R5000] "R5000", |
| 48 | [CPU_R5000A] "R5000A", |
| 49 | [CPU_R4640] "R4640", |
| 50 | [CPU_NEVADA] "Nevada", |
| 51 | [CPU_RM7000] "RM7000", |
| 52 | [CPU_RM9000] "RM9000", |
| 53 | [CPU_R5432] "R5432", |
| 54 | [CPU_4KC] "MIPS 4Kc", |
| 55 | [CPU_5KC] "MIPS 5Kc", |
| 56 | [CPU_R4310] "R4310", |
| 57 | [CPU_SB1] "SiByte SB1", |
| 58 | [CPU_TX3912] "TX3912", |
| 59 | [CPU_TX3922] "TX3922", |
| 60 | [CPU_TX3927] "TX3927", |
| 61 | [CPU_AU1000] "Au1000", |
| 62 | [CPU_AU1500] "Au1500", |
| 63 | [CPU_4KEC] "MIPS 4KEc", |
| 64 | [CPU_4KSC] "MIPS 4KSc", |
| 65 | [CPU_VR41XX] "NEC Vr41xx", |
| 66 | [CPU_R5500] "R5500", |
| 67 | [CPU_TX49XX] "TX49xx", |
| 68 | [CPU_20KC] "MIPS 20Kc", |
| 69 | [CPU_24K] "MIPS 24K", |
| 70 | [CPU_25KF] "MIPS 25Kf", |
| 71 | [CPU_VR4111] "NEC VR4111", |
| 72 | [CPU_VR4121] "NEC VR4121", |
| 73 | [CPU_VR4122] "NEC VR4122", |
| 74 | [CPU_VR4131] "NEC VR4131", |
| 75 | [CPU_VR4133] "NEC VR4133", |
| 76 | [CPU_VR4181] "NEC VR4181", |
| 77 | [CPU_VR4181A] "NEC VR4181A", |
| 78 | [CPU_SR71000] "Sandcraft SR71000" |
| 79 | }; |
| 80 | |
| 81 | |
| 82 | static int show_cpuinfo(struct seq_file *m, void *v) |
| 83 | { |
| 84 | unsigned int version = current_cpu_data.processor_id; |
| 85 | unsigned int fp_vers = current_cpu_data.fpu_id; |
| 86 | unsigned long n = (unsigned long) v - 1; |
| 87 | char fmt [64]; |
| 88 | |
| 89 | #ifdef CONFIG_SMP |
| 90 | if (!cpu_isset(n, cpu_online_map)) |
| 91 | return 0; |
| 92 | #endif |
| 93 | |
| 94 | /* |
| 95 | * For the first processor also print the system type |
| 96 | */ |
| 97 | if (n == 0) |
| 98 | seq_printf(m, "system type\t\t: %s\n", get_system_type()); |
| 99 | |
| 100 | seq_printf(m, "processor\t\t: %ld\n", n); |
| 101 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", |
| 102 | cpu_has_fpu ? " FPU V%d.%d" : ""); |
| 103 | seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ? |
| 104 | current_cpu_data.cputype : CPU_UNKNOWN], |
| 105 | (version >> 4) & 0x0f, version & 0x0f, |
| 106 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); |
| 107 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", |
| 108 | loops_per_jiffy / (500000/HZ), |
| 109 | (loops_per_jiffy / (5000/HZ)) % 100); |
| 110 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
| 111 | seq_printf(m, "microsecond timers\t: %s\n", |
| 112 | cpu_has_counter ? "yes" : "no"); |
| 113 | seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize); |
| 114 | seq_printf(m, "extra interrupt vector\t: %s\n", |
| 115 | cpu_has_divec ? "yes" : "no"); |
| 116 | seq_printf(m, "hardware watchpoint\t: %s\n", |
| 117 | cpu_has_watch ? "yes" : "no"); |
| 118 | |
| 119 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", |
| 120 | cpu_has_vce ? "%u" : "not available"); |
| 121 | seq_printf(m, fmt, 'D', vced_count); |
| 122 | seq_printf(m, fmt, 'I', vcei_count); |
| 123 | |
| 124 | return 0; |
| 125 | } |
| 126 | |
| 127 | static void *c_start(struct seq_file *m, loff_t *pos) |
| 128 | { |
| 129 | unsigned long i = *pos; |
| 130 | |
| 131 | return i < NR_CPUS ? (void *) (i + 1) : NULL; |
| 132 | } |
| 133 | |
| 134 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
| 135 | { |
| 136 | ++*pos; |
| 137 | return c_start(m, pos); |
| 138 | } |
| 139 | |
| 140 | static void c_stop(struct seq_file *m, void *v) |
| 141 | { |
| 142 | } |
| 143 | |
| 144 | struct seq_operations cpuinfo_op = { |
| 145 | .start = c_start, |
| 146 | .next = c_next, |
| 147 | .stop = c_stop, |
| 148 | .show = show_cpuinfo, |
| 149 | }; |