| Haavard Skinnemoen | bc157b7 | 2006-09-25 23:32:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Static Memory Controller for AT32 chips |
| 3 | * |
| 4 | * Copyright (C) 2006 Atmel Corporation |
| 5 | * |
| 6 | * Inspired by the OMAP2 General-Purpose Memory Controller interface |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | #ifndef __ARCH_AT32AP_SMC_H |
| 13 | #define __ARCH_AT32AP_SMC_H |
| 14 | |
| 15 | /* |
| 16 | * All timing parameters are in nanoseconds. |
| 17 | */ |
| 18 | struct smc_config { |
| 19 | /* Delay from address valid to assertion of given strobe */ |
| 20 | u16 ncs_read_setup; |
| 21 | u16 nrd_setup; |
| 22 | u16 ncs_write_setup; |
| 23 | u16 nwe_setup; |
| 24 | |
| 25 | /* Pulse length of given strobe */ |
| 26 | u16 ncs_read_pulse; |
| 27 | u16 nrd_pulse; |
| 28 | u16 ncs_write_pulse; |
| 29 | u16 nwe_pulse; |
| 30 | |
| 31 | /* Total cycle length of given operation */ |
| 32 | u16 read_cycle; |
| 33 | u16 write_cycle; |
| 34 | |
| 35 | /* Bus width in bytes */ |
| 36 | u8 bus_width; |
| 37 | |
| 38 | /* |
| 39 | * 0: Data is sampled on rising edge of NCS |
| 40 | * 1: Data is sampled on rising edge of NRD |
| 41 | */ |
| 42 | unsigned int nrd_controlled:1; |
| 43 | |
| 44 | /* |
| 45 | * 0: Data is driven on falling edge of NCS |
| 46 | * 1: Data is driven on falling edge of NWR |
| 47 | */ |
| 48 | unsigned int nwe_controlled:1; |
| 49 | |
| 50 | /* |
| 51 | * 0: Byte select access type |
| 52 | * 1: Byte write access type |
| 53 | */ |
| 54 | unsigned int byte_write:1; |
| 55 | }; |
| 56 | |
| 57 | extern int smc_set_configuration(int cs, const struct smc_config *config); |
| 58 | extern struct smc_config *smc_get_configuration(int cs); |
| 59 | |
| 60 | #endif /* __ARCH_AT32AP_SMC_H */ |