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review.evervolv.com / android_kernel_lge_hammerhead / 3d60f849341ac00e3dc47a3af94aaf9ba46d00fb / . / arch / m32r / lib / memset.S
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Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * linux/arch/m32r/lib/memset.S
3 *
4 * Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata
5 * Copyright (C) 2004 Hirokazu Takata
6 *
7 * void *memset(void *dst, int val, int len);
8 *
9 * dst: r0
10 * val: r1
11 * len: r2
12 * ret: r0
13 *
14 */
15/* $Id$ */
16
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]17
18 .text
19 .global memset
20
21#ifdef CONFIG_ISA_DUAL_ISSUE
22
23 .align 4
24memset:
25 mv r4, r0 || cmpz r2
26 jc r14
27 cmpui r2, #16
28 bnc qword_align_check
29 cmpui r2, #4
30 bc byte_set
31word_align_check: /* len >= 4 */
32 and3 r3, r4, #3
33 beqz r3, word_set
34 addi r3, #-4
35 neg r3, r3 /* r3 = -(r3 - 4) */
36align_word:
37 stb r1, @r4 || addi r4, #1
38 addi r2, #-1 || addi r3, #-1
39 bnez r3, align_word
40 cmpui r2, #4
41 bc byte_set
42word_set:
43 and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
44 sll3 r3, r1, #8
45 or r1, r3 || addi r4, #-4
46 sll3 r3, r1, #16
47 or r1, r3 || addi r2, #-4
48word_set_loop:
49 st r1, @+r4 || addi r2, #-4
50 bgtz r2, word_set_loop
51 bnez r2, byte_set_wrap
52 st r1, @+r4
53 jmp r14
54
55qword_align_check: /* len >= 16 */
56 and3 r3, r4, #15
57 bnez r3, word_align_check
58qword_set:
59 and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
60 sll3 r3, r1, #8
61 or r1, r3 || addi r4, #-4
62 sll3 r3, r1, #16
63 or r1, r3 || ldi r5, #16
64qword_set_loop:
65 ld r3, @(4,r4) /* cache line allocate */
66 st r1, @+r4 || addi r2, #-16
67 st r1, @+r4 || cmpu r2, r5
68 st r1, @+r4
69 st r1, @+r4
70 bnc qword_set_loop || cmpz r2
71 jc r14
72set_remainder:
73 cmpui r2, #4
74 bc byte_set_wrap1
75 addi r2, #-4
76 bra word_set_loop
77
78byte_set_wrap:
79 addi r2, #4
80 cmpz r2
81 jc r14
82byte_set_wrap1:
83 addi r4, #4
84#if defined(CONFIG_ISA_M32R2)
85byte_set:
86 addi r2, #-1 || stb r1, @r4+
87 bnez r2, byte_set
88#elif defined(CONFIG_ISA_M32R)
89byte_set:
90 addi r2, #-1 || stb r1, @r4
91 addi r4, #1
92 bnez r2, byte_set
93#else
94#error unknown isa configuration
95#endif
96end_memset:
97 jmp r14
98
99#else /* not CONFIG_ISA_DUAL_ISSUE */
100
101 .align 4
102memset:
103 mv r4, r0
104 beqz r2, end_memset
105 cmpui r2, #16
106 bnc qword_align_check
107 cmpui r2, #4
108 bc byte_set
109word_align_check: /* len >= 4 */
110 and3 r3, r4, #3
111 beqz r3, word_set
112 addi r3, #-4
113 neg r3, r3 /* r3 = -(r3 - 4) */
114align_word:
115 stb r1, @r4
116 addi r4, #1
117 addi r2, #-1
118 addi r3, #-1
119 bnez r3, align_word
120 cmpui r2, #4
121 bc byte_set
122word_set:
123 and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
124 sll3 r3, r1, #8
125 or r1, r3
126 sll3 r3, r1, #16
127 or r1, r3
128 addi r2, #-4
129 addi r4, #-4
130word_set_loop:
131 st r1, @+r4
132 addi r2, #-4
133 bgtz r2, word_set_loop
134 bnez r2, byte_set_wrap
135 st r1, @+r4
136 jmp r14
137
138qword_align_check: /* len >= 16 */
139 and3 r3, r4, #15
140 bnez r3, word_align_check
141qword_set:
142 and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
143 sll3 r3, r1, #8
144 or r1, r3
145 sll3 r3, r1, #16
146 or r1, r3
147 addi r4, #-4
148qword_set_loop:
149 ld r3, @(4,r4) /* cache line allocate */
150 addi r2, #-16
151 st r1, @+r4
152 st r1, @+r4
153 cmpui r2, #16
154 st r1, @+r4
155 st r1, @+r4
156 bnc qword_set_loop
157 bnez r2, set_remainder
158 jmp r14
159set_remainder:
160 cmpui r2, #4
161 bc byte_set_wrap1
162 addi r2, #-4
163 bra word_set_loop
164
165byte_set_wrap:
166 addi r2, #4
167 beqz r2, end_memset
168byte_set_wrap1:
169 addi r4, #4
170byte_set:
171 addi r2, #-1
172 stb r1, @r4
173 addi r4, #1
174 bnez r2, byte_set
175end_memset:
176 jmp r14
177
178#endif /* not CONFIG_ISA_DUAL_ISSUE */
179
180 .end