Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/s390/crypto/z90main.c |
| 3 | * |
| 4 | * z90crypt 1.3.2 |
| 5 | * |
| 6 | * Copyright (C) 2001, 2004 IBM Corporation |
| 7 | * Author(s): Robert Burroughs (burrough@us.ibm.com) |
| 8 | * Eric Rossman (edrossma@us.ibm.com) |
| 9 | * |
| 10 | * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com) |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License as published by |
| 14 | * the Free Software Foundation; either version 2, or (at your option) |
| 15 | * any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | */ |
| 26 | |
| 27 | #include <asm/uaccess.h> // copy_(from|to)_user |
| 28 | #include <linux/compat.h> |
| 29 | #include <linux/compiler.h> |
| 30 | #include <linux/delay.h> // mdelay |
| 31 | #include <linux/init.h> |
| 32 | #include <linux/interrupt.h> // for tasklets |
| 33 | #include <linux/ioctl32.h> |
| 34 | #include <linux/module.h> |
| 35 | #include <linux/moduleparam.h> |
| 36 | #include <linux/kobject_uevent.h> |
| 37 | #include <linux/proc_fs.h> |
| 38 | #include <linux/syscalls.h> |
| 39 | #include <linux/version.h> |
| 40 | #include "z90crypt.h" |
| 41 | #include "z90common.h" |
| 42 | #ifndef Z90CRYPT_USE_HOTPLUG |
| 43 | #include <linux/miscdevice.h> |
| 44 | #endif |
| 45 | |
| 46 | #define VERSION_CODE(vers, rel, seq) (((vers)<<16) | ((rel)<<8) | (seq)) |
| 47 | #if LINUX_VERSION_CODE < VERSION_CODE(2,4,0) /* version < 2.4 */ |
| 48 | # error "This kernel is too old: not supported" |
| 49 | #endif |
| 50 | #if LINUX_VERSION_CODE > VERSION_CODE(2,7,0) /* version > 2.6 */ |
| 51 | # error "This kernel is too recent: not supported by this file" |
| 52 | #endif |
| 53 | |
| 54 | #define VERSION_Z90MAIN_C "$Revision: 1.57 $" |
| 55 | |
| 56 | static char z90main_version[] __initdata = |
| 57 | "z90main.o (" VERSION_Z90MAIN_C "/" |
| 58 | VERSION_Z90COMMON_H "/" VERSION_Z90CRYPT_H ")"; |
| 59 | |
| 60 | extern char z90hardware_version[]; |
| 61 | |
| 62 | /** |
| 63 | * Defaults that may be modified. |
| 64 | */ |
| 65 | |
| 66 | #ifndef Z90CRYPT_USE_HOTPLUG |
| 67 | /** |
| 68 | * You can specify a different minor at compile time. |
| 69 | */ |
| 70 | #ifndef Z90CRYPT_MINOR |
| 71 | #define Z90CRYPT_MINOR MISC_DYNAMIC_MINOR |
| 72 | #endif |
| 73 | #else |
| 74 | /** |
| 75 | * You can specify a different major at compile time. |
| 76 | */ |
| 77 | #ifndef Z90CRYPT_MAJOR |
| 78 | #define Z90CRYPT_MAJOR 0 |
| 79 | #endif |
| 80 | #endif |
| 81 | |
| 82 | /** |
| 83 | * You can specify a different domain at compile time or on the insmod |
| 84 | * command line. |
| 85 | */ |
| 86 | #ifndef DOMAIN_INDEX |
| 87 | #define DOMAIN_INDEX -1 |
| 88 | #endif |
| 89 | |
| 90 | /** |
| 91 | * This is the name under which the device is registered in /proc/modules. |
| 92 | */ |
| 93 | #define REG_NAME "z90crypt" |
| 94 | |
| 95 | /** |
| 96 | * Cleanup should run every CLEANUPTIME seconds and should clean up requests |
| 97 | * older than CLEANUPTIME seconds in the past. |
| 98 | */ |
| 99 | #ifndef CLEANUPTIME |
| 100 | #define CLEANUPTIME 20 |
| 101 | #endif |
| 102 | |
| 103 | /** |
| 104 | * Config should run every CONFIGTIME seconds |
| 105 | */ |
| 106 | #ifndef CONFIGTIME |
| 107 | #define CONFIGTIME 30 |
| 108 | #endif |
| 109 | |
| 110 | /** |
| 111 | * The first execution of the config task should take place |
| 112 | * immediately after initialization |
| 113 | */ |
| 114 | #ifndef INITIAL_CONFIGTIME |
| 115 | #define INITIAL_CONFIGTIME 1 |
| 116 | #endif |
| 117 | |
| 118 | /** |
| 119 | * Reader should run every READERTIME milliseconds |
| 120 | * With the 100Hz patch for s390, z90crypt can lock the system solid while |
| 121 | * under heavy load. We'll try to avoid that. |
| 122 | */ |
| 123 | #ifndef READERTIME |
| 124 | #if HZ > 1000 |
| 125 | #define READERTIME 2 |
| 126 | #else |
| 127 | #define READERTIME 10 |
| 128 | #endif |
| 129 | #endif |
| 130 | |
| 131 | /** |
| 132 | * turn long device array index into device pointer |
| 133 | */ |
| 134 | #define LONG2DEVPTR(ndx) (z90crypt.device_p[(ndx)]) |
| 135 | |
| 136 | /** |
| 137 | * turn short device array index into long device array index |
| 138 | */ |
| 139 | #define SHRT2LONG(ndx) (z90crypt.overall_device_x.device_index[(ndx)]) |
| 140 | |
| 141 | /** |
| 142 | * turn short device array index into device pointer |
| 143 | */ |
| 144 | #define SHRT2DEVPTR(ndx) LONG2DEVPTR(SHRT2LONG(ndx)) |
| 145 | |
| 146 | /** |
| 147 | * Status for a work-element |
| 148 | */ |
| 149 | #define STAT_DEFAULT 0x00 // request has not been processed |
| 150 | |
| 151 | #define STAT_ROUTED 0x80 // bit 7: requests get routed to specific device |
| 152 | // else, device is determined each write |
| 153 | #define STAT_FAILED 0x40 // bit 6: this bit is set if the request failed |
| 154 | // before being sent to the hardware. |
| 155 | #define STAT_WRITTEN 0x30 // bits 5-4: work to be done, not sent to device |
| 156 | // 0x20 // UNUSED state |
| 157 | #define STAT_READPEND 0x10 // bits 5-4: work done, we're returning data now |
| 158 | #define STAT_NOWORK 0x00 // bits off: no work on any queue |
| 159 | #define STAT_RDWRMASK 0x30 // mask for bits 5-4 |
| 160 | |
| 161 | /** |
| 162 | * Macros to check the status RDWRMASK |
| 163 | */ |
| 164 | #define CHK_RDWRMASK(statbyte) ((statbyte) & STAT_RDWRMASK) |
| 165 | #define SET_RDWRMASK(statbyte, newval) \ |
| 166 | {(statbyte) &= ~STAT_RDWRMASK; (statbyte) |= newval;} |
| 167 | |
| 168 | /** |
| 169 | * Audit Trail. Progress of a Work element |
| 170 | * audit[0]: Unless noted otherwise, these bits are all set by the process |
| 171 | */ |
| 172 | #define FP_COPYFROM 0x80 // Caller's buffer has been copied to work element |
| 173 | #define FP_BUFFREQ 0x40 // Low Level buffer requested |
| 174 | #define FP_BUFFGOT 0x20 // Low Level buffer obtained |
| 175 | #define FP_SENT 0x10 // Work element sent to a crypto device |
| 176 | // (may be set by process or by reader task) |
| 177 | #define FP_PENDING 0x08 // Work element placed on pending queue |
| 178 | // (may be set by process or by reader task) |
| 179 | #define FP_REQUEST 0x04 // Work element placed on request queue |
| 180 | #define FP_ASLEEP 0x02 // Work element about to sleep |
| 181 | #define FP_AWAKE 0x01 // Work element has been awakened |
| 182 | |
| 183 | /** |
| 184 | * audit[1]: These bits are set by the reader task and/or the cleanup task |
| 185 | */ |
| 186 | #define FP_NOTPENDING 0x80 // Work element removed from pending queue |
| 187 | #define FP_AWAKENING 0x40 // Caller about to be awakened |
| 188 | #define FP_TIMEDOUT 0x20 // Caller timed out |
| 189 | #define FP_RESPSIZESET 0x10 // Response size copied to work element |
| 190 | #define FP_RESPADDRCOPIED 0x08 // Response address copied to work element |
| 191 | #define FP_RESPBUFFCOPIED 0x04 // Response buffer copied to work element |
| 192 | #define FP_REMREQUEST 0x02 // Work element removed from request queue |
| 193 | #define FP_SIGNALED 0x01 // Work element was awakened by a signal |
| 194 | |
| 195 | /** |
| 196 | * audit[2]: unused |
| 197 | */ |
| 198 | |
| 199 | /** |
| 200 | * state of the file handle in private_data.status |
| 201 | */ |
| 202 | #define STAT_OPEN 0 |
| 203 | #define STAT_CLOSED 1 |
| 204 | |
| 205 | /** |
| 206 | * PID() expands to the process ID of the current process |
| 207 | */ |
| 208 | #define PID() (current->pid) |
| 209 | |
| 210 | /** |
| 211 | * Selected Constants. The number of APs and the number of devices |
| 212 | */ |
| 213 | #ifndef Z90CRYPT_NUM_APS |
| 214 | #define Z90CRYPT_NUM_APS 64 |
| 215 | #endif |
| 216 | #ifndef Z90CRYPT_NUM_DEVS |
| 217 | #define Z90CRYPT_NUM_DEVS Z90CRYPT_NUM_APS |
| 218 | #endif |
| 219 | |
| 220 | /** |
| 221 | * Buffer size for receiving responses. The maximum Response Size |
| 222 | * is actually the maximum request size, since in an error condition |
| 223 | * the request itself may be returned unchanged. |
| 224 | */ |
| 225 | #define MAX_RESPONSE_SIZE 0x0000077C |
| 226 | |
| 227 | /** |
| 228 | * A count and status-byte mask |
| 229 | */ |
| 230 | struct status { |
| 231 | int st_count; // # of enabled devices |
| 232 | int disabled_count; // # of disabled devices |
| 233 | int user_disabled_count; // # of devices disabled via proc fs |
| 234 | unsigned char st_mask[Z90CRYPT_NUM_APS]; // current status mask |
| 235 | }; |
| 236 | |
| 237 | /** |
| 238 | * The array of device indexes is a mechanism for fast indexing into |
| 239 | * a long (and sparse) array. For instance, if APs 3, 9 and 47 are |
| 240 | * installed, z90CDeviceIndex[0] is 3, z90CDeviceIndex[1] is 9, and |
| 241 | * z90CDeviceIndex[2] is 47. |
| 242 | */ |
| 243 | struct device_x { |
| 244 | int device_index[Z90CRYPT_NUM_DEVS]; |
| 245 | }; |
| 246 | |
| 247 | /** |
| 248 | * All devices are arranged in a single array: 64 APs |
| 249 | */ |
| 250 | struct device { |
| 251 | int dev_type; // PCICA, PCICC, PCIXCC_MCL2, |
| 252 | // PCIXCC_MCL3, CEX2C |
| 253 | enum devstat dev_stat; // current device status |
| 254 | int dev_self_x; // Index in array |
| 255 | int disabled; // Set when device is in error |
| 256 | int user_disabled; // Set when device is disabled by user |
| 257 | int dev_q_depth; // q depth |
| 258 | unsigned char * dev_resp_p; // Response buffer address |
| 259 | int dev_resp_l; // Response Buffer length |
| 260 | int dev_caller_count; // Number of callers |
| 261 | int dev_total_req_cnt; // # requests for device since load |
| 262 | struct list_head dev_caller_list; // List of callers |
| 263 | }; |
| 264 | |
| 265 | /** |
| 266 | * There's a struct status and a struct device_x for each device type. |
| 267 | */ |
| 268 | struct hdware_block { |
| 269 | struct status hdware_mask; |
| 270 | struct status type_mask[Z90CRYPT_NUM_TYPES]; |
| 271 | struct device_x type_x_addr[Z90CRYPT_NUM_TYPES]; |
| 272 | unsigned char device_type_array[Z90CRYPT_NUM_APS]; |
| 273 | }; |
| 274 | |
| 275 | /** |
| 276 | * z90crypt is the topmost data structure in the hierarchy. |
| 277 | */ |
| 278 | struct z90crypt { |
| 279 | int max_count; // Nr of possible crypto devices |
| 280 | struct status mask; |
| 281 | int q_depth_array[Z90CRYPT_NUM_DEVS]; |
| 282 | int dev_type_array[Z90CRYPT_NUM_DEVS]; |
| 283 | struct device_x overall_device_x; // array device indexes |
| 284 | struct device * device_p[Z90CRYPT_NUM_DEVS]; |
| 285 | int terminating; |
| 286 | int domain_established;// TRUE: domain has been found |
| 287 | int cdx; // Crypto Domain Index |
| 288 | int len; // Length of this data structure |
| 289 | struct hdware_block *hdware_info; |
| 290 | }; |
| 291 | |
| 292 | /** |
| 293 | * An array of these structures is pointed to from dev_caller |
| 294 | * The length of the array depends on the device type. For APs, |
| 295 | * there are 8. |
| 296 | * |
| 297 | * The caller buffer is allocated to the user at OPEN. At WRITE, |
| 298 | * it contains the request; at READ, the response. The function |
| 299 | * send_to_crypto_device converts the request to device-dependent |
| 300 | * form and use the caller's OPEN-allocated buffer for the response. |
| 301 | */ |
| 302 | struct caller { |
| 303 | int caller_buf_l; // length of original request |
| 304 | unsigned char * caller_buf_p; // Original request on WRITE |
| 305 | int caller_dev_dep_req_l; // len device dependent request |
| 306 | unsigned char * caller_dev_dep_req_p; // Device dependent form |
| 307 | unsigned char caller_id[8]; // caller-supplied message id |
| 308 | struct list_head caller_liste; |
| 309 | unsigned char caller_dev_dep_req[MAX_RESPONSE_SIZE]; |
| 310 | }; |
| 311 | |
| 312 | /** |
| 313 | * Function prototypes from z90hardware.c |
| 314 | */ |
| 315 | enum hdstat query_online(int, int, int, int *, int *); |
| 316 | enum devstat reset_device(int, int, int); |
| 317 | enum devstat send_to_AP(int, int, int, unsigned char *); |
| 318 | enum devstat receive_from_AP(int, int, int, unsigned char *, unsigned char *); |
| 319 | int convert_request(unsigned char *, int, short, int, int, int *, |
| 320 | unsigned char *); |
| 321 | int convert_response(unsigned char *, unsigned char *, int *, unsigned char *); |
| 322 | |
| 323 | /** |
| 324 | * Low level function prototypes |
| 325 | */ |
| 326 | static int create_z90crypt(int *); |
| 327 | static int refresh_z90crypt(int *); |
| 328 | static int find_crypto_devices(struct status *); |
| 329 | static int create_crypto_device(int); |
| 330 | static int destroy_crypto_device(int); |
| 331 | static void destroy_z90crypt(void); |
| 332 | static int refresh_index_array(struct status *, struct device_x *); |
| 333 | static int probe_device_type(struct device *); |
| 334 | static int probe_PCIXCC_type(struct device *); |
| 335 | |
| 336 | /** |
| 337 | * proc fs definitions |
| 338 | */ |
| 339 | static struct proc_dir_entry *z90crypt_entry; |
| 340 | |
| 341 | /** |
| 342 | * data structures |
| 343 | */ |
| 344 | |
| 345 | /** |
| 346 | * work_element.opener points back to this structure |
| 347 | */ |
| 348 | struct priv_data { |
| 349 | pid_t opener_pid; |
| 350 | unsigned char status; // 0: open 1: closed |
| 351 | }; |
| 352 | |
| 353 | /** |
| 354 | * A work element is allocated for each request |
| 355 | */ |
| 356 | struct work_element { |
| 357 | struct priv_data *priv_data; |
| 358 | pid_t pid; |
| 359 | int devindex; // index of device processing this w_e |
| 360 | // (If request did not specify device, |
| 361 | // -1 until placed onto a queue) |
| 362 | int devtype; |
| 363 | struct list_head liste; // used for requestq and pendingq |
| 364 | char buffer[128]; // local copy of user request |
| 365 | int buff_size; // size of the buffer for the request |
| 366 | char resp_buff[RESPBUFFSIZE]; |
| 367 | int resp_buff_size; |
| 368 | char __user * resp_addr; // address of response in user space |
| 369 | unsigned int funccode; // function code of request |
| 370 | wait_queue_head_t waitq; |
| 371 | unsigned long requestsent; // time at which the request was sent |
| 372 | atomic_t alarmrung; // wake-up signal |
| 373 | unsigned char caller_id[8]; // pid + counter, for this w_e |
| 374 | unsigned char status[1]; // bits to mark status of the request |
| 375 | unsigned char audit[3]; // record of work element's progress |
| 376 | unsigned char * requestptr; // address of request buffer |
| 377 | int retcode; // return code of request |
| 378 | }; |
| 379 | |
| 380 | /** |
| 381 | * High level function prototypes |
| 382 | */ |
| 383 | static int z90crypt_open(struct inode *, struct file *); |
| 384 | static int z90crypt_release(struct inode *, struct file *); |
| 385 | static ssize_t z90crypt_read(struct file *, char __user *, size_t, loff_t *); |
| 386 | static ssize_t z90crypt_write(struct file *, const char __user *, |
| 387 | size_t, loff_t *); |
| 388 | static int z90crypt_ioctl(struct inode *, struct file *, |
| 389 | unsigned int, unsigned long); |
| 390 | |
| 391 | static void z90crypt_reader_task(unsigned long); |
| 392 | static void z90crypt_schedule_reader_task(unsigned long); |
| 393 | static void z90crypt_config_task(unsigned long); |
| 394 | static void z90crypt_cleanup_task(unsigned long); |
| 395 | |
| 396 | static int z90crypt_status(char *, char **, off_t, int, int *, void *); |
| 397 | static int z90crypt_status_write(struct file *, const char __user *, |
| 398 | unsigned long, void *); |
| 399 | |
| 400 | /** |
| 401 | * Hotplug support |
| 402 | */ |
| 403 | |
| 404 | #ifdef Z90CRYPT_USE_HOTPLUG |
| 405 | #define Z90CRYPT_HOTPLUG_ADD 1 |
| 406 | #define Z90CRYPT_HOTPLUG_REMOVE 2 |
| 407 | |
| 408 | static void z90crypt_hotplug_event(int, int, int); |
| 409 | #endif |
| 410 | |
| 411 | /** |
| 412 | * Storage allocated at initialization and used throughout the life of |
| 413 | * this insmod |
| 414 | */ |
| 415 | #ifdef Z90CRYPT_USE_HOTPLUG |
| 416 | static int z90crypt_major = Z90CRYPT_MAJOR; |
| 417 | #endif |
| 418 | |
| 419 | static int domain = DOMAIN_INDEX; |
| 420 | static struct z90crypt z90crypt; |
| 421 | static int quiesce_z90crypt; |
| 422 | static spinlock_t queuespinlock; |
| 423 | static struct list_head request_list; |
| 424 | static int requestq_count; |
| 425 | static struct list_head pending_list; |
| 426 | static int pendingq_count; |
| 427 | |
| 428 | static struct tasklet_struct reader_tasklet; |
| 429 | static struct timer_list reader_timer; |
| 430 | static struct timer_list config_timer; |
| 431 | static struct timer_list cleanup_timer; |
| 432 | static atomic_t total_open; |
| 433 | static atomic_t z90crypt_step; |
| 434 | |
| 435 | static struct file_operations z90crypt_fops = { |
| 436 | .owner = THIS_MODULE, |
| 437 | .read = z90crypt_read, |
| 438 | .write = z90crypt_write, |
| 439 | .ioctl = z90crypt_ioctl, |
| 440 | .open = z90crypt_open, |
| 441 | .release = z90crypt_release |
| 442 | }; |
| 443 | |
| 444 | #ifndef Z90CRYPT_USE_HOTPLUG |
| 445 | static struct miscdevice z90crypt_misc_device = { |
| 446 | .minor = Z90CRYPT_MINOR, |
| 447 | .name = DEV_NAME, |
| 448 | .fops = &z90crypt_fops, |
| 449 | .devfs_name = DEV_NAME |
| 450 | }; |
| 451 | #endif |
| 452 | |
| 453 | /** |
| 454 | * Documentation values. |
| 455 | */ |
| 456 | MODULE_AUTHOR("zSeries Linux Crypto Team: Robert H. Burroughs, Eric D. Rossman" |
| 457 | "and Jochen Roehrig"); |
| 458 | MODULE_DESCRIPTION("zSeries Linux Cryptographic Coprocessor device driver, " |
| 459 | "Copyright 2001, 2004 IBM Corporation"); |
| 460 | MODULE_LICENSE("GPL"); |
| 461 | module_param(domain, int, 0); |
| 462 | MODULE_PARM_DESC(domain, "domain index for device"); |
| 463 | |
| 464 | #ifdef CONFIG_COMPAT |
| 465 | /** |
| 466 | * ioctl32 conversion routines |
| 467 | */ |
| 468 | struct ica_rsa_modexpo_32 { // For 32-bit callers |
| 469 | compat_uptr_t inputdata; |
| 470 | unsigned int inputdatalength; |
| 471 | compat_uptr_t outputdata; |
| 472 | unsigned int outputdatalength; |
| 473 | compat_uptr_t b_key; |
| 474 | compat_uptr_t n_modulus; |
| 475 | }; |
| 476 | |
| 477 | static int |
| 478 | trans_modexpo32(unsigned int fd, unsigned int cmd, unsigned long arg, |
| 479 | struct file *file) |
| 480 | { |
| 481 | struct ica_rsa_modexpo_32 __user *mex32u = compat_ptr(arg); |
| 482 | struct ica_rsa_modexpo_32 mex32k; |
| 483 | struct ica_rsa_modexpo __user *mex64; |
| 484 | int ret = 0; |
| 485 | unsigned int i; |
| 486 | |
| 487 | if (!access_ok(VERIFY_WRITE, mex32u, sizeof(struct ica_rsa_modexpo_32))) |
| 488 | return -EFAULT; |
| 489 | mex64 = compat_alloc_user_space(sizeof(struct ica_rsa_modexpo)); |
| 490 | if (!access_ok(VERIFY_WRITE, mex64, sizeof(struct ica_rsa_modexpo))) |
| 491 | return -EFAULT; |
| 492 | if (copy_from_user(&mex32k, mex32u, sizeof(struct ica_rsa_modexpo_32))) |
| 493 | return -EFAULT; |
| 494 | if (__put_user(compat_ptr(mex32k.inputdata), &mex64->inputdata) || |
| 495 | __put_user(mex32k.inputdatalength, &mex64->inputdatalength) || |
| 496 | __put_user(compat_ptr(mex32k.outputdata), &mex64->outputdata) || |
| 497 | __put_user(mex32k.outputdatalength, &mex64->outputdatalength) || |
| 498 | __put_user(compat_ptr(mex32k.b_key), &mex64->b_key) || |
| 499 | __put_user(compat_ptr(mex32k.n_modulus), &mex64->n_modulus)) |
| 500 | return -EFAULT; |
| 501 | ret = sys_ioctl(fd, cmd, (unsigned long)mex64); |
| 502 | if (!ret) |
| 503 | if (__get_user(i, &mex64->outputdatalength) || |
| 504 | __put_user(i, &mex32u->outputdatalength)) |
| 505 | ret = -EFAULT; |
| 506 | return ret; |
| 507 | } |
| 508 | |
| 509 | struct ica_rsa_modexpo_crt_32 { // For 32-bit callers |
| 510 | compat_uptr_t inputdata; |
| 511 | unsigned int inputdatalength; |
| 512 | compat_uptr_t outputdata; |
| 513 | unsigned int outputdatalength; |
| 514 | compat_uptr_t bp_key; |
| 515 | compat_uptr_t bq_key; |
| 516 | compat_uptr_t np_prime; |
| 517 | compat_uptr_t nq_prime; |
| 518 | compat_uptr_t u_mult_inv; |
| 519 | }; |
| 520 | |
| 521 | static int |
| 522 | trans_modexpo_crt32(unsigned int fd, unsigned int cmd, unsigned long arg, |
| 523 | struct file *file) |
| 524 | { |
| 525 | struct ica_rsa_modexpo_crt_32 __user *crt32u = compat_ptr(arg); |
| 526 | struct ica_rsa_modexpo_crt_32 crt32k; |
| 527 | struct ica_rsa_modexpo_crt __user *crt64; |
| 528 | int ret = 0; |
| 529 | unsigned int i; |
| 530 | |
| 531 | if (!access_ok(VERIFY_WRITE, crt32u, |
| 532 | sizeof(struct ica_rsa_modexpo_crt_32))) |
| 533 | return -EFAULT; |
| 534 | crt64 = compat_alloc_user_space(sizeof(struct ica_rsa_modexpo_crt)); |
| 535 | if (!access_ok(VERIFY_WRITE, crt64, sizeof(struct ica_rsa_modexpo_crt))) |
| 536 | return -EFAULT; |
| 537 | if (copy_from_user(&crt32k, crt32u, |
| 538 | sizeof(struct ica_rsa_modexpo_crt_32))) |
| 539 | return -EFAULT; |
| 540 | if (__put_user(compat_ptr(crt32k.inputdata), &crt64->inputdata) || |
| 541 | __put_user(crt32k.inputdatalength, &crt64->inputdatalength) || |
| 542 | __put_user(compat_ptr(crt32k.outputdata), &crt64->outputdata) || |
| 543 | __put_user(crt32k.outputdatalength, &crt64->outputdatalength) || |
| 544 | __put_user(compat_ptr(crt32k.bp_key), &crt64->bp_key) || |
| 545 | __put_user(compat_ptr(crt32k.bq_key), &crt64->bq_key) || |
| 546 | __put_user(compat_ptr(crt32k.np_prime), &crt64->np_prime) || |
| 547 | __put_user(compat_ptr(crt32k.nq_prime), &crt64->nq_prime) || |
| 548 | __put_user(compat_ptr(crt32k.u_mult_inv), &crt64->u_mult_inv)) |
| 549 | ret = -EFAULT; |
| 550 | if (!ret) |
| 551 | ret = sys_ioctl(fd, cmd, (unsigned long)crt64); |
| 552 | if (!ret) |
| 553 | if (__get_user(i, &crt64->outputdatalength) || |
| 554 | __put_user(i, &crt32u->outputdatalength)) |
| 555 | ret = -EFAULT; |
| 556 | return ret; |
| 557 | } |
| 558 | |
| 559 | static int compatible_ioctls[] = { |
| 560 | ICAZ90STATUS, Z90QUIESCE, Z90STAT_TOTALCOUNT, Z90STAT_PCICACOUNT, |
| 561 | Z90STAT_PCICCCOUNT, Z90STAT_PCIXCCCOUNT, Z90STAT_PCIXCCMCL2COUNT, |
| 562 | Z90STAT_PCIXCCMCL3COUNT, Z90STAT_CEX2CCOUNT, Z90STAT_REQUESTQ_COUNT, |
| 563 | Z90STAT_PENDINGQ_COUNT, Z90STAT_TOTALOPEN_COUNT, Z90STAT_DOMAIN_INDEX, |
| 564 | Z90STAT_STATUS_MASK, Z90STAT_QDEPTH_MASK, Z90STAT_PERDEV_REQCNT, |
| 565 | }; |
| 566 | |
| 567 | static void z90_unregister_ioctl32s(void) |
| 568 | { |
| 569 | int i; |
| 570 | |
| 571 | unregister_ioctl32_conversion(ICARSAMODEXPO); |
| 572 | unregister_ioctl32_conversion(ICARSACRT); |
| 573 | |
| 574 | for(i = 0; i < ARRAY_SIZE(compatible_ioctls); i++) |
| 575 | unregister_ioctl32_conversion(compatible_ioctls[i]); |
| 576 | } |
| 577 | |
| 578 | static int z90_register_ioctl32s(void) |
| 579 | { |
| 580 | int result, i; |
| 581 | |
| 582 | result = register_ioctl32_conversion(ICARSAMODEXPO, trans_modexpo32); |
| 583 | if (result == -EBUSY) { |
| 584 | unregister_ioctl32_conversion(ICARSAMODEXPO); |
| 585 | result = register_ioctl32_conversion(ICARSAMODEXPO, |
| 586 | trans_modexpo32); |
| 587 | } |
| 588 | if (result) |
| 589 | return result; |
| 590 | result = register_ioctl32_conversion(ICARSACRT, trans_modexpo_crt32); |
| 591 | if (result == -EBUSY) { |
| 592 | unregister_ioctl32_conversion(ICARSACRT); |
| 593 | result = register_ioctl32_conversion(ICARSACRT, |
| 594 | trans_modexpo_crt32); |
| 595 | } |
| 596 | if (result) |
| 597 | return result; |
| 598 | |
| 599 | for(i = 0; i < ARRAY_SIZE(compatible_ioctls); i++) { |
| 600 | result = register_ioctl32_conversion(compatible_ioctls[i], 0); |
| 601 | if (result == -EBUSY) { |
| 602 | unregister_ioctl32_conversion(compatible_ioctls[i]); |
| 603 | result = register_ioctl32_conversion( |
| 604 | compatible_ioctls[i], 0); |
| 605 | } |
| 606 | if (result) |
| 607 | return result; |
| 608 | } |
| 609 | return 0; |
| 610 | } |
| 611 | #else // !CONFIG_COMPAT |
| 612 | static inline void z90_unregister_ioctl32s(void) |
| 613 | { |
| 614 | } |
| 615 | |
| 616 | static inline int z90_register_ioctl32s(void) |
| 617 | { |
| 618 | return 0; |
| 619 | } |
| 620 | #endif |
| 621 | |
| 622 | /** |
| 623 | * The module initialization code. |
| 624 | */ |
| 625 | static int __init |
| 626 | z90crypt_init_module(void) |
| 627 | { |
| 628 | int result, nresult; |
| 629 | struct proc_dir_entry *entry; |
| 630 | |
| 631 | PDEBUG("PID %d\n", PID()); |
| 632 | |
| 633 | if ((domain < -1) || (domain > 15)) { |
| 634 | PRINTKW("Invalid param: domain = %d. Not loading.\n", domain); |
| 635 | return -EINVAL; |
| 636 | } |
| 637 | |
| 638 | #ifndef Z90CRYPT_USE_HOTPLUG |
| 639 | /* Register as misc device with given minor (or get a dynamic one). */ |
| 640 | result = misc_register(&z90crypt_misc_device); |
| 641 | if (result < 0) { |
| 642 | PRINTKW(KERN_ERR "misc_register (minor %d) failed with %d\n", |
| 643 | z90crypt_misc_device.minor, result); |
| 644 | return result; |
| 645 | } |
| 646 | #else |
| 647 | /* Register the major (or get a dynamic one). */ |
| 648 | result = register_chrdev(z90crypt_major, REG_NAME, &z90crypt_fops); |
| 649 | if (result < 0) { |
| 650 | PRINTKW("register_chrdev (major %d) failed with %d.\n", |
| 651 | z90crypt_major, result); |
| 652 | return result; |
| 653 | } |
| 654 | |
| 655 | if (z90crypt_major == 0) |
| 656 | z90crypt_major = result; |
| 657 | #endif |
| 658 | |
| 659 | PDEBUG("Registered " DEV_NAME " with result %d\n", result); |
| 660 | |
| 661 | result = create_z90crypt(&domain); |
| 662 | if (result != 0) { |
| 663 | PRINTKW("create_z90crypt (domain index %d) failed with %d.\n", |
| 664 | domain, result); |
| 665 | result = -ENOMEM; |
| 666 | goto init_module_cleanup; |
| 667 | } |
| 668 | |
| 669 | if (result == 0) { |
| 670 | PRINTKN("Version %d.%d.%d loaded, built on %s %s\n", |
| 671 | z90crypt_VERSION, z90crypt_RELEASE, z90crypt_VARIANT, |
| 672 | __DATE__, __TIME__); |
| 673 | PRINTKN("%s\n", z90main_version); |
| 674 | PRINTKN("%s\n", z90hardware_version); |
| 675 | PDEBUG("create_z90crypt (domain index %d) successful.\n", |
| 676 | domain); |
| 677 | } else |
| 678 | PRINTK("No devices at startup\n"); |
| 679 | |
| 680 | #ifdef Z90CRYPT_USE_HOTPLUG |
| 681 | /* generate hotplug event for device node generation */ |
| 682 | z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_ADD); |
| 683 | #endif |
| 684 | |
| 685 | /* Initialize globals. */ |
| 686 | spin_lock_init(&queuespinlock); |
| 687 | |
| 688 | INIT_LIST_HEAD(&pending_list); |
| 689 | pendingq_count = 0; |
| 690 | |
| 691 | INIT_LIST_HEAD(&request_list); |
| 692 | requestq_count = 0; |
| 693 | |
| 694 | quiesce_z90crypt = 0; |
| 695 | |
| 696 | atomic_set(&total_open, 0); |
| 697 | atomic_set(&z90crypt_step, 0); |
| 698 | |
| 699 | /* Set up the cleanup task. */ |
| 700 | init_timer(&cleanup_timer); |
| 701 | cleanup_timer.function = z90crypt_cleanup_task; |
| 702 | cleanup_timer.data = 0; |
| 703 | cleanup_timer.expires = jiffies + (CLEANUPTIME * HZ); |
| 704 | add_timer(&cleanup_timer); |
| 705 | |
| 706 | /* Set up the proc file system */ |
| 707 | entry = create_proc_entry("driver/z90crypt", 0644, 0); |
| 708 | if (entry) { |
| 709 | entry->nlink = 1; |
| 710 | entry->data = 0; |
| 711 | entry->read_proc = z90crypt_status; |
| 712 | entry->write_proc = z90crypt_status_write; |
| 713 | } |
| 714 | else |
| 715 | PRINTK("Couldn't create z90crypt proc entry\n"); |
| 716 | z90crypt_entry = entry; |
| 717 | |
| 718 | /* Set up the configuration task. */ |
| 719 | init_timer(&config_timer); |
| 720 | config_timer.function = z90crypt_config_task; |
| 721 | config_timer.data = 0; |
| 722 | config_timer.expires = jiffies + (INITIAL_CONFIGTIME * HZ); |
| 723 | add_timer(&config_timer); |
| 724 | |
| 725 | /* Set up the reader task */ |
| 726 | tasklet_init(&reader_tasklet, z90crypt_reader_task, 0); |
| 727 | init_timer(&reader_timer); |
| 728 | reader_timer.function = z90crypt_schedule_reader_task; |
| 729 | reader_timer.data = 0; |
| 730 | reader_timer.expires = jiffies + (READERTIME * HZ / 1000); |
| 731 | add_timer(&reader_timer); |
| 732 | |
| 733 | if ((result = z90_register_ioctl32s())) |
| 734 | goto init_module_cleanup; |
| 735 | |
| 736 | return 0; // success |
| 737 | |
| 738 | init_module_cleanup: |
| 739 | z90_unregister_ioctl32s(); |
| 740 | |
| 741 | #ifndef Z90CRYPT_USE_HOTPLUG |
| 742 | if ((nresult = misc_deregister(&z90crypt_misc_device))) |
| 743 | PRINTK("misc_deregister failed with %d.\n", nresult); |
| 744 | else |
| 745 | PDEBUG("misc_deregister successful.\n"); |
| 746 | #else |
| 747 | if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME))) |
| 748 | PRINTK("unregister_chrdev failed with %d.\n", nresult); |
| 749 | else |
| 750 | PDEBUG("unregister_chrdev successful.\n"); |
| 751 | #endif |
| 752 | |
| 753 | return result; // failure |
| 754 | } |
| 755 | |
| 756 | /** |
| 757 | * The module termination code |
| 758 | */ |
| 759 | static void __exit |
| 760 | z90crypt_cleanup_module(void) |
| 761 | { |
| 762 | int nresult; |
| 763 | |
| 764 | PDEBUG("PID %d\n", PID()); |
| 765 | |
| 766 | z90_unregister_ioctl32s(); |
| 767 | |
| 768 | remove_proc_entry("driver/z90crypt", 0); |
| 769 | |
| 770 | #ifndef Z90CRYPT_USE_HOTPLUG |
| 771 | if ((nresult = misc_deregister(&z90crypt_misc_device))) |
| 772 | PRINTK("misc_deregister failed with %d.\n", nresult); |
| 773 | else |
| 774 | PDEBUG("misc_deregister successful.\n"); |
| 775 | #else |
| 776 | z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_REMOVE); |
| 777 | |
| 778 | if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME))) |
| 779 | PRINTK("unregister_chrdev failed with %d.\n", nresult); |
| 780 | else |
| 781 | PDEBUG("unregister_chrdev successful.\n"); |
| 782 | #endif |
| 783 | |
| 784 | /* Remove the tasks */ |
| 785 | tasklet_kill(&reader_tasklet); |
| 786 | del_timer(&reader_timer); |
| 787 | del_timer(&config_timer); |
| 788 | del_timer(&cleanup_timer); |
| 789 | |
| 790 | destroy_z90crypt(); |
| 791 | |
| 792 | PRINTKN("Unloaded.\n"); |
| 793 | } |
| 794 | |
| 795 | /** |
| 796 | * Functions running under a process id |
| 797 | * |
| 798 | * The I/O functions: |
| 799 | * z90crypt_open |
| 800 | * z90crypt_release |
| 801 | * z90crypt_read |
| 802 | * z90crypt_write |
| 803 | * z90crypt_ioctl |
| 804 | * z90crypt_status |
| 805 | * z90crypt_status_write |
| 806 | * disable_card |
| 807 | * enable_card |
| 808 | * scan_char |
| 809 | * scan_string |
| 810 | * |
| 811 | * Helper functions: |
| 812 | * z90crypt_rsa |
| 813 | * z90crypt_prepare |
| 814 | * z90crypt_send |
| 815 | * z90crypt_process_results |
| 816 | * |
| 817 | */ |
| 818 | static int |
| 819 | z90crypt_open(struct inode *inode, struct file *filp) |
| 820 | { |
| 821 | struct priv_data *private_data_p; |
| 822 | |
| 823 | if (quiesce_z90crypt) |
| 824 | return -EQUIESCE; |
| 825 | |
| 826 | private_data_p = kmalloc(sizeof(struct priv_data), GFP_KERNEL); |
| 827 | if (!private_data_p) { |
| 828 | PRINTK("Memory allocate failed\n"); |
| 829 | return -ENOMEM; |
| 830 | } |
| 831 | |
| 832 | memset((void *)private_data_p, 0, sizeof(struct priv_data)); |
| 833 | private_data_p->status = STAT_OPEN; |
| 834 | private_data_p->opener_pid = PID(); |
| 835 | filp->private_data = private_data_p; |
| 836 | atomic_inc(&total_open); |
| 837 | |
| 838 | return 0; |
| 839 | } |
| 840 | |
| 841 | static int |
| 842 | z90crypt_release(struct inode *inode, struct file *filp) |
| 843 | { |
| 844 | struct priv_data *private_data_p = filp->private_data; |
| 845 | |
| 846 | PDEBUG("PID %d (filp %p)\n", PID(), filp); |
| 847 | |
| 848 | private_data_p->status = STAT_CLOSED; |
| 849 | memset(private_data_p, 0, sizeof(struct priv_data)); |
| 850 | kfree(private_data_p); |
| 851 | atomic_dec(&total_open); |
| 852 | |
| 853 | return 0; |
| 854 | } |
| 855 | |
| 856 | /* |
| 857 | * there are two read functions, of which compile options will choose one |
| 858 | * without USE_GET_RANDOM_BYTES |
| 859 | * => read() always returns -EPERM; |
| 860 | * otherwise |
| 861 | * => read() uses get_random_bytes() kernel function |
| 862 | */ |
| 863 | #ifndef USE_GET_RANDOM_BYTES |
| 864 | /** |
| 865 | * z90crypt_read will not be supported beyond z90crypt 1.3.1 |
| 866 | */ |
| 867 | static ssize_t |
| 868 | z90crypt_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos) |
| 869 | { |
| 870 | PDEBUG("filp %p (PID %d)\n", filp, PID()); |
| 871 | return -EPERM; |
| 872 | } |
| 873 | #else // we want to use get_random_bytes |
| 874 | /** |
| 875 | * read() just returns a string of random bytes. Since we have no way |
| 876 | * to generate these cryptographically, we just execute get_random_bytes |
| 877 | * for the length specified. |
| 878 | */ |
| 879 | #include <linux/random.h> |
| 880 | static ssize_t |
| 881 | z90crypt_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos) |
| 882 | { |
| 883 | unsigned char *temp_buff; |
| 884 | |
| 885 | PDEBUG("filp %p (PID %d)\n", filp, PID()); |
| 886 | |
| 887 | if (quiesce_z90crypt) |
| 888 | return -EQUIESCE; |
| 889 | if (count < 0) { |
| 890 | PRINTK("Requested random byte count negative: %ld\n", count); |
| 891 | return -EINVAL; |
| 892 | } |
| 893 | if (count > RESPBUFFSIZE) { |
| 894 | PDEBUG("count[%d] > RESPBUFFSIZE", count); |
| 895 | return -EINVAL; |
| 896 | } |
| 897 | if (count == 0) |
| 898 | return 0; |
| 899 | temp_buff = kmalloc(RESPBUFFSIZE, GFP_KERNEL); |
| 900 | if (!temp_buff) { |
| 901 | PRINTK("Memory allocate failed\n"); |
| 902 | return -ENOMEM; |
| 903 | } |
| 904 | get_random_bytes(temp_buff, count); |
| 905 | |
| 906 | if (copy_to_user(buf, temp_buff, count) != 0) { |
| 907 | kfree(temp_buff); |
| 908 | return -EFAULT; |
| 909 | } |
| 910 | kfree(temp_buff); |
| 911 | return count; |
| 912 | } |
| 913 | #endif |
| 914 | |
| 915 | /** |
| 916 | * Write is is not allowed |
| 917 | */ |
| 918 | static ssize_t |
| 919 | z90crypt_write(struct file *filp, const char __user *buf, size_t count, loff_t *f_pos) |
| 920 | { |
| 921 | PDEBUG("filp %p (PID %d)\n", filp, PID()); |
| 922 | return -EPERM; |
| 923 | } |
| 924 | |
| 925 | /** |
| 926 | * New status functions |
| 927 | */ |
| 928 | static inline int |
| 929 | get_status_totalcount(void) |
| 930 | { |
| 931 | return z90crypt.hdware_info->hdware_mask.st_count; |
| 932 | } |
| 933 | |
| 934 | static inline int |
| 935 | get_status_PCICAcount(void) |
| 936 | { |
| 937 | return z90crypt.hdware_info->type_mask[PCICA].st_count; |
| 938 | } |
| 939 | |
| 940 | static inline int |
| 941 | get_status_PCICCcount(void) |
| 942 | { |
| 943 | return z90crypt.hdware_info->type_mask[PCICC].st_count; |
| 944 | } |
| 945 | |
| 946 | static inline int |
| 947 | get_status_PCIXCCcount(void) |
| 948 | { |
| 949 | return z90crypt.hdware_info->type_mask[PCIXCC_MCL2].st_count + |
| 950 | z90crypt.hdware_info->type_mask[PCIXCC_MCL3].st_count; |
| 951 | } |
| 952 | |
| 953 | static inline int |
| 954 | get_status_PCIXCCMCL2count(void) |
| 955 | { |
| 956 | return z90crypt.hdware_info->type_mask[PCIXCC_MCL2].st_count; |
| 957 | } |
| 958 | |
| 959 | static inline int |
| 960 | get_status_PCIXCCMCL3count(void) |
| 961 | { |
| 962 | return z90crypt.hdware_info->type_mask[PCIXCC_MCL3].st_count; |
| 963 | } |
| 964 | |
| 965 | static inline int |
| 966 | get_status_CEX2Ccount(void) |
| 967 | { |
| 968 | return z90crypt.hdware_info->type_mask[CEX2C].st_count; |
| 969 | } |
| 970 | |
| 971 | static inline int |
| 972 | get_status_requestq_count(void) |
| 973 | { |
| 974 | return requestq_count; |
| 975 | } |
| 976 | |
| 977 | static inline int |
| 978 | get_status_pendingq_count(void) |
| 979 | { |
| 980 | return pendingq_count; |
| 981 | } |
| 982 | |
| 983 | static inline int |
| 984 | get_status_totalopen_count(void) |
| 985 | { |
| 986 | return atomic_read(&total_open); |
| 987 | } |
| 988 | |
| 989 | static inline int |
| 990 | get_status_domain_index(void) |
| 991 | { |
| 992 | return z90crypt.cdx; |
| 993 | } |
| 994 | |
| 995 | static inline unsigned char * |
| 996 | get_status_status_mask(unsigned char status[Z90CRYPT_NUM_APS]) |
| 997 | { |
| 998 | int i, ix; |
| 999 | |
| 1000 | memcpy(status, z90crypt.hdware_info->device_type_array, |
| 1001 | Z90CRYPT_NUM_APS); |
| 1002 | |
| 1003 | for (i = 0; i < get_status_totalcount(); i++) { |
| 1004 | ix = SHRT2LONG(i); |
| 1005 | if (LONG2DEVPTR(ix)->user_disabled) |
| 1006 | status[ix] = 0x0d; |
| 1007 | } |
| 1008 | |
| 1009 | return status; |
| 1010 | } |
| 1011 | |
| 1012 | static inline unsigned char * |
| 1013 | get_status_qdepth_mask(unsigned char qdepth[Z90CRYPT_NUM_APS]) |
| 1014 | { |
| 1015 | int i, ix; |
| 1016 | |
| 1017 | memset(qdepth, 0, Z90CRYPT_NUM_APS); |
| 1018 | |
| 1019 | for (i = 0; i < get_status_totalcount(); i++) { |
| 1020 | ix = SHRT2LONG(i); |
| 1021 | qdepth[ix] = LONG2DEVPTR(ix)->dev_caller_count; |
| 1022 | } |
| 1023 | |
| 1024 | return qdepth; |
| 1025 | } |
| 1026 | |
| 1027 | static inline unsigned int * |
| 1028 | get_status_perdevice_reqcnt(unsigned int reqcnt[Z90CRYPT_NUM_APS]) |
| 1029 | { |
| 1030 | int i, ix; |
| 1031 | |
| 1032 | memset(reqcnt, 0, Z90CRYPT_NUM_APS * sizeof(int)); |
| 1033 | |
| 1034 | for (i = 0; i < get_status_totalcount(); i++) { |
| 1035 | ix = SHRT2LONG(i); |
| 1036 | reqcnt[ix] = LONG2DEVPTR(ix)->dev_total_req_cnt; |
| 1037 | } |
| 1038 | |
| 1039 | return reqcnt; |
| 1040 | } |
| 1041 | |
| 1042 | static inline void |
| 1043 | init_work_element(struct work_element *we_p, |
| 1044 | struct priv_data *priv_data, pid_t pid) |
| 1045 | { |
| 1046 | int step; |
| 1047 | |
| 1048 | we_p->requestptr = (unsigned char *)we_p + sizeof(struct work_element); |
| 1049 | /* Come up with a unique id for this caller. */ |
| 1050 | step = atomic_inc_return(&z90crypt_step); |
| 1051 | memcpy(we_p->caller_id+0, (void *) &pid, sizeof(pid)); |
| 1052 | memcpy(we_p->caller_id+4, (void *) &step, sizeof(step)); |
| 1053 | we_p->pid = pid; |
| 1054 | we_p->priv_data = priv_data; |
| 1055 | we_p->status[0] = STAT_DEFAULT; |
| 1056 | we_p->audit[0] = 0x00; |
| 1057 | we_p->audit[1] = 0x00; |
| 1058 | we_p->audit[2] = 0x00; |
| 1059 | we_p->resp_buff_size = 0; |
| 1060 | we_p->retcode = 0; |
| 1061 | we_p->devindex = -1; |
| 1062 | we_p->devtype = -1; |
| 1063 | atomic_set(&we_p->alarmrung, 0); |
| 1064 | init_waitqueue_head(&we_p->waitq); |
| 1065 | INIT_LIST_HEAD(&(we_p->liste)); |
| 1066 | } |
| 1067 | |
| 1068 | static inline int |
| 1069 | allocate_work_element(struct work_element **we_pp, |
| 1070 | struct priv_data *priv_data_p, pid_t pid) |
| 1071 | { |
| 1072 | struct work_element *we_p; |
| 1073 | |
| 1074 | we_p = (struct work_element *) get_zeroed_page(GFP_KERNEL); |
| 1075 | if (!we_p) |
| 1076 | return -ENOMEM; |
| 1077 | init_work_element(we_p, priv_data_p, pid); |
| 1078 | *we_pp = we_p; |
| 1079 | return 0; |
| 1080 | } |
| 1081 | |
| 1082 | static inline void |
| 1083 | remove_device(struct device *device_p) |
| 1084 | { |
| 1085 | if (!device_p || (device_p->disabled != 0)) |
| 1086 | return; |
| 1087 | device_p->disabled = 1; |
| 1088 | z90crypt.hdware_info->type_mask[device_p->dev_type].disabled_count++; |
| 1089 | z90crypt.hdware_info->hdware_mask.disabled_count++; |
| 1090 | } |
| 1091 | |
| 1092 | /** |
| 1093 | * Bitlength limits for each card |
| 1094 | * |
| 1095 | * There are new MCLs which allow more bitlengths. See the table for details. |
| 1096 | * The MCL must be applied and the newer bitlengths enabled for these to work. |
| 1097 | * |
| 1098 | * Card Type Old limit New limit |
| 1099 | * PCICC 512-1024 512-2048 |
| 1100 | * PCIXCC_MCL2 512-2048 no change (applying this MCL == card is MCL3+) |
| 1101 | * PCIXCC_MCL3 512-2048 128-2048 |
| 1102 | * CEX2C 512-2048 128-2048 |
| 1103 | * |
| 1104 | * ext_bitlens (extended bitlengths) is a global, since you should not apply an |
| 1105 | * MCL to just one card in a machine. We assume, at first, that all cards have |
| 1106 | * these capabilities. |
| 1107 | */ |
| 1108 | int ext_bitlens = 1; // This is global |
| 1109 | #define PCIXCC_MIN_MOD_SIZE 16 // 128 bits |
| 1110 | #define OLD_PCIXCC_MIN_MOD_SIZE 64 // 512 bits |
| 1111 | #define PCICC_MIN_MOD_SIZE 64 // 512 bits |
| 1112 | #define OLD_PCICC_MAX_MOD_SIZE 128 // 1024 bits |
| 1113 | #define MAX_MOD_SIZE 256 // 2048 bits |
| 1114 | |
| 1115 | static inline int |
| 1116 | select_device_type(int *dev_type_p, int bytelength) |
| 1117 | { |
| 1118 | static int count = 0; |
| 1119 | int PCICA_avail, PCIXCC_MCL3_avail, CEX2C_avail, index_to_use; |
| 1120 | struct status *stat; |
| 1121 | if ((*dev_type_p != PCICC) && (*dev_type_p != PCICA) && |
| 1122 | (*dev_type_p != PCIXCC_MCL2) && (*dev_type_p != PCIXCC_MCL3) && |
| 1123 | (*dev_type_p != CEX2C) && (*dev_type_p != ANYDEV)) |
| 1124 | return -1; |
| 1125 | if (*dev_type_p != ANYDEV) { |
| 1126 | stat = &z90crypt.hdware_info->type_mask[*dev_type_p]; |
| 1127 | if (stat->st_count > |
| 1128 | (stat->disabled_count + stat->user_disabled_count)) |
| 1129 | return 0; |
| 1130 | return -1; |
| 1131 | } |
| 1132 | |
| 1133 | /* Assumption: PCICA, PCIXCC_MCL3, and CEX2C are all similar in speed */ |
| 1134 | stat = &z90crypt.hdware_info->type_mask[PCICA]; |
| 1135 | PCICA_avail = stat->st_count - |
| 1136 | (stat->disabled_count + stat->user_disabled_count); |
| 1137 | stat = &z90crypt.hdware_info->type_mask[PCIXCC_MCL3]; |
| 1138 | PCIXCC_MCL3_avail = stat->st_count - |
| 1139 | (stat->disabled_count + stat->user_disabled_count); |
| 1140 | stat = &z90crypt.hdware_info->type_mask[CEX2C]; |
| 1141 | CEX2C_avail = stat->st_count - |
| 1142 | (stat->disabled_count + stat->user_disabled_count); |
| 1143 | if (PCICA_avail || PCIXCC_MCL3_avail || CEX2C_avail) { |
| 1144 | /** |
| 1145 | * bitlength is a factor, PCICA is the most capable, even with |
| 1146 | * the new MCL. |
| 1147 | */ |
| 1148 | if ((bytelength < PCIXCC_MIN_MOD_SIZE) || |
| 1149 | (!ext_bitlens && (bytelength < OLD_PCIXCC_MIN_MOD_SIZE))) { |
| 1150 | if (!PCICA_avail) |
| 1151 | return -1; |
| 1152 | else { |
| 1153 | *dev_type_p = PCICA; |
| 1154 | return 0; |
| 1155 | } |
| 1156 | } |
| 1157 | |
| 1158 | index_to_use = count % (PCICA_avail + PCIXCC_MCL3_avail + |
| 1159 | CEX2C_avail); |
| 1160 | if (index_to_use < PCICA_avail) |
| 1161 | *dev_type_p = PCICA; |
| 1162 | else if (index_to_use < (PCICA_avail + PCIXCC_MCL3_avail)) |
| 1163 | *dev_type_p = PCIXCC_MCL3; |
| 1164 | else |
| 1165 | *dev_type_p = CEX2C; |
| 1166 | count++; |
| 1167 | return 0; |
| 1168 | } |
| 1169 | |
| 1170 | /* Less than OLD_PCIXCC_MIN_MOD_SIZE cannot go to a PCIXCC_MCL2 */ |
| 1171 | if (bytelength < OLD_PCIXCC_MIN_MOD_SIZE) |
| 1172 | return -1; |
| 1173 | stat = &z90crypt.hdware_info->type_mask[PCIXCC_MCL2]; |
| 1174 | if (stat->st_count > |
| 1175 | (stat->disabled_count + stat->user_disabled_count)) { |
| 1176 | *dev_type_p = PCIXCC_MCL2; |
| 1177 | return 0; |
| 1178 | } |
| 1179 | |
| 1180 | /** |
| 1181 | * Less than PCICC_MIN_MOD_SIZE or more than OLD_PCICC_MAX_MOD_SIZE |
| 1182 | * (if we don't have the MCL applied and the newer bitlengths enabled) |
| 1183 | * cannot go to a PCICC |
| 1184 | */ |
| 1185 | if ((bytelength < PCICC_MIN_MOD_SIZE) || |
| 1186 | (!ext_bitlens && (bytelength > OLD_PCICC_MAX_MOD_SIZE))) { |
| 1187 | return -1; |
| 1188 | } |
| 1189 | stat = &z90crypt.hdware_info->type_mask[PCICC]; |
| 1190 | if (stat->st_count > |
| 1191 | (stat->disabled_count + stat->user_disabled_count)) { |
| 1192 | *dev_type_p = PCICC; |
| 1193 | return 0; |
| 1194 | } |
| 1195 | |
| 1196 | return -1; |
| 1197 | } |
| 1198 | |
| 1199 | /** |
| 1200 | * Try the selected number, then the selected type (can be ANYDEV) |
| 1201 | */ |
| 1202 | static inline int |
| 1203 | select_device(int *dev_type_p, int *device_nr_p, int bytelength) |
| 1204 | { |
| 1205 | int i, indx, devTp, low_count, low_indx; |
| 1206 | struct device_x *index_p; |
| 1207 | struct device *dev_ptr; |
| 1208 | |
| 1209 | PDEBUG("device type = %d, index = %d\n", *dev_type_p, *device_nr_p); |
| 1210 | if ((*device_nr_p >= 0) && (*device_nr_p < Z90CRYPT_NUM_DEVS)) { |
| 1211 | PDEBUG("trying index = %d\n", *device_nr_p); |
| 1212 | dev_ptr = z90crypt.device_p[*device_nr_p]; |
| 1213 | |
| 1214 | if (dev_ptr && |
| 1215 | (dev_ptr->dev_stat != DEV_GONE) && |
| 1216 | (dev_ptr->disabled == 0) && |
| 1217 | (dev_ptr->user_disabled == 0)) { |
| 1218 | PDEBUG("selected by number, index = %d\n", |
| 1219 | *device_nr_p); |
| 1220 | *dev_type_p = dev_ptr->dev_type; |
| 1221 | return *device_nr_p; |
| 1222 | } |
| 1223 | } |
| 1224 | *device_nr_p = -1; |
| 1225 | PDEBUG("trying type = %d\n", *dev_type_p); |
| 1226 | devTp = *dev_type_p; |
| 1227 | if (select_device_type(&devTp, bytelength) == -1) { |
| 1228 | PDEBUG("failed to select by type\n"); |
| 1229 | return -1; |
| 1230 | } |
| 1231 | PDEBUG("selected type = %d\n", devTp); |
| 1232 | index_p = &z90crypt.hdware_info->type_x_addr[devTp]; |
| 1233 | low_count = 0x0000FFFF; |
| 1234 | low_indx = -1; |
| 1235 | for (i = 0; i < z90crypt.hdware_info->type_mask[devTp].st_count; i++) { |
| 1236 | indx = index_p->device_index[i]; |
| 1237 | dev_ptr = z90crypt.device_p[indx]; |
| 1238 | if (dev_ptr && |
| 1239 | (dev_ptr->dev_stat != DEV_GONE) && |
| 1240 | (dev_ptr->disabled == 0) && |
| 1241 | (dev_ptr->user_disabled == 0) && |
| 1242 | (devTp == dev_ptr->dev_type) && |
| 1243 | (low_count > dev_ptr->dev_caller_count)) { |
| 1244 | low_count = dev_ptr->dev_caller_count; |
| 1245 | low_indx = indx; |
| 1246 | } |
| 1247 | } |
| 1248 | *device_nr_p = low_indx; |
| 1249 | return low_indx; |
| 1250 | } |
| 1251 | |
| 1252 | static inline int |
| 1253 | send_to_crypto_device(struct work_element *we_p) |
| 1254 | { |
| 1255 | struct caller *caller_p; |
| 1256 | struct device *device_p; |
| 1257 | int dev_nr; |
| 1258 | int bytelen = ((struct ica_rsa_modexpo *)we_p->buffer)->inputdatalength; |
| 1259 | |
| 1260 | if (!we_p->requestptr) |
| 1261 | return SEN_FATAL_ERROR; |
| 1262 | caller_p = (struct caller *)we_p->requestptr; |
| 1263 | dev_nr = we_p->devindex; |
| 1264 | if (select_device(&we_p->devtype, &dev_nr, bytelen) == -1) { |
| 1265 | if (z90crypt.hdware_info->hdware_mask.st_count != 0) |
| 1266 | return SEN_RETRY; |
| 1267 | else |
| 1268 | return SEN_NOT_AVAIL; |
| 1269 | } |
| 1270 | we_p->devindex = dev_nr; |
| 1271 | device_p = z90crypt.device_p[dev_nr]; |
| 1272 | if (!device_p) |
| 1273 | return SEN_NOT_AVAIL; |
| 1274 | if (device_p->dev_type != we_p->devtype) |
| 1275 | return SEN_RETRY; |
| 1276 | if (device_p->dev_caller_count >= device_p->dev_q_depth) |
| 1277 | return SEN_QUEUE_FULL; |
| 1278 | PDEBUG("device number prior to send: %d\n", dev_nr); |
| 1279 | switch (send_to_AP(dev_nr, z90crypt.cdx, |
| 1280 | caller_p->caller_dev_dep_req_l, |
| 1281 | caller_p->caller_dev_dep_req_p)) { |
| 1282 | case DEV_SEN_EXCEPTION: |
| 1283 | PRINTKC("Exception during send to device %d\n", dev_nr); |
| 1284 | z90crypt.terminating = 1; |
| 1285 | return SEN_FATAL_ERROR; |
| 1286 | case DEV_GONE: |
| 1287 | PRINTK("Device %d not available\n", dev_nr); |
| 1288 | remove_device(device_p); |
| 1289 | return SEN_NOT_AVAIL; |
| 1290 | case DEV_EMPTY: |
| 1291 | return SEN_NOT_AVAIL; |
| 1292 | case DEV_NO_WORK: |
| 1293 | return SEN_FATAL_ERROR; |
| 1294 | case DEV_BAD_MESSAGE: |
| 1295 | return SEN_USER_ERROR; |
| 1296 | case DEV_QUEUE_FULL: |
| 1297 | return SEN_QUEUE_FULL; |
| 1298 | default: |
| 1299 | case DEV_ONLINE: |
| 1300 | break; |
| 1301 | } |
| 1302 | list_add_tail(&(caller_p->caller_liste), &(device_p->dev_caller_list)); |
| 1303 | device_p->dev_caller_count++; |
| 1304 | return 0; |
| 1305 | } |
| 1306 | |
| 1307 | /** |
| 1308 | * Send puts the user's work on one of two queues: |
| 1309 | * the pending queue if the send was successful |
| 1310 | * the request queue if the send failed because device full or busy |
| 1311 | */ |
| 1312 | static inline int |
| 1313 | z90crypt_send(struct work_element *we_p, const char *buf) |
| 1314 | { |
| 1315 | int rv; |
| 1316 | |
| 1317 | PDEBUG("PID %d\n", PID()); |
| 1318 | |
| 1319 | if (CHK_RDWRMASK(we_p->status[0]) != STAT_NOWORK) { |
| 1320 | PDEBUG("PID %d tried to send more work but has outstanding " |
| 1321 | "work.\n", PID()); |
| 1322 | return -EWORKPEND; |
| 1323 | } |
| 1324 | we_p->devindex = -1; // Reset device number |
| 1325 | spin_lock_irq(&queuespinlock); |
| 1326 | rv = send_to_crypto_device(we_p); |
| 1327 | switch (rv) { |
| 1328 | case 0: |
| 1329 | we_p->requestsent = jiffies; |
| 1330 | we_p->audit[0] |= FP_SENT; |
| 1331 | list_add_tail(&we_p->liste, &pending_list); |
| 1332 | ++pendingq_count; |
| 1333 | we_p->audit[0] |= FP_PENDING; |
| 1334 | break; |
| 1335 | case SEN_BUSY: |
| 1336 | case SEN_QUEUE_FULL: |
| 1337 | rv = 0; |
| 1338 | we_p->devindex = -1; // any device will do |
| 1339 | we_p->requestsent = jiffies; |
| 1340 | list_add_tail(&we_p->liste, &request_list); |
| 1341 | ++requestq_count; |
| 1342 | we_p->audit[0] |= FP_REQUEST; |
| 1343 | break; |
| 1344 | case SEN_RETRY: |
| 1345 | rv = -ERESTARTSYS; |
| 1346 | break; |
| 1347 | case SEN_NOT_AVAIL: |
| 1348 | PRINTK("*** No devices available.\n"); |
| 1349 | rv = we_p->retcode = -ENODEV; |
| 1350 | we_p->status[0] |= STAT_FAILED; |
| 1351 | break; |
| 1352 | case REC_OPERAND_INV: |
| 1353 | case REC_OPERAND_SIZE: |
| 1354 | case REC_EVEN_MOD: |
| 1355 | case REC_INVALID_PAD: |
| 1356 | rv = we_p->retcode = -EINVAL; |
| 1357 | we_p->status[0] |= STAT_FAILED; |
| 1358 | break; |
| 1359 | default: |
| 1360 | we_p->retcode = rv; |
| 1361 | we_p->status[0] |= STAT_FAILED; |
| 1362 | break; |
| 1363 | } |
| 1364 | if (rv != -ERESTARTSYS) |
| 1365 | SET_RDWRMASK(we_p->status[0], STAT_WRITTEN); |
| 1366 | spin_unlock_irq(&queuespinlock); |
| 1367 | if (rv == 0) |
| 1368 | tasklet_schedule(&reader_tasklet); |
| 1369 | return rv; |
| 1370 | } |
| 1371 | |
| 1372 | /** |
| 1373 | * process_results copies the user's work from kernel space. |
| 1374 | */ |
| 1375 | static inline int |
| 1376 | z90crypt_process_results(struct work_element *we_p, char __user *buf) |
| 1377 | { |
| 1378 | int rv; |
| 1379 | |
| 1380 | PDEBUG("we_p %p (PID %d)\n", we_p, PID()); |
| 1381 | |
| 1382 | LONG2DEVPTR(we_p->devindex)->dev_total_req_cnt++; |
| 1383 | SET_RDWRMASK(we_p->status[0], STAT_READPEND); |
| 1384 | |
| 1385 | rv = 0; |
| 1386 | if (!we_p->buffer) { |
| 1387 | PRINTK("we_p %p PID %d in STAT_READPEND: buffer NULL.\n", |
| 1388 | we_p, PID()); |
| 1389 | rv = -ENOBUFF; |
| 1390 | } |
| 1391 | |
| 1392 | if (!rv) |
| 1393 | if ((rv = copy_to_user(buf, we_p->buffer, we_p->buff_size))) { |
| 1394 | PDEBUG("copy_to_user failed: rv = %d\n", rv); |
| 1395 | rv = -EFAULT; |
| 1396 | } |
| 1397 | |
| 1398 | if (!rv) |
| 1399 | rv = we_p->retcode; |
| 1400 | if (!rv) |
| 1401 | if (we_p->resp_buff_size |
| 1402 | && copy_to_user(we_p->resp_addr, we_p->resp_buff, |
| 1403 | we_p->resp_buff_size)) |
| 1404 | rv = -EFAULT; |
| 1405 | |
| 1406 | SET_RDWRMASK(we_p->status[0], STAT_NOWORK); |
| 1407 | return rv; |
| 1408 | } |
| 1409 | |
| 1410 | static unsigned char NULL_psmid[8] = |
| 1411 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; |
| 1412 | |
| 1413 | /** |
| 1414 | * Used in device configuration functions |
| 1415 | */ |
| 1416 | #define MAX_RESET 90 |
| 1417 | |
| 1418 | /** |
| 1419 | * This is used only for PCICC support |
| 1420 | */ |
| 1421 | static inline int |
| 1422 | is_PKCS11_padded(unsigned char *buffer, int length) |
| 1423 | { |
| 1424 | int i; |
| 1425 | if ((buffer[0] != 0x00) || (buffer[1] != 0x01)) |
| 1426 | return 0; |
| 1427 | for (i = 2; i < length; i++) |
| 1428 | if (buffer[i] != 0xFF) |
| 1429 | break; |
| 1430 | if ((i < 10) || (i == length)) |
| 1431 | return 0; |
| 1432 | if (buffer[i] != 0x00) |
| 1433 | return 0; |
| 1434 | return 1; |
| 1435 | } |
| 1436 | |
| 1437 | /** |
| 1438 | * This is used only for PCICC support |
| 1439 | */ |
| 1440 | static inline int |
| 1441 | is_PKCS12_padded(unsigned char *buffer, int length) |
| 1442 | { |
| 1443 | int i; |
| 1444 | if ((buffer[0] != 0x00) || (buffer[1] != 0x02)) |
| 1445 | return 0; |
| 1446 | for (i = 2; i < length; i++) |
| 1447 | if (buffer[i] == 0x00) |
| 1448 | break; |
| 1449 | if ((i < 10) || (i == length)) |
| 1450 | return 0; |
| 1451 | if (buffer[i] != 0x00) |
| 1452 | return 0; |
| 1453 | return 1; |
| 1454 | } |
| 1455 | |
| 1456 | /** |
| 1457 | * builds struct caller and converts message from generic format to |
| 1458 | * device-dependent format |
| 1459 | * func is ICARSAMODEXPO or ICARSACRT |
| 1460 | * function is PCI_FUNC_KEY_ENCRYPT or PCI_FUNC_KEY_DECRYPT |
| 1461 | */ |
| 1462 | static inline int |
| 1463 | build_caller(struct work_element *we_p, short function) |
| 1464 | { |
| 1465 | int rv; |
| 1466 | struct caller *caller_p = (struct caller *)we_p->requestptr; |
| 1467 | |
| 1468 | if ((we_p->devtype != PCICC) && (we_p->devtype != PCICA) && |
| 1469 | (we_p->devtype != PCIXCC_MCL2) && (we_p->devtype != PCIXCC_MCL3) && |
| 1470 | (we_p->devtype != CEX2C)) |
| 1471 | return SEN_NOT_AVAIL; |
| 1472 | |
| 1473 | memcpy(caller_p->caller_id, we_p->caller_id, |
| 1474 | sizeof(caller_p->caller_id)); |
| 1475 | caller_p->caller_dev_dep_req_p = caller_p->caller_dev_dep_req; |
| 1476 | caller_p->caller_dev_dep_req_l = MAX_RESPONSE_SIZE; |
| 1477 | caller_p->caller_buf_p = we_p->buffer; |
| 1478 | INIT_LIST_HEAD(&(caller_p->caller_liste)); |
| 1479 | |
| 1480 | rv = convert_request(we_p->buffer, we_p->funccode, function, |
| 1481 | z90crypt.cdx, we_p->devtype, |
| 1482 | &caller_p->caller_dev_dep_req_l, |
| 1483 | caller_p->caller_dev_dep_req_p); |
| 1484 | if (rv) { |
| 1485 | if (rv == SEN_NOT_AVAIL) |
| 1486 | PDEBUG("request can't be processed on hdwr avail\n"); |
| 1487 | else |
| 1488 | PRINTK("Error from convert_request: %d\n", rv); |
| 1489 | } |
| 1490 | else |
| 1491 | memcpy(&(caller_p->caller_dev_dep_req_p[4]), we_p->caller_id,8); |
| 1492 | return rv; |
| 1493 | } |
| 1494 | |
| 1495 | static inline void |
| 1496 | unbuild_caller(struct device *device_p, struct caller *caller_p) |
| 1497 | { |
| 1498 | if (!caller_p) |
| 1499 | return; |
| 1500 | if (caller_p->caller_liste.next && caller_p->caller_liste.prev) |
| 1501 | if (!list_empty(&caller_p->caller_liste)) { |
| 1502 | list_del_init(&caller_p->caller_liste); |
| 1503 | device_p->dev_caller_count--; |
| 1504 | } |
| 1505 | memset(caller_p->caller_id, 0, sizeof(caller_p->caller_id)); |
| 1506 | } |
| 1507 | |
| 1508 | static inline int |
| 1509 | get_crypto_request_buffer(struct work_element *we_p) |
| 1510 | { |
| 1511 | struct ica_rsa_modexpo *mex_p; |
| 1512 | struct ica_rsa_modexpo_crt *crt_p; |
| 1513 | unsigned char *temp_buffer; |
| 1514 | short function; |
| 1515 | int rv; |
| 1516 | |
| 1517 | mex_p = (struct ica_rsa_modexpo *) we_p->buffer; |
| 1518 | crt_p = (struct ica_rsa_modexpo_crt *) we_p->buffer; |
| 1519 | |
| 1520 | PDEBUG("device type input = %d\n", we_p->devtype); |
| 1521 | |
| 1522 | if (z90crypt.terminating) |
| 1523 | return REC_NO_RESPONSE; |
| 1524 | if (memcmp(we_p->caller_id, NULL_psmid, 8) == 0) { |
| 1525 | PRINTK("psmid zeroes\n"); |
| 1526 | return SEN_FATAL_ERROR; |
| 1527 | } |
| 1528 | if (!we_p->buffer) { |
| 1529 | PRINTK("buffer pointer NULL\n"); |
| 1530 | return SEN_USER_ERROR; |
| 1531 | } |
| 1532 | if (!we_p->requestptr) { |
| 1533 | PRINTK("caller pointer NULL\n"); |
| 1534 | return SEN_USER_ERROR; |
| 1535 | } |
| 1536 | |
| 1537 | if ((we_p->devtype != PCICA) && (we_p->devtype != PCICC) && |
| 1538 | (we_p->devtype != PCIXCC_MCL2) && (we_p->devtype != PCIXCC_MCL3) && |
| 1539 | (we_p->devtype != CEX2C) && (we_p->devtype != ANYDEV)) { |
| 1540 | PRINTK("invalid device type\n"); |
| 1541 | return SEN_USER_ERROR; |
| 1542 | } |
| 1543 | |
| 1544 | if ((mex_p->inputdatalength < 1) || |
| 1545 | (mex_p->inputdatalength > MAX_MOD_SIZE)) { |
| 1546 | PRINTK("inputdatalength[%d] is not valid\n", |
| 1547 | mex_p->inputdatalength); |
| 1548 | return SEN_USER_ERROR; |
| 1549 | } |
| 1550 | |
| 1551 | if (mex_p->outputdatalength < mex_p->inputdatalength) { |
| 1552 | PRINTK("outputdatalength[%d] < inputdatalength[%d]\n", |
| 1553 | mex_p->outputdatalength, mex_p->inputdatalength); |
| 1554 | return SEN_USER_ERROR; |
| 1555 | } |
| 1556 | |
| 1557 | if (!mex_p->inputdata || !mex_p->outputdata) { |
| 1558 | PRINTK("inputdata[%p] or outputdata[%p] is NULL\n", |
| 1559 | mex_p->outputdata, mex_p->inputdata); |
| 1560 | return SEN_USER_ERROR; |
| 1561 | } |
| 1562 | |
| 1563 | /** |
| 1564 | * As long as outputdatalength is big enough, we can set the |
| 1565 | * outputdatalength equal to the inputdatalength, since that is the |
| 1566 | * number of bytes we will copy in any case |
| 1567 | */ |
| 1568 | mex_p->outputdatalength = mex_p->inputdatalength; |
| 1569 | |
| 1570 | rv = 0; |
| 1571 | switch (we_p->funccode) { |
| 1572 | case ICARSAMODEXPO: |
| 1573 | if (!mex_p->b_key || !mex_p->n_modulus) |
| 1574 | rv = SEN_USER_ERROR; |
| 1575 | break; |
| 1576 | case ICARSACRT: |
| 1577 | if (!IS_EVEN(crt_p->inputdatalength)) { |
| 1578 | PRINTK("inputdatalength[%d] is odd, CRT form\n", |
| 1579 | crt_p->inputdatalength); |
| 1580 | rv = SEN_USER_ERROR; |
| 1581 | break; |
| 1582 | } |
| 1583 | if (!crt_p->bp_key || |
| 1584 | !crt_p->bq_key || |
| 1585 | !crt_p->np_prime || |
| 1586 | !crt_p->nq_prime || |
| 1587 | !crt_p->u_mult_inv) { |
| 1588 | PRINTK("CRT form, bad data: %p/%p/%p/%p/%p\n", |
| 1589 | crt_p->bp_key, crt_p->bq_key, |
| 1590 | crt_p->np_prime, crt_p->nq_prime, |
| 1591 | crt_p->u_mult_inv); |
| 1592 | rv = SEN_USER_ERROR; |
| 1593 | } |
| 1594 | break; |
| 1595 | default: |
| 1596 | PRINTK("bad func = %d\n", we_p->funccode); |
| 1597 | rv = SEN_USER_ERROR; |
| 1598 | break; |
| 1599 | } |
| 1600 | if (rv != 0) |
| 1601 | return rv; |
| 1602 | |
| 1603 | if (select_device_type(&we_p->devtype, mex_p->inputdatalength) < 0) |
| 1604 | return SEN_NOT_AVAIL; |
| 1605 | |
| 1606 | temp_buffer = (unsigned char *)we_p + sizeof(struct work_element) + |
| 1607 | sizeof(struct caller); |
| 1608 | if (copy_from_user(temp_buffer, mex_p->inputdata, |
| 1609 | mex_p->inputdatalength) != 0) |
| 1610 | return SEN_RELEASED; |
| 1611 | |
| 1612 | function = PCI_FUNC_KEY_ENCRYPT; |
| 1613 | switch (we_p->devtype) { |
| 1614 | /* PCICA does everything with a simple RSA mod-expo operation */ |
| 1615 | case PCICA: |
| 1616 | function = PCI_FUNC_KEY_ENCRYPT; |
| 1617 | break; |
| 1618 | /** |
| 1619 | * PCIXCC_MCL2 does all Mod-Expo form with a simple RSA mod-expo |
| 1620 | * operation, and all CRT forms with a PKCS-1.2 format decrypt. |
| 1621 | * PCIXCC_MCL3 and CEX2C do all Mod-Expo and CRT forms with a simple RSA |
| 1622 | * mod-expo operation |
| 1623 | */ |
| 1624 | case PCIXCC_MCL2: |
| 1625 | if (we_p->funccode == ICARSAMODEXPO) |
| 1626 | function = PCI_FUNC_KEY_ENCRYPT; |
| 1627 | else |
| 1628 | function = PCI_FUNC_KEY_DECRYPT; |
| 1629 | break; |
| 1630 | case PCIXCC_MCL3: |
| 1631 | case CEX2C: |
| 1632 | if (we_p->funccode == ICARSAMODEXPO) |
| 1633 | function = PCI_FUNC_KEY_ENCRYPT; |
| 1634 | else |
| 1635 | function = PCI_FUNC_KEY_DECRYPT; |
| 1636 | break; |
| 1637 | /** |
| 1638 | * PCICC does everything as a PKCS-1.2 format request |
| 1639 | */ |
| 1640 | case PCICC: |
| 1641 | /* PCICC cannot handle input that is is PKCS#1.1 padded */ |
| 1642 | if (is_PKCS11_padded(temp_buffer, mex_p->inputdatalength)) { |
| 1643 | return SEN_NOT_AVAIL; |
| 1644 | } |
| 1645 | if (we_p->funccode == ICARSAMODEXPO) { |
| 1646 | if (is_PKCS12_padded(temp_buffer, |
| 1647 | mex_p->inputdatalength)) |
| 1648 | function = PCI_FUNC_KEY_ENCRYPT; |
| 1649 | else |
| 1650 | function = PCI_FUNC_KEY_DECRYPT; |
| 1651 | } else |
| 1652 | /* all CRT forms are decrypts */ |
| 1653 | function = PCI_FUNC_KEY_DECRYPT; |
| 1654 | break; |
| 1655 | } |
| 1656 | PDEBUG("function: %04x\n", function); |
| 1657 | rv = build_caller(we_p, function); |
| 1658 | PDEBUG("rv from build_caller = %d\n", rv); |
| 1659 | return rv; |
| 1660 | } |
| 1661 | |
| 1662 | static inline int |
| 1663 | z90crypt_prepare(struct work_element *we_p, unsigned int funccode, |
| 1664 | const char __user *buffer) |
| 1665 | { |
| 1666 | int rv; |
| 1667 | |
| 1668 | we_p->devindex = -1; |
| 1669 | if (funccode == ICARSAMODEXPO) |
| 1670 | we_p->buff_size = sizeof(struct ica_rsa_modexpo); |
| 1671 | else |
| 1672 | we_p->buff_size = sizeof(struct ica_rsa_modexpo_crt); |
| 1673 | |
| 1674 | if (copy_from_user(we_p->buffer, buffer, we_p->buff_size)) |
| 1675 | return -EFAULT; |
| 1676 | |
| 1677 | we_p->audit[0] |= FP_COPYFROM; |
| 1678 | SET_RDWRMASK(we_p->status[0], STAT_WRITTEN); |
| 1679 | we_p->funccode = funccode; |
| 1680 | we_p->devtype = -1; |
| 1681 | we_p->audit[0] |= FP_BUFFREQ; |
| 1682 | rv = get_crypto_request_buffer(we_p); |
| 1683 | switch (rv) { |
| 1684 | case 0: |
| 1685 | we_p->audit[0] |= FP_BUFFGOT; |
| 1686 | break; |
| 1687 | case SEN_USER_ERROR: |
| 1688 | rv = -EINVAL; |
| 1689 | break; |
| 1690 | case SEN_QUEUE_FULL: |
| 1691 | rv = 0; |
| 1692 | break; |
| 1693 | case SEN_RELEASED: |
| 1694 | rv = -EFAULT; |
| 1695 | break; |
| 1696 | case REC_NO_RESPONSE: |
| 1697 | rv = -ENODEV; |
| 1698 | break; |
| 1699 | case SEN_NOT_AVAIL: |
| 1700 | case EGETBUFF: |
| 1701 | rv = -EGETBUFF; |
| 1702 | break; |
| 1703 | default: |
| 1704 | PRINTK("rv = %d\n", rv); |
| 1705 | rv = -EGETBUFF; |
| 1706 | break; |
| 1707 | } |
| 1708 | if (CHK_RDWRMASK(we_p->status[0]) == STAT_WRITTEN) |
| 1709 | SET_RDWRMASK(we_p->status[0], STAT_DEFAULT); |
| 1710 | return rv; |
| 1711 | } |
| 1712 | |
| 1713 | static inline void |
| 1714 | purge_work_element(struct work_element *we_p) |
| 1715 | { |
| 1716 | struct list_head *lptr; |
| 1717 | |
| 1718 | spin_lock_irq(&queuespinlock); |
| 1719 | list_for_each(lptr, &request_list) { |
| 1720 | if (lptr == &we_p->liste) { |
| 1721 | list_del_init(lptr); |
| 1722 | requestq_count--; |
| 1723 | break; |
| 1724 | } |
| 1725 | } |
| 1726 | list_for_each(lptr, &pending_list) { |
| 1727 | if (lptr == &we_p->liste) { |
| 1728 | list_del_init(lptr); |
| 1729 | pendingq_count--; |
| 1730 | break; |
| 1731 | } |
| 1732 | } |
| 1733 | spin_unlock_irq(&queuespinlock); |
| 1734 | } |
| 1735 | |
| 1736 | /** |
| 1737 | * Build the request and send it. |
| 1738 | */ |
| 1739 | static inline int |
| 1740 | z90crypt_rsa(struct priv_data *private_data_p, pid_t pid, |
| 1741 | unsigned int cmd, unsigned long arg) |
| 1742 | { |
| 1743 | struct work_element *we_p; |
| 1744 | int rv; |
| 1745 | |
| 1746 | if ((rv = allocate_work_element(&we_p, private_data_p, pid))) { |
| 1747 | PDEBUG("PID %d: allocate_work_element returned ENOMEM\n", pid); |
| 1748 | return rv; |
| 1749 | } |
| 1750 | if ((rv = z90crypt_prepare(we_p, cmd, (const char __user *)arg))) |
| 1751 | PDEBUG("PID %d: rv = %d from z90crypt_prepare\n", pid, rv); |
| 1752 | if (!rv) |
| 1753 | if ((rv = z90crypt_send(we_p, (const char *)arg))) |
| 1754 | PDEBUG("PID %d: rv %d from z90crypt_send.\n", pid, rv); |
| 1755 | if (!rv) { |
| 1756 | we_p->audit[0] |= FP_ASLEEP; |
| 1757 | wait_event(we_p->waitq, atomic_read(&we_p->alarmrung)); |
| 1758 | we_p->audit[0] |= FP_AWAKE; |
| 1759 | rv = we_p->retcode; |
| 1760 | } |
| 1761 | if (!rv) |
| 1762 | rv = z90crypt_process_results(we_p, (char __user *)arg); |
| 1763 | |
| 1764 | if ((we_p->status[0] & STAT_FAILED)) { |
| 1765 | switch (rv) { |
| 1766 | /** |
| 1767 | * EINVAL *after* receive is almost always a padding error or |
| 1768 | * length error issued by a coprocessor (not an accelerator). |
| 1769 | * We convert this return value to -EGETBUFF which should |
| 1770 | * trigger a fallback to software. |
| 1771 | */ |
| 1772 | case -EINVAL: |
| 1773 | if (we_p->devtype != PCICA) |
| 1774 | rv = -EGETBUFF; |
| 1775 | break; |
| 1776 | case -ETIMEOUT: |
| 1777 | if (z90crypt.mask.st_count > 0) |
| 1778 | rv = -ERESTARTSYS; // retry with another |
| 1779 | else |
| 1780 | rv = -ENODEV; // no cards left |
| 1781 | /* fall through to clean up request queue */ |
| 1782 | case -ERESTARTSYS: |
| 1783 | case -ERELEASED: |
| 1784 | switch (CHK_RDWRMASK(we_p->status[0])) { |
| 1785 | case STAT_WRITTEN: |
| 1786 | purge_work_element(we_p); |
| 1787 | break; |
| 1788 | case STAT_READPEND: |
| 1789 | case STAT_NOWORK: |
| 1790 | default: |
| 1791 | break; |
| 1792 | } |
| 1793 | break; |
| 1794 | default: |
| 1795 | we_p->status[0] ^= STAT_FAILED; |
| 1796 | break; |
| 1797 | } |
| 1798 | } |
| 1799 | free_page((long)we_p); |
| 1800 | return rv; |
| 1801 | } |
| 1802 | |
| 1803 | /** |
| 1804 | * This function is a little long, but it's really just one large switch |
| 1805 | * statement. |
| 1806 | */ |
| 1807 | static int |
| 1808 | z90crypt_ioctl(struct inode *inode, struct file *filp, |
| 1809 | unsigned int cmd, unsigned long arg) |
| 1810 | { |
| 1811 | struct priv_data *private_data_p = filp->private_data; |
| 1812 | unsigned char *status; |
| 1813 | unsigned char *qdepth; |
| 1814 | unsigned int *reqcnt; |
| 1815 | struct ica_z90_status *pstat; |
| 1816 | int ret, i, loopLim, tempstat; |
| 1817 | static int deprecated_msg_count1 = 0; |
| 1818 | static int deprecated_msg_count2 = 0; |
| 1819 | |
| 1820 | PDEBUG("filp %p (PID %d), cmd 0x%08X\n", filp, PID(), cmd); |
| 1821 | PDEBUG("cmd 0x%08X: dir %s, size 0x%04X, type 0x%02X, nr 0x%02X\n", |
| 1822 | cmd, |
| 1823 | !_IOC_DIR(cmd) ? "NO" |
| 1824 | : ((_IOC_DIR(cmd) == (_IOC_READ|_IOC_WRITE)) ? "RW" |
| 1825 | : ((_IOC_DIR(cmd) == _IOC_READ) ? "RD" |
| 1826 | : "WR")), |
| 1827 | _IOC_SIZE(cmd), _IOC_TYPE(cmd), _IOC_NR(cmd)); |
| 1828 | |
| 1829 | if (_IOC_TYPE(cmd) != Z90_IOCTL_MAGIC) { |
| 1830 | PRINTK("cmd 0x%08X contains bad magic\n", cmd); |
| 1831 | return -ENOTTY; |
| 1832 | } |
| 1833 | |
| 1834 | ret = 0; |
| 1835 | switch (cmd) { |
| 1836 | case ICARSAMODEXPO: |
| 1837 | case ICARSACRT: |
| 1838 | if (quiesce_z90crypt) { |
| 1839 | ret = -EQUIESCE; |
| 1840 | break; |
| 1841 | } |
| 1842 | ret = -ENODEV; // Default if no devices |
| 1843 | loopLim = z90crypt.hdware_info->hdware_mask.st_count - |
| 1844 | (z90crypt.hdware_info->hdware_mask.disabled_count + |
| 1845 | z90crypt.hdware_info->hdware_mask.user_disabled_count); |
| 1846 | for (i = 0; i < loopLim; i++) { |
| 1847 | ret = z90crypt_rsa(private_data_p, PID(), cmd, arg); |
| 1848 | if (ret != -ERESTARTSYS) |
| 1849 | break; |
| 1850 | } |
| 1851 | if (ret == -ERESTARTSYS) |
| 1852 | ret = -ENODEV; |
| 1853 | break; |
| 1854 | |
| 1855 | case Z90STAT_TOTALCOUNT: |
| 1856 | tempstat = get_status_totalcount(); |
| 1857 | if (copy_to_user((int __user *)arg, &tempstat,sizeof(int)) != 0) |
| 1858 | ret = -EFAULT; |
| 1859 | break; |
| 1860 | |
| 1861 | case Z90STAT_PCICACOUNT: |
| 1862 | tempstat = get_status_PCICAcount(); |
| 1863 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1864 | ret = -EFAULT; |
| 1865 | break; |
| 1866 | |
| 1867 | case Z90STAT_PCICCCOUNT: |
| 1868 | tempstat = get_status_PCICCcount(); |
| 1869 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1870 | ret = -EFAULT; |
| 1871 | break; |
| 1872 | |
| 1873 | case Z90STAT_PCIXCCMCL2COUNT: |
| 1874 | tempstat = get_status_PCIXCCMCL2count(); |
| 1875 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1876 | ret = -EFAULT; |
| 1877 | break; |
| 1878 | |
| 1879 | case Z90STAT_PCIXCCMCL3COUNT: |
| 1880 | tempstat = get_status_PCIXCCMCL3count(); |
| 1881 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1882 | ret = -EFAULT; |
| 1883 | break; |
| 1884 | |
| 1885 | case Z90STAT_CEX2CCOUNT: |
| 1886 | tempstat = get_status_CEX2Ccount(); |
| 1887 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1888 | ret = -EFAULT; |
| 1889 | break; |
| 1890 | |
| 1891 | case Z90STAT_REQUESTQ_COUNT: |
| 1892 | tempstat = get_status_requestq_count(); |
| 1893 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1894 | ret = -EFAULT; |
| 1895 | break; |
| 1896 | |
| 1897 | case Z90STAT_PENDINGQ_COUNT: |
| 1898 | tempstat = get_status_pendingq_count(); |
| 1899 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1900 | ret = -EFAULT; |
| 1901 | break; |
| 1902 | |
| 1903 | case Z90STAT_TOTALOPEN_COUNT: |
| 1904 | tempstat = get_status_totalopen_count(); |
| 1905 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1906 | ret = -EFAULT; |
| 1907 | break; |
| 1908 | |
| 1909 | case Z90STAT_DOMAIN_INDEX: |
| 1910 | tempstat = get_status_domain_index(); |
| 1911 | if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0) |
| 1912 | ret = -EFAULT; |
| 1913 | break; |
| 1914 | |
| 1915 | case Z90STAT_STATUS_MASK: |
| 1916 | status = kmalloc(Z90CRYPT_NUM_APS, GFP_KERNEL); |
| 1917 | if (!status) { |
| 1918 | PRINTK("kmalloc for status failed!\n"); |
| 1919 | ret = -ENOMEM; |
| 1920 | break; |
| 1921 | } |
| 1922 | get_status_status_mask(status); |
| 1923 | if (copy_to_user((char __user *) arg, status, Z90CRYPT_NUM_APS) |
| 1924 | != 0) |
| 1925 | ret = -EFAULT; |
| 1926 | kfree(status); |
| 1927 | break; |
| 1928 | |
| 1929 | case Z90STAT_QDEPTH_MASK: |
| 1930 | qdepth = kmalloc(Z90CRYPT_NUM_APS, GFP_KERNEL); |
| 1931 | if (!qdepth) { |
| 1932 | PRINTK("kmalloc for qdepth failed!\n"); |
| 1933 | ret = -ENOMEM; |
| 1934 | break; |
| 1935 | } |
| 1936 | get_status_qdepth_mask(qdepth); |
| 1937 | if (copy_to_user((char __user *) arg, qdepth, Z90CRYPT_NUM_APS) != 0) |
| 1938 | ret = -EFAULT; |
| 1939 | kfree(qdepth); |
| 1940 | break; |
| 1941 | |
| 1942 | case Z90STAT_PERDEV_REQCNT: |
| 1943 | reqcnt = kmalloc(sizeof(int) * Z90CRYPT_NUM_APS, GFP_KERNEL); |
| 1944 | if (!reqcnt) { |
| 1945 | PRINTK("kmalloc for reqcnt failed!\n"); |
| 1946 | ret = -ENOMEM; |
| 1947 | break; |
| 1948 | } |
| 1949 | get_status_perdevice_reqcnt(reqcnt); |
| 1950 | if (copy_to_user((char __user *) arg, reqcnt, |
| 1951 | Z90CRYPT_NUM_APS * sizeof(int)) != 0) |
| 1952 | ret = -EFAULT; |
| 1953 | kfree(reqcnt); |
| 1954 | break; |
| 1955 | |
| 1956 | /* THIS IS DEPRECATED. USE THE NEW STATUS CALLS */ |
| 1957 | case ICAZ90STATUS: |
| 1958 | if (deprecated_msg_count1 < 20) { |
| 1959 | PRINTK("deprecated call to ioctl (ICAZ90STATUS)!\n"); |
| 1960 | deprecated_msg_count1++; |
| 1961 | if (deprecated_msg_count1 == 20) |
| 1962 | PRINTK("No longer issuing messages related to " |
| 1963 | "deprecated call to ICAZ90STATUS.\n"); |
| 1964 | } |
| 1965 | |
| 1966 | pstat = kmalloc(sizeof(struct ica_z90_status), GFP_KERNEL); |
| 1967 | if (!pstat) { |
| 1968 | PRINTK("kmalloc for pstat failed!\n"); |
| 1969 | ret = -ENOMEM; |
| 1970 | break; |
| 1971 | } |
| 1972 | |
| 1973 | pstat->totalcount = get_status_totalcount(); |
| 1974 | pstat->leedslitecount = get_status_PCICAcount(); |
| 1975 | pstat->leeds2count = get_status_PCICCcount(); |
| 1976 | pstat->requestqWaitCount = get_status_requestq_count(); |
| 1977 | pstat->pendingqWaitCount = get_status_pendingq_count(); |
| 1978 | pstat->totalOpenCount = get_status_totalopen_count(); |
| 1979 | pstat->cryptoDomain = get_status_domain_index(); |
| 1980 | get_status_status_mask(pstat->status); |
| 1981 | get_status_qdepth_mask(pstat->qdepth); |
| 1982 | |
| 1983 | if (copy_to_user((struct ica_z90_status __user *) arg, pstat, |
| 1984 | sizeof(struct ica_z90_status)) != 0) |
| 1985 | ret = -EFAULT; |
| 1986 | kfree(pstat); |
| 1987 | break; |
| 1988 | |
| 1989 | /* THIS IS DEPRECATED. USE THE NEW STATUS CALLS */ |
| 1990 | case Z90STAT_PCIXCCCOUNT: |
| 1991 | if (deprecated_msg_count2 < 20) { |
| 1992 | PRINTK("deprecated ioctl (Z90STAT_PCIXCCCOUNT)!\n"); |
| 1993 | deprecated_msg_count2++; |
| 1994 | if (deprecated_msg_count2 == 20) |
| 1995 | PRINTK("No longer issuing messages about depre" |
| 1996 | "cated ioctl Z90STAT_PCIXCCCOUNT.\n"); |
| 1997 | } |
| 1998 | |
| 1999 | tempstat = get_status_PCIXCCcount(); |
| 2000 | if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0) |
| 2001 | ret = -EFAULT; |
| 2002 | break; |
| 2003 | |
| 2004 | case Z90QUIESCE: |
| 2005 | if (current->euid != 0) { |
| 2006 | PRINTK("QUIESCE fails: euid %d\n", |
| 2007 | current->euid); |
| 2008 | ret = -EACCES; |
| 2009 | } else { |
| 2010 | PRINTK("QUIESCE device from PID %d\n", PID()); |
| 2011 | quiesce_z90crypt = 1; |
| 2012 | } |
| 2013 | break; |
| 2014 | |
| 2015 | default: |
| 2016 | /* user passed an invalid IOCTL number */ |
| 2017 | PDEBUG("cmd 0x%08X contains invalid ioctl code\n", cmd); |
| 2018 | ret = -ENOTTY; |
| 2019 | break; |
| 2020 | } |
| 2021 | |
| 2022 | return ret; |
| 2023 | } |
| 2024 | |
| 2025 | static inline int |
| 2026 | sprintcl(unsigned char *outaddr, unsigned char *addr, unsigned int len) |
| 2027 | { |
| 2028 | int hl, i; |
| 2029 | |
| 2030 | hl = 0; |
| 2031 | for (i = 0; i < len; i++) |
| 2032 | hl += sprintf(outaddr+hl, "%01x", (unsigned int) addr[i]); |
| 2033 | hl += sprintf(outaddr+hl, " "); |
| 2034 | |
| 2035 | return hl; |
| 2036 | } |
| 2037 | |
| 2038 | static inline int |
| 2039 | sprintrw(unsigned char *outaddr, unsigned char *addr, unsigned int len) |
| 2040 | { |
| 2041 | int hl, inl, c, cx; |
| 2042 | |
| 2043 | hl = sprintf(outaddr, " "); |
| 2044 | inl = 0; |
| 2045 | for (c = 0; c < (len / 16); c++) { |
| 2046 | hl += sprintcl(outaddr+hl, addr+inl, 16); |
| 2047 | inl += 16; |
| 2048 | } |
| 2049 | |
| 2050 | cx = len%16; |
| 2051 | if (cx) { |
| 2052 | hl += sprintcl(outaddr+hl, addr+inl, cx); |
| 2053 | inl += cx; |
| 2054 | } |
| 2055 | |
| 2056 | hl += sprintf(outaddr+hl, "\n"); |
| 2057 | |
| 2058 | return hl; |
| 2059 | } |
| 2060 | |
| 2061 | static inline int |
| 2062 | sprinthx(unsigned char *title, unsigned char *outaddr, |
| 2063 | unsigned char *addr, unsigned int len) |
| 2064 | { |
| 2065 | int hl, inl, r, rx; |
| 2066 | |
| 2067 | hl = sprintf(outaddr, "\n%s\n", title); |
| 2068 | inl = 0; |
| 2069 | for (r = 0; r < (len / 64); r++) { |
| 2070 | hl += sprintrw(outaddr+hl, addr+inl, 64); |
| 2071 | inl += 64; |
| 2072 | } |
| 2073 | rx = len % 64; |
| 2074 | if (rx) { |
| 2075 | hl += sprintrw(outaddr+hl, addr+inl, rx); |
| 2076 | inl += rx; |
| 2077 | } |
| 2078 | |
| 2079 | hl += sprintf(outaddr+hl, "\n"); |
| 2080 | |
| 2081 | return hl; |
| 2082 | } |
| 2083 | |
| 2084 | static inline int |
| 2085 | sprinthx4(unsigned char *title, unsigned char *outaddr, |
| 2086 | unsigned int *array, unsigned int len) |
| 2087 | { |
| 2088 | int hl, r; |
| 2089 | |
| 2090 | hl = sprintf(outaddr, "\n%s\n", title); |
| 2091 | |
| 2092 | for (r = 0; r < len; r++) { |
| 2093 | if ((r % 8) == 0) |
| 2094 | hl += sprintf(outaddr+hl, " "); |
| 2095 | hl += sprintf(outaddr+hl, "%08X ", array[r]); |
| 2096 | if ((r % 8) == 7) |
| 2097 | hl += sprintf(outaddr+hl, "\n"); |
| 2098 | } |
| 2099 | |
| 2100 | hl += sprintf(outaddr+hl, "\n"); |
| 2101 | |
| 2102 | return hl; |
| 2103 | } |
| 2104 | |
| 2105 | static int |
| 2106 | z90crypt_status(char *resp_buff, char **start, off_t offset, |
| 2107 | int count, int *eof, void *data) |
| 2108 | { |
| 2109 | unsigned char *workarea; |
| 2110 | int len; |
| 2111 | |
| 2112 | /* resp_buff is a page. Use the right half for a work area */ |
| 2113 | workarea = resp_buff+2000; |
| 2114 | len = 0; |
| 2115 | len += sprintf(resp_buff+len, "\nz90crypt version: %d.%d.%d\n", |
| 2116 | z90crypt_VERSION, z90crypt_RELEASE, z90crypt_VARIANT); |
| 2117 | len += sprintf(resp_buff+len, "Cryptographic domain: %d\n", |
| 2118 | get_status_domain_index()); |
| 2119 | len += sprintf(resp_buff+len, "Total device count: %d\n", |
| 2120 | get_status_totalcount()); |
| 2121 | len += sprintf(resp_buff+len, "PCICA count: %d\n", |
| 2122 | get_status_PCICAcount()); |
| 2123 | len += sprintf(resp_buff+len, "PCICC count: %d\n", |
| 2124 | get_status_PCICCcount()); |
| 2125 | len += sprintf(resp_buff+len, "PCIXCC MCL2 count: %d\n", |
| 2126 | get_status_PCIXCCMCL2count()); |
| 2127 | len += sprintf(resp_buff+len, "PCIXCC MCL3 count: %d\n", |
| 2128 | get_status_PCIXCCMCL3count()); |
| 2129 | len += sprintf(resp_buff+len, "CEX2C count: %d\n", |
| 2130 | get_status_CEX2Ccount()); |
| 2131 | len += sprintf(resp_buff+len, "requestq count: %d\n", |
| 2132 | get_status_requestq_count()); |
| 2133 | len += sprintf(resp_buff+len, "pendingq count: %d\n", |
| 2134 | get_status_pendingq_count()); |
| 2135 | len += sprintf(resp_buff+len, "Total open handles: %d\n\n", |
| 2136 | get_status_totalopen_count()); |
| 2137 | len += sprinthx( |
| 2138 | "Online devices: 1: PCICA, 2: PCICC, 3: PCIXCC (MCL2), " |
| 2139 | "4: PCIXCC (MCL3), 5: CEX2C", |
| 2140 | resp_buff+len, |
| 2141 | get_status_status_mask(workarea), |
| 2142 | Z90CRYPT_NUM_APS); |
| 2143 | len += sprinthx("Waiting work element counts", |
| 2144 | resp_buff+len, |
| 2145 | get_status_qdepth_mask(workarea), |
| 2146 | Z90CRYPT_NUM_APS); |
| 2147 | len += sprinthx4( |
| 2148 | "Per-device successfully completed request counts", |
| 2149 | resp_buff+len, |
| 2150 | get_status_perdevice_reqcnt((unsigned int *)workarea), |
| 2151 | Z90CRYPT_NUM_APS); |
| 2152 | *eof = 1; |
| 2153 | memset(workarea, 0, Z90CRYPT_NUM_APS * sizeof(unsigned int)); |
| 2154 | return len; |
| 2155 | } |
| 2156 | |
| 2157 | static inline void |
| 2158 | disable_card(int card_index) |
| 2159 | { |
| 2160 | struct device *devp; |
| 2161 | |
| 2162 | devp = LONG2DEVPTR(card_index); |
| 2163 | if (!devp || devp->user_disabled) |
| 2164 | return; |
| 2165 | devp->user_disabled = 1; |
| 2166 | z90crypt.hdware_info->hdware_mask.user_disabled_count++; |
| 2167 | if (devp->dev_type == -1) |
| 2168 | return; |
| 2169 | z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count++; |
| 2170 | } |
| 2171 | |
| 2172 | static inline void |
| 2173 | enable_card(int card_index) |
| 2174 | { |
| 2175 | struct device *devp; |
| 2176 | |
| 2177 | devp = LONG2DEVPTR(card_index); |
| 2178 | if (!devp || !devp->user_disabled) |
| 2179 | return; |
| 2180 | devp->user_disabled = 0; |
| 2181 | z90crypt.hdware_info->hdware_mask.user_disabled_count--; |
| 2182 | if (devp->dev_type == -1) |
| 2183 | return; |
| 2184 | z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count--; |
| 2185 | } |
| 2186 | |
| 2187 | static inline int |
| 2188 | scan_char(unsigned char *bf, unsigned int len, |
| 2189 | unsigned int *offs, unsigned int *p_eof, unsigned char c) |
| 2190 | { |
| 2191 | unsigned int i, found; |
| 2192 | |
| 2193 | found = 0; |
| 2194 | for (i = 0; i < len; i++) { |
| 2195 | if (bf[i] == c) { |
| 2196 | found = 1; |
| 2197 | break; |
| 2198 | } |
| 2199 | if (bf[i] == '\0') { |
| 2200 | *p_eof = 1; |
| 2201 | break; |
| 2202 | } |
| 2203 | if (bf[i] == '\n') { |
| 2204 | break; |
| 2205 | } |
| 2206 | } |
| 2207 | *offs = i+1; |
| 2208 | return found; |
| 2209 | } |
| 2210 | |
| 2211 | static inline int |
| 2212 | scan_string(unsigned char *bf, unsigned int len, |
| 2213 | unsigned int *offs, unsigned int *p_eof, unsigned char *s) |
| 2214 | { |
| 2215 | unsigned int temp_len, temp_offs, found, eof; |
| 2216 | |
| 2217 | temp_len = temp_offs = found = eof = 0; |
| 2218 | while (!eof && !found) { |
| 2219 | found = scan_char(bf+temp_len, len-temp_len, |
| 2220 | &temp_offs, &eof, *s); |
| 2221 | |
| 2222 | temp_len += temp_offs; |
| 2223 | if (eof) { |
| 2224 | found = 0; |
| 2225 | break; |
| 2226 | } |
| 2227 | |
| 2228 | if (found) { |
| 2229 | if (len >= temp_offs+strlen(s)) { |
| 2230 | found = !strncmp(bf+temp_len-1, s, strlen(s)); |
| 2231 | if (found) { |
| 2232 | *offs = temp_len+strlen(s)-1; |
| 2233 | break; |
| 2234 | } |
| 2235 | } else { |
| 2236 | found = 0; |
| 2237 | *p_eof = 1; |
| 2238 | break; |
| 2239 | } |
| 2240 | } |
| 2241 | } |
| 2242 | return found; |
| 2243 | } |
| 2244 | |
| 2245 | static int |
| 2246 | z90crypt_status_write(struct file *file, const char __user *buffer, |
| 2247 | unsigned long count, void *data) |
| 2248 | { |
| 2249 | int i, j, len, offs, found, eof; |
| 2250 | unsigned char *lbuf; |
| 2251 | unsigned int local_count; |
| 2252 | |
| 2253 | #define LBUFSIZE 600 |
| 2254 | lbuf = kmalloc(LBUFSIZE, GFP_KERNEL); |
| 2255 | if (!lbuf) { |
| 2256 | PRINTK("kmalloc failed!\n"); |
| 2257 | return 0; |
| 2258 | } |
| 2259 | |
| 2260 | if (count <= 0) |
| 2261 | return 0; |
| 2262 | |
| 2263 | local_count = UMIN((unsigned int)count, LBUFSIZE-1); |
| 2264 | |
| 2265 | if (copy_from_user(lbuf, buffer, local_count) != 0) { |
| 2266 | kfree(lbuf); |
| 2267 | return -EFAULT; |
| 2268 | } |
| 2269 | |
| 2270 | lbuf[local_count-1] = '\0'; |
| 2271 | |
| 2272 | len = 0; |
| 2273 | eof = 0; |
| 2274 | found = 0; |
| 2275 | while (!eof) { |
| 2276 | found = scan_string(lbuf+len, local_count-len, &offs, &eof, |
| 2277 | "Online devices"); |
| 2278 | len += offs; |
| 2279 | if (found == 1) |
| 2280 | break; |
| 2281 | } |
| 2282 | |
| 2283 | if (eof) { |
| 2284 | kfree(lbuf); |
| 2285 | return count; |
| 2286 | } |
| 2287 | |
| 2288 | if (found) |
| 2289 | found = scan_char(lbuf+len, local_count-len, &offs, &eof, '\n'); |
| 2290 | |
| 2291 | if (!found || eof) { |
| 2292 | kfree(lbuf); |
| 2293 | return count; |
| 2294 | } |
| 2295 | |
| 2296 | len += offs; |
| 2297 | j = 0; |
| 2298 | for (i = 0; i < 80; i++) { |
| 2299 | switch (*(lbuf+len+i)) { |
| 2300 | case '\t': |
| 2301 | case ' ': |
| 2302 | break; |
| 2303 | case '\n': |
| 2304 | default: |
| 2305 | eof = 1; |
| 2306 | break; |
| 2307 | case '0': |
| 2308 | case '1': |
| 2309 | case '2': |
| 2310 | case '3': |
| 2311 | case '4': |
| 2312 | case '5': |
| 2313 | j++; |
| 2314 | break; |
| 2315 | case 'd': |
| 2316 | case 'D': |
| 2317 | disable_card(j); |
| 2318 | j++; |
| 2319 | break; |
| 2320 | case 'e': |
| 2321 | case 'E': |
| 2322 | enable_card(j); |
| 2323 | j++; |
| 2324 | break; |
| 2325 | } |
| 2326 | if (eof) |
| 2327 | break; |
| 2328 | } |
| 2329 | |
| 2330 | kfree(lbuf); |
| 2331 | return count; |
| 2332 | } |
| 2333 | |
| 2334 | /** |
| 2335 | * Functions that run under a timer, with no process id |
| 2336 | * |
| 2337 | * The task functions: |
| 2338 | * z90crypt_reader_task |
| 2339 | * helper_send_work |
| 2340 | * helper_handle_work_element |
| 2341 | * helper_receive_rc |
| 2342 | * z90crypt_config_task |
| 2343 | * z90crypt_cleanup_task |
| 2344 | * |
| 2345 | * Helper functions: |
| 2346 | * z90crypt_schedule_reader_timer |
| 2347 | * z90crypt_schedule_reader_task |
| 2348 | * z90crypt_schedule_config_task |
| 2349 | * z90crypt_schedule_cleanup_task |
| 2350 | */ |
| 2351 | static inline int |
| 2352 | receive_from_crypto_device(int index, unsigned char *psmid, int *buff_len_p, |
| 2353 | unsigned char *buff, unsigned char __user **dest_p_p) |
| 2354 | { |
| 2355 | int dv, rv; |
| 2356 | struct device *dev_ptr; |
| 2357 | struct caller *caller_p; |
| 2358 | struct ica_rsa_modexpo *icaMsg_p; |
| 2359 | struct list_head *ptr, *tptr; |
| 2360 | |
| 2361 | memcpy(psmid, NULL_psmid, sizeof(NULL_psmid)); |
| 2362 | |
| 2363 | if (z90crypt.terminating) |
| 2364 | return REC_FATAL_ERROR; |
| 2365 | |
| 2366 | caller_p = 0; |
| 2367 | dev_ptr = z90crypt.device_p[index]; |
| 2368 | rv = 0; |
| 2369 | do { |
| 2370 | if (!dev_ptr || dev_ptr->disabled) { |
| 2371 | rv = REC_NO_WORK; // a disabled device can't return work |
| 2372 | break; |
| 2373 | } |
| 2374 | if (dev_ptr->dev_self_x != index) { |
| 2375 | PRINTKC("Corrupt dev ptr\n"); |
| 2376 | z90crypt.terminating = 1; |
| 2377 | rv = REC_FATAL_ERROR; |
| 2378 | break; |
| 2379 | } |
| 2380 | if (!dev_ptr->dev_resp_l || !dev_ptr->dev_resp_p) { |
| 2381 | dv = DEV_REC_EXCEPTION; |
| 2382 | PRINTK("dev_resp_l = %d, dev_resp_p = %p\n", |
| 2383 | dev_ptr->dev_resp_l, dev_ptr->dev_resp_p); |
| 2384 | } else { |
| 2385 | PDEBUG("Dequeue called for device %d\n", index); |
| 2386 | dv = receive_from_AP(index, z90crypt.cdx, |
| 2387 | dev_ptr->dev_resp_l, |
| 2388 | dev_ptr->dev_resp_p, psmid); |
| 2389 | } |
| 2390 | switch (dv) { |
| 2391 | case DEV_REC_EXCEPTION: |
| 2392 | rv = REC_FATAL_ERROR; |
| 2393 | z90crypt.terminating = 1; |
| 2394 | PRINTKC("Exception in receive from device %d\n", |
| 2395 | index); |
| 2396 | break; |
| 2397 | case DEV_ONLINE: |
| 2398 | rv = 0; |
| 2399 | break; |
| 2400 | case DEV_EMPTY: |
| 2401 | rv = REC_EMPTY; |
| 2402 | break; |
| 2403 | case DEV_NO_WORK: |
| 2404 | rv = REC_NO_WORK; |
| 2405 | break; |
| 2406 | case DEV_BAD_MESSAGE: |
| 2407 | case DEV_GONE: |
| 2408 | case REC_HARDWAR_ERR: |
| 2409 | default: |
| 2410 | rv = REC_NO_RESPONSE; |
| 2411 | break; |
| 2412 | } |
| 2413 | if (rv) |
| 2414 | break; |
| 2415 | if (dev_ptr->dev_caller_count <= 0) { |
| 2416 | rv = REC_USER_GONE; |
| 2417 | break; |
| 2418 | } |
| 2419 | |
| 2420 | list_for_each_safe(ptr, tptr, &dev_ptr->dev_caller_list) { |
| 2421 | caller_p = list_entry(ptr, struct caller, caller_liste); |
| 2422 | if (!memcmp(caller_p->caller_id, psmid, |
| 2423 | sizeof(caller_p->caller_id))) { |
| 2424 | if (!list_empty(&caller_p->caller_liste)) { |
| 2425 | list_del_init(ptr); |
| 2426 | dev_ptr->dev_caller_count--; |
| 2427 | break; |
| 2428 | } |
| 2429 | } |
| 2430 | caller_p = 0; |
| 2431 | } |
| 2432 | if (!caller_p) { |
| 2433 | PRINTKW("Unable to locate PSMID %02X%02X%02X%02X%02X" |
| 2434 | "%02X%02X%02X in device list\n", |
| 2435 | psmid[0], psmid[1], psmid[2], psmid[3], |
| 2436 | psmid[4], psmid[5], psmid[6], psmid[7]); |
| 2437 | rv = REC_USER_GONE; |
| 2438 | break; |
| 2439 | } |
| 2440 | |
| 2441 | PDEBUG("caller_p after successful receive: %p\n", caller_p); |
| 2442 | rv = convert_response(dev_ptr->dev_resp_p, |
| 2443 | caller_p->caller_buf_p, buff_len_p, buff); |
| 2444 | switch (rv) { |
| 2445 | case REC_USE_PCICA: |
| 2446 | break; |
| 2447 | case REC_OPERAND_INV: |
| 2448 | case REC_OPERAND_SIZE: |
| 2449 | case REC_EVEN_MOD: |
| 2450 | case REC_INVALID_PAD: |
| 2451 | PDEBUG("device %d: 'user error' %d\n", index, rv); |
| 2452 | break; |
| 2453 | case WRONG_DEVICE_TYPE: |
| 2454 | case REC_HARDWAR_ERR: |
| 2455 | case REC_BAD_MESSAGE: |
| 2456 | PRINTKW("device %d: hardware error %d\n", index, rv); |
| 2457 | rv = REC_NO_RESPONSE; |
| 2458 | break; |
| 2459 | default: |
| 2460 | PDEBUG("device %d: rv = %d\n", index, rv); |
| 2461 | break; |
| 2462 | } |
| 2463 | } while (0); |
| 2464 | |
| 2465 | switch (rv) { |
| 2466 | case 0: |
| 2467 | PDEBUG("Successful receive from device %d\n", index); |
| 2468 | icaMsg_p = (struct ica_rsa_modexpo *)caller_p->caller_buf_p; |
| 2469 | *dest_p_p = icaMsg_p->outputdata; |
| 2470 | if (*buff_len_p == 0) |
| 2471 | PRINTK("Zero *buff_len_p\n"); |
| 2472 | break; |
| 2473 | case REC_NO_RESPONSE: |
| 2474 | PRINTKW("Removing device %d from availability\n", index); |
| 2475 | remove_device(dev_ptr); |
| 2476 | break; |
| 2477 | } |
| 2478 | |
| 2479 | if (caller_p) |
| 2480 | unbuild_caller(dev_ptr, caller_p); |
| 2481 | |
| 2482 | return rv; |
| 2483 | } |
| 2484 | |
| 2485 | static inline void |
| 2486 | helper_send_work(int index) |
| 2487 | { |
| 2488 | struct work_element *rq_p; |
| 2489 | int rv; |
| 2490 | |
| 2491 | if (list_empty(&request_list)) |
| 2492 | return; |
| 2493 | requestq_count--; |
| 2494 | rq_p = list_entry(request_list.next, struct work_element, liste); |
| 2495 | list_del_init(&rq_p->liste); |
| 2496 | rq_p->audit[1] |= FP_REMREQUEST; |
| 2497 | if (rq_p->devtype == SHRT2DEVPTR(index)->dev_type) { |
| 2498 | rq_p->devindex = SHRT2LONG(index); |
| 2499 | rv = send_to_crypto_device(rq_p); |
| 2500 | if (rv == 0) { |
| 2501 | rq_p->requestsent = jiffies; |
| 2502 | rq_p->audit[0] |= FP_SENT; |
| 2503 | list_add_tail(&rq_p->liste, &pending_list); |
| 2504 | ++pendingq_count; |
| 2505 | rq_p->audit[0] |= FP_PENDING; |
| 2506 | } else { |
| 2507 | switch (rv) { |
| 2508 | case REC_OPERAND_INV: |
| 2509 | case REC_OPERAND_SIZE: |
| 2510 | case REC_EVEN_MOD: |
| 2511 | case REC_INVALID_PAD: |
| 2512 | rq_p->retcode = -EINVAL; |
| 2513 | break; |
| 2514 | case SEN_NOT_AVAIL: |
| 2515 | case SEN_RETRY: |
| 2516 | case REC_NO_RESPONSE: |
| 2517 | default: |
| 2518 | if (z90crypt.mask.st_count > 1) |
| 2519 | rq_p->retcode = |
| 2520 | -ERESTARTSYS; |
| 2521 | else |
| 2522 | rq_p->retcode = -ENODEV; |
| 2523 | break; |
| 2524 | } |
| 2525 | rq_p->status[0] |= STAT_FAILED; |
| 2526 | rq_p->audit[1] |= FP_AWAKENING; |
| 2527 | atomic_set(&rq_p->alarmrung, 1); |
| 2528 | wake_up(&rq_p->waitq); |
| 2529 | } |
| 2530 | } else { |
| 2531 | if (z90crypt.mask.st_count > 1) |
| 2532 | rq_p->retcode = -ERESTARTSYS; |
| 2533 | else |
| 2534 | rq_p->retcode = -ENODEV; |
| 2535 | rq_p->status[0] |= STAT_FAILED; |
| 2536 | rq_p->audit[1] |= FP_AWAKENING; |
| 2537 | atomic_set(&rq_p->alarmrung, 1); |
| 2538 | wake_up(&rq_p->waitq); |
| 2539 | } |
| 2540 | } |
| 2541 | |
| 2542 | static inline void |
| 2543 | helper_handle_work_element(int index, unsigned char psmid[8], int rc, |
| 2544 | int buff_len, unsigned char *buff, |
| 2545 | unsigned char __user *resp_addr) |
| 2546 | { |
| 2547 | struct work_element *pq_p; |
| 2548 | struct list_head *lptr, *tptr; |
| 2549 | |
| 2550 | pq_p = 0; |
| 2551 | list_for_each_safe(lptr, tptr, &pending_list) { |
| 2552 | pq_p = list_entry(lptr, struct work_element, liste); |
| 2553 | if (!memcmp(pq_p->caller_id, psmid, sizeof(pq_p->caller_id))) { |
| 2554 | list_del_init(lptr); |
| 2555 | pendingq_count--; |
| 2556 | pq_p->audit[1] |= FP_NOTPENDING; |
| 2557 | break; |
| 2558 | } |
| 2559 | pq_p = 0; |
| 2560 | } |
| 2561 | |
| 2562 | if (!pq_p) { |
| 2563 | PRINTK("device %d has work but no caller exists on pending Q\n", |
| 2564 | SHRT2LONG(index)); |
| 2565 | return; |
| 2566 | } |
| 2567 | |
| 2568 | switch (rc) { |
| 2569 | case 0: |
| 2570 | pq_p->resp_buff_size = buff_len; |
| 2571 | pq_p->audit[1] |= FP_RESPSIZESET; |
| 2572 | if (buff_len) { |
| 2573 | pq_p->resp_addr = resp_addr; |
| 2574 | pq_p->audit[1] |= FP_RESPADDRCOPIED; |
| 2575 | memcpy(pq_p->resp_buff, buff, buff_len); |
| 2576 | pq_p->audit[1] |= FP_RESPBUFFCOPIED; |
| 2577 | } |
| 2578 | break; |
| 2579 | case REC_OPERAND_INV: |
| 2580 | case REC_OPERAND_SIZE: |
| 2581 | case REC_EVEN_MOD: |
| 2582 | case REC_INVALID_PAD: |
| 2583 | PDEBUG("-EINVAL after application error %d\n", rc); |
| 2584 | pq_p->retcode = -EINVAL; |
| 2585 | pq_p->status[0] |= STAT_FAILED; |
| 2586 | break; |
| 2587 | case REC_USE_PCICA: |
| 2588 | pq_p->retcode = -ERESTARTSYS; |
| 2589 | pq_p->status[0] |= STAT_FAILED; |
| 2590 | break; |
| 2591 | case REC_NO_RESPONSE: |
| 2592 | default: |
| 2593 | if (z90crypt.mask.st_count > 1) |
| 2594 | pq_p->retcode = -ERESTARTSYS; |
| 2595 | else |
| 2596 | pq_p->retcode = -ENODEV; |
| 2597 | pq_p->status[0] |= STAT_FAILED; |
| 2598 | break; |
| 2599 | } |
| 2600 | if ((pq_p->status[0] != STAT_FAILED) || (pq_p->retcode != -ERELEASED)) { |
| 2601 | pq_p->audit[1] |= FP_AWAKENING; |
| 2602 | atomic_set(&pq_p->alarmrung, 1); |
| 2603 | wake_up(&pq_p->waitq); |
| 2604 | } |
| 2605 | } |
| 2606 | |
| 2607 | /** |
| 2608 | * return TRUE if the work element should be removed from the queue |
| 2609 | */ |
| 2610 | static inline int |
| 2611 | helper_receive_rc(int index, int *rc_p) |
| 2612 | { |
| 2613 | switch (*rc_p) { |
| 2614 | case 0: |
| 2615 | case REC_OPERAND_INV: |
| 2616 | case REC_OPERAND_SIZE: |
| 2617 | case REC_EVEN_MOD: |
| 2618 | case REC_INVALID_PAD: |
| 2619 | case REC_USE_PCICA: |
| 2620 | break; |
| 2621 | |
| 2622 | case REC_BUSY: |
| 2623 | case REC_NO_WORK: |
| 2624 | case REC_EMPTY: |
| 2625 | case REC_RETRY_DEV: |
| 2626 | case REC_FATAL_ERROR: |
| 2627 | return 0; |
| 2628 | |
| 2629 | case REC_NO_RESPONSE: |
| 2630 | break; |
| 2631 | |
| 2632 | default: |
| 2633 | PRINTK("rc %d, device %d converted to REC_NO_RESPONSE\n", |
| 2634 | *rc_p, SHRT2LONG(index)); |
| 2635 | *rc_p = REC_NO_RESPONSE; |
| 2636 | break; |
| 2637 | } |
| 2638 | return 1; |
| 2639 | } |
| 2640 | |
| 2641 | static inline void |
| 2642 | z90crypt_schedule_reader_timer(void) |
| 2643 | { |
| 2644 | if (timer_pending(&reader_timer)) |
| 2645 | return; |
| 2646 | if (mod_timer(&reader_timer, jiffies+(READERTIME*HZ/1000)) != 0) |
| 2647 | PRINTK("Timer pending while modifying reader timer\n"); |
| 2648 | } |
| 2649 | |
| 2650 | static void |
| 2651 | z90crypt_reader_task(unsigned long ptr) |
| 2652 | { |
| 2653 | int workavail, index, rc, buff_len; |
| 2654 | unsigned char psmid[8]; |
| 2655 | unsigned char __user *resp_addr; |
| 2656 | static unsigned char buff[1024]; |
| 2657 | |
| 2658 | /** |
| 2659 | * we use workavail = 2 to ensure 2 passes with nothing dequeued before |
| 2660 | * exiting the loop. If (pendingq_count+requestq_count) == 0 after the |
| 2661 | * loop, there is no work remaining on the queues. |
| 2662 | */ |
| 2663 | resp_addr = 0; |
| 2664 | workavail = 2; |
| 2665 | buff_len = 0; |
| 2666 | while (workavail) { |
| 2667 | workavail--; |
| 2668 | rc = 0; |
| 2669 | spin_lock_irq(&queuespinlock); |
| 2670 | memset(buff, 0x00, sizeof(buff)); |
| 2671 | |
| 2672 | /* Dequeue once from each device in round robin. */ |
| 2673 | for (index = 0; index < z90crypt.mask.st_count; index++) { |
| 2674 | PDEBUG("About to receive.\n"); |
| 2675 | rc = receive_from_crypto_device(SHRT2LONG(index), |
| 2676 | psmid, |
| 2677 | &buff_len, |
| 2678 | buff, |
| 2679 | &resp_addr); |
| 2680 | PDEBUG("Dequeued: rc = %d.\n", rc); |
| 2681 | |
| 2682 | if (helper_receive_rc(index, &rc)) { |
| 2683 | if (rc != REC_NO_RESPONSE) { |
| 2684 | helper_send_work(index); |
| 2685 | workavail = 2; |
| 2686 | } |
| 2687 | |
| 2688 | helper_handle_work_element(index, psmid, rc, |
| 2689 | buff_len, buff, |
| 2690 | resp_addr); |
| 2691 | } |
| 2692 | |
| 2693 | if (rc == REC_FATAL_ERROR) |
| 2694 | PRINTKW("REC_FATAL_ERROR from device %d!\n", |
| 2695 | SHRT2LONG(index)); |
| 2696 | } |
| 2697 | spin_unlock_irq(&queuespinlock); |
| 2698 | } |
| 2699 | |
| 2700 | if (pendingq_count + requestq_count) |
| 2701 | z90crypt_schedule_reader_timer(); |
| 2702 | } |
| 2703 | |
| 2704 | static inline void |
| 2705 | z90crypt_schedule_config_task(unsigned int expiration) |
| 2706 | { |
| 2707 | if (timer_pending(&config_timer)) |
| 2708 | return; |
| 2709 | if (mod_timer(&config_timer, jiffies+(expiration*HZ)) != 0) |
| 2710 | PRINTK("Timer pending while modifying config timer\n"); |
| 2711 | } |
| 2712 | |
| 2713 | static void |
| 2714 | z90crypt_config_task(unsigned long ptr) |
| 2715 | { |
| 2716 | int rc; |
| 2717 | |
| 2718 | PDEBUG("jiffies %ld\n", jiffies); |
| 2719 | |
| 2720 | if ((rc = refresh_z90crypt(&z90crypt.cdx))) |
| 2721 | PRINTK("Error %d detected in refresh_z90crypt.\n", rc); |
| 2722 | /* If return was fatal, don't bother reconfiguring */ |
| 2723 | if ((rc != TSQ_FATAL_ERROR) && (rc != RSQ_FATAL_ERROR)) |
| 2724 | z90crypt_schedule_config_task(CONFIGTIME); |
| 2725 | } |
| 2726 | |
| 2727 | static inline void |
| 2728 | z90crypt_schedule_cleanup_task(void) |
| 2729 | { |
| 2730 | if (timer_pending(&cleanup_timer)) |
| 2731 | return; |
| 2732 | if (mod_timer(&cleanup_timer, jiffies+(CLEANUPTIME*HZ)) != 0) |
| 2733 | PRINTK("Timer pending while modifying cleanup timer\n"); |
| 2734 | } |
| 2735 | |
| 2736 | static inline void |
| 2737 | helper_drain_queues(void) |
| 2738 | { |
| 2739 | struct work_element *pq_p; |
| 2740 | struct list_head *lptr, *tptr; |
| 2741 | |
| 2742 | list_for_each_safe(lptr, tptr, &pending_list) { |
| 2743 | pq_p = list_entry(lptr, struct work_element, liste); |
| 2744 | pq_p->retcode = -ENODEV; |
| 2745 | pq_p->status[0] |= STAT_FAILED; |
| 2746 | unbuild_caller(LONG2DEVPTR(pq_p->devindex), |
| 2747 | (struct caller *)pq_p->requestptr); |
| 2748 | list_del_init(lptr); |
| 2749 | pendingq_count--; |
| 2750 | pq_p->audit[1] |= FP_NOTPENDING; |
| 2751 | pq_p->audit[1] |= FP_AWAKENING; |
| 2752 | atomic_set(&pq_p->alarmrung, 1); |
| 2753 | wake_up(&pq_p->waitq); |
| 2754 | } |
| 2755 | |
| 2756 | list_for_each_safe(lptr, tptr, &request_list) { |
| 2757 | pq_p = list_entry(lptr, struct work_element, liste); |
| 2758 | pq_p->retcode = -ENODEV; |
| 2759 | pq_p->status[0] |= STAT_FAILED; |
| 2760 | list_del_init(lptr); |
| 2761 | requestq_count--; |
| 2762 | pq_p->audit[1] |= FP_REMREQUEST; |
| 2763 | pq_p->audit[1] |= FP_AWAKENING; |
| 2764 | atomic_set(&pq_p->alarmrung, 1); |
| 2765 | wake_up(&pq_p->waitq); |
| 2766 | } |
| 2767 | } |
| 2768 | |
| 2769 | static inline void |
| 2770 | helper_timeout_requests(void) |
| 2771 | { |
| 2772 | struct work_element *pq_p; |
| 2773 | struct list_head *lptr, *tptr; |
| 2774 | long timelimit; |
| 2775 | |
| 2776 | timelimit = jiffies - (CLEANUPTIME * HZ); |
| 2777 | /* The list is in strict chronological order */ |
| 2778 | list_for_each_safe(lptr, tptr, &pending_list) { |
| 2779 | pq_p = list_entry(lptr, struct work_element, liste); |
| 2780 | if (pq_p->requestsent >= timelimit) |
| 2781 | break; |
| 2782 | PRINTKW("Purging(PQ) PSMID %02X%02X%02X%02X%02X%02X%02X%02X\n", |
| 2783 | ((struct caller *)pq_p->requestptr)->caller_id[0], |
| 2784 | ((struct caller *)pq_p->requestptr)->caller_id[1], |
| 2785 | ((struct caller *)pq_p->requestptr)->caller_id[2], |
| 2786 | ((struct caller *)pq_p->requestptr)->caller_id[3], |
| 2787 | ((struct caller *)pq_p->requestptr)->caller_id[4], |
| 2788 | ((struct caller *)pq_p->requestptr)->caller_id[5], |
| 2789 | ((struct caller *)pq_p->requestptr)->caller_id[6], |
| 2790 | ((struct caller *)pq_p->requestptr)->caller_id[7]); |
| 2791 | pq_p->retcode = -ETIMEOUT; |
| 2792 | pq_p->status[0] |= STAT_FAILED; |
| 2793 | /* get this off any caller queue it may be on */ |
| 2794 | unbuild_caller(LONG2DEVPTR(pq_p->devindex), |
| 2795 | (struct caller *) pq_p->requestptr); |
| 2796 | list_del_init(lptr); |
| 2797 | pendingq_count--; |
| 2798 | pq_p->audit[1] |= FP_TIMEDOUT; |
| 2799 | pq_p->audit[1] |= FP_NOTPENDING; |
| 2800 | pq_p->audit[1] |= FP_AWAKENING; |
| 2801 | atomic_set(&pq_p->alarmrung, 1); |
| 2802 | wake_up(&pq_p->waitq); |
| 2803 | } |
| 2804 | |
| 2805 | /** |
| 2806 | * If pending count is zero, items left on the request queue may |
| 2807 | * never be processed. |
| 2808 | */ |
| 2809 | if (pendingq_count <= 0) { |
| 2810 | list_for_each_safe(lptr, tptr, &request_list) { |
| 2811 | pq_p = list_entry(lptr, struct work_element, liste); |
| 2812 | if (pq_p->requestsent >= timelimit) |
| 2813 | break; |
| 2814 | PRINTKW("Purging(RQ) PSMID %02X%02X%02X%02X%02X%02X%02X%02X\n", |
| 2815 | ((struct caller *)pq_p->requestptr)->caller_id[0], |
| 2816 | ((struct caller *)pq_p->requestptr)->caller_id[1], |
| 2817 | ((struct caller *)pq_p->requestptr)->caller_id[2], |
| 2818 | ((struct caller *)pq_p->requestptr)->caller_id[3], |
| 2819 | ((struct caller *)pq_p->requestptr)->caller_id[4], |
| 2820 | ((struct caller *)pq_p->requestptr)->caller_id[5], |
| 2821 | ((struct caller *)pq_p->requestptr)->caller_id[6], |
| 2822 | ((struct caller *)pq_p->requestptr)->caller_id[7]); |
| 2823 | pq_p->retcode = -ETIMEOUT; |
| 2824 | pq_p->status[0] |= STAT_FAILED; |
| 2825 | list_del_init(lptr); |
| 2826 | requestq_count--; |
| 2827 | pq_p->audit[1] |= FP_TIMEDOUT; |
| 2828 | pq_p->audit[1] |= FP_REMREQUEST; |
| 2829 | pq_p->audit[1] |= FP_AWAKENING; |
| 2830 | atomic_set(&pq_p->alarmrung, 1); |
| 2831 | wake_up(&pq_p->waitq); |
| 2832 | } |
| 2833 | } |
| 2834 | } |
| 2835 | |
| 2836 | static void |
| 2837 | z90crypt_cleanup_task(unsigned long ptr) |
| 2838 | { |
| 2839 | PDEBUG("jiffies %ld\n", jiffies); |
| 2840 | spin_lock_irq(&queuespinlock); |
| 2841 | if (z90crypt.mask.st_count <= 0) // no devices! |
| 2842 | helper_drain_queues(); |
| 2843 | else |
| 2844 | helper_timeout_requests(); |
| 2845 | spin_unlock_irq(&queuespinlock); |
| 2846 | z90crypt_schedule_cleanup_task(); |
| 2847 | } |
| 2848 | |
| 2849 | static void |
| 2850 | z90crypt_schedule_reader_task(unsigned long ptr) |
| 2851 | { |
| 2852 | tasklet_schedule(&reader_tasklet); |
| 2853 | } |
| 2854 | |
| 2855 | /** |
| 2856 | * Lowlevel Functions: |
| 2857 | * |
| 2858 | * create_z90crypt: creates and initializes basic data structures |
| 2859 | * refresh_z90crypt: re-initializes basic data structures |
| 2860 | * find_crypto_devices: returns a count and mask of hardware status |
| 2861 | * create_crypto_device: builds the descriptor for a device |
| 2862 | * destroy_crypto_device: unallocates the descriptor for a device |
| 2863 | * destroy_z90crypt: drains all work, unallocates structs |
| 2864 | */ |
| 2865 | |
| 2866 | /** |
| 2867 | * build the z90crypt root structure using the given domain index |
| 2868 | */ |
| 2869 | static int |
| 2870 | create_z90crypt(int *cdx_p) |
| 2871 | { |
| 2872 | struct hdware_block *hdware_blk_p; |
| 2873 | |
| 2874 | memset(&z90crypt, 0x00, sizeof(struct z90crypt)); |
| 2875 | z90crypt.domain_established = 0; |
| 2876 | z90crypt.len = sizeof(struct z90crypt); |
| 2877 | z90crypt.max_count = Z90CRYPT_NUM_DEVS; |
| 2878 | z90crypt.cdx = *cdx_p; |
| 2879 | |
| 2880 | hdware_blk_p = (struct hdware_block *) |
| 2881 | kmalloc(sizeof(struct hdware_block), GFP_ATOMIC); |
| 2882 | if (!hdware_blk_p) { |
| 2883 | PDEBUG("kmalloc for hardware block failed\n"); |
| 2884 | return ENOMEM; |
| 2885 | } |
| 2886 | memset(hdware_blk_p, 0x00, sizeof(struct hdware_block)); |
| 2887 | z90crypt.hdware_info = hdware_blk_p; |
| 2888 | |
| 2889 | return 0; |
| 2890 | } |
| 2891 | |
| 2892 | static inline int |
| 2893 | helper_scan_devices(int cdx_array[16], int *cdx_p, int *correct_cdx_found) |
| 2894 | { |
| 2895 | enum hdstat hd_stat; |
| 2896 | int q_depth, dev_type; |
| 2897 | int indx, chkdom, numdomains; |
| 2898 | |
| 2899 | q_depth = dev_type = numdomains = 0; |
| 2900 | for (chkdom = 0; chkdom <= 15; cdx_array[chkdom++] = -1); |
| 2901 | for (indx = 0; indx < z90crypt.max_count; indx++) { |
| 2902 | hd_stat = HD_NOT_THERE; |
| 2903 | numdomains = 0; |
| 2904 | for (chkdom = 0; chkdom <= 15; chkdom++) { |
| 2905 | hd_stat = query_online(indx, chkdom, MAX_RESET, |
| 2906 | &q_depth, &dev_type); |
| 2907 | if (hd_stat == HD_TSQ_EXCEPTION) { |
| 2908 | z90crypt.terminating = 1; |
| 2909 | PRINTKC("exception taken!\n"); |
| 2910 | break; |
| 2911 | } |
| 2912 | if (hd_stat == HD_ONLINE) { |
| 2913 | cdx_array[numdomains++] = chkdom; |
| 2914 | if (*cdx_p == chkdom) { |
| 2915 | *correct_cdx_found = 1; |
| 2916 | break; |
| 2917 | } |
| 2918 | } |
| 2919 | } |
| 2920 | if ((*correct_cdx_found == 1) || (numdomains != 0)) |
| 2921 | break; |
| 2922 | if (z90crypt.terminating) |
| 2923 | break; |
| 2924 | } |
| 2925 | return numdomains; |
| 2926 | } |
| 2927 | |
| 2928 | static inline int |
| 2929 | probe_crypto_domain(int *cdx_p) |
| 2930 | { |
| 2931 | int cdx_array[16]; |
| 2932 | char cdx_array_text[53], temp[5]; |
| 2933 | int correct_cdx_found, numdomains; |
| 2934 | |
| 2935 | correct_cdx_found = 0; |
| 2936 | numdomains = helper_scan_devices(cdx_array, cdx_p, &correct_cdx_found); |
| 2937 | |
| 2938 | if (z90crypt.terminating) |
| 2939 | return TSQ_FATAL_ERROR; |
| 2940 | |
| 2941 | if (correct_cdx_found) |
| 2942 | return 0; |
| 2943 | |
| 2944 | if (numdomains == 0) { |
| 2945 | PRINTKW("Unable to find crypto domain: No devices found\n"); |
| 2946 | return Z90C_NO_DEVICES; |
| 2947 | } |
| 2948 | |
| 2949 | if (numdomains == 1) { |
| 2950 | if (*cdx_p == -1) { |
| 2951 | *cdx_p = cdx_array[0]; |
| 2952 | return 0; |
| 2953 | } |
| 2954 | PRINTKW("incorrect domain: specified = %d, found = %d\n", |
| 2955 | *cdx_p, cdx_array[0]); |
| 2956 | return Z90C_INCORRECT_DOMAIN; |
| 2957 | } |
| 2958 | |
| 2959 | numdomains--; |
| 2960 | sprintf(cdx_array_text, "%d", cdx_array[numdomains]); |
| 2961 | while (numdomains) { |
| 2962 | numdomains--; |
| 2963 | sprintf(temp, ", %d", cdx_array[numdomains]); |
| 2964 | strcat(cdx_array_text, temp); |
| 2965 | } |
| 2966 | |
| 2967 | PRINTKW("ambiguous domain detected: specified = %d, found array = %s\n", |
| 2968 | *cdx_p, cdx_array_text); |
| 2969 | return Z90C_AMBIGUOUS_DOMAIN; |
| 2970 | } |
| 2971 | |
| 2972 | static int |
| 2973 | refresh_z90crypt(int *cdx_p) |
| 2974 | { |
| 2975 | int i, j, indx, rv; |
| 2976 | static struct status local_mask; |
| 2977 | struct device *devPtr; |
| 2978 | unsigned char oldStat, newStat; |
| 2979 | int return_unchanged; |
| 2980 | |
| 2981 | if (z90crypt.len != sizeof(z90crypt)) |
| 2982 | return ENOTINIT; |
| 2983 | if (z90crypt.terminating) |
| 2984 | return TSQ_FATAL_ERROR; |
| 2985 | rv = 0; |
| 2986 | if (!z90crypt.hdware_info->hdware_mask.st_count && |
| 2987 | !z90crypt.domain_established) { |
| 2988 | rv = probe_crypto_domain(cdx_p); |
| 2989 | if (z90crypt.terminating) |
| 2990 | return TSQ_FATAL_ERROR; |
| 2991 | if (rv == Z90C_NO_DEVICES) |
| 2992 | return 0; // try later |
| 2993 | if (rv) |
| 2994 | return rv; |
| 2995 | z90crypt.cdx = *cdx_p; |
| 2996 | z90crypt.domain_established = 1; |
| 2997 | } |
| 2998 | rv = find_crypto_devices(&local_mask); |
| 2999 | if (rv) { |
| 3000 | PRINTK("find crypto devices returned %d\n", rv); |
| 3001 | return rv; |
| 3002 | } |
| 3003 | if (!memcmp(&local_mask, &z90crypt.hdware_info->hdware_mask, |
| 3004 | sizeof(struct status))) { |
| 3005 | return_unchanged = 1; |
| 3006 | for (i = 0; i < Z90CRYPT_NUM_TYPES; i++) { |
| 3007 | /** |
| 3008 | * Check for disabled cards. If any device is marked |
| 3009 | * disabled, destroy it. |
| 3010 | */ |
| 3011 | for (j = 0; |
| 3012 | j < z90crypt.hdware_info->type_mask[i].st_count; |
| 3013 | j++) { |
| 3014 | indx = z90crypt.hdware_info->type_x_addr[i]. |
| 3015 | device_index[j]; |
| 3016 | devPtr = z90crypt.device_p[indx]; |
| 3017 | if (devPtr && devPtr->disabled) { |
| 3018 | local_mask.st_mask[indx] = HD_NOT_THERE; |
| 3019 | return_unchanged = 0; |
| 3020 | } |
| 3021 | } |
| 3022 | } |
| 3023 | if (return_unchanged == 1) |
| 3024 | return 0; |
| 3025 | } |
| 3026 | |
| 3027 | spin_lock_irq(&queuespinlock); |
| 3028 | for (i = 0; i < z90crypt.max_count; i++) { |
| 3029 | oldStat = z90crypt.hdware_info->hdware_mask.st_mask[i]; |
| 3030 | newStat = local_mask.st_mask[i]; |
| 3031 | if ((oldStat == HD_ONLINE) && (newStat != HD_ONLINE)) |
| 3032 | destroy_crypto_device(i); |
| 3033 | else if ((oldStat != HD_ONLINE) && (newStat == HD_ONLINE)) { |
| 3034 | rv = create_crypto_device(i); |
| 3035 | if (rv >= REC_FATAL_ERROR) |
| 3036 | return rv; |
| 3037 | if (rv != 0) { |
| 3038 | local_mask.st_mask[i] = HD_NOT_THERE; |
| 3039 | local_mask.st_count--; |
| 3040 | } |
| 3041 | } |
| 3042 | } |
| 3043 | memcpy(z90crypt.hdware_info->hdware_mask.st_mask, local_mask.st_mask, |
| 3044 | sizeof(local_mask.st_mask)); |
| 3045 | z90crypt.hdware_info->hdware_mask.st_count = local_mask.st_count; |
| 3046 | z90crypt.hdware_info->hdware_mask.disabled_count = |
| 3047 | local_mask.disabled_count; |
| 3048 | refresh_index_array(&z90crypt.mask, &z90crypt.overall_device_x); |
| 3049 | for (i = 0; i < Z90CRYPT_NUM_TYPES; i++) |
| 3050 | refresh_index_array(&(z90crypt.hdware_info->type_mask[i]), |
| 3051 | &(z90crypt.hdware_info->type_x_addr[i])); |
| 3052 | spin_unlock_irq(&queuespinlock); |
| 3053 | |
| 3054 | return rv; |
| 3055 | } |
| 3056 | |
| 3057 | static int |
| 3058 | find_crypto_devices(struct status *deviceMask) |
| 3059 | { |
| 3060 | int i, q_depth, dev_type; |
| 3061 | enum hdstat hd_stat; |
| 3062 | |
| 3063 | deviceMask->st_count = 0; |
| 3064 | deviceMask->disabled_count = 0; |
| 3065 | deviceMask->user_disabled_count = 0; |
| 3066 | |
| 3067 | for (i = 0; i < z90crypt.max_count; i++) { |
| 3068 | hd_stat = query_online(i, z90crypt.cdx, MAX_RESET, &q_depth, |
| 3069 | &dev_type); |
| 3070 | if (hd_stat == HD_TSQ_EXCEPTION) { |
| 3071 | z90crypt.terminating = 1; |
| 3072 | PRINTKC("Exception during probe for crypto devices\n"); |
| 3073 | return TSQ_FATAL_ERROR; |
| 3074 | } |
| 3075 | deviceMask->st_mask[i] = hd_stat; |
| 3076 | if (hd_stat == HD_ONLINE) { |
| 3077 | PDEBUG("Got an online crypto!: %d\n", i); |
| 3078 | PDEBUG("Got a queue depth of %d\n", q_depth); |
| 3079 | PDEBUG("Got a device type of %d\n", dev_type); |
| 3080 | if (q_depth <= 0) |
| 3081 | return TSQ_FATAL_ERROR; |
| 3082 | deviceMask->st_count++; |
| 3083 | z90crypt.q_depth_array[i] = q_depth; |
| 3084 | z90crypt.dev_type_array[i] = dev_type; |
| 3085 | } |
| 3086 | } |
| 3087 | |
| 3088 | return 0; |
| 3089 | } |
| 3090 | |
| 3091 | static int |
| 3092 | refresh_index_array(struct status *status_str, struct device_x *index_array) |
| 3093 | { |
| 3094 | int i, count; |
| 3095 | enum devstat stat; |
| 3096 | |
| 3097 | i = -1; |
| 3098 | count = 0; |
| 3099 | do { |
| 3100 | stat = status_str->st_mask[++i]; |
| 3101 | if (stat == DEV_ONLINE) |
| 3102 | index_array->device_index[count++] = i; |
| 3103 | } while ((i < Z90CRYPT_NUM_DEVS) && (count < status_str->st_count)); |
| 3104 | |
| 3105 | return count; |
| 3106 | } |
| 3107 | |
| 3108 | static int |
| 3109 | create_crypto_device(int index) |
| 3110 | { |
| 3111 | int rv, devstat, total_size; |
| 3112 | struct device *dev_ptr; |
| 3113 | struct status *type_str_p; |
| 3114 | int deviceType; |
| 3115 | |
| 3116 | dev_ptr = z90crypt.device_p[index]; |
| 3117 | if (!dev_ptr) { |
| 3118 | total_size = sizeof(struct device) + |
| 3119 | z90crypt.q_depth_array[index] * sizeof(int); |
| 3120 | |
| 3121 | dev_ptr = (struct device *) kmalloc(total_size, GFP_ATOMIC); |
| 3122 | if (!dev_ptr) { |
| 3123 | PRINTK("kmalloc device %d failed\n", index); |
| 3124 | return ENOMEM; |
| 3125 | } |
| 3126 | memset(dev_ptr, 0, total_size); |
| 3127 | dev_ptr->dev_resp_p = kmalloc(MAX_RESPONSE_SIZE, GFP_ATOMIC); |
| 3128 | if (!dev_ptr->dev_resp_p) { |
| 3129 | kfree(dev_ptr); |
| 3130 | PRINTK("kmalloc device %d rec buffer failed\n", index); |
| 3131 | return ENOMEM; |
| 3132 | } |
| 3133 | dev_ptr->dev_resp_l = MAX_RESPONSE_SIZE; |
| 3134 | INIT_LIST_HEAD(&(dev_ptr->dev_caller_list)); |
| 3135 | } |
| 3136 | |
| 3137 | devstat = reset_device(index, z90crypt.cdx, MAX_RESET); |
| 3138 | if (devstat == DEV_RSQ_EXCEPTION) { |
| 3139 | PRINTK("exception during reset device %d\n", index); |
| 3140 | kfree(dev_ptr->dev_resp_p); |
| 3141 | kfree(dev_ptr); |
| 3142 | return RSQ_FATAL_ERROR; |
| 3143 | } |
| 3144 | if (devstat == DEV_ONLINE) { |
| 3145 | dev_ptr->dev_self_x = index; |
| 3146 | dev_ptr->dev_type = z90crypt.dev_type_array[index]; |
| 3147 | if (dev_ptr->dev_type == NILDEV) { |
| 3148 | rv = probe_device_type(dev_ptr); |
| 3149 | if (rv) { |
| 3150 | PRINTK("rv = %d from probe_device_type %d\n", |
| 3151 | rv, index); |
| 3152 | kfree(dev_ptr->dev_resp_p); |
| 3153 | kfree(dev_ptr); |
| 3154 | return rv; |
| 3155 | } |
| 3156 | } |
| 3157 | if (dev_ptr->dev_type == PCIXCC_UNK) { |
| 3158 | rv = probe_PCIXCC_type(dev_ptr); |
| 3159 | if (rv) { |
| 3160 | PRINTK("rv = %d from probe_PCIXCC_type %d\n", |
| 3161 | rv, index); |
| 3162 | kfree(dev_ptr->dev_resp_p); |
| 3163 | kfree(dev_ptr); |
| 3164 | return rv; |
| 3165 | } |
| 3166 | } |
| 3167 | deviceType = dev_ptr->dev_type; |
| 3168 | z90crypt.dev_type_array[index] = deviceType; |
| 3169 | if (deviceType == PCICA) |
| 3170 | z90crypt.hdware_info->device_type_array[index] = 1; |
| 3171 | else if (deviceType == PCICC) |
| 3172 | z90crypt.hdware_info->device_type_array[index] = 2; |
| 3173 | else if (deviceType == PCIXCC_MCL2) |
| 3174 | z90crypt.hdware_info->device_type_array[index] = 3; |
| 3175 | else if (deviceType == PCIXCC_MCL3) |
| 3176 | z90crypt.hdware_info->device_type_array[index] = 4; |
| 3177 | else if (deviceType == CEX2C) |
| 3178 | z90crypt.hdware_info->device_type_array[index] = 5; |
| 3179 | else |
| 3180 | z90crypt.hdware_info->device_type_array[index] = -1; |
| 3181 | } |
| 3182 | |
| 3183 | /** |
| 3184 | * 'q_depth' returned by the hardware is one less than |
| 3185 | * the actual depth |
| 3186 | */ |
| 3187 | dev_ptr->dev_q_depth = z90crypt.q_depth_array[index]; |
| 3188 | dev_ptr->dev_type = z90crypt.dev_type_array[index]; |
| 3189 | dev_ptr->dev_stat = devstat; |
| 3190 | dev_ptr->disabled = 0; |
| 3191 | z90crypt.device_p[index] = dev_ptr; |
| 3192 | |
| 3193 | if (devstat == DEV_ONLINE) { |
| 3194 | if (z90crypt.mask.st_mask[index] != DEV_ONLINE) { |
| 3195 | z90crypt.mask.st_mask[index] = DEV_ONLINE; |
| 3196 | z90crypt.mask.st_count++; |
| 3197 | } |
| 3198 | deviceType = dev_ptr->dev_type; |
| 3199 | type_str_p = &z90crypt.hdware_info->type_mask[deviceType]; |
| 3200 | if (type_str_p->st_mask[index] != DEV_ONLINE) { |
| 3201 | type_str_p->st_mask[index] = DEV_ONLINE; |
| 3202 | type_str_p->st_count++; |
| 3203 | } |
| 3204 | } |
| 3205 | |
| 3206 | return 0; |
| 3207 | } |
| 3208 | |
| 3209 | static int |
| 3210 | destroy_crypto_device(int index) |
| 3211 | { |
| 3212 | struct device *dev_ptr; |
| 3213 | int t, disabledFlag; |
| 3214 | |
| 3215 | dev_ptr = z90crypt.device_p[index]; |
| 3216 | |
| 3217 | /* remember device type; get rid of device struct */ |
| 3218 | if (dev_ptr) { |
| 3219 | disabledFlag = dev_ptr->disabled; |
| 3220 | t = dev_ptr->dev_type; |
| 3221 | if (dev_ptr->dev_resp_p) |
| 3222 | kfree(dev_ptr->dev_resp_p); |
| 3223 | kfree(dev_ptr); |
| 3224 | } else { |
| 3225 | disabledFlag = 0; |
| 3226 | t = -1; |
| 3227 | } |
| 3228 | z90crypt.device_p[index] = 0; |
| 3229 | |
| 3230 | /* if the type is valid, remove the device from the type_mask */ |
| 3231 | if ((t != -1) && z90crypt.hdware_info->type_mask[t].st_mask[index]) { |
| 3232 | z90crypt.hdware_info->type_mask[t].st_mask[index] = 0x00; |
| 3233 | z90crypt.hdware_info->type_mask[t].st_count--; |
| 3234 | if (disabledFlag == 1) |
| 3235 | z90crypt.hdware_info->type_mask[t].disabled_count--; |
| 3236 | } |
| 3237 | if (z90crypt.mask.st_mask[index] != DEV_GONE) { |
| 3238 | z90crypt.mask.st_mask[index] = DEV_GONE; |
| 3239 | z90crypt.mask.st_count--; |
| 3240 | } |
| 3241 | z90crypt.hdware_info->device_type_array[index] = 0; |
| 3242 | |
| 3243 | return 0; |
| 3244 | } |
| 3245 | |
| 3246 | static void |
| 3247 | destroy_z90crypt(void) |
| 3248 | { |
| 3249 | int i; |
| 3250 | for (i = 0; i < z90crypt.max_count; i++) |
| 3251 | if (z90crypt.device_p[i]) |
| 3252 | destroy_crypto_device(i); |
| 3253 | if (z90crypt.hdware_info) |
| 3254 | kfree((void *)z90crypt.hdware_info); |
| 3255 | memset((void *)&z90crypt, 0, sizeof(z90crypt)); |
| 3256 | } |
| 3257 | |
| 3258 | static unsigned char static_testmsg[384] = { |
| 3259 | 0x00,0x00,0x00,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x00,0x06,0x00,0x00, |
| 3260 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x58, |
| 3261 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x43,0x43, |
| 3262 | 0x41,0x2d,0x41,0x50,0x50,0x4c,0x20,0x20,0x20,0x01,0x01,0x01,0x00,0x00,0x00,0x00, |
| 3263 | 0x50,0x4b,0x00,0x00,0x00,0x00,0x01,0x1c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3264 | 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0xb8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3265 | 0x00,0x00,0x00,0x00,0x70,0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x32, |
| 3266 | 0x01,0x00,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3267 | 0xb8,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3268 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3269 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3270 | 0x00,0x00,0x00,0x00,0x00,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3271 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x49,0x43,0x53,0x46, |
| 3272 | 0x20,0x20,0x20,0x20,0x50,0x4b,0x0a,0x00,0x50,0x4b,0x43,0x53,0x2d,0x31,0x2e,0x32, |
| 3273 | 0x37,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44, |
| 3274 | 0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00, |
| 3275 | 0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,0x55,0x66, |
| 3276 | 0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x5d,0x00,0x5b,0x00,0x77,0x88,0x1e,0x00,0x00, |
| 3277 | 0x57,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x4f,0x00,0x00,0x00,0x03,0x02,0x00,0x00, |
| 3278 | 0x40,0x01,0x00,0x01,0xce,0x02,0x68,0x2d,0x5f,0xa9,0xde,0x0c,0xf6,0xd2,0x7b,0x58, |
| 3279 | 0x4b,0xf9,0x28,0x68,0x3d,0xb4,0xf4,0xef,0x78,0xd5,0xbe,0x66,0x63,0x42,0xef,0xf8, |
| 3280 | 0xfd,0xa4,0xf8,0xb0,0x8e,0x29,0xc2,0xc9,0x2e,0xd8,0x45,0xb8,0x53,0x8c,0x6f,0x4e, |
| 3281 | 0x72,0x8f,0x6c,0x04,0x9c,0x88,0xfc,0x1e,0xc5,0x83,0x55,0x57,0xf7,0xdd,0xfd,0x4f, |
| 3282 | 0x11,0x36,0x95,0x5d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 |
| 3283 | }; |
| 3284 | |
| 3285 | static int |
| 3286 | probe_device_type(struct device *devPtr) |
| 3287 | { |
| 3288 | int rv, dv, i, index, length; |
| 3289 | unsigned char psmid[8]; |
| 3290 | static unsigned char loc_testmsg[sizeof(static_testmsg)]; |
| 3291 | |
| 3292 | index = devPtr->dev_self_x; |
| 3293 | rv = 0; |
| 3294 | do { |
| 3295 | memcpy(loc_testmsg, static_testmsg, sizeof(static_testmsg)); |
| 3296 | length = sizeof(static_testmsg) - 24; |
| 3297 | /* the -24 allows for the header */ |
| 3298 | dv = send_to_AP(index, z90crypt.cdx, length, loc_testmsg); |
| 3299 | if (dv) { |
| 3300 | PDEBUG("dv returned by send during probe: %d\n", dv); |
| 3301 | if (dv == DEV_SEN_EXCEPTION) { |
| 3302 | rv = SEN_FATAL_ERROR; |
| 3303 | PRINTKC("exception in send to AP %d\n", index); |
| 3304 | break; |
| 3305 | } |
| 3306 | PDEBUG("return value from send_to_AP: %d\n", rv); |
| 3307 | switch (dv) { |
| 3308 | case DEV_GONE: |
| 3309 | PDEBUG("dev %d not available\n", index); |
| 3310 | rv = SEN_NOT_AVAIL; |
| 3311 | break; |
| 3312 | case DEV_ONLINE: |
| 3313 | rv = 0; |
| 3314 | break; |
| 3315 | case DEV_EMPTY: |
| 3316 | rv = SEN_NOT_AVAIL; |
| 3317 | break; |
| 3318 | case DEV_NO_WORK: |
| 3319 | rv = SEN_FATAL_ERROR; |
| 3320 | break; |
| 3321 | case DEV_BAD_MESSAGE: |
| 3322 | rv = SEN_USER_ERROR; |
| 3323 | break; |
| 3324 | case DEV_QUEUE_FULL: |
| 3325 | rv = SEN_QUEUE_FULL; |
| 3326 | break; |
| 3327 | default: |
| 3328 | PRINTK("unknown dv=%d for dev %d\n", dv, index); |
| 3329 | rv = SEN_NOT_AVAIL; |
| 3330 | break; |
| 3331 | } |
| 3332 | } |
| 3333 | |
| 3334 | if (rv) |
| 3335 | break; |
| 3336 | |
| 3337 | for (i = 0; i < 6; i++) { |
| 3338 | mdelay(300); |
| 3339 | dv = receive_from_AP(index, z90crypt.cdx, |
| 3340 | devPtr->dev_resp_l, |
| 3341 | devPtr->dev_resp_p, psmid); |
| 3342 | PDEBUG("dv returned by DQ = %d\n", dv); |
| 3343 | if (dv == DEV_REC_EXCEPTION) { |
| 3344 | rv = REC_FATAL_ERROR; |
| 3345 | PRINTKC("exception in dequeue %d\n", |
| 3346 | index); |
| 3347 | break; |
| 3348 | } |
| 3349 | switch (dv) { |
| 3350 | case DEV_ONLINE: |
| 3351 | rv = 0; |
| 3352 | break; |
| 3353 | case DEV_EMPTY: |
| 3354 | rv = REC_EMPTY; |
| 3355 | break; |
| 3356 | case DEV_NO_WORK: |
| 3357 | rv = REC_NO_WORK; |
| 3358 | break; |
| 3359 | case DEV_BAD_MESSAGE: |
| 3360 | case DEV_GONE: |
| 3361 | default: |
| 3362 | rv = REC_NO_RESPONSE; |
| 3363 | break; |
| 3364 | } |
| 3365 | if ((rv != 0) && (rv != REC_NO_WORK)) |
| 3366 | break; |
| 3367 | if (rv == 0) |
| 3368 | break; |
| 3369 | } |
| 3370 | if (rv) |
| 3371 | break; |
| 3372 | rv = (devPtr->dev_resp_p[0] == 0x00) && |
| 3373 | (devPtr->dev_resp_p[1] == 0x86); |
| 3374 | if (rv) |
| 3375 | devPtr->dev_type = PCICC; |
| 3376 | else |
| 3377 | devPtr->dev_type = PCICA; |
| 3378 | rv = 0; |
| 3379 | } while (0); |
| 3380 | /* In a general error case, the card is not marked online */ |
| 3381 | return rv; |
| 3382 | } |
| 3383 | |
| 3384 | static unsigned char MCL3_testmsg[] = { |
| 3385 | 0x00,0x00,0x00,0x00,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE, |
| 3386 | 0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3387 | 0x00,0x00,0x00,0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3388 | 0x43,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3389 | 0x00,0x00,0x00,0x00,0x50,0x4B,0x00,0x00,0x00,0x00,0x01,0xC4,0x00,0x00,0x00,0x00, |
| 3390 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x24,0x00,0x00,0x00,0x00, |
| 3391 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xDC,0x02,0x00,0x00,0x00,0x54,0x32, |
| 3392 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE8,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x24, |
| 3393 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3394 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3395 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3396 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3397 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3398 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3399 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3400 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3401 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3402 | 0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3403 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3404 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, |
| 3405 | 0x00,0x00,0x00,0x00,0x50,0x4B,0x00,0x0A,0x4D,0x52,0x50,0x20,0x20,0x20,0x20,0x20, |
| 3406 | 0x00,0x42,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D, |
| 3407 | 0x0E,0x0F,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xAA,0xBB,0xCC,0xDD, |
| 3408 | 0xEE,0xFF,0xFF,0xEE,0xDD,0xCC,0xBB,0xAA,0x99,0x88,0x77,0x66,0x55,0x44,0x33,0x22, |
| 3409 | 0x11,0x00,0x01,0x23,0x45,0x67,0x89,0xAB,0xCD,0xEF,0xFE,0xDC,0xBA,0x98,0x76,0x54, |
| 3410 | 0x32,0x10,0x00,0x9A,0x00,0x98,0x00,0x00,0x1E,0x00,0x00,0x94,0x00,0x00,0x00,0x00, |
| 3411 | 0x04,0x00,0x00,0x8C,0x00,0x00,0x00,0x40,0x02,0x00,0x00,0x40,0xBA,0xE8,0x23,0x3C, |
| 3412 | 0x75,0xF3,0x91,0x61,0xD6,0x73,0x39,0xCF,0x7B,0x6D,0x8E,0x61,0x97,0x63,0x9E,0xD9, |
| 3413 | 0x60,0x55,0xD6,0xC7,0xEF,0xF8,0x1E,0x63,0x95,0x17,0xCC,0x28,0x45,0x60,0x11,0xC5, |
| 3414 | 0xC4,0x4E,0x66,0xC6,0xE6,0xC3,0xDE,0x8A,0x19,0x30,0xCF,0x0E,0xD7,0xAA,0xDB,0x01, |
| 3415 | 0xD8,0x00,0xBB,0x8F,0x39,0x9F,0x64,0x28,0xF5,0x7A,0x77,0x49,0xCC,0x6B,0xA3,0x91, |
| 3416 | 0x97,0x70,0xE7,0x60,0x1E,0x39,0xE1,0xE5,0x33,0xE1,0x15,0x63,0x69,0x08,0x80,0x4C, |
| 3417 | 0x67,0xC4,0x41,0x8F,0x48,0xDF,0x26,0x98,0xF1,0xD5,0x8D,0x88,0xD9,0x6A,0xA4,0x96, |
| 3418 | 0xC5,0x84,0xD9,0x30,0x49,0x67,0x7D,0x19,0xB1,0xB3,0x45,0x4D,0xB2,0x53,0x9A,0x47, |
| 3419 | 0x3C,0x7C,0x55,0xBF,0xCC,0x85,0x00,0x36,0xF1,0x3D,0x93,0x53 |
| 3420 | }; |
| 3421 | |
| 3422 | static int |
| 3423 | probe_PCIXCC_type(struct device *devPtr) |
| 3424 | { |
| 3425 | int rv, dv, i, index, length; |
| 3426 | unsigned char psmid[8]; |
| 3427 | static unsigned char loc_testmsg[548]; |
| 3428 | struct CPRBX *cprbx_p; |
| 3429 | |
| 3430 | index = devPtr->dev_self_x; |
| 3431 | rv = 0; |
| 3432 | do { |
| 3433 | memcpy(loc_testmsg, MCL3_testmsg, sizeof(MCL3_testmsg)); |
| 3434 | length = sizeof(MCL3_testmsg) - 0x0C; |
| 3435 | dv = send_to_AP(index, z90crypt.cdx, length, loc_testmsg); |
| 3436 | if (dv) { |
| 3437 | PDEBUG("dv returned = %d\n", dv); |
| 3438 | if (dv == DEV_SEN_EXCEPTION) { |
| 3439 | rv = SEN_FATAL_ERROR; |
| 3440 | PRINTKC("exception in send to AP %d\n", index); |
| 3441 | break; |
| 3442 | } |
| 3443 | PDEBUG("return value from send_to_AP: %d\n", rv); |
| 3444 | switch (dv) { |
| 3445 | case DEV_GONE: |
| 3446 | PDEBUG("dev %d not available\n", index); |
| 3447 | rv = SEN_NOT_AVAIL; |
| 3448 | break; |
| 3449 | case DEV_ONLINE: |
| 3450 | rv = 0; |
| 3451 | break; |
| 3452 | case DEV_EMPTY: |
| 3453 | rv = SEN_NOT_AVAIL; |
| 3454 | break; |
| 3455 | case DEV_NO_WORK: |
| 3456 | rv = SEN_FATAL_ERROR; |
| 3457 | break; |
| 3458 | case DEV_BAD_MESSAGE: |
| 3459 | rv = SEN_USER_ERROR; |
| 3460 | break; |
| 3461 | case DEV_QUEUE_FULL: |
| 3462 | rv = SEN_QUEUE_FULL; |
| 3463 | break; |
| 3464 | default: |
| 3465 | PRINTK("unknown dv=%d for dev %d\n", dv, index); |
| 3466 | rv = SEN_NOT_AVAIL; |
| 3467 | break; |
| 3468 | } |
| 3469 | } |
| 3470 | |
| 3471 | if (rv) |
| 3472 | break; |
| 3473 | |
| 3474 | for (i = 0; i < 6; i++) { |
| 3475 | mdelay(300); |
| 3476 | dv = receive_from_AP(index, z90crypt.cdx, |
| 3477 | devPtr->dev_resp_l, |
| 3478 | devPtr->dev_resp_p, psmid); |
| 3479 | PDEBUG("dv returned by DQ = %d\n", dv); |
| 3480 | if (dv == DEV_REC_EXCEPTION) { |
| 3481 | rv = REC_FATAL_ERROR; |
| 3482 | PRINTKC("exception in dequeue %d\n", |
| 3483 | index); |
| 3484 | break; |
| 3485 | } |
| 3486 | switch (dv) { |
| 3487 | case DEV_ONLINE: |
| 3488 | rv = 0; |
| 3489 | break; |
| 3490 | case DEV_EMPTY: |
| 3491 | rv = REC_EMPTY; |
| 3492 | break; |
| 3493 | case DEV_NO_WORK: |
| 3494 | rv = REC_NO_WORK; |
| 3495 | break; |
| 3496 | case DEV_BAD_MESSAGE: |
| 3497 | case DEV_GONE: |
| 3498 | default: |
| 3499 | rv = REC_NO_RESPONSE; |
| 3500 | break; |
| 3501 | } |
| 3502 | if ((rv != 0) && (rv != REC_NO_WORK)) |
| 3503 | break; |
| 3504 | if (rv == 0) |
| 3505 | break; |
| 3506 | } |
| 3507 | if (rv) |
| 3508 | break; |
| 3509 | cprbx_p = (struct CPRBX *) (devPtr->dev_resp_p + 48); |
| 3510 | if ((cprbx_p->ccp_rtcode == 8) && (cprbx_p->ccp_rscode == 33)) { |
| 3511 | devPtr->dev_type = PCIXCC_MCL2; |
| 3512 | PDEBUG("device %d is MCL2\n", index); |
| 3513 | } else { |
| 3514 | devPtr->dev_type = PCIXCC_MCL3; |
| 3515 | PDEBUG("device %d is MCL3\n", index); |
| 3516 | } |
| 3517 | } while (0); |
| 3518 | /* In a general error case, the card is not marked online */ |
| 3519 | return rv; |
| 3520 | } |
| 3521 | |
| 3522 | #ifdef Z90CRYPT_USE_HOTPLUG |
| 3523 | static void |
| 3524 | z90crypt_hotplug_event(int dev_major, int dev_minor, int action) |
| 3525 | { |
| 3526 | #ifdef CONFIG_HOTPLUG |
| 3527 | char *argv[3]; |
| 3528 | char *envp[6]; |
| 3529 | char major[20]; |
| 3530 | char minor[20]; |
| 3531 | |
| 3532 | sprintf(major, "MAJOR=%d", dev_major); |
| 3533 | sprintf(minor, "MINOR=%d", dev_minor); |
| 3534 | |
| 3535 | argv[0] = hotplug_path; |
| 3536 | argv[1] = "z90crypt"; |
| 3537 | argv[2] = 0; |
| 3538 | |
| 3539 | envp[0] = "HOME=/"; |
| 3540 | envp[1] = "PATH=/sbin:/bin:/usr/sbin:/usr/bin"; |
| 3541 | |
| 3542 | switch (action) { |
| 3543 | case Z90CRYPT_HOTPLUG_ADD: |
| 3544 | envp[2] = "ACTION=add"; |
| 3545 | break; |
| 3546 | case Z90CRYPT_HOTPLUG_REMOVE: |
| 3547 | envp[2] = "ACTION=remove"; |
| 3548 | break; |
| 3549 | default: |
| 3550 | BUG(); |
| 3551 | break; |
| 3552 | } |
| 3553 | envp[3] = major; |
| 3554 | envp[4] = minor; |
| 3555 | envp[5] = 0; |
| 3556 | |
| 3557 | call_usermodehelper(argv[0], argv, envp, 0); |
| 3558 | #endif |
| 3559 | } |
| 3560 | #endif |
| 3561 | |
| 3562 | module_init(z90crypt_init_module); |
| 3563 | module_exit(z90crypt_cleanup_module); |